Mapping logical qubits on a quantum circuit

Abstract

A swap insertion in mapped logical qubits on a quantum circuit is performed by obtaining a sequence of operations comprising multiple operations to be performed on the quantum circuit. The quantum circuit comprises multiple physical qubits and multiple couplings. A blocking operation set comprising leading unresolved operations in the operation sequence is searched. A first coupling score is calculated for each of the multiple couplings based on the total reduction in the shortest path length of the multiple unresolved operations. A coupling is selected based on the first coupling score for each coupling. The blocking set is updated by removing any leading unresolved operations from the blocking set, which can be performed after swapping a pair of logical qubits stored in a pair of physical qubits connected by the selected coupling.

Description

Technical Field

[0001] This invention relates to swap insertion in mapped logical qubits on quantum circuits. More specifically, this invention relates to swap insertion in mapped logical qubits on quantum circuits, which can reduce the number of swap operations or swap gates for a given sequence of quantum operations. Background Technology

[0002] Recently, quantum computing has become one of the most advanced technologies and is gradually becoming more popular. For example, IBM launched a cloud service called the “IBM Q Experience,” which enables users to access quantum computers via the internet. Quantum computers have quantum circuits, which consist of physical qubits, or qubits, and couplings. Each physical qubit stores one logical qubit, and each coupling is a connection between a pair of physical qubits configured to facilitate quantum operations on the pair of logical qubits stored therein. IBM is a trademark of International Business Machines Corporation registered in many jurisdictions worldwide.

[0003] Due to the physical limitations of physical quantum circuits, the number of couplings (i.e., the number of pairs of physical qubits between which quantum operations can be performed) is finite. Therefore, before a quantum operation can be performed on a pair of logical qubits, one logical qubit must often be moved until it is in a physical qubit adjacent to another physical qubit containing the other logical qubit in the quantum operation, so that the quantum operation can be performed. Swap operations, or swap gates, are used to move logical qubits by coupling. A pair of logical qubits stored in a pair of adjacent physical qubits are swapped; these qubits are coupled together by coupling.

[0004] Therefore, this field needs to address the aforementioned issues. Summary of the Invention

[0005] From a first aspect, the present invention provides a computer-implemented method comprising: obtaining an operation sequence including a plurality of operations to be performed on a quantum computing device, the quantum computing device including a plurality of physical qubits and a plurality of couplings, each physical qubit storing a logical qubit, each coupling being a connection between a pair of physical qubits configured to facilitate the execution of an operation on a pair of logical qubits stored in the pair of physical qubits; searching for a set of blocking operations including at least one preceding unresolved operation in the operation sequence; and calculating a first coupling for each of the plurality of couplings based on the total reduction in the shortest path length of the plurality of unresolved operations among the plurality of operations. The shortest path length of an unresolved operation represents the minimum distance between a pair of physical qubits storing a pair of logical qubits to be used by the corresponding unresolved operation via coupling on the quantum computing device, and the total reduction in the shortest path length is the sum of the amount by which each shortest path length will be reduced by swapping a pair of logical qubits stored in a pair of physical qubits connected by the corresponding coupling; couplings are selected based on a first coupling score for each coupling; and the blocking set is updated by removing any leading unresolved operations from the blocking set, which can be performed after swapping a pair of logical qubits stored in a pair of physical qubits connected by the selected coupling.

[0006] In another aspect, the present invention provides an apparatus comprising: a processor or programmable circuitry; and one or more computer-readable media, the one or more computer-readable media collectively including instructions that, when executed by the processor or programmable circuitry, cause the processor or programmable circuitry to: obtain a sequence of operations comprising a plurality of operations to be performed on a quantum computing device comprising a plurality of physical qubits and a plurality of couplings, each physical qubit storing a logical qubit, each coupling being a connection between a pair of physical qubits configured to facilitate the execution of an operation on a pair of logical qubits stored in the pair of physical qubits; search for a set of blocking operations comprising at least one preceding unresolved operation in the sequence of operations; and based on the plurality of operations... The total reduction of the shortest path length of multiple unresolved operations is used to calculate a first coupling score for each of the multiple couplings, wherein the shortest path length of an unresolved operation represents the minimum distance between a pair of physical qubits storing a pair of logical qubits to be used by the corresponding unresolved operation via the coupling on the quantum computing device, and wherein the total reduction of the shortest path length is the sum of the amount by which each shortest path length will be reduced by swapping a pair of logical qubits stored in a pair of physical qubits connected by the corresponding coupling; couplings are selected based on the first coupling score for each coupling; and the blocking set is updated by removing any leading unresolved operations from the blocking set, which can be performed after swapping a pair of logical qubits stored in a pair of physical qubits connected by the selected coupling.

[0007] In a further aspect, the present invention provides a quantum computing system, comprising: a quantum computing device including a plurality of physical qubits and a plurality of couplings, each physical qubit storing a logical qubit, each coupling being a connection between a pair of physical qubits configured to facilitate the execution of an operation on a pair of logical qubits stored in the pair of physical qubits; and means for mapping a plurality of operations in a sequence of operations to be executed on the quantum computing device, wherein the means includes: an obtaining unit for obtaining the sequence of operations; a searching unit for searching a set of blocking operations including at least one preceding unresolved operation in the sequence of operations; and a computing unit for calculating, based on the total reduction in the shortest path length of the plurality of unresolved operations in the plurality of operations, a set of blocking operations including at least one preceding unresolved operation in the sequence of operations. Each of the plurality of couplings calculates a first coupling score, wherein the shortest path length of an unresolved operation represents the minimum distance via the coupling on the quantum computing device between a pair of physical qubits storing a pair of logical qubits to be used by the corresponding quantum operation, and wherein the total reduction in the shortest path length is the sum of the amount by which each shortest path length would be reduced by swapping a pair of logical qubits stored in a pair of physical qubits connected by the corresponding coupling; a selection unit for selecting a coupling based on the first coupling score of each coupling; and an update unit for updating the blocking set by removing any leading unresolved operations from the blocking set, which can be performed after swapping a pair of logical qubits stored in a pair of physical qubits connected by the selected coupling.

[0008] In another aspect, the present invention provides a computer program product for managing physical quantum circuits, the computer program product comprising: a computer-readable storage medium capable of being read by a processing circuit and storing instructions for execution by the processing circuit to perform a method for performing the steps of the present invention.

[0009] In another respect, the present invention provides a computer program stored on a computer-readable medium and loadable into the internal memory of a digital computer, the computer program including a software code portion that, when the program is run on a computer, performs the steps of the present invention.

[0010] According to one embodiment of the present invention, a computer-implemented method is provided, comprising: obtaining a sequence of operations including a plurality of operations to be performed on a quantum circuit, the quantum circuit including a plurality of physical qubits and a plurality of couplings, each physical qubit storing a logical qubit, and each coupling being a connection between a pair of physical qubits configured to facilitate the execution of an operation on a pair of logical qubits stored in the pair of physical qubits. The method further includes finding a set of blocking operations including at least one preceding unresolved operation in the sequence of operations. The method further includes calculating a first coupling score for each of the plurality of couplings based on the total reduction of the shortest path lengths of the plurality of unresolved operations, wherein the shortest path length of an unresolved operation represents the minimum distance between a pair of physical qubits storing a pair of logical qubits to be used by the corresponding unresolved operation via a coupling on the quantum circuit, and wherein the total reduction of the shortest path lengths is the sum of the amounts by which each shortest path length would be reduced by swapping a pair of logical qubits stored in a pair of physical qubits connected by the corresponding coupling. The method also includes selecting couplings based on a first coupling score for each coupling, and updating the blocking set by removing any leading unresolved operations from the blocking set, which can be performed after swapping a pair of logical qubits stored in a pair of physical qubits connected by the selected couplings. In this way, the computer-implemented method can efficiently reduce the total shortest path length of multiple unresolved operations.

[0011] The update may include updating the blocking set by adding a new leading unresolved operation from the operation sequence. The new leading unresolved operation becomes a leading unresolved operation after being removed from the blocking set. In this way, the computer-implemented method can increase the probability of reducing the number of swap operations inserted into the operation sequence.

[0012] The multiple unresolved operations are a subset of all unresolved operations in the sequence of operations. By restricting the unresolved operations to be considered, this computer-implemented method can reduce the computational cost of calculating the first coupling score.

[0013] Calculating the first coupling score involves a weighted sum based on the reduction of the shortest path length for each unresolved operation to compute the first coupling score for each coupling. In this way, the computer-implemented method can give higher priority to resolving preceding unresolved operations in the blocking set.

[0014] Calculating the first coupling score involves weighting the reduction in the shortest path length of the unresolved operation of interest based on the number of unresolved operations between the unresolved operation of interest and its preceding unresolved operation in the dependency graph of the plurality of operations. In this way, the computer-implemented method can give higher priority to resolving unresolved operations with a smaller number of unresolved operations between preceding unresolved operations in the blocking set.

[0015] Calculating the first coupling score involves weighting the reduction in the shortest path length of the unresolved operation of interest based on the maximum distance between the unresolved operation of interest and its preceding unresolved operation on the dependency graph of the plurality of operations within the blocking set. In this way, a computer-implemented method can assign higher priority to resolving unresolved operations that have a smaller distance to their preceding unresolved operations in the blocking set.

[0016] According to another embodiment of the present invention, a computer program product is provided, comprising one or more computer-readable storage media that share program instructions executable by a processor or programmable circuit to cause the processor or programmable circuit to perform an operation comprising: obtaining a sequence of operations including a plurality of operations to be performed on a quantum circuit. The quantum circuit includes a plurality of physical qubits and a plurality of couplings. Each physical qubit stores a logical qubit, and each coupling is a connection between a pair of physical qubits configured to facilitate the execution of an operation on a pair of logical qubits stored in the pair of physical qubits. The operation further includes finding a set of blocking operations including at least one preceding unresolved operation in the sequence of operations. The operation further includes calculating a first coupling score for each of the plurality of couplings based on the total reduction of the shortest path lengths of the plurality of unresolved operations, wherein the shortest path length of an unresolved operation represents the minimum distance between a pair of physical qubits storing a pair of logical qubits to be used by the corresponding unresolved operation via a coupling on the quantum circuit, and wherein the total reduction of the shortest path length is the sum of the amounts by which each shortest path length would be reduced by swapping a pair of logical qubits stored in a pair of physical qubits connected by the corresponding coupling. The operation also includes selecting couplings based on a first coupling score for each coupling, and updating the blocking set by removing any leading unresolved operations from the blocking set, which can be performed after swapping a pair of logical qubits stored in a pair of physical qubits connected by the selected couplings.

[0017] According to another embodiment of the present invention, an apparatus is provided, including a processor or programmable circuit, and one or more computer-readable media, the one or more computer-readable media collectively including instructions that, when executed by the processor or programmable circuit, cause the processor or programmable circuit to obtain a sequence of operations, the sequence of operations including a plurality of operations to be performed on a quantum circuit. The quantum circuit includes a plurality of physical qubits and a plurality of couplings. Each physical qubit stores a logical qubit, and each coupling is a connection between a pair of physical qubits configured to facilitate the execution of an operation on the pair of logical qubits stored in the pair of physical qubits. The instructions also cause the processor to find a set of blocking operations including at least one preceding unresolved operation in the sequence of operations. The instructions also cause the processor to calculate a first coupling score for each of the plurality of couplings based on the total reduction in the shortest path lengths of the plurality of unresolved operations, wherein the shortest path length of an unresolved operation represents the minimum distance via the coupling on the quantum circuit between a pair of physical qubits storing a pair of logical qubits to be used by the corresponding unresolved operation, and wherein the total reduction in the shortest path length is the sum of the amounts by which each shortest path length would be reduced by swapping a pair of logical qubits stored in a pair of physical qubits connected by the corresponding coupling. The instructions also cause the processor to select couplings based on the first coupling score for each coupling, and to update the blocking set by removing any leading unresolved operations from the blocking set, which can be performed after swapping a pair of logical qubits stored in a pair of physical qubits connected by the selected coupling.

[0018] According to another embodiment of the present invention, a quantum computing system is provided, comprising: a quantum circuit including a plurality of physical qubits and a plurality of couplings. Each physical qubit stores a logical qubit, and each coupling is a connection between a pair of physical qubits configured to facilitate the execution of an operation on a pair of logical qubits stored in the pair of physical qubits. The quantum computing system further includes means for mapping a plurality of operations in a sequence of operations to be performed on the quantum circuit, wherein the means includes: an obtaining unit for obtaining the sequence of operations. The means further includes a searching unit for searching a set of blocking operations including at least one preceding unresolved operation in the sequence of operations. The means further includes a computing unit for calculating a first coupling score for each of the plurality of couplings based on the total reduction of the shortest path lengths of the plurality of unresolved operations, wherein the shortest path length of an unresolved operation represents the minimum distance between a pair of physical qubits storing a pair of logical qubits to be used by the corresponding quantum operation via a coupling on the quantum circuit, and wherein the total reduction of the shortest path length is the sum of the amounts by which each shortest path length would be reduced by swapping a pair of logical qubits stored in a pair of physical qubits connected by the corresponding coupling. The device also includes a selection unit for selecting couplings based on a first coupling score for each coupling; and an update unit for updating the blocking set by removing any leading unresolved operations from the blocking set, which can be performed after swapping a pair of logical qubits stored in a pair of physical qubits connected by the selected couplings.

[0019] The Summary of the Invention does not necessarily describe all the necessary features of the embodiments of the present invention. Not all features described in the Summary of the Invention are essential to the present invention. The present invention may also be a sub-combination of the above features. Attached Figure Description

[0020] The invention will now be described by way of example only, with reference to preferred embodiments as shown in the following figures:

[0021] Figure 1 A quantum computing system according to an embodiment of the present invention is shown.

[0022] Figure 2 An example of a logic quantum circuit according to an embodiment of the present invention is shown.

[0023] Figure 3 An example of a physical quantum circuit according to an embodiment of the present invention is shown.

[0024] Figure 4 An apparatus according to an embodiment of the present invention is shown.

[0025] Figure 5 An example of a dependency graph according to an embodiment of the present invention is shown.

[0026] Figure 6 An operation flow according to an embodiment of the present invention is shown.

[0027] Figure 7 An operation flow according to an embodiment of the present invention is shown.

[0028] Figure 8 An operation flow according to an embodiment of the present invention is shown.

[0029] Figure 9 An example of a third coupling score according to an embodiment of the present invention is shown.

[0030] Figure 10 An example of a score is shown according to an embodiment of the present invention.

[0031] Figure 11 An example of a score is shown according to an embodiment of the present invention.

[0032] Figure 12 An exemplary hardware configuration of a computer according to an embodiment of the present invention is shown. Detailed Implementation

[0033] In the following sections, exemplary embodiments of the invention will be described. These exemplary embodiments should not be construed as limiting the invention as described in the claims, and combinations of the features described in these embodiments are not necessarily essential to the invention.

[0034] Figure 1 A quantum computing system 100 according to an embodiment of the present invention is shown. The quantum computing system 100 includes a quantum computing device 110 and a means 140.

[0035] The quantum computing device 110 includes a plurality of physical qubits 120a to 120d (which are individually or collectively referred to as one or more physical qubits 120) and a plurality of couplers 130a to 130c (which are individually or collectively referred to as one or more couplers 130). Each physical qubit 120 stores one logical qubit. Mathematically, each logical qubit has a state |ψ>=c0|0>+c1|1>, which is a superposition of the state |0> corresponding to bit value 0 and the state |1> corresponding to bit value 1. Here, c0 and c1 are complex values, such that |c0| 2 +|c1| 2 =1.

[0036] Each coupling is a connection between a pair of physical qubits configured to facilitate the execution of a quantum operation on a pair of logical qubits stored in that pair of physical qubits. In this specification, "quantum operation" means an instruction or command to be applied to one or more quantum qubits, or a combination of instructions or commands in a programming language for quantum computing. For example, "quantum operation" can represent a quantum gate, or a combination of quantum gates that can be considered a single function. A "quantum operation" can be represented by a block of functions. For example, a block of functions can represent a quantum gate or a combination of quantum gates in a GUI used to program quantum computing algorithms. In this application, "quantum operation" may be abbreviated as "operation" if explicitly applied to one or more qubits.

[0037] Quantum operations can be categorized into single-qubit operations and multi-qubit operations. Examples of single-qubit operations include single gates, Pauli X / Y / Z gates, Hadamard gates, and measurement gates. A single-qubit operation can be performed on a single qubit without the use of coupling. Examples of multi-qubit operations include controlled unitary gates, controlled-NOT (CNOT) gates, and swap gates. Multi-qubit operations are performed on multiple qubits (two qubits in these examples) connected by multiple couplings (a single coupling in this two-qubit example). Figure 1 In this context, a two-qubit operation can be performed on a pair of logical qubits b0 and b1 stored in a pair of physical qubits 120a(q0) and 120b(q1) using coupling 130a; on a pair of logical qubits b1 and b2 stored in a pair of physical qubits 120b(q1) and 120c(q2) using coupling 130b; and on a pair of logical qubits b1 and b3 stored in a pair of physical qubits 120b(q1) and 120d(q3) using coupling 130c. However, a two-qubit operation cannot be performed directly on a pair of logical qubits b0 and b3 stored in 120a(q0) and 120d(q3). In this case, a pair of logical qubits b0 and b1 stored in a pair of physical qubits 120a(q0) and 120b(q1) can be swapped by an exchange operation to allow a two-qubit operation on a pair of logical qubits b0 and b3 stored in a pair of physical qubits 120b(q1) and 120d(q3).

[0038] In other embodiments, the quantum computing device 110 has directed coupling. In such an embodiment, CNOT(q0, q1) can be executed, but CNOT(q1, q0) cannot be executed directly. However, the direction of the CNOT gate can be reversed by adding four Hadamard gates before and after the CNOT gate. Therefore, in this embodiment, for simplicity, it is assumed that the coupling 130 is undirected.

[0039] Device 140 controls quantum computing device 110. Device 140 can be a computer, such as a server computer or mainframe computer. For example, device 140 can be a commercial server, engineering server, or mainframe computer. Device 140 can also be a computer, such as a personal computer or client computer. For example, device 140 can be a desktop computer, portable computer, or tablet computer. Device 140 can also be dedicated hardware for controlling quantum computing device 110.

[0040] Device 140 obtains a sequence of operations comprising multiple operations to be performed on a quantum circuit. The sequence of operations is a sequence of quantum operations. The sequence of operations is, for example, program code including quantum operations or a logic quantum circuit including logic quantum gates.

[0041] Device 140 maps multiple operations in a sequence of operations to be performed on quantum computing device 110. For example, device 140 assigns logical qubits to physical qubits 120a to 120d. Device 140 also inserts one or more swap operations for swapping a pair of logical qubits stored in a pair of physical qubits 120, so as to move the pair of logical qubits used by an operation onto the physical qubits 120 coupled by coupling 130.

[0042] Device 140 controls quantum computing device 110 to execute the sequence of operations. Then, device 140 controls quantum computing device 110 to obtain the execution result.

[0043] Figure 2An example of a logic quantum circuit 200 according to an embodiment of the present invention is shown. The logic quantum circuit 200 is represented in text. The logic quantum circuit 200 is also referred to as an operation sequence. The textual expression of the logic quantum circuit 200 includes an initial layout 210 and a circuit definition 220. The initial layout 210 represents the initial allocation of a plurality of logic qubits b0 to b3 on a plurality of physical qubits q0 to q3. The allocation of logic qubits on physical qubits is also referred to as a layout. The circuit definition 220 represents a plurality of quantum operations on one or more logic qubits. In the textual expression of the logic quantum circuit 200, the procedural order of quantum operations determines the execution order of operations at least for operations that are dependent on another operation. Generally, operation Y depends on operation X if 1) operation X precedes operation Y and 2) the execution results of operations X and Y can be changed by changing the execution order of operations X and Y. For example, CNOT(b1, b2) depends on CNOT(b0, b1) because CNOT(b1, b2) inputs the target qubit b1 of CNOT(b0, b1) and therefore must be executed after CNOT(b0, b1). CNOT(b2, b3) does not depend on CNOT(b0, b1) because CNOT(b2, b3) does not input an output that can be modified by CNOT(b0, b1), and CNOT(b2, b3) does not modify the qubit used by CNOT(b0, b1). In this application, an operation “using” a logical qubit means that these operations input, output, or modify that logical qubit. In other words, the operation acts on that logical qubit.

[0044] In this embodiment, for illustrative purposes, two multi-qubit operations using at least one common logical qubit are considered to be dependent on each other. For example, if CNOT(b0, b2) is adjacent to CNOT(b0, b1) in the operation sequence, then CNOT(b0, b2) depends on CNOT(b0, b1) even if the control qubit b0 of CNOT(b0, b1) is not mathematically changed. Since the state of a qubit can be slightly altered even without being mathematically changed by performing quantum operations, it is preferable to maintain the original order in the operation sequence. In other embodiments, two multi-qubit operations using the same logical qubit are considered independent of each other if the logical qubit is not altered by them.

[0045] Logic circuit 230 is illustrated in the diagram. In logic circuit 230, logic qubits are represented by rows, and logic gates 240a to 240e are arranged on or between logic qubits to be used by each logic gate 240a to 240e. Logic gates 240a, 240b, 240c, and 240e are CNOT gates, with dotted logic qubits as control qubits and circled logic qubits as target qubits. Logic gate 240d is a Hadamard gate.

[0046] By comparison Figure 1 The logic circuit 230 and the quantum computing device 110 can execute logic gate 240a via coupling 130a, logic gate 240c via coupling 130b, logic gate 240d on physical qubit 120b, and logic gate 240e via coupling 130a. However, logic gate 240b cannot be executed directly because logic qubits b2 and b3 are not coupled in the initial layout.

[0047] Figure 3 An example of a physical quantum circuit 300 according to an embodiment of the present invention is shown. The physical quantum circuit 300 is represented by text. The physical quantum circuit 300 is also referred to as an operation sequence, which starts from... Figure 2 The operation sequence is modified. The textual representation of the physical quantum circuit 300 includes an initial layout 310 and a circuit definition 320. The initial layout 310 represents the initial allocation of multiple logical qubits b0 to b3 on multiple physical qubits q0 to q3. The circuit definition 320 represents multiple quantum operations on one or more physical qubits. In the textual representation of the physical quantum circuit 300, the procedural order of the quantum operations determines the execution order of operations at least for operations with dependencies.

[0048] The physical quantum circuit 330 is represented by a diagram. In the physical quantum circuit 330, physical qubits are represented by rows, and each logical qubit is assigned to one physical qubit. Physical gates 340a to 340e are arranged on or between physical qubits to be used by each physical gate 340a to 340e.

[0049] See also Figure 2 As explained, CNOT(b2, b3) in the logic quantum circuit 200 cannot be executed directly because q2, which stores b2, and q3, which stores b3, are not coupled. Therefore, a device such as device 140 inserts a swap gate 350a (i.e., .SWAP(q1, q2)) to swap b1 and b2 in q1 and q2 respectively before CNOT(b2, b3). After this swap, the logical qubits b1 and b2 are moved to the physical qubits q2 and q1 respectively. Then, Figure 2CNOT(b2, b3) can be executed by physical gate 340b (i.e., CNOT(q1, q3)) via coupling 130c. In physical gate 340e (corresponding to...) Figure 2 Before CNOT(b1, b0) is executed, b1 and b0 are stored in q2 and q0, respectively. Since CNOT(b1, b0) cannot be executed directly, the device inserts a swap gate 350b (i.e., SWAP(q0, q1)) to swap b0 and b2 in q0 and q1, respectively, before CNOT(b1, b0). After this swap, logical qubits b1 and b0 are moved to physical qubits q2 and q1, respectively. Then, Figure 2 CNOT(b1, b0) in the code can be executed by physical gate 340e (i.e., CNOT(q2, q1)) via coupling 130b.

[0050] Figure 4 An apparatus 400 according to an embodiment of the present invention is shown. The apparatus 400 may be... Figure 1 A detailed version of the device 140 or other devices besides the device 140. The device 400 includes an acquisition unit 410, an operation sequence DB (database) 415, a generation unit 420, a dependency graph DB (database) 425, a search unit 427, a calculation unit 430, a selection unit 435, a parsing unit 440, an insertion unit 445, an update unit 450, and a control unit 460.

[0051] The obtaining unit 410 obtains an operation sequence. For example, the obtaining unit 410 obtains an operation sequence such as... Figure 2 The operation sequence is represented as either logic quantum circuit 200 or logic circuit 230. The acquisition unit 410 sends the operation sequence to the operation sequence DB 415 and stores it in the operation sequence DB 415. The operation sequence DB 415 is connected to the acquisition unit 410 and stores the operation sequence.

[0052] The generation unit 420 is connected to the operation sequence DB 415. The generation unit 420 generates a dependency graph representing the dependencies between multiple operations in the operation sequence. The generation unit 420 sends the dependency graph to the dependency graph DB 425 and stores it in the dependency graph DB 425. The dependency graph DB 425 is connected to the generation unit 420 and stores the dependency graph. The dependency graph includes multiple nodes and multiple edges. Each node represents an operation in the operation sequence in the operation sequence DB 415. Each edge represents the dependency relationship from the preceding operation to the following operation according to the programming order of the operation sequence or the input-output order of the logical quantum circuit represented by the operation sequence. In this embodiment, the generation unit 420 initializes all operations (i.e., all nodes) to "unresolved". Before inserting swap operations into the operation sequence, the update unit 450 updates operations that can be resolved without changing the layout to "resolved".

[0053] The lookup unit 427 is connected to the dependency graph DB 425. The lookup unit 427 searches for a set of resolved operations, which includes resolved operations in the operation sequence, and a set of unresolved operations, which includes unresolved operations in the operation sequence. In this embodiment, the lookup unit 427 searches for nodes marked "resolved" in the dependency graph DB 425, and includes operations corresponding to nodes in the resolved set.

[0054] The lookup unit 427 searches for the unresolved set in a similar manner. The lookup unit 427 searches the operation sequence DB 415 for a set of blocking operations that include at least one preceding unresolved operation in the operation sequence. In this embodiment, the lookup unit 427 examines the dependency graph and searches for unresolved operations that do not depend on one or more unresolved operations and are included in the blocking set. In other words, the lookup unit 427 searches for unresolved operations that do not depend on any other operations or depend only on resolved operations as preceding unresolved operations to be included in the blocking set. The lookup unit 427 sends information about the resolved set, the unresolved set, and the blocking set to the calculation unit 430.

[0055] The computation unit 430 is connected to the operation sequence DB 415, the dependency graph DB 425, and the lookup unit 427. The computation unit 430 computes multiple couplings (such as...) Figure 1 The coupling score is calculated for each of the couplings 130a to 130c. The coupling score indicates an improvement in the layout for resolving unresolved operations or leading unresolved operations by swapping the pair of logical qubits on the pair of physical qubits coupled by the respective couplings. In this embodiment, the computation unit 430 also calculates a pair score for a pair of leading unresolved operations. The pair score for a pair of leading unresolved operations indicates the cost required to resolve at least one of them.

[0056] The selection unit 435 is connected to the computation unit 430. The selection unit 435 selects a coupling in which a pair of logical qubits stored in a pair of physical qubits connected by the coupling are to be swapped based on the coupling score of each coupling. The selection unit 435 selects the coupling with the highest coupling score.

[0057] The parsing unit 440 is connected to the calculation unit 430. The parsing unit 440 selects a pair of leading unparsed operations based on the score and parses at least one of the selected pair of leading unparsed operations. In this embodiment, if the device 400 anticipates that the layout improvement achieved by swapping the couplings selected by the selection unit 435 will be no greater than the improvement achieved by parsing the pair of leading unparsed operations, the parsing unit 440 parses the pair of leading unparsed operations.

[0058] The insertion unit 445 is connected to the selection unit 435 and the resolution unit 440. The insertion unit 445 inserts a swap operation into the operation sequence DB 415, which swaps a pair of logical qubits in a pair of physical qubits coupled by the coupling selected by the selection unit 435. The insertion unit 445 also inserts one or more swap operations into the operation sequence required to resolve the pair of unresolved preceding operations selected by the resolution unit 440.

[0059] The update unit 450 is connected to the selection unit 435 and the parsing unit 440. The update unit 450 checks whether one or more leading unresolved operations in the blocking set can be executed after the swap selected by the selection unit 435. If the leading unresolved operation can be executed after the swap, the update unit 450 removes the leading unresolved operation from the blocking set and the unresolved set in the dependency graph DB 425 and adds it to the resolved set in the dependency graph DB 425. The update unit 450 also removes the leading unresolved operations parsed by the parsing unit 440 from the blocking set and the unresolved set in the dependency graph DB 425 and adds them to the resolved set in the dependency graph DB 425. In this embodiment, the update unit 450 marks the nodes corresponding to these leading unresolved operations as "resolved". After removing some leading unresolved operations from the blocking set, the update unit 450 adds new leading unresolved operations from the operation sequence to the blocking set in the dependency graph DB 425. In this embodiment, the updating unit 450 marks the nodes corresponding to new unresolved operations as "predecessor" and "unresolved".

[0060] Control unit 460 is connected to operation sequence DB 415. After parsing all operations, control unit 460 reads the operation sequence, including the inserted swap operations, and controls a quantum computing device (such as quantum computing device 110) to execute the operation sequence. In another embodiment, if these physical qubits can maintain their quantum state long enough, control unit 460 can control the quantum circuit to execute the parsed operations while device 400 is parsing other unparsed operations.

[0061] Figure 5 An example of a dependency graph 500 according to an embodiment of the present invention is shown. A generation unit 420 generates the dependency graph 500 based on the operation sequence in the operation sequence DB 415. The generation unit 420 scans the operation sequence in program order and adds each operation as a node in the dependency graph 500. If operation Y depends on operation X, the generation unit 420 adds a directed edge from a node of operation X to a node of operation Y. In one embodiment, single-qubit operations are not included as nodes in the dependency graph, provided that all physical qubits are configured to facilitate any type of single-qubit operation. In another embodiment, single-qubit operations are also included as nodes in the dependency graph.

[0062] Operations are categorized into resolved operations and unresolved operations. A resolved operation is one that has been determined to be executable. If an operation does not depend on any other unresolved operations, it can be executed in the layout at the time when its executable status is determined, and device 400 can classify the operation as a resolved operation. This does not necessarily mean that a resolved operation is the one that is actually executed. The node corresponding to a resolved operation is marked "resolved" in the dependency graph 500 and is included in the resolved set 510. "Resolved" means that the operation has been determined to be executable.

[0063] Unresolved operations are operations that have not yet been determined to be executable. Device 400 initializes all nodes (i.e., all operations) to "unresolved," and update unit 450 updates the nodes corresponding to newly resolved operations to "resolved." Unresolved operations are included in the unresolved set 520.

[0064] Among the unresolved operations in the unresolved set 520, unresolved operations that do not depend on any other unresolved operations are defined as leading unresolved operations, also known as blocking operations. By this definition, a leading unresolved operation depends only on one or more resolved operations, or does not depend on any operation that occurs immediately after initialization. Leading unresolved operations are included in the blocking set 530, which is a subset of the unresolved set 520.

[0065] If all operations are resolved, the sequence of operations is executable. Therefore, a device such as device 140 or device 400 inserts one or more swap operations into the sequence of operations to resolve leading unresolved operations (e.g., operations 3 and 4). After one or more leading unresolved operations (e.g., operation 3) are changed to resolved operations, unresolved operations that depend only on the newly resolved operations (e.g., operation 5) become the new leading unresolved operations. By repeating this process, the device ultimately changes all operations to be resolved by inserting all necessary swap operations into the sequence of operations.

[0066] Figures 6 to 8 An operation flow according to an embodiment of the present invention is shown. Figures 6 to 8 An operation flow for mapping operation sequences on a physical quantum computing device, such as quantum computing device 110, is shown. Figures 6 to 8 The operation can be referenced, for example. Figure 1 or Figure 4 The device 140 or device 400 and its components are explained to perform this. Although reference will be made to device 400 and its components. Figures 6 to 8 The operation flow can be performed by other devices with different components.

[0067] exist Figure 6 In step 600 (S600), the obtaining unit 410 acquires the operation sequence. In S610, the generation unit 420 generates a dependency graph, such as... Figure 5 The dependency graph 500 in the diagram. The generation unit 420 initializes all nodes corresponding to all operations as "unresolved".

[0068] In S620, the update unit 450 checks whether each operation can be resolved in the current layout. After initialization, the update unit 450 checks each node in the dependency graph DB 425 from upstream to downstream. The update unit 450 marks the node corresponding to the preceding unresolved operation as "preceding" and "unresolved".

[0069] If a leading unresolved operation can be performed in the current layout, then the leading unresolved operation can be resolved. The update unit 450 essentially determines that, provided all physical qubits are configured to facilitate any type of single-qubit operation, if the single-qubit operation is a leading unresolved operation, then the single-qubit operation can be resolved in the current layout. In one embodiment where some physical qubits do not support the single-qubit operation of interest, a logical qubit used by the single-qubit operation must be moved to a physical qubit that supports the single-qubit operation. In this embodiment, the update unit 450 determines that the single qubit cannot be resolved.

[0070] If a multi-qubit operation is a leading unresolved operation and the pair of logical qubits to be used by the multi-qubit operation is in a pair of coupled physical qubits, the update unit 450 determines that the multi-qubit operation can be resolved in the current layout. If the pair of logical qubits used by the multi-qubit operation is not stored in a pair of coupled physical qubits, the multi-qubit operation cannot be resolved even if it does not depend on any other operation. The update unit 450 resolves the leading unresolved operation, and another unresolved operation can become a leading unresolved operation. In this way, the update unit 450 resolves all operations that can be executed in the initial layout before the first execution of S630. As the operation flow for mapping the operation sequence on the physical quantum circuit iterates, each leading unresolved operation can be resolved if the pair of logical qubits to be used by the corresponding leading unresolved operation is moved to a pair of coupled physical qubits.

[0071] In S630, the lookup unit 427 searches for resolved sets, unresolved sets, and blocking sets in the dependency graph of the dependency graph DB 425. The lookup unit 427 examines the dependency graph of the dependency graph DB 425 and includes operations corresponding to nodes marked as "resolved" in the resolved set. The lookup unit 427 examines the dependency graph of the dependency graph DB 425 and includes operations corresponding to nodes marked as "unresolved" in the resolved set. The lookup unit 427 examines the dependency graph of the dependency graph DB 425 and includes operations corresponding to nodes marked as "predecessor" and "unresolved" in the blocking set. The blocking set includes at least one preceding unresolved operation (i.e., a blocking operation) in the operation sequence.

[0072] In S640, the lookup unit 427 checks whether the blocking set is empty. If the blocking set is empty, all operations are parsed, and then the device 400 completes the operation flow for mapping the operation sequence on the physical quantum circuit. If the blocking set is not empty, the device 400 proceeds to execution S650. In other embodiments, the lookup unit 427 checks whether the unparsed set is empty, instead of checking the blocking set.

[0073] In S650, the computation unit 430 receives the resolved set, the unresolved set, and the blocked set from the lookup unit 427. The computation unit 430 calculates a first coupling score for each of the multiple couplings. In this embodiment, the computation unit 430 calculates the first coupling score based on the total reduction in the shortest path length of the multiple unresolved operations of the multiple quantum operations. This total reduction in the shortest path length is the sum of the amounts by which each shortest path length is reduced by swapping a pair of logical qubits stored in a pair of physical qubits connected by the corresponding coupling.

[0074] Here, C represents the coupling pattern of the physical quantum circuit. C includes each physical qubit in the physical quantum circuit as a node, and each coupling between a pair of physical qubits as an edge between a pair of nodes corresponding to that pair of physical qubits. SP(g,l) represents the shortest path of an operation or logic gate g in a physical quantum circuit with a structure represented by the coupling pattern C under layout l. The shortest path SP(g,l) is the shortest path from a pair of logic qubits used by operation g through coupling.

[0075] The shortest path length |SP(g, l)| of an unresolved operation g represents the minimum distance via coupling in the quantum circuit between a pair of physical qubits storing a pair of logical qubits used by the corresponding unresolved operation g. In this embodiment, the minimum distance is, or relates to, the number of couplings along the shortest path between the pair of physical qubits storing the pair of logical qubits to be used by the corresponding unresolved operation g. In this definition, when the pair of logical qubits is stored in a pair of coupled physical qubits, the shortest path length |SP(g, l)| of the unresolved operation is 1.

[0076] In another implementation, the minimum distance is, or relates to, the number of other physical qubits along the shortest path between the pair of logical qubits stored in the pair of physical qubits to be used by the corresponding unresolved operation g. In this definition, the shortest path length |SP(g, l)| for the unresolved operation is 0 when the pair of logical qubits is stored in a pair of coupled physical qubits. If the device 400 needs to move a logical qubit used by a single-qubit operation g' to a physical qubit supporting that single-qubit operation g', the shortest path length |SP(g′, l)| can be defined as the number of couplings along the shortest path between a physical qubit storing the logical qubit and the nearest physical qubit supporting the single-qubit operation g'.

[0077] In this embodiment, the calculation of a pair of physical qubits (q) coupled by coupling is performed using the following expression (1). i q j The first coupling score is the coupling between the two.

[0078] cscore((q i q j ),l,U)=c(l,U)-c(l′(q i q j ), U)for(q i q j )∈C (1)

[0079] Here, U is the set of unresolved operations that affect the coupling score. c(l,U) represents the sum of the shortest path lengths of the unresolved operations in set U under layout l. l′(q i q j ) is achieved by exchanging the physical qubits (q) stored in that pair. i q j The layout is modified from layout l by the pair of logical qubits in cscore((q i q j (), l, U) denote the sum of reductions in the shortest path length of multiple unresolved operations in set U. For example, if the total shortest path length can be reduced by swapping a pair of physical qubits (q) i q j If a coupling between 59 and 53 is reduced, then the calculation unit 430 will calculate the first coupling score of this coupling as 6.

[0080] In one implementation, the computation unit 430 uses all unresolved operations as a plurality of unresolved operations in set U. In another implementation, the plurality of unresolved operations is a subset of all unresolved quantum operations in the operation sequence. The computation unit 430 can use a subset of all unresolved operations as a plurality of unresolved operations in set U to reduce the workload for calculating coupling scores. The computation unit 430 can limit the unresolved operations included in set U based on the (minimum or maximum) distance between each unresolved operation and the preceding unresolved operation in the blocking set in the dependency graph.

[0081] For example, the computation unit 430 determines the plurality of unresolved operations (i.e., set U) based on the distance between the quantum operations in the blocking set and each unresolved operation in the dependency graph of the plurality of operations. If the computation unit 430 has a distance less than a threshold, the computation unit 430 includes the unresolved operation in set U. This threshold can be 1 or greater than 1 for calculating a first coupling score, and then the first coupling score is calculated based on the shortest path length of at least one unresolved operation not in the blocking set. To count this distance, the computation unit 430 can ignore single-qubit operations between the preceding unresolved operation and the unresolved operation of interest without moving the logical qubits used by these single-qubit operations. By limiting the unresolved operations included in set U, the device 400 can reduce the computational cost for calculating the first coupling score.

[0082] In this embodiment, in order to give higher priority to resolving the preceding unresolved operations in the blocking set, the computation unit 430 calculates the first coupling score for each coupling based on a weighted sum of the reduction in the shortest path length of each unresolved quantum operation. c(l,U) is calculated using the following expression (2).

[0083]

[0084] Here, the discount rate γ(g) with the range 0 < γ(g) ≤ 1 is the weight of the unresolved operation g. The reduction in the shortest path length of the unresolved operation g is |SP(g, l)| - |SP(g, l′(q)|. i q j And therefore the computation unit 430 can compute the reduced weighted sum of the shortest path lengths for each unresolved quantum operation in the set U by expression (1).

[0085] In this implementation, the computation unit 430 calculates the weight for reducing the shortest path length of the unresolved operation of interest based on the number of unresolved operations in the dependency graph of multiple operations between the unresolved operation of interest and at least one preceding unresolved operation in the blocking set. For example, the computation unit 430 calculates γ(g) as α. n(g，B) (0 < α < 1), where n(g, B) is the number of unresolved operations (excluding the unresolved operation g) between the unresolved operation of interest g and the blocking set B. In this case, the computation unit 430 calculates the number of unresolved operations in the dependency graph between unresolved operation 8 and its preceding unresolved operations 3 and 4. Figure 5 The weight γ(8) of the unresolved operation 8 in the table. This number is 4 (operations 3, 4, 5, and 6) because unresolved operation 8 is not counted, and γ(8) is α. 4 Alternatively, the calculation unit 430 can calculate γ(g) by using any function that has a smaller value when the quantity increases.

[0086] In another implementation, the computation unit 430 calculates the weight for reducing the shortest path length of the unresolved operation of interest based on the maximum distance of the dependency graph of multiple operations between the unresolved operation of interest in the blocking set and at least one preceding unresolved operation. For example, the computation unit 430 calculates γ(g) as α. |LP(g，B) |(0<α<1), where LP(g,B) is the longest path among the paths from the preceding unresolved operations in the blocking set B and the unresolved operation of interest g in the dependency graph. In this case, the computation unit 430 calculates the maximum distance between the unresolved operation of interest 8 and each of the preceding unresolved operations 3 and 4. Figure 5 The weight γ(8) of the unresolved operation 8 in the equation. The maximum distance is 2 and γ(8) is α. 2 Alternatively, the calculation unit 430 can calculate γ(g) by using any function that has a smaller value when the maximum distance becomes large.

[0087] In S660, the calculation unit 430 checks whether the largest first coupling score among multiple coupled first coupling scores is less than a threshold. For example, this threshold is 1, 0, or any value determined by the user or manufacturer of the device 400 that represents the minimum expected or required reduction in the total shortest path length of multiple unresolved operations in set U. If the largest first coupling score is less than the threshold, the device 400 proceeds to execution. Figure 8 The S800 in the middle.

[0088] exist Figure 7 In S700, the selection unit 435 checks whether there are two or more coupling candidates with the largest first coupling score. If only one candidate exists, the selection unit 435 selects the coupling with the largest first coupling score, and the device 400 proceeds to execution S740.

[0089] In S710, the calculation unit 430 calculates a second coupling score for each of the multiple couplings based on the reduction in the shortest path length of each preceding unresolved operation in the blocking set. The second coupling score is similar to the first coupling score, except that the second coupling score uses the blocking set as the set U in expression (1). In this embodiment, the second coupling score is used to select a coupling from the candidates of the coupling with the maximum first coupling score. For this purpose, the calculation unit 430 can calculate the second coupling score for each coupling with the maximum first coupling score.

[0090] In S720, the selection unit 435 checks whether there are two or more coupling candidates with the largest second coupling score. If only one candidate exists, the selection unit 435 selects a coupling, wherein a pair of logical qubits stored in a pair of physical qubits connected by the coupling will be swapped based on the second coupling score of each coupling. In this embodiment, the selection unit 435 selects the coupling with the largest second coupling score from the coupling candidates with the largest first coupling score, and the device 400 proceeds to execution S740. In another embodiment, the calculation unit 430 and the selection unit 435 do not calculate or use the second coupling score, and the operation flow does not include S710 and S720.

[0091] In S730, the computing unit 430 calculates the third coupling score for each of the multiple couplings. (Refer to...) Figure 9The third coupling score is interpreted. The selection unit 435 selects the coupling with the highest third coupling score. In this embodiment, the third coupling score is used to select a coupling from the coupling candidates with the highest first and second coupling scores. For this purpose, the calculation unit 430 can calculate the third coupling score for each coupling among the couplings with the highest first and second coupling scores. In another embodiment, the calculation unit 430 and the selection unit 435 do not calculate or use the third coupling score, and the operation flow does not include S730. If a coupling candidate cannot be determined by the coupling score calculated by the calculation unit 430, such as when no remaining coupling candidate appears with a higher third coupling score, the selection unit 435 can select a coupling candidate based on a further method (such as random selection).

[0092] In S740, the insertion unit 445 swaps the logical qubit pairs stored in the physical qubit pairs coupled by the selected coupling in the current layout stored in the operation sequence DB 415, and updates the current layout in the operation sequence DB 415 with the new current layout.

[0093] In S750, the insertion unit 445 inserts a swap operation, which is used to swap a pair of logical qubits stored in a pair of physical qubits coupled together by the selected pair in the operation sequence before any preceding unresolved operation, using at least one logical qubit swapped by the swap operation. In this embodiment, the insertion unit 445 inserts the swap operation before any preceding unresolved operation in the operation sequence. The apparatus 400 proceeds to execution S620.

[0094] In execution Figure 7 In S620, following the operation flow, the update unit 450 checks whether each unresolved operation of a preceding operation can be resolved in the current layout. The update unit 450 updates the blocking set by removing any unresolved preceding operations that can be performed after swapping a pair of logical qubits stored in a pair of physical qubits coupled by the selected connection. In this embodiment, the update unit 450 marks unresolved preceding operations that can be performed after the swap as "resolved" in the dependency graph DB 425 to remove this operation from the blocking set.

[0095] The update unit 450 further updates the blocking set by adding new preceding unresolved operations from the operation sequence to the blocking set. After removing a preceding unresolved operation from the blocking set in S620, the new preceding unresolved operation becomes a preceding unresolved operation. In this embodiment, the update unit 450 marks the new preceding unresolved operation as "preceding" and "unresolved" in the dependency graph DB 425. The update unit 450 can repeatedly remove and add preceding unresolved operations to the blocking set.

[0096] By inserting swap operations to exchange a pair of logical qubits through coupling selected based on the coupling score, device 400 can effectively reduce the total shortest path length of multiple unresolved operations in set U. Therefore, device 400 can effectively reduce the number of swap operations inserted into the operation sequence.

[0097] In this embodiment, the device 400 repeatedly searches for the blocking set in S630, calculates the coupling score and selects the coupling to be swapped in at least one of S650, S710, and S730, inserts the swap operation in S750, and updates the blocking set in S620. By repeating these steps, the device 400 can resolve the leading unresolved operations in the blocking set.

[0098] In S800, in response to the first coupling score for each coupling being lower than a threshold (i.e., "yes" at S660), the parsing unit 440 parses at most two preceding unparsed operations in the blocking set. In this embodiment, the parsing unit 440 attempts to parse two preceding unparsed operations at a time. For this purpose, the calculation unit 430 calculates a pair score representing at least one of the dependency cost and parsing cost for each pair of preceding unparsed operations in the blocking set. (See reference...) Figure 10 and 11 Explain the score.

[0099] In S810, the parsing unit 440 selects two preceding unparsed operations to be parsed based on the pair scores. In this embodiment, since the calculation unit 430 calculates the pair scores representing the cost, the parsing unit 440 selects the pair of preceding unparsed operations (i.e., blocking operations) with the minimum pair scores.

[0100] In S820, the insertion unit 445 inserts at least one swap operation to resolve at least one of the pair of leader unresolved operations selected in S810. If the leader unresolved operation to be resolved uses a pair of logical qubits stored in a pair of physical qubits, with at least three couplings between the pair of physical qubits, then the insertion unit 445 inserts multiple swap operations in the operation sequence before this leader unresolved operation. In one embodiment, the insertion unit 445 attempts to resolve two of the selected leader unresolved operations using the same swap operation. The apparatus 400 proceeds to execution S620.

[0101] In execution Figure 8 Following the operation flow in S620, the update unit 450 updates the blocking set by removing preceding unresolved operations resolved in S820. The update unit 450 also updates the blocking set by adding new preceding unresolved operations from the operation sequence to the blocking set. The update unit 450 may further update the blocking set by removing any preceding unresolved operations from the executable blocking set.

[0102] In this embodiment, the device 400 can select the coupling to be swapped based on a first coupling score, which is calculated not only based on the reduction of the shortest path length of the preceding unresolved operation but also based on the reduction of the shortest path length of the unresolved operation that is not in the blocking set.

[0103] Apparatus 400 updates the blocking set by using, for example, a dependency graph to remove resolved operations from the blocking set and adding new unresolved operations to the blocking set based on the dependencies of the operations. Apparatus 400 does not necessarily divide multi-qubit operations into multiple layers, nor does it necessarily resolve each layer before resolving unresolved operations in subsequent layers. Therefore, apparatus 400 can increase the flexibility of resolving unresolved operations and reduce the number of swap operations inserted into the operation sequence.

[0104] Even when two or more couplings have the maximum first coupling score, the device 400 can select the coupling to be swapped based on at least one of the second or third coupling scores. Therefore, the device 400 can increase the probability of reducing the number of swap operations inserted into the operation sequence.

[0105] Apparatus 400 can select and resolve up to two preceding unresolved operations, even if it cannot find a suitable coupling based on the coupling score. Therefore, in this case, apparatus 400 can increase the probability of reducing the number of swap operations inserted into the operation sequence.

[0106] In another embodiment, if the logical qubits are not altered, two multi-qubit operations using the same logical qubit are considered independent of each other. In this case, at S810, under the condition that the two leading unresolved operations do not use a common logical qubit, the resolution unit 440 selects the two leading unresolved operations to be resolved based on the pair score. If the blocking set does not include two leading unresolved operations that do not use a common logical qubit, the device 400 can select and resolve one leading unresolved operation from the blocking set.

[0107] In another embodiment, the device 400 may select and parse one leading unparsed operation instead of selecting and parsing up to two leading unparsed operations in S800 and S810, or if parsing a pair of leading unparsed operations is not efficient for a score indication (e.g., the minimum pair score is not less than a threshold).

[0108] To select a leading unresolved operation to be resolved, the resolution unit 440 may randomly select one from the leading unresolved operations in the blocking set. In another implementation, the computation unit 430 calculates a score for each leading unresolved operation, and the resolution unit 440 selects the leading unresolved operation with the best score (e.g., the highest or lowest score depends on the type of the score).

[0109] For example, the calculation unit 430 calculates a score representing the minimum number of swap operations required to resolve each preceding unresolved operation. In this case, the parsing unit 440 selects the preceding unresolved operation with the minimum score. In another example, the calculation unit 430 calculates a score representing the number of unresolved operations that depend on each preceding unresolved operation. The calculation unit 430 may count the number of unresolved operations that directly depend on each preceding unresolved operation, or it may count the number of unresolved operations that indirectly depend on each preceding unresolved operation. In this case, the parsing unit 440 selects the preceding unresolved operation with the maximum score.

[0110] Figure 9 An example of a third coupling score according to an embodiment of the present invention is shown. Figure 9 The third coupling score shown can be obtained by, for example, referring to Figure 1 Or, the calculation can be performed using the device 140 or device 400 and its components as explained in section 4. Figure 9 The calculation of the third coupling score can be as follows: Figure 7 S730 is executed in this context. Reference device 400 and its components will be used for explanation. Figure 9 The calculation of the third coupling score is performed by other devices with different components.

[0111] The third coupling score for each coupling represents the ability to reduce the shortest path length of the first and second unresolved operations by facilitating the swapping of a first logical qubit to be used by a first unresolved operation and a second logical qubit to be used by a second unresolved operation. The purpose of using this third coupling score is to increase the efficiency of moving the logical qubit used by the unresolved operation in each swapping operation. If the first logical qubit to be used by the first unresolved operation and the second logical qubit to be used by the second unresolved operation are stored in a pair of coupled physical qubits, and the shortest path length of both the first and second unresolved operations is reduced by one swapping operation—that is, swapping the first and second logical qubits—then this is more efficient than moving the first and second logical qubits individually, as this would require two swapping operations.

[0112] For example, there exists a need to Figure 9 The first unresolved operation CNOT(b0, b3) and the second unresolved operation CNOT(b1, b4) are executed on the physical circuit in the example. In this example, these operations are in the set U, and the current layout l is {b0:q0,b1:q1,b2:q2,b3:q3,b4:q4}.

[0113] In the first choice, first swap b0 in q0 and b2 in q2, then CNOT(b0, b3) can be resolved. Then, CNOT(b1, b4) can be resolved by inserting two swap operations (i.e., SWAP(q1, q2) and SWAP(q2, q3) as an example). In the first choice, three swap operations are inserted into the operation sequence.

[0114] In the second choice, first swap b1 in q1 and b2 in q2, and then move b1 in q2. Next, swap b1 in q2 and b3 in q3, then move b3 in q2 and move b1 in q3. Then, CNOT(b0, b3) can be performed between b0 in q0 and b3 in q2, and CNOT(b1, b4) can be performed between b1 in q3 and b4 in q4. In the second choice, the first logical qubit b3 of CNOT(b0, b3) and the second logical qubit b1 of CNOT(b1, b4) are swapped to reduce the shortest path length of CNOT(b0, b3) and CNOT(b1, b4), and thus reduce the number of inserted swap operations. The first swap on the coupling between q1 and q2 helps the second swap between b1 in q2 and b3 in q3. The purpose of the third coupling score is to represent the capability of auxiliary swaps (such as the second swap), and Figure 9 In this case, SWAP(q1, q2) is given a higher coupling score than SWAP(q0, q2).

[0115] In the implementation, the calculation unit 430 calculates the third coupling score (also called "sub-score") of the coupling (q0, q1), as shown in the following expression (3).

[0116]

[0117] Here, l is the current layout, U is the set of all unresolved operations or a subset of unresolved operations, and G is a coupling graph representing a physical quantum computing device (such as quantum computing device 110). MG((q0, q1); l) is a subset of operations in the set U, including unresolved operations in the current layout l using logical qubits q0 or q1. For example, Figure 9 In this context, MG((q0,q2);l) is {(b0,b3)}. In another implementation, MG((q0,q1);l) is a subset of operations in a set other than set U. For example, set U could be the set of all unresolved operations or a subset of unresolved operations, while MG((q0,q1);l) is a subset of operations in the blocking set.

[0118] SP G (l(b i ), l(b j))(exist Figure 9 Also referred to as "SP_G(l(bi),l(bj))") is the storage of logical qubit b on the coupled graph G in the current layout l. i Physical qubits and storage logic qubits b j The shortest path between physical qubits. "include(q,P)" indicates whether physical qubit q is included in path P. In this embodiment, include(q,P) is 1 if physical qubit q is included in path P, and 0 otherwise.

[0119] The sum in the mean {} in expression (3) represents the sum of the number of unresolved operations in the set U with logical qubits b0 in the shortest path and the number of unresolved operations in the set U with logical qubits b1 in the shortest path. (b0, b1) is selected from a pair of logical qubits used by an unresolved operation in the set U that uses logical qubits stored in at least one of physical qubits q0 and q1. If there are two or more unresolved operations that use logical qubits stored in at least one of physical qubits q0 and q1, the sum in the mean {} is averaged. The third coupling score of coupling (q0, q1) is based on the mean or the negative of the mean.

[0120] For example, the third coupling score of this coupling (q0, q2) is -3 because CNOT(b0, b3) has logical qubits stored in at least one of q0 and q2, b0 is included in the shortest path of CNOT(b0, b3) but not in the shortest path of CNOT(b1, b4), and b3 is included in the shortest paths of both CNOT(b0, b3) and CNOT(b1, b4), so the sum of the mean {} is 3. On the other hand, the third coupling score of coupling (q1, q2) is -2 because b1 and b4 are included in the shortest path of CNOT(b1, b4) but not in the shortest path of CNOT(b0, b3).

[0121] In this implementation, if an operation having logical qubits stored in at least one physical qubit coupled by the coupling includes more logical qubits to be used in unresolved operations in the set U, the coupling tends to have a higher third coupling score. The device 400 has a higher priority in selecting such a coupling, thus the device 400 can reduce the number of swap operations inserted into the operation sequence.

[0122] Figure 10 and Figure 11 An example of scoring according to an embodiment of the present invention is shown. (Refer to...) Figure 10 and Figure 11The interpretation represents the calculation of pairwise scores for at least one of the dependency cost and the parsing cost. (See reference) Figure 10 and 11 The scores shown can be obtained by, for example, referring to Figure 1 Or, the calculation can be performed using the apparatus 140 or 400 and their components as explained in section 4. (See reference...) Figure 10 and Figure 11 The calculation of pairwise scores can be as follows: Figure 8 It is executed as in S800. Although the reference device 400 and its components are interpreted as reference... Figure 10 and Figure 11 The score is calculated, but this calculation can also be performed by other devices with different components. In this embodiment, the score represents at least one of dependency cost and parsing cost.

[0123] (1) Depending Cost

[0124] Dependency cost represents the dependency between a pair of preceding unresolved operations. In this embodiment, this dependency is measured based on the number of logical qubits used by the unresolved operations in the set U included in the shortest paths of the first and second operations of the pair of preceding unresolved operations. Expression (4) shows an example of dependency cost.

[0125]

[0126] Here, if k = i, then SP G (l(b k0 ), l(b k1 )) is (b i0 b i1 The shortest path to (b) and if k = j, then (b) j0 b j1 The shortest path of ) . b is the first or second logical qubit of each unresolved operation in the set U. Expression (4) is for the operation included in (b i0 b i1 ) and (b j0 b j1 The number of logical qubits used by unresolved operations in the set U of the shortest paths is counted.

[0127] If the dependency cost is high, many unresolved operations will be affected when resolving the corresponding pair of leading unresolved operations. Therefore, the parsing unit 440 selects a pair of leading unresolved operations with the lowest or lowest dependency cost from the blocking set and parses the selected pair of leading unresolved operations.

[0128] By using dependency cost as a pair score, apparatus 400 can select and resolve a pair of preceding unresolved operations that have fewer dependencies than other unresolved operations. Therefore, apparatus 400 can modify the blocking set with minimal impact on other unresolved operations. By modifying the blocking set, apparatus 400 has a greater chance of selecting couplings with coupling scores not less than a threshold in the next iteration.

[0129] (2) Resolving Cost

[0130] The resolution cost represents the cost of resolving a pair of leading unresolved operations. In this embodiment, the resolution cost is measured based on the relationship between the pair of leading unresolved operations and is unaffected by other unresolved operations. Figure 10 and Figure 11 An example of parsing cost is shown in the figure.

[0131] Figure 10 An example of program code is shown for calculating the resolution cost rc between an unresolved operation with the shortest path pi and an unresolved operation with the shortest path pj. `path_minus(pi,pj)` is a function that removes the coupling contained in path pj from path pi. In other words, `path_minus(pi,pj)` is the set of segments or subpaths of path pi after removing the coupling included in path pj. For example, as... Figure 9 As shown, if pi is q0->q2->q3 and pj is q1->q2->q3->q4, then since the coupling q2->q3 is included in pj and pi, path_minus(pi,pj) = {q0->q2} and path_minus(pj,pi) = {q1->q2,q3->q4}.

[0132] exist Figure 10 In this example, the parsing cost rc is calculated based on path_minus(pi,pj) and path_minus(pj,pi) allocated to subpaths_i_j and subpaths_j_i, respectively. len(subpaths_i_j) is the size of the set subpaths_i_j and represents the number of segments in path pi within subpaths_i_j. Similarly, len(subpaths_j_i) represents the number of segments in path pj within subpaths_j_i. In this example, after removing the coupling contained in both paths pi and pj, the parsing cost is calculated based on the number of segments in path pi and path pj.

[0133] Figure 11 It shows how to execute Figure 10The parsing cost rc is calculated by the program code in this example. In this example, the parsing cost rc is calculated between a pair of leading unresolved operations in the blocking set. These leading unresolved operations are independent of each other. This means that they do not share logical qubits. Therefore, the parsing cost rc = 1 is not actually used in (subpaths_i_j,subpaths_j_i) = (0,0), (0,1), or (1,0). In another embodiment, two multi-qubit operations using the same logical qubit are considered independent of each other if the logical qubits are not modified by them. In this case, the parsing cost rc is calculated only for a pair of leading unresolved operations that do not use a common logical qubit.

[0134] The parsing cost rc = -1 in (subpaths_i_j,subpaths_j_i) = (2,1) and (1,2). This is consistent with... Figure 9 The relationship between CNOT(b0, b3) and CNOT(b1, b4) is the same or similar: CNOT(b0, b3) has a segment q0->q2, and CNOT(b1, b4) has segments q1->q2 and q3->q4. To calculate the parsing cost, the shortest path length for each segment can be greater than 1. See also... Figure 9 As illustrated, it is possible to efficiently exchange logical qubits in this relationship. Therefore, the resolution cost rc is less than the resolution cost rc of (subpaths_i_j,subpaths_j_i) = (2,0) and (0,2). The resolution cost rc is the same as that of (subpaths_i_j,subpaths_j_i) = (2,1) and (1,2) in (subpaths_i_j,subpaths_j_i) = (2,2) because it is possible to modify the relationship between paths pi and pj to (subpaths_i_j,subpaths_j_i) = (2,1) or (1,2) by moving one logical qubit in pi on path pj or vice versa.

[0135] In (subpaths_i_j,subpaths_j_i) = (2,0) and (0,2), the resolution cost rc = 0. If one path is contained in the middle of another path, then the two preceding unresolved operations must be resolved separately, thus no cost reduction is achieved.

[0136] In (subpaths_i_j,subpaths_j_i) = (1,1) and pi = subpaths_i_j, the resolution cost rc = 0. If paths pi and pj do not share coupling (i.e., pi = subpaths_i_j), then the unresolved operations of the two preceding paths must be resolved separately, and therefore no cost reduction is achieved.

[0137] In (subpaths_i_j, subpaths_j_i) = (1, 1) and pi ≠ subpaths_i_j, the resolution cost rc = -1. An example of this is... Figure 9 This occurs after swapping a pair of logical qubits b1 and b2 within a pair of physical qubits q1 and q2. In this case, it is possible to efficiently swap the logical qubits, as shown in [reference needed]. Figure 9 As explained.

[0138] By using the resolution cost as the score, device 400 can select and resolve a pair of preceding unresolved operations, which adds some efficiency to resolving the pair of preceding unresolved operations. Therefore, device 400 can effectively change the blocking set and has the opportunity to select the coupling with the maximum coupling score not less than a threshold in the next iteration.

[0139] In this embodiment, the calculation unit 430 calculates the dependency cost as the first pair score for each pair of preceding unresolved operations in the blocking set. The calculation unit 430 can calculate the first pair score by using all unresolved operations as multiple unresolved operations in set U or by using a subset of all unresolved operations as set U. If there are two or more candidates for the pair of preceding unresolved operations with respect to these first pair scores, the calculation unit 430 can further calculate the dependency cost as the second pair score by using the blocking set as set U. The parsing unit 440 selects the pair of preceding unresolved operations with the lowest second pair score from the candidates selected based on the first pair scores, and parses the pair of preceding unresolved operations.

[0140] If there are two or more candidates for the pair of leading unresolved operations with the lowest first and second pair scores, the calculation unit 430 calculates the resolution cost as the third pair score for each pair of leading unresolved operations in the blocking set. The resolution unit 440 selects the pair of leading unresolved operations with the lowest third pair score from the candidates selected based on the first and second pair scores, and resolves the pair of leading unresolved operations. In another embodiment, the device 400 uses only one or two of the first, second, and third pair scores.

[0141] In this embodiment, device 400 calculates multiple types of coupling scores. In another embodiment, device 400 calculates coupling scores that include components or effects of two or more types of coupling scores (such as first, second, and third coupling scores). In the same manner, device 400 calculates pair scores that include components or effects of two or more types of pair scores (such as first, second, and third pair scores).

[0142] In another embodiment, device 400 uses at least one of coupling scores with different expressions but based on the same or similar inputs. In this embodiment, a higher coupling score indicates a better coupling score, but in another embodiment, a lower coupling score may indicate a better coupling score. Various other modifications can be applied to the calculation of the coupling score, including adding the influence of one or more other parameters, adding constants, multiplying by coefficients, etc. In the same manner, various modifications can be applied to the calculation of any other parameters and functions, such as at least one of the following: the coupling score, path length, discount rate, including functions, etc.

[0143] In the above embodiments, coupling scores are used to insert swap operations into the operation sequence. In another embodiment, these coupling scores are used to assign multiple logical qubits to multiple physical qubits in the initial layout.

[0144] Various embodiments of the invention can be described with reference to flowchart and block diagrams, whereby blocks may represent (1) steps of a process in which an operation is performed or (2) portions of a means of performing the operation. Certain steps and portions may be implemented by dedicated circuitry, programmable circuitry provided with computer-readable instructions stored on a computer-readable medium, and / or a processor provided with computer-readable instructions stored on a computer-readable medium. Dedicated circuitry may include digital and / or analog hardware circuitry and may include integrated circuits (ICs) and / or discrete circuitry. Programmable circuitry may include reconfigurable hardware circuitry, including logic AND, OR, XOR, NAND, NOR and other logic operations, flip-flops, registers, memory elements, such as field-programmable gate arrays (FPGAs), programmable logic arrays (PLAs), etc.

[0145] This invention can be a system, method, and / or computer program product at any possible level of integration technical detail. The computer program product may comprise one or more computer-readable storage media having computer-readable program instructions thereon for causing a processor to perform aspects of the invention.

[0146] Computer-readable storage media can be tangible devices capable of retaining and storing instructions for use by an instruction execution device. Computer-readable storage media can be, for example, but not limited to, electronic storage devices, magnetic storage devices, optical storage devices, electromagnetic storage devices, semiconductor storage devices, or any suitable combination of the foregoing. A non-exhaustive list of more specific examples of computer-readable storage media includes the following: portable computer disks, hard disks, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), static random access memory (SRAM), portable compact disc read-only memory (CD-ROM), digital universal disc (DVD), memory sticks, floppy disks, mechanical encoding devices (such as punched cards or raised structures in grooves having instructions recorded thereon), and any suitable combination of the foregoing. As used herein, computer-readable storage media should not be construed as transient signals themselves, such as radio waves or other freely propagating electromagnetic waves, electromagnetic waves propagating through waveguides or other transmission media (e.g., light pulses through fiber optic cables), or electrical signals transmitted through wires.

[0147] The computer-readable program instructions described herein can be downloaded from a computer-readable storage medium to a corresponding computing / processing device, or downloaded to an external computer or external storage device via a network (e.g., the Internet, a local area network, a wide area network, and / or a wireless network). The network may include copper transmission cables, optical fiber transmission, wireless transmission, routers, firewalls, switches, gateway computers, and / or edge servers. A network adapter card or network interface in each computing / processing device receives the computer-readable program instructions from the network and forwards them to a computer-readable storage medium within the corresponding computing / processing device.

[0148] Computer-readable program instructions used to perform the operations of this invention may be assembly instructions, instruction set architecture (ISA) instructions, machine instructions, machine-dependent instructions, microcode, firmware instructions, state setting data, configuration data for integrated circuits, or source code or object code written in any combination of one or more programming languages, including object-oriented programming languages ​​such as Smalltalk, C++, etc., and procedural programming languages ​​such as the "C" programming language or similar programming languages. The computer-readable program instructions may be executed entirely on the user's computer, partially on the user's computer, as a standalone software package, partially on the user's computer and partially on a remote computer, or entirely on a remote computer or server. In the latter case, the remote computer may be connected to the user's computer via any type of network (including a local area network (LAN) or a wide area network (WAN)) or may be connected to an external computer (e.g., via the Internet through an Internet service provider). In some embodiments, electronic circuitry (including, for example, programmable logic circuitry, field-programmable gate arrays (FPGAs), or programmable logic arrays (PLAs)) may execute the computer-readable program instructions by utilizing state information from the computer-readable program instructions to personalize the electronic circuitry in order to perform aspects of the invention.

[0149] This document describes aspects of the invention with reference to flowchart illustrations and / or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the invention. It should be understood that each block of the flowcharts and / or block diagrams, and combinations of blocks in the flowcharts and / or block diagrams, can be implemented by computer-readable program instructions.

[0150] These computer-readable program instructions may be provided to a processor of a general-purpose computer, a special-purpose computer, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions / actions specified in one or more blocks of a flowchart and / or block diagram. These computer-readable program instructions may also be stored in a computer-readable storage medium that can instruct a computer, a programmable data processing apparatus, and / or other devices that function in a particular manner, such that the computer-readable storage medium having the instructions stored therein includes an article of writing comprising instructions for implementing aspects of the functions / actions specified in one or more blocks of a flowchart and / or block diagram.

[0151] Computer-readable program instructions may also be loaded onto a computer, other programmable data processing apparatus, or other apparatus to cause a series of operational steps to be performed on the computer, other programmable apparatus, or other apparatus to produce a computer-implemented process, such that the instructions, which execute on the computer, other programmable apparatus, or other apparatus, perform the functions / actions specified in one or more boxes of a flowchart and / or block diagram.

[0152] The flowcharts and block diagrams in the accompanying drawings illustrate the architecture, functionality, and operation of possible implementations of systems, methods, and computer program products according to various embodiments of the present invention. In this regard, each block in a flowchart or block diagram may represent a portion of a module, segment, or instruction, comprising one or more executable instructions for implementing a specified logical function(s). In some alternative embodiments, the functions marked in the blocks may occur in a different order than indicated in the figures. For example, depending on the functions involved, two blocks shown consecutively may actually be executed substantially simultaneously, or these blocks may sometimes be executed in reverse order. It will also be noted that each block in the block diagrams and / or flowcharts, and combinations of blocks in the block diagrams and / or flowcharts, may be implemented by a system based on dedicated hardware that performs the specified function or action or executes a combination of dedicated hardware and computer instructions.

[0153] Figure 11 An example of computer 1200 is shown, in which aspects of the invention may be fully or partially embodied. Programs installed in computer 1200 may cause computer 1200 to function as or perform operations associated with apparatus or one or more portions thereof of embodiments of the invention, and / or cause computer 1200 to perform processes or steps thereof of embodiments of the invention. Such a program may be executed by CPU 1212 to cause computer 1200 to perform certain operations associated with some or all of the blocks of the flowcharts and block diagrams described herein.

[0154] The computer 1200 according to this embodiment includes a CPU 1212, RAM 1214, graphics controller 1216, and display device 1218 interconnected via a host controller 1210. The computer 1200 also includes input / output units such as a communication interface 1222, a hard disk drive 1224, a DVD-ROM drive 1226, and an IC card driver, which are connected to the host controller 1210 via an input / output controller 1220. The computer also includes conventional input / output units such as a ROM 1230 and a keyboard 1242, which are connected to the input / output controller 1220 via an input / output chip 1240.

[0155] The CPU 1212 operates according to the program stored in the ROM 1230 and RAM 1214, thereby controlling each unit. The graphics controller 1216 obtains the image data generated by the CPU 1212 either from the frame buffer or other data provided in the RAM 1214 or in itself, and displays the image data on the display device 1218.

[0156] Communication interface 1222 communicates with other electronic devices via a network. Hard disk drive 1224 stores programs and data used by CPU 1212 within computer 1200. DVD-ROM drive 1226 reads programs or data from DVD-ROM 1201 and provides programs or data to hard disk drive 1224 via RAM 1214. IC card drive reads programs and data from IC card and / or writes programs and data to IC card.

[0157] The ROM 1230 stores a boot program, etc., executed by the computer 1200 upon activation, and / or programs dependent on the hardware of the computer 1200. The input / output chip 1240 can also connect various input / output units to the input / output controller 1220 via parallel ports, serial ports, keyboard ports, mouse ports, etc.

[0158] The program is provided by a computer-readable medium such as a DVD-ROM 1201 or an IC card. The program is read from the computer-readable medium, installed into a hard disk drive 1224, RAM 1214, or ROM 1230 (which is also an example of a computer-readable medium), and executed by the CPU 1212. The information processing described in these programs is read into the computer 1200, resulting in cooperation between the program and the various types of hardware resources described above. By implementing the manipulation or processing of information according to the use of the computer 1200, an apparatus or method can be constituted.

[0159] For example, when communication occurs between computer 1200 and an external device, CPU 1212 can execute a communication program loaded on RAM 1214 based on the processing described in the communication program to instruct communication interface 1222 on communication processing. Under the control of CPU 1212, communication interface 1222 reads transmission data stored in a transmission buffer area provided in a recording medium such as RAM 1214, hard disk drive 1224, DVD-ROM 1201, or IC card, and sends the read transmission data to a network or writes received data received from the network to a receive buffer area provided on the recording medium.

[0160] Furthermore, the CPU 1212 can read all or necessary portions of a file or database into RAM 1214, which may already be stored on an external recording medium such as a hard disk drive 1224, a DVD-ROM drive 1226 (DVD-ROM 1201), or an IC card, and perform various processing on the data in RAM 1214. The CPU 1212 can then write the processed data back to the external recording medium.

[0161] Various types of information (such as various types of programs, data, tables, and databases) can be stored in a recording medium for information processing. The CPU 1212 can perform various types of processing on data read from RAM 1214, including various types of operations, information processing, conditional judgments, conditional branches, unconditional branches, information search / replacement, etc., as described throughout this disclosure and specified by a sequence of program instructions, and write the results back to RAM 1214. Additionally, the CPU 1212 can search for information in files, databases, etc., in the recording medium. For example, when multiple entries—each entry having an attribute value of a first attribute associated with an attribute value of a second attribute—are stored in the recording medium, the CPU 1212 can search from the multiple entries for entries that match a condition specifying the attribute value of the first attribute, and read the attribute value of the second attribute stored in the entry, thereby obtaining the attribute value of the second attribute associated with the first attribute satisfying a predetermined condition.

[0162] The aforementioned programs or software modules may be stored on or near computer-readable media on or near computer 1200. Furthermore, recording media such as hard disks or RAM located in a server system connected to a dedicated communication network or the Internet may be used as computer-readable media to provide programs to computer 1200 via the network.

[0163] Although embodiments of the present invention have been described, the scope of the invention is not limited to the above-described embodiments. It will be apparent to those skilled in the art that various changes and modifications can be made to the above embodiments. It should also be apparent from the scope of the claims that embodiments with such changes or modifications are also within the scope of the present invention.

[0164] The operations, processes, steps, and stages of each process performed by the apparatus, system, program, and methods shown in the claims, embodiments, and figures may be performed in any order, provided that they are not indicated by "before," "prior to," etc., and provided that the output from the preceding process is not used in the subsequent process. Even if phrases (such as "first" or "next" in the claims, embodiments, or figures) are used to describe the process flow, it does not necessarily mean that the processes must be performed in this order.

Claims

1. A computer-implemented method, comprising: A sequence of operations is obtained, comprising multiple operations to be performed on a quantum computing device, the quantum computing device comprising multiple physical qubits and multiple couplings, each physical qubit storing a logical qubit, and each coupling being a connection between a pair of physical qubits configured to facilitate the execution of an operation on a pair of logical qubits stored in the pair of physical qubits; Initialize all operations in the sequence of operations to unresolved operations, which have not yet been determined to be executable and include unresolved operations in the sequence of operations in the unresolved set; Find a set of blocking operations that includes at least one preceding unresolved operation in the sequence of operations, where the preceding unresolved operation depends only on one or more resolved operations or does not depend on any operation that occurs immediately after initialization, and the set of blocking operations is a subset of the unresolved set. A first coupling score is calculated for each of the plurality of couplings based on the total reduction in the shortest path length of the plurality of unresolved operations, wherein the shortest path length of the unresolved operation represents the minimum distance between a pair of physical qubits storing a pair of logical qubits to be used by the corresponding unresolved operation via the coupling on the quantum computing device, and wherein the total reduction in the shortest path length is the sum of the amount by which each shortest path length will be reduced by swapping a pair of logical qubits stored in a pair of physical qubits connected by the corresponding coupling; Couples are selected based on the first coupling score for each coupling; and The blocking operation set is updated by removing any leading unresolved operations from it, which can be performed after swapping a pair of logical qubits stored in a pair of physical qubits coupled together by a selected pair. The calculation of the first coupling score includes calculating the first coupling score for each coupling based on a weighted sum of the reduced shortest path lengths for each unresolved operation, and The calculation of the first coupling score includes calculating a weight for the reduction of the shortest path length of the unresolved operation of interest based on the number of unresolved operations of interest between the unresolved operation of interest and the at least one preceding unresolved operation in the dependency graph of the plurality of operations in the blocking operation set.

2. The computer-implemented method as described in claim 1, wherein, The update includes updating the blocking operation set by adding a new leading unresolved operation from the operation sequence, wherein the new leading unresolved operation becomes a leading unresolved operation after the leading unresolved operation is removed from the blocking operation set.

3. The computer-implemented method as described in any of the preceding claims, wherein the plurality of unresolved operations is a subset of all unresolved operations in the sequence of operations.

4. The computer-implemented method as described in claim 1 or 2, wherein, Calculating the first coupling score involves determining the unresolved operations based on the distance between the operations in the blocking operation set and each unresolved operation in the dependency graph of the multiple operations.

5. The computer-implemented method of claim 1 or 2, further comprising inserting a swap operation for swapping a pair of logical qubits stored in a pair of physical qubits coupled together by a selected pair of qubits in the operation sequence prior to a preceding unresolved operation, using at least one logical qubit swapped by the swap operation.

6. The computer-implemented method as described in claim 1 or 2, wherein, Calculating the first coupling score includes calculating a weighted reduction in the shortest path length of the unresolved operation of interest based on the maximum distance between the unresolved operation of interest and the at least one preceding unresolved operation in the dependency graph of the plurality of operations in the set of blocking operations.

7. The computer-implemented method of claim 1 or 2, further comprising calculating a second coupling score for each of the plurality of couplings based on a reduction in the shortest path length of each preceding unresolved operation in the blocking operation set, and wherein the selection comprises selecting a coupling based on the second coupling score for each coupling.

8. The computer-implemented method of claim 1 or 2, further comprising resolving up to two preceding unresolved operations in the blocking operation set in response to a first coupling score for each coupling being below a threshold.

9. The computer-implemented method as described in claim 8, wherein, The calculation includes calculating a pair score representing at least one of the dependency cost and resolution cost of each pair of leading unresolved operations in the blocking operation set, wherein the dependency cost represents the dependency relationship of the corresponding pair of leading unresolved operations, the resolution cost represents the cost of resolving the corresponding pair of leading unresolved operations, and wherein the resolution includes selecting two of the at least one leading unresolved operations to be resolved based on the pair score.

10. The computer-implemented method of claim 1 or 2, further comprising calculating a third coupling score for each of the plurality of couplings, the third coupling score for each coupling representing the ability to assist in the exchange of a first logical qubit to be used by a first unresolved operation with a second logical qubit to be used by a second unresolved operation to reduce the shortest path length of the first and second unresolved operations among the plurality of unresolved operations, and wherein the selection includes selecting a pair of physical qubits to be exchanged based on the third coupling score for each coupling.

11. An apparatus comprising: Processor or programmable circuit; as well as One or more computer-readable media, the one or more computer-readable media collectively including instructions that, when executed by the processor or the programmable circuit, cause the processor or the programmable circuit to: A sequence of operations is obtained, comprising multiple operations to be performed on a quantum computing device, the quantum computing device comprising multiple physical qubits and multiple couplings, each physical qubit storing a logical qubit, and each coupling being a connection between a pair of physical qubits configured to facilitate the execution of an operation on a pair of logical qubits stored in the pair of physical qubits; Initialize all operations in the sequence of operations to unresolved operations, which have not yet been determined to be executable and include unresolved operations in the sequence of operations in the unresolved set; Find a set of blocking operations that includes at least one preceding unresolved operation in the sequence of operations, where the preceding unresolved operation depends only on one or more resolved operations or does not depend on any operation that occurs immediately after initialization, and the set of blocking operations is a subset of the unresolved set. A first coupling score is calculated for each of the plurality of couplings based on the total reduction in the shortest path length of the plurality of unresolved operations, wherein the shortest path length of the unresolved operation represents the minimum distance between a pair of physical qubits storing a pair of logical qubits to be used by the corresponding unresolved operation via the coupling on the quantum computing device, and wherein the total reduction in the shortest path length is the sum of the amount by which each shortest path length will be reduced by swapping a pair of logical qubits stored in a pair of physical qubits connected by the corresponding coupling; Couples are selected based on the first coupling score for each coupling; and The blocking operation set is updated by removing any leading unresolved operations from it, which can be performed after swapping a pair of logical qubits stored in a pair of physical qubits coupled together by a selected pair. The calculation of the first coupling score includes calculating the first coupling score for each coupling based on a weighted sum of the reduced shortest path lengths for each unresolved operation, and The calculation of the first coupling score includes calculating a weighted average of the reduction in the shortest path length of the unresolved operation of interest based on the number of unresolved operations of interest between the unresolved operation of interest and at least one preceding unresolved operation in the dependency graph of the plurality of operations in the blocking operation set.

12. The apparatus of claim 11, wherein, The update includes updating the blocking operation set by adding a new leading unresolved operation from the operation sequence, wherein the new leading unresolved operation becomes a leading unresolved operation after the leading unresolved operation is removed from the blocking operation set.

13. The apparatus of claim 11 or 12, wherein, The plurality of unresolved operations are a subset of all unresolved operations in the operation sequence.

14. The apparatus of claim 11 or 12, wherein, Calculating the first coupling score involves calculating a weighted reduction in the shortest path length of the unresolved operation of interest based on the maximum distance between the unresolved operation of interest and its preceding unresolved operation in the dependency graph of the plurality of operations in the blocking operation set.

15. A quantum computing system, comprising: A quantum computing device comprising a plurality of physical qubits and a plurality of couplings, each physical qubit storing a logical qubit, and each coupling being a connection between a pair of physical qubits configured to facilitate the execution of an operation on a pair of logical qubits stored in the pair of physical qubits; as well as A means for mapping multiple operations in a sequence of operations to be performed on the quantum computing device, wherein the means includes: The obtaining unit is used to obtain the operation sequence; Initialize all operations in the sequence of operations to unresolved operations, which have not yet been determined to be executable and include unresolved operations in the sequence of operations in the unresolved set; A lookup unit is used to find a set of blocking operations that includes at least one preceding unresolved operation in the operation sequence, wherein the preceding unresolved operation in the operation sequence depends only on one or more resolved operations or does not depend on any operation that occurs immediately after initialization, and the set of blocking operations is a subset of the unresolved set. The computation unit is configured to calculate a first coupling score for each of the plurality of couplings based on the total reduction of the shortest path length of a plurality of unresolved operations in the plurality of operations, wherein the shortest path length of an unresolved operation represents the minimum distance between a pair of physical qubits storing a pair of logical qubits to be used by the corresponding quantum operation via the coupling on the quantum computing device, and wherein the total reduction of the shortest path length is the sum of the amount by which each shortest path length would be reduced by swapping a pair of logical qubits stored in a pair of physical qubits connected by the corresponding coupling; The selection unit is used to select couplings based on a first coupling score for each coupling; and The update unit is used to update the blocking operation set by removing any leading unresolved operations from the blocking operation set. This can be performed after swapping a pair of logical qubits stored in a pair of physical qubits coupled together by a selected pair. The calculation of the first coupling score includes calculating the first coupling score for each coupling based on a weighted sum of the reduced shortest path lengths for each unresolved operation, and The calculation of the first coupling score includes calculating a weighted average of the reduction in the shortest path length of the unresolved operation of interest based on the number of unresolved operations of interest between the unresolved operation of interest and at least one preceding unresolved operation in the dependency graph of the plurality of operations in the blocking operation set.

16. A computer program product for managing physical quantum circuits, the computer program product comprising: A computer-readable storage medium that can be read by processing circuitry and stores instructions for execution by the processing circuitry to perform the method as claimed in any one of claims 1 to 10.

17. A computer-readable medium having a computer program stored thereon, the computer program being loadable into the internal memory of a digital computer, the computer program including a software code portion that, when the program is run on the computer, is used to perform the method as claimed in any one of claims 1 to 10.

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