Semiconductor device package and method for manufacturing the same

By adopting a multi-layer structure and a conductor connector design in the semiconductor device package, the problem of low yield of stacked modules is solved, the reliability and heat resistance of electrical connections are achieved, short circuits are prevented, and the overall performance of the equipment is improved.

CN113284858BActive Publication Date: 2025-07-29ADVANCED SEMICON ENG INC
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Patent Information

Application Number
CN202011207440.6
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Priority Date
2020-02-20
Filing Date
2020-11-03
Publication Date
2025-07-29
Estimated Expiration
2040-11-03

AI Technical Summary

Technical Problem

In existing semiconductor equipment packages, the yield of stacked modules is low, and the electrical connection reliability and heat resistance are insufficient, resulting in the equipment being prone to short-circuited in high-temperature processes.

Method used

The semiconductor device packaging design adopts a multi-layer structure, and the electrical connection between the modules is achieved by setting a conductor and a connector between the substrates, and the substrate is supported by a spacer to control the distance, ensuring the reliability and heat resistance of the electrical connection.

Benefits of technology

Improves the reliability of electrical connection between modules, prevents the equipment from being shorted during heating, and improves the yield and stability of electrical connection.

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Abstract

A semiconductor device package includes a first substrate and a second substrate disposed above the first substrate. A first connector is disposed on the first substrate, and a first conductor passes through the second substrate and is connected to the first connector.
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Description

Technical Field

[0001] Among other things, the present disclosure relates to semiconductor device packages and methods of manufacturing the same, and semiconductor device packages having a plurality of double-sided modules stacked on one another. Background Art

[0002] A semiconductor device includes a plurality of modules. Each module includes a substrate and a plurality of electronic components having different functions mounted on the substrate. These modules are stacked on one another and electrically connected to one another. The yield of the stacked modules is an important issue for semiconductor devices. Summary of the Invention

[0003] According to an exemplary embodiment of the present disclosure, a semiconductor device package includes a first substrate, a first connector, a second substrate, and a first conductor. The first substrate has a first surface, and the first connector is disposed on the first surface of the first substrate. The second substrate has a first surface facing the first surface of the first substrate. The first conductor passes through the second substrate and is electrically connected to the first connector.

[0004] According to another exemplary embodiment of the present disclosure, a semiconductor device package includes a first substrate, a first connector, a second substrate, and a first conductor. The first connector is disposed on the first substrate. The second substrate is disposed above the first substrate. The first conductor penetrates the second substrate and is in electrical contact with the first connector.

[0005] According to another exemplary embodiment of the present disclosure, a method of manufacturing a semiconductor device package includes: providing a first substrate; disposing a first connector on a first surface of the first substrate; providing a second substrate above the first substrate; forming a first through-hole in the second substrate; and forming a first conductor that passes through the first through-hole and is electrically connected to the first conductor.

[0006] To further understand the present disclosure, the following embodiments and descriptions are provided to facilitate understanding of the present disclosure; however, only the drawings are provided for reference and description, and do not limit the scope of the present disclosure. Brief Description of the Drawings

[0007] Figure 1 is a cross-sectional view of a semiconductor device package according to an embodiment of the present disclosure.

[0008] Figure 2A 、 Figure 2B 、 Figure 2C 、 Figure 2D 、 Figure 2E 、 Figure 2F 、 Figure 2G 、 Figure 2H 、 Figure 2I 、Figure 2J , Figure 2K , Figure 2L , Figure 2M , Figure 2N , Figure 2O , Figure 2P , Figure 2Q , Figure 2R and Figure 2S illustrate a method of manufacturing a semiconductor device package in accordance with another embodiment of the present disclosure.

[0009] Figure 3 is a cross-sectional view of a semiconductor device package in accordance with an embodiment of the present disclosure.

[0010] Figure 4 is a cross-sectional view of a semiconductor device package in accordance with an embodiment of the present disclosure. DETAILED DESCRIPTION

[0011] The following disclosure provides many different embodiments or examples for implementing different features of the provided subject matter. Specific examples of components and arrangements are described below to explain certain aspects of the present disclosure. Of course, these are merely examples and are not intended to be limiting. For example, in the following description, forming a first feature above or on top of a second feature may include embodiments where the first and second features are formed or positioned in direct contact, and may also include embodiments where additional features are formed and positioned between the first and second features such that the first and second features are not in direct contact. Additionally, the present disclosure may repeat reference numerals and / or letters in the various examples. This repetition is for simplicity and clarity purposes and does not in itself indicate a relationship between the various embodiments and / or configurations discussed.

[0012] Spatially relative terms such as "below", "beneath", "above", "over", "on", "upper", "lower", "left", "right", "vertical", "horizontal", "side" and the like as used herein may be used for ease of description to describe the relationship of one element or feature to another or other elements or features as shown in the figures. In addition to the orientation depicted in the figures, the spatially relative terms are also intended to encompass different orientations of the device during use or operation. The device may be oriented in other ways (rotated 90 degrees or in other orientations), and the spatially relative descriptive terms used herein may be interpreted accordingly. It should be understood that when an element is referred to as being "connected to" or "coupled to" another element, it can be directly connected to or coupled to the other element, or intervening elements may be present.

[0013] The present disclosure provides a semiconductor device package having a multi-layer structure that includes at least two stacked modules. The modules are electrically connected to each other by conductors and connectors. This configuration prevents short circuits in the semiconductor device package during heating and thus improves the electrical connection between the modules.

[0014] Figure 1 is a cross-sectional view of a semiconductor device package 1 according to some embodiments of the present disclosure. As Figure 1 shown, the semiconductor device 1 includes four double-sided modules (DSM) 110, 120, 130, and 140. The double-sided module 110 includes a substrate 11 having a surface 111 (e.g., an upper surface) and a surface 112 (e.g., a lower surface) opposite to the surface 111. Electronic components 1121 and 1123 are disposed on the surface 112 of the substrate 11. In some embodiments, the electronic component 1121 is mounted on the surface 112 of the substrate 11 by an electrical connection 1127, and the electronic component 1123 is mounted on the surface 112 of the substrate 11 by an electrical connection 1128. The encapsulant 18 encapsulates the electronic components 1121, 1123, and the surface 112 of the substrate 11. The encapsulant 18 may include a molding material such as epoxy resin, and fillers such as silica fillers may be filled in the molding material. Additionally, the encapsulant 18 may include a molded underfill (MUF) or a capillary underfill (CUF). Further, electronic components 1111 and 1113 are disposed on the surface 111 of the substrate 11. In some embodiments, the electronic component 1111 is mounted on the surface 111 of the substrate 11 by an electrical connection 1117, and the electronic component 1113 is mounted on the surface 111 of the substrate 11 by an electrical connection 1118. Additionally, a connector 114 and spacers 117 are disposed on the surface 111 of the substrate 11. Generally, the height of the spacers 117 is greater than the height of the connector 114. In some embodiments, the connector 114 and the spacers 117 are mounted on the surface 111 of the substrate 11 by pads 1119, 1119'. Further, in some embodiments, the distance between two spacers 117 is greater than half of the width of the substrate 11. In some embodiments, the spacers 117 are made of a metallic material. In some embodiments, the spacers 117 are made of a non-metallic material. Additionally, the connector 114 may have a tapered upper end, and the spacers 117 may have a tapered upper end. The height ratio of the connector 114 to the spacers 117 is in the range of 0.4 to 1.0.

[0015] The double-sided module 120 includes a substrate 12 having a surface 121 (e.g., a lower surface) facing the surface 111 of the substrate 11 and a surface 122 opposite to the surface 121. Electronic components 1211 and 1213 are disposed on the surface 121 of the substrate 12. In some embodiments, the electronic component 1211 is mounted on the surface 121 of the substrate 12 through an electrical connection 1217, and the electronic component 1213 is mounted on the surface 121 of the substrate 12 through an electrical connection 1218. Further, a spacer 117 is in contact with the surface 121 of the substrate 12. In other words, the spacer 117 supports the substrate 12. Thus, the distance between the surface 111 of the substrate 11 and the surface 121 of the substrate 12 is defined by the height of the spacer 117. Therefore, the ratio of the height of the connector 114 to the distance between the surface 111 of the substrate 11 and the surface 121 of the substrate 12 is in the range of 0.4 to 1.0. In some embodiments, the spacer 117 is made of a metallic material, and thus the substrates 11 and 12 are electrically connected to each other through the spacer 117. Further, an electronic component 1221 is disposed on the surface 122 of the substrate 12. In some embodiments, the electronic component 1221 is mounted on the surface 122 of the substrate 12 through an electrical connection 1227. Additionally, a connector 124 and a spacer 127 are disposed on the surface 122 of the substrate 12. Generally, the height of the spacer 127 is greater than the height of the connector 124. In some embodiments, the connector 124 and the spacer 127 are mounted on the surface 122 of the substrate 12 through pads 1229, 1229'. Further, the distance between two spacers 127 is greater than half of the width of the substrate 12. In some embodiments, the spacer 127 is made of a metallic material. In some embodiments, the spacer 127 is made of a non-metallic material. Additionally, the connector 124 may have a tapered upper end, and the spacer 127 may have a tapered upper end. The height ratio of the connector 124 to the spacer 127 is in the range of 0.4 to 1.0. Additionally, the double-sided module 120 includes a conductor 126 passing through or penetrating the substrate 12 and electrically connected to the connector 114. In some embodiments, the conductor 126 is made of a soldering material. In some embodiments, the conductor 126 and the spacer 127 are made of the same metallic material. An encapsulant 15 is disposed between the substrates 11 and 12 and encapsulates the electronic components 1111, 1113, the connector 114, the surface 112 of the substrate 11, the electronic components 1211, 1213, the surface 121 of the substrate 12, and the portion of the conductor 126 protruding from the surface 121 of the substrate 12. In some embodiments, the encapsulant 15 may include a liquid adhesive. In some embodiments, the encapsulant 15 may include a tape. In some embodiments, the encapsulant 15 may include a sticky film.

[0016] As Figure 1As shown, the conductor 126 passes through the substrate 12 and is connected to the top of the connector 114. Thus, the modules 110 and 120 can be electrically connected to each other through the conductor 126 and the connector 114. The conductor 126 can gradually decrease from its upper end to its lower end. Referring to Figure 1 , the cross-sectional width of the upper end of the conductor 126 adjacent to the surface 122 of the substrate 12 is greater than the cross-sectional width of the lower end of the conductor 126 adjacent to the connector 114.

[0017] The double-sided module 130 includes a substrate 13 having a surface 131 (e.g., a lower surface) facing the surface 122 of the substrate 12 and a surface 132 opposite to the surface 131. Electronic components 1311 and 1313 are disposed on the surface 131 of the substrate 13. In some embodiments, the electronic component 1311 is mounted on the surface 131 of the substrate 13 through an electrical connection 1317, and the electronic component 1313 is mounted on the surface 131 of the substrate 13 through an electrical connection 1318. Further, a spacer 127 is in contact with the surface 131 of the substrate 13. In other words, the spacer 127 supports the substrate 13. Thus, the distance between the surface 122 of the substrate 12 and the surface 131 of the substrate 13 is defined by the height of the spacer 127. Therefore, the ratio of the height of the connector 124 to the distance between the surface 122 of the substrate 12 and the surface 131 of the substrate 13 is in the range of 0.4 to 1.0. In some embodiments, the spacer 127 is made of a metallic material, and thus the substrates 12 and 13 are electrically connected to each other through the spacer 127. Further, electronic components 1321 and 1323 are disposed on the surface 132 of the substrate 13. In some embodiments, the electronic component 1321 is mounted on the surface 132 of the substrate 13 through an electrical connection 1327, and the electronic component 1323 is mounted on the surface 132 of the substrate 13 through an electrical connection 1328. Additionally, a connector 134 and spacers 137 are disposed on the surface 132 of the substrate 13. Generally, the height of the spacer 137 is greater than the height of the connector 134. In some embodiments, the connector 134 and the spacers 137 are mounted on the surface 132 of the substrate 13 through pads 1329, 1329'. Further, the distance between the two spacers 137 is greater than half of the width of the substrate 13. In some embodiments, the spacer 137 is made of a metallic material. In some embodiments, the spacer 137 is made of a non-metallic material. Additionally, the connector 134 may have a tapered upper end, and the spacer 137 may have a tapered upper end. The ratio of the height of the connector 134 to the height of the spacer is in the range of 0.4 to 1.0. Additionally, the double-sided module 130 includes a conductor 136 passing through or penetrating the substrate 13 and electrically connected to the connector 124. In some embodiments, the conductor 136 is made of a welding material. In some embodiments, the conductor 136 and the spacer 137 are made of the same metallic material. An encapsulant 16 is disposed between the substrates 12 and 13 and encapsulates the portions of the electronic components 1221, 1223, the connector 124, the conductor 126 protruding from the surface 122 of the substrate 12, the surface 122 of the substrate 12, the electronic components 1312, 1313, the surface 131 of the substrate 13, and the portion of the conductor 136 protruding from the surface 131 of the substrate 13. The encapsulant 16 may include a liquid adhesive. In some embodiments, the encapsulant 16 may include a tape. In some embodiments, the encapsulant 16 may include a sticky film.

[0018] AsFigure 1 As shown, the conductor 136 passes through the substrate 13 and is connected to the top of the connector 124. Thus, the modules 120 and 130 can be electrically connected to each other through the conductor 136 and the connector 124. The conductor 136 can gradually decrease from its upper end to its lower end. Referring to Figure 1 , the cross-sectional width of the upper end of the conductor 136 adjacent to the surface 132 of the substrate 13 is greater than the cross-sectional width of the lower end of the conductor 136 adjacent to the connector 124.

[0019] The double-sided module 140 includes a substrate 14 having a surface 141 (e.g., a lower surface) facing the surface 132 of the substrate 13 and a surface 142 opposite to the surface 141. Electronic components 1411 and 1413 are disposed on the surface 141 of the substrate 14. In some embodiments, the electronic component 1411 is mounted on the surface 141 of the substrate 14 through an electrical connection 1417, and the electronic component 1413 is mounted on the surface 141 of the substrate 14 through an electrical connection 1418. Further, a spacer 137 is in contact with the surface 141 of the substrate 14. In other words, the spacer 137 supports the substrate 14. Thus, the distance between the surface 132 of the substrate 13 and the surface 141 of the substrate 14 is defined by the height of the spacer 137. Therefore, the ratio of the height of the connector 134 to the distance between the surface 132 of the substrate 13 and the surface 141 of the substrate 14 is in the range of 0.4 to 1.0. In some embodiments, the spacer 137 is made of a metallic material, and thus the substrates 13 and 14 are electrically connected to each other through the spacer 137. Further, electronic components 1421 and 1423 are disposed on the surface 142 of the substrate 14. In some embodiments, the electronic component 1421 is mounted on the surface 142 of the substrate 14 through an electrical connection 1427, and the electronic component 1423 is mounted on the surface 142 of the substrate 14 through an electrical connection 1428. An encapsulant 19 is disposed on the surface 142 of the substrate and encapsulates the electronic components 1421 and 1423 and a portion of the surface 142 of the substrate 14. The encapsulant 19 may include a molding material such as epoxy resin, and fillers such as silica fillers may be filled in the molding material. Additionally, the encapsulant 19 may include a molded underfill (MUF) or a capillary underfill (CUF). Further, electrical connections 1425 such as solder balls are disposed on the surface 142 of the substrate 14. In some embodiments, the electrical connection 1425 is not covered by the encapsulant 19. Additionally, the double-sided module 140 includes a conductor 146 passing through or penetrating the substrate 14 and electrically connected to the connector 134. In some embodiments, the conductor 146 is made of a soldering material. An encapsulant 17 is disposed between the substrates 13 and 14 and seals the electronic components 1321, 1323, the connector 134, the portion of the conductor 136 protruding from the surface 132 of the substrate 13, the surface 132 of the substrate 13, the electronic components 1412, 1413, the surface 141 of the substrate 14, and the portion of the conductor 146 protruding from the surface 141 of the substrate 14. The encapsulant 17 may include a liquid adhesive. In some embodiments, the encapsulant 17 may include a tape. In some embodiments, the encapsulant 17 may include a sticky film.

[0020] Such as Figure 1As shown, conductor 146 passes through substrate 14 and is connected to the top of connector 134. Thus, modules 130 and 140 can be electrically connected to each other through conductor 146 and connector 134. Conductor 146 can gradually decrease from its upper end to its lower end. Referring to Figure 1 , the cross-sectional width of the upper end of conductor 146 adjacent to surface 142 of substrate 14 is greater than the cross-sectional width of the lower end of conductor 146 adjacent to connector 134.

[0021] Figure 2A 、 Figure 2B 、 Figure 2C 、 Figure 2D 、 Figure 2E 、 Figure 2F 、 Figure 2G 、 Figure 2H 、 Figure 2I 、 Figure 2J 、 Figure 2K 、 Figure 2L 、 Figure 2M 、 Figure 2N 、 Figure 2O 、 Figure 2P 、 Figure 2Q 、 Figure 2R and Figure 2S show a method of manufacturing a semiconductor device package 1 according to another embodiment of the present disclosure. In Figure 2A , a dual-sided module (DSM) 110 is provided. The dual-sided module 110 includes a substrate 11. The substrate 11 includes a surface 111 and a surface 112 opposite to the surface 111. Electronic components 1121 and 1123 are disposed on the surface 112 of the substrate 11, and encapsulant 18 is disposed on the surface 112 of the substrate 11 and encapsulates the electronic components 1121, 1123, and the surface 112 of the substrate 11. Further, electronic components 1111 and 1113 are disposed on the surface 111 of the substrate 11. In some embodiments, the electronic components 1111 and 1113 are mounted on the surface 111 of the substrate 11 through electrical connections 1117 and 1118, and the electrical connections 1117 and 1118 are made of a first welding material.

[0022] In Figure 2B , connectors 114 and spacers 117 are arranged on the surface 111 of the substrate 11. In some embodiments, the connectors 114 and spacers 117 are arranged on pads 1119, 1119', and a second welding material is arranged between the connector 114 and the pad 1119 and between the spacer 117 and the pad 1119'.

[0023] In Figure 2CIn [description], a reflow process can be performed such that the connector 114 and the spacer 117 are mounted onto the substrate 11. The melting point of the first solder material is greater than the melting point of the second solder material. Thus, the melting point of the first solder material is greater than the reflow temperature. That is, the electronic components 1111 and 1113 disposed on the surface 111 of the substrate 11 will not be affected by the high temperature during the reflow process.

[0024] In Figure 2D [description], a dual-sided module (DSM) 120 and an encapsulant 15 are provided. In some embodiments, the encapsulant 15 includes a liquid adhesive. In some embodiments, the encapsulant 15 includes a sticky film. In some embodiments, the encapsulant 15 includes a tape. The dual-sided module 120 includes a substrate 12. The substrate 12 includes a surface 121 facing the surface 111 of the substrate 11 and a surface 122 opposite to the surface 111. The electronic components 1211 and 1213 are disposed on the surface 121 of the substrate 12. Further, the electronic component 1221 is disposed on the surface 122 of the substrate 12. In some embodiments, the electronic component 1221 is mounted onto the surface 122 of the substrate 12 through an electrical connection 1227, and the electrical connection 1227 is made of the second solder material.

[0025] In Figure 2E [description], the dual-sided module 120 is disposed above the dual-sided module 110, and the encapsulant 15 is disposed between the substrate 11 and the substrate 12. The spacer 117 contacts the surface 121 of the substrate 12 and thus supports the substrate 12. The encapsulant 15 encapsulates the electronic components 1211 and 1213, the surface 121 of the substrate 12, the electronic components 1121 and 1123, the connector 114, the spacer 117, and the surface 111 of the substrate 11. Referring to Figure 2E , a laser operation can be performed such that a portion of the substrate 12 and a portion of the encapsulant 15 can be removed through the laser operation. After the laser operation, a tapered through-hole 125 is formed, and a portion of the connection 114 is exposed. In some embodiments, a small portion of the pad 1229 disposed on the surface 122 of the substrate 12 can be removed through the laser operation.

[0026] In Figure 2F [description], the conductor 126 is filled in the through-hole 125 through a screen printing operation. Thus, the conductor 126 passes through the substrate 12 and contacts the connector 114. Further, since the through-hole 125 is tapered, the conductor 126 is substantially tapered. In some embodiments, the conductor 126 is made of a third solder material.

[0027] In Figure 2GIn [description], the connector 124 and the spacer 127 are disposed on the surface 122 of the substrate 12. In some embodiments, the connector 124 and the spacer 127 are disposed on the pad 1229, and a third solder material is disposed between the connector 124 and the pad 1229 and between the spacer 127 and the pad 1229.

[0028] In Figure 2H [description], a reflow process can be performed such that the connector 124 and the spacer 127 are mounted on the substrate 12 and the conductor 126 is formed. The melting point of the second solder material is greater than the melting point of the third solder material. Thus, the melting point of the second solder material is greater than the reflow temperature. That is, the electronic component 1221 disposed on the surface 122 of the substrate 12 will not be affected by the high temperature during the reflow process.

[0029] In Figure 2I [description], a dual-sided module (DSM) 130 and an encapsulant 16 are provided. In some embodiments, the encapsulant 16 includes a liquid adhesive. In some embodiments, the encapsulant 16 includes a viscous film. In some embodiments, the encapsulant 16 includes a tape. The dual-sided module 130 includes a substrate 13. The substrate 13 includes a surface 131 facing the surface 122 of the substrate 12 and a surface 132 opposite to the surface 131. The electronic components 1311 and 1313 are disposed on the surface 131 of the substrate 13. Further, the electronic components 1321, 1323 are disposed on the surface 132 of the substrate 13. In some embodiments, the electronic components 1321, 1322 are mounted on the surface 132 of the substrate 13 through the electrical connections 1327 and 1328, and the electrical connections 1327 and 1328 are made of a third solder material.

[0030] In Figure 2J [description], the dual-sided module 130 is disposed above the dual-sided module 120, and the encapsulant 16 is disposed between the substrate 12 and the substrate 13. The spacer 127 contacts the surface 131 of the substrate 13 and thus supports the substrate 13. The encapsulant 16 encapsulates the electronic components 1311 and 1313, the surface 131 of the substrate 13, the electronic component 1221, the connector 124, the spacer 127, and the surface 122 of the substrate 12. Referring to Figure 2J [description], a laser operation can be performed such that a portion of the substrate 13 and a portion of the encapsulant 16 can be removed by the laser operation. After the laser operation, a tapered through-hole 135 is formed and a portion of the connection 124 is exposed. In some embodiments, a small portion of the pad 1329 disposed on the surface 132 of the substrate 13 can be removed by the laser operation.

[0031] In Figure 2KIn [description], the conductor 136 is filled in the through-hole 135 through a screen printing operation. Thus, the conductor 136 passes through the substrate 13 and contacts the connector 124. Further, since the through-hole 135 is tapered, the conductor 136 is substantially tapered. In some embodiments, the conductor 136 is made of a fourth welding material.

[0032] In Figure 2L [description], the connector 134 and the spacer 137 are arranged on the surface 132 of the substrate 13. In some embodiments, the connector 134 and the spacer 137 are arranged on the pad 1329, and the fourth welding material is arranged between the connector 134 and the pad 1329 and between the spacer 137 and the pad 1329.

[0033] In Figure 2M [description], a reflow process can be performed such that the connector 134 and the spacer 137 are mounted on the substrate 13 and the conductor 136 is formed. The melting point of the third welding material is greater than the melting point of the fourth welding material. Thus, the melting point of the third welding material is greater than the reflow temperature. That is, the electronic components 1321, 1323 and the conductor 126 arranged on the surface 132 of the substrate 13 will not be affected by high temperature during the reflow process.

[0034] In Figure 2N [description], a double-sided module (DSM) 140 and an encapsulant 17 are provided. In some embodiments, the module 140 can be a single-sided module. In some embodiments, the encapsulant 17 contains a liquid adhesive. In some embodiments, the encapsulant 17 contains a sticky film. In some embodiments, the encapsulant 17 contains a tape. The double-sided module 140 includes a substrate 14. The substrate 14 includes a surface 141 facing the surface 132 of the substrate 13 and a surface 142 opposite to the surface 141. The electronic components 1411 and 1413 are arranged on the surface 141 of the substrate 14. Further, the electronic components 1421, 1423 and the encapsulant 19 are arranged on the surface 142 of the substrate 14, and the encapsulant 19 encapsulates the electronic components 1421, 1423 and a part of the surface 142 of the substrate 14.

[0035] In Figure 2O [description], the double-sided module 140 is arranged above the double-sided module 130, and the encapsulant 17 is arranged between the substrate 13 and the substrate 14. The spacer 137 contacts the surface 141 of the substrate 14 and thus supports the substrate 14. The encapsulant 17 encapsulates the electronic components 1411 and 1413, the surface 141 of the substrate 14, the electronic components 1321 and 1323, the connector 134, the spacer 137 and the surface 132 of the substrate 13. Refer to Figure 2O, a laser operation can be performed so that a portion of the substrate 14 and a portion of the encapsulant 17 can be removed by the laser operation. After the laser operation, a tapered via 145 is formed and a portion of the connection 134 is exposed. In some embodiments, a small portion of the pad 1429 disposed on the surface 142 of the substrate 14 can be removed by the laser operation.

[0036] In Figure 2P , the conductor 146 is filled in the via 134 by a screen printing operation. Thus, the conductor 146 passes through the substrate 14 and contacts the connector 134. Further, since the via 145 is tapered, the conductor 146 is substantially tapered. In some embodiments, the conductor 146 is made of a fifth solder material.

[0037] In Figure 2Q , an electrical connection 1425 such as a solder ball is disposed on the surface 142 of the substrate 14. The electrical connection 1425 is located at an area not covered by the encapsulant 19. In some embodiments, the electrical connection is made of a fifth solder material.

[0038] In Figure 2R , a reflow process can be performed so that the conductor 146 and the electrical connection 1425 are formed. The melting point of the fourth solder material is greater than the melting point of the fifth solder material. Thus, the melting points of the third solder material and the fourth solder material are greater than the reflow temperature. That is, the conductors 126 and 136 will not be affected by the high temperature during the reflow process.

[0039] In Figure 2S , a singulation process is performed to singulate the modules 110, 120, 130, and 140, thereby forming a semiconductor device package 1 as shown in Figure 1 .

[0040] Figure 3 is a cross-sectional view of a semiconductor device package 2 according to some embodiments of the present disclosure. As shown in Figure 3As shown, the semiconductor device 2 includes four dual-sided modules (DSM) 210, 220, 230, and 240. The dual-sided module 210 includes a substrate 21 having a surface 211 (e.g., an upper surface) and a surface 212 (e.g., a lower surface) opposite to the surface 211. Electronic components 2121 and 2123 are disposed on the surface 212 of the substrate 21. In some embodiments, the electronic component 2121 is mounted on the surface 212 of the substrate 21 through an electrical connection 2127, and the electronic component 2123 is mounted on the surface 212 of the substrate 21 through an electrical connection 2128. The encapsulant 28 encapsulates the electronic components 2121, 2123, and the surface 212 of the substrate 21. The encapsulant 28 may include a molding material such as epoxy resin, and fillers such as silica fillers may be filled in the molding material. Additionally, the encapsulant 28 may include a molded underfill (MUF) or a capillary underfill (CUF). Further, electronic components 2111 and 2113 are disposed on the surface 211 of the substrate 21. In some embodiments, the electronic component 2111 is mounted on the surface 211 of the substrate 21 through an electrical connection 2117, and the electronic component 2113 is mounted on the surface 211 of the substrate 21 through an electrical connection 2118. Additionally, a connector 214 and spacers 217 are disposed on the surface 211 of the substrate 21. Generally, the height of the spacers 217 is greater than the height of the connector 214. In some embodiments, the connector 214 and the spacers 217 are mounted on the surface 211 of the substrate 21 through pads 2119, 2119'. Further, in some embodiments, the distance between two spacers 217 is greater than half of the width of the substrate 21. In some embodiments, the spacers 217 are made of a metallic material. In some embodiments, the spacers 217 are made of a non-metallic material. Additionally, the connector 214 may have a tapered upper end, and the spacers 217 may have a tapered upper end. The height ratio of the connector 214 to the spacers 217 is in the range of 0.4 to 1.0.

[0041] The double-sided module 220 includes a substrate 22 having a surface 221 (e.g., a lower surface) facing the surface 211 of the substrate 21 and a surface 222 opposite to the surface 221. Electronic components 2211 and 2213 are disposed on the surface 221 of the substrate 22. In some embodiments, the electronic component 2211 is mounted on the surface 221 of the substrate 22 through an electrical connection 2217, and the electronic component 2213 is mounted on the surface 221 of the substrate 22 through an electrical connection 2218. Further, a spacer 217 is in contact with the surface 221 of the substrate 22. In other words, the spacer 217 supports the substrate 22. Therefore, the distance between the surface 211 of the substrate 21 and the surface 221 of the substrate 22 is defined by the height of the spacer 217. Thus, the ratio of the height of the connector 214 to the distance between the surface 211 of the substrate 21 and the surface 221 of the substrate 22 is in the range of 0.4 to 1.0. In some embodiments, the spacer 217 is made of a metallic material, and thus the substrates 21 and 22 are electrically connected to each other through the spacer 217. Further, an electronic component 2221 is disposed on the surface 222 of the substrate 22. In some embodiments, the electronic component 2221 is mounted on the surface 222 of the substrate 22 through an electrical connection 2227. Additionally, a connector 224 and a spacer 227 are disposed on the surface 222 of the substrate 22. Generally, the height of the spacer 227 is greater than the height of the connector 224. In some embodiments, the connector 224 and the spacer 227 are mounted on the surface 222 of the substrate 22 through a gasket 2229. Further, the distance between two spacers 227 is greater than half of the width of the substrate 22. In some embodiments, the spacer 227 is made of a metallic material. In some embodiments, the spacer 227 is made of a non-metallic material. Additionally, the connector 224 may have a tapered upper end, and the spacer 227 may have a tapered upper end. The height ratio of the connector 224 to the spacer 227 is in the range of 0.4 to 1.0. Additionally, the double-sided module 220 includes a conductor 226 that passes through or penetrates the substrate 22 and is electrically connected to the connector 214. In some embodiments, the conductor 126 is made of an alloy such as Cu, Ag, Au, Ni alloy, etc. An encapsulant 25 is disposed between the substrates 21 and 22 and encapsulates the electronic components 2111, 2113, the connector 214, and the surface 212 of the substrate 21, the electronic components 2211, 2213, the surface 221 of the substrate 12, and a portion of the conductor 226. In some embodiments, the encapsulant 25 may include a liquid adhesive. In some embodiments, the encapsulant 25 may include a tape. In some embodiments, the encapsulant 25 may include a sticky film.

[0042] Such as Figure 3As shown, conductor 226 passes through substrate 22 and is connected to the top of connector 214. Thus, modules 210 and 220 can be electrically connected to each other through conductor 226 and connector 214. Conductor 226 can gradually decrease from its upper end to its lower end. Referring to Figure 3 , conductor 226 has a cross-sectional V shape. In some embodiments, conductor 226 has a seed layer 2261. The seed layer 2261 is substantially disposed on the outer surface of conductor 226. Thus, the seed layer 2261 is substantially disposed between conductor 226 and substrate 22, and is substantially disposed between conductor 226 and encapsulant 25, and is substantially disposed between conductor 226 and connector 214.

[0043] The double-sided module 230 includes a substrate 23 having a surface 231 (e.g., a lower surface) facing the surface 222 of the substrate 22 and a surface 232 opposite to the surface 231. Electronic components 2311 and 2313 are disposed on the surface 231 of the substrate 13. In some embodiments, the electronic component 2311 is mounted on the surface 231 of the substrate 23 through an electrical connection 2317, and the electronic component 2313 is mounted on the surface 231 of the substrate 23 through an electrical connection 2318. Further, a spacer 227 is in contact with the surface 231 of the substrate 23. In other words, the spacer 227 supports the substrate 23. Thus, the distance between the surface 222 of the substrate 22 and the surface 231 of the substrate 23 is defined by the height of the spacer 227. Therefore, the ratio of the height of the connector 224 to the distance between the surface 222 of the substrate 22 and the surface 231 of the substrate 23 is in the range of 0.4 to 1.0. In some embodiments, the spacer 227 is made of a metallic material, and thus the substrates 22 and 23 are electrically connected to each other through the spacer 227. Further, electronic components 2321 and 2323 are disposed on the surface 232 of the substrate 23. In some embodiments, the electronic component 2321 is mounted on the surface 232 of the substrate 23 through an electrical connection 2327, and the electronic component 2323 is mounted on the surface 232 of the substrate 23 through an electrical connection 2328. Additionally, a connector 234 and spacers 237 are disposed on the surface 232 of the substrate 23. Generally, the height of the spacer 237 is greater than the height of the connector 234. In some embodiments, the connector 234 and the spacers 237 are mounted on the surface 232 of the substrate 23 through pads 2329, 2329'. Further, the distance between two spacers 237 is greater than half of the width of the substrate 23. In some embodiments, the spacer 237 is made of a metallic material. In some embodiments, the spacer 237 is made of a non-metallic material. Additionally, the connector 234 may have a tapered upper end, and the spacer 237 may have a tapered upper end. The ratio of the height of the connector 234 to the height of the spacer 237 is in the range of 0.4 to 1.0. Additionally, the double-sided module 230 includes a conductor 236 passing through or penetrating the substrate 23 and electrically connected to the connector 224. In some embodiments, the conductor 236 is made of an alloy such as Cu, Ag, Au, Ni alloy, etc. An encapsulant 26 is disposed between the substrates 22 and 23 and encapsulates the electronic components 2221, 2223, the connector 224, and the surface 222 of the substrate 22, the electronic components 2311, 2313, the surface 231 of the substrate 23, and a portion of the conductor 236. In some embodiments, the encapsulant 26 may include a liquid adhesive. In some embodiments, the encapsulant 26 may include a tape. In some embodiments, the encapsulant 26 may include a sticky film.

[0044] As Figure 3As shown, conductor 236 passes through substrate 23 and is connected to the top of connector 224. Thus, modules 220 and 230 can be electrically connected to each other through conductor 236 and connector 224. Conductor 236 can gradually decrease from its upper end to its lower end. Referring to Figure 3 , conductor 236 has a V-shaped cross section. In some embodiments, conductor 236 has a seed layer 2361. Seed layer 2361 is substantially disposed on the outer surface of conductor 236. Thus, seed layer 2361 is substantially disposed between conductor 236 and substrate 23, and is substantially disposed between conductor 236 and encapsulant 26, and is substantially disposed between conductor 236 and connector 224.

[0045] The dual-sided module 240 includes a substrate 24 having a surface 241 (e.g., a lower surface) facing the surface 232 of the substrate 23 and a surface 242 opposite to the surface 241. Electronic components 2411 and 2413 are disposed on the surface 241 of the substrate 24. In some embodiments, the electronic component 2411 is mounted on the surface 241 of the substrate 24 through an electrical connection 2417, and the electronic component 2413 is mounted on the surface 241 of the substrate 24 through an electrical connection 2418. Further, a spacer 237 is in contact with the surface 241 of the substrate 24. In other words, the spacer 237 supports the substrate 24. Thus, the distance between the surface 232 of the substrate 23 and the surface 241 of the substrate 24 is defined by the height of the spacer 237. Thus, the ratio of the height of the connector 234 to the distance between the surface 232 of the substrate 23 and the surface 241 of the substrate 24 is in the range of 0.4 to 1.0. In some embodiments, the spacer 237 is made of a metallic material, and thus the substrates 23 and 24 are electrically connected to each other through the spacer 237. Further, electronic components 2421 and 2423 are disposed on the surface 242 of the substrate 24. In some embodiments, the electronic component 2421 is mounted on the surface 242 of the substrate 24 through an electrical connection 2427, and the electronic component 2423 is mounted on the surface 242 of the substrate 24 through an electrical connection 2428. An encapsulant 29 is disposed on the surface 242 of the substrate 24 and encapsulates the electronic components 2421 and 2423 and a part of the surface 242 of the substrate 24. The encapsulant 29 may include a molding material such as epoxy resin, and fillers such as silica fillers may be filled in the molding material. Additionally, the encapsulant 29 may include a molded underfill (MUF) or a capillary underfill (CUF). Further, an electrical connection 2425 such as a solder ball is disposed on the surface 242 of the substrate 24. In some embodiments, the electrical connection 2425 is not covered by the encapsulant 29. Additionally, the dual-sided module 240 includes a conductor 246 that passes through or penetrates the substrate 24 and is electrically connected to the connector 234. In some embodiments, the conductor 246 is made of an alloy such as Cu, Ag, Au, Ni alloy, etc. An encapsulant 27 is disposed between the substrates 23 and 24 and encapsulates the electronic components 2321, 2323, the connector 234, and parts of the surface 232 of the substrate 23, the electronic components 2411, 2413, the surface 241 of the substrate 24, and the conductor 246. In some embodiments, the encapsulant 27 may include a liquid adhesive. In some embodiments, the encapsulant 27 may include a tape. In some embodiments, the encapsulant 27 may include a pressure-sensitive film.

[0046] As Figure 3 shown, the conductor 246 passes through the substrate 24 and is connected to the top of the connector 234. Thus, the modules 230 and 240 can be electrically connected to each other through the conductor 246 and the connector 234. The conductor 246 may gradually decrease from its upper end to its lower end. Referring toFigure 3 , the conductor 246 has a V-shaped cross-section. In some embodiments, the conductor 246 has a seed layer 2461. The seed layer 2461 is substantially disposed on the outer surface of the conductor 246. Thus, the seed layer 2461 is substantially disposed between the conductor 246 and the substrate 24, and is substantially disposed between the conductor 246 and the encapsulant 27, and is substantially disposed between the conductor 246 and the connector 234.

[0047] Figure 4 is a cross-sectional view of a semiconductor device package 3 according to some embodiments of the present disclosure. As Figure 4 shown, the semiconductor device 3 includes four double-sided modules (DSM) 310, 320, 330, and 340. The double-sided module 310 includes a substrate 31 having a surface 311 (e.g., an upper surface) and a surface 312 (e.g., a lower surface) opposite to the surface 311. Electronic components 2121 and 3123 are disposed on the surface 312 of the substrate 21. In some embodiments, the electronic component 3121 is mounted to the surface 312 of the substrate 31 through an electrical connection 3127, and the electronic component 3123 is mounted to the surface 312 of the substrate 21 through an electrical connection 3128. Further, electronic components 3111 and 3113 are disposed on the surface 311 of the substrate 21. In some embodiments, the electronic component 3111 is mounted to the surface 311 of the substrate 31 through an electrical connection 3117, and the electronic component 3113 is mounted to the surface 311 of the substrate 31 through an electrical connection 3118. Additionally, a connector 314 and spacers 317 are disposed on the surface 311 of the substrate 31. Generally, the height of the spacers 317 is greater than the height of the connector 314. In some embodiments, the connector 314 and the spacers 317 are mounted to the surface 311 of the substrate 31 through pads 3119, 3119'. Further, in some embodiments, the distance between two spacers 317 is greater than half of the width of the substrate 31. In some embodiments, the spacers 317 are made of a metallic material. In some embodiments, the spacers 317 are made of a non-metallic material. Additionally, the connector 314 may have a tapered upper end, and the spacers 317 may have a tapered upper end. The height ratio of the connector 314 to the spacers 317 is in the range of 0.4 to 1.0. Further, the connector 314 includes a seed layer 3141 at its top end. The substrate 31 includes a through opening 318 such that the space above the surface 311 of the substrate 31 and the space below the surface 312 of the substrate 31 communicate with each other through the through opening 318.

[0048] The double-sided module 320 includes a substrate 32 having a surface 321 (e.g., a lower surface) facing the surface 311 of the substrate 31 and a surface 322 opposite to the surface 321. Electronic components 3211 and 3213 are disposed on the surface 321 of the substrate 32. In some embodiments, the electronic component 3211 is mounted on the surface 321 of the substrate 32 through an electrical connection 3217, and the electronic component 3213 is mounted on the surface 321 of the substrate 32 through an electrical connection 3218. A gasket 3219 is disposed on the surface 321 of the substrate 32. Further, a spacer 317 is in contact with the surface 321 of the substrate 32. In other words, the spacer 317 supports the substrate 32. Thus, the distance between the surface 311 of the substrate 31 and the surface 321 of the substrate 32 is defined by the height of the spacer 317. Thus, the ratio of the height of the connector 314 to the distance between the surface 311 of the substrate 31 and the surface 321 of the substrate 32 is in the range of 0.4 to 1.0. In some embodiments, the spacer 317 is made of a metallic material, and thus the substrates 31 and 32 are electrically connected to each other through the spacer 317. Further, an electronic component 3221 is disposed on the surface 322 of the substrate 32. In some embodiments, the electronic component 3221 is mounted on the surface 322 of the substrate 32 through an electrical connection 3227. Additionally, a connector 324 and spacers 327 are disposed on the surface 322 of the substrate 32. Generally, the height of the spacer 327 is greater than the height of the connector 324. In some embodiments, the connector 324 and the spacers 327 are mounted on the surface 322 of the substrate 32 through gaskets 3229, 3229'. Further, the distance between the two spacers 327 is greater than half of the width of the substrate 32. In some embodiments, the spacer 327 is made of a metallic material. In some embodiments, the spacer 327 is made of a non-metallic material. Additionally, the connector 324 may have a tapered upper end, and the spacer 327 may have a tapered upper end. The height ratio of the connector 324 to the spacer 327 is in the range of 0.4 to 1.0. Further, the connector 324 includes a seed layer 3241 at its top end. The substrate 32 includes a through opening 328 such that the space above the surface 322 of the substrate 32 and the space below the surface 321 of the substrate 32 communicate with each other through the through opening 328.

[0049] In addition, the double-sided module 320 includes a conductor 326 that passes through or penetrates the substrate 32 and contacts the pad 3219. In addition, solder balls 351 are disposed between the connector 314 and the pad 3219, and thus the conductor 326 and the connector 314 are electrically connected to each other through the solder balls 351. The modules 310 and 320 can be electrically connected to each other through the conductor 326 and the connector 314. The conductor 326 can gradually decrease from its upper end to its lower end. In some embodiments, the conductor 326 has a seed layer 3261. The seed layer 3261 is substantially disposed on the outer surface of the conductor 326. Thus, the seed layer 3261 is substantially disposed between the conductor 326 and the substrate 32, and is substantially disposed between the conductor 326 and the pad 3219.

[0050] The double-sided module 330 includes a substrate 33 having a surface 331 (e.g., a lower surface) facing the surface 321 of the substrate 32 and a surface 332 opposite to the surface 331. Electronic components 3311 and 3313 are disposed on the surface 331 of the substrate 33. In some embodiments, the electronic component 3311 is mounted on the surface 331 of the substrate 33 through an electrical connection 3317, and the electronic component 3313 is mounted on the surface 331 of the substrate 33 through an electrical connection 3318. A pad 3319 is disposed on the surface 331 of the substrate 33. Further, a spacer 327 is in contact with the surface 331 of the substrate 33. In other words, the spacer 327 supports the substrate 33. Therefore, the distance between the surface 322 of the substrate 32 and the surface 331 of the substrate 33 is defined by the height of the spacer 327. Therefore, the ratio of the height of the connector 324 to the distance between the surface 322 of the substrate 32 and the surface 331 of the substrate 33 is in the range of 0.4 to 1.0. In some embodiments, the spacer 327 is made of a metallic material, and thus the substrates 32 and 33 are electrically connected to each other through the spacer 327. Further, electronic components 3321 and 3323 are disposed on the surface 332 of the substrate 32. In some embodiments, the electronic component 3321 is mounted on the surface 332 of the substrate 32 through an electrical connection 3327. In some embodiments, the electronic component 3323 is mounted on the surface 332 of the substrate 33 through an electrical connection 3328. Additionally, a connector 334 and spacers 337 are disposed on the surface 332 of the substrate 33. Generally, the height of the spacer 337 is greater than the height of the connector 334. In some embodiments, the connector 334 and the spacers 337 are mounted on the surface 332 of the substrate 33 through pads 3329 and 3329'. Further, the distance between the two spacers 337 is greater than half of the width of the substrate 33. In some embodiments, the spacer 337 is made of a metallic material. In some embodiments, the spacer 337 is made of a non-metallic material. Additionally, the connector 334 may have a tapered upper end, and the spacer 337 may have a tapered upper end. The height ratio of the connector 334 to the spacer 337 is in the range of 0.4 to 1.0. Further, the connector 334 includes a seed layer 3341 at its top end. The substrate 33 includes a through-opening 338 such that the space above the surface 332 of the substrate 33 and the space below the surface 331 of the substrate 33 communicate with each other through the through-opening 338.

[0051] In addition, the double-sided module 330 includes a conductor 336 that passes through or penetrates the substrate 33 and contacts the pad 3319. Further, solder balls 361 are arranged between the connector 324 and the pad 3319, and thus the conductor 336 and the connector 324 are electrically connected to each other through the solder balls 361. The modules 320 and 330 can be electrically connected to each other through the conductor 336 and the connector 324. The conductor 336 can gradually decrease from its upper end to its lower end. In some embodiments, the conductor 336 has a seed layer 3361. The seed layer 3361 is substantially disposed on the outer surface of the conductor 336. Thus, the seed layer 3361 is substantially disposed between the conductor 336 and the substrate 33, and is substantially disposed between the conductor 336 and the pad 3319.

[0052] The double-sided module 340 includes a substrate 34 having a surface 341 (e.g., a lower surface) facing the surface 331 of the substrate 33 and a surface 342 opposite to the surface 341. Electronic components 3411 and 3413 are disposed on the surface 341 of the substrate 34. In some embodiments, the electronic component 3411 is mounted on the surface 341 of the substrate 34 through an electrical connection 3417, and the electronic component 3413 is mounted on the surface 341 of the substrate 34 through an electrical connection 3418. A pad 3419 is disposed on the surface 341 of the substrate 34. Further, a spacer 337 contacts the surface 341 of the substrate 34. In other words, the spacer 337 supports the substrate 34. Thus, the distance between the surface 332 of the substrate 33 and the surface 341 of the substrate 34 is defined by the height of the spacer 337. Thus, the ratio of the height of the connector 334 to the distance between the surface 332 of the substrate 33 and the surface 341 of the substrate 34 is in the range of 0.4 to 1.0. In some embodiments, the spacer 337 is made of a metallic material, and thus the substrates 33 and 34 are electrically connected to each other through the spacer 337. Further, electronic components 3421, 3423 are disposed on the surface 342 of the substrate 34. In some embodiments, the electronic component 3421 is mounted on the surface 342 of the substrate 34 through an electrical connection 3427. In some embodiments, the electronic component 3423 is mounted on the surface 342 of the substrate 34 through an electrical connection 3428. Further, electrical connections 3425 such as solder balls are also disposed on the surface 342 of the substrate 34. The substrate 34 includes a through-opening 348 such that the space above the surface 342 of the substrate 34 and the space below the surface 341 of the substrate 34 communicate with each other through the through-opening 348.

[0053] In addition, the double-sided module 340 includes a conductor 346 that passes through or penetrates the substrate 34 and contacts the pad 3419. Further, solder balls 371 are disposed between the connector 334 and the pad 3419, and thus the conductor 346 and the connector 334 are electrically connected to each other through the solder balls 371. The modules 330 and 340 can be electrically connected to each other through the conductor 346 and the connector 334. The conductor 346 can gradually decrease from its upper end to its lower end. In some embodiments, the conductor 346 has a seed layer 3461. The seed layer 3461 is substantially disposed on the outer surface of the conductor 346. Thus, the seed layer 3461 is substantially disposed between the conductor 346 and the substrate 34, and is substantially disposed between the conductor 346 and the pad 3419.

[0054] In addition, the semiconductor device 3 includes an encapsulant 35. The encapsulant 35 can include a molding material such as epoxy resin, and fillers such as silica fillers can be filled in the molding material. Further, the encapsulant 35 can include a molded underfill (MUF) or a capillary underfill (CUF). The encapsulant 35 is a unique one-piece molding structure and encapsulates the electronic components 3421, 3423, a portion of the surface 342 of the substrate 34, the electronic components 3411, 3413, the pads 3419, the surface 341 of the substrate 34, the solder balls 371, the spacers 337, the connection 334, the conductors 336, the electronic components 3321, 3323, the surface 332 of the substrate 33, the electronic components 3311, 3313, the pads 3319, the surface 331 of the substrate 33, the solder balls 361, the spacers 327, the connection 324, the conductors 326, the electronic components 3221, 3223, the surface 322 of the substrate 32, the electronic components 3211, 3213, the pads 3219, the surface 321 of the substrate 32, the solder balls 351, the spacers 317, the connection 314, the electronic components 3111, 3113, the surface 311 of the substrate 31, the electronic components 3121, 3123, and the surface 312 of the substrate 31. Since the substrate 31 has an opening 318, the substrate 32 has an opening 328, the substrate 33 has an opening 338, and the substrate 34 has an opening 348, the encapsulant 35 can be formed by a one-piece molding process.

[0055] As used herein, unless the context clearly indicates otherwise, the singular terms "a / an" and "the" can include plural referents.

[0056] As used herein, the terms "about," "substantially," "essentially," and "approximately" are used to describe and account for small variations. When used in connection with an event or circumstance, the terms can refer to instances in which the event or circumstance occurs precisely as well as instances in which the event or circumstance occurs nearly. For example, when used in connection with a numerical value, the terms can refer to a variation range of less than or equal to ±10% of the numerical value, such as less than or equal to ±5%, less than or equal to ±4%, less than or equal to ±3%, less than or equal to ±2%, less than or equal to ±1%, less than or equal to ±0.5%, less than or equal to ±0.1%, or less than or equal to ±0.05%. For example, if the difference between two numerical values is less than or equal to ±10% of the average value, such as less than or equal to ±5%, less than or equal to ±4%, less than or equal to ±3%, less than or equal to ±2%, less than or equal to ±1%, less than or equal to ±0.5%, less than or equal to ±0.1%, or less than or equal to ±0.05%, then the numerical values can be considered "substantially" the same or equal. For example, "substantially" parallel can refer to an angular variation range of less than or equal to ±10° relative to 0°, such as less than or equal to ±5°, less than or equal to ±4°, less than or equal to ±3°, less than or equal to ±2°, less than or equal to ±1°, less than or equal to ±0.5°, less than or equal to ±0.1°, or less than or equal to ±0.05°. For example, "substantially" perpendicular can refer to an angular variation range of less than or equal to ±10° relative to 90°, such as less than or equal to ±5°, less than or equal to ±4°, less than or equal to ±3°, less than or equal to ±2°, less than or equal to ±1°, less than or equal to ±0.5°, less than or equal to ±0.1°, or less than or equal to ±0.05°.

[0057] Additionally, quantities, ratios, and other numerical values are sometimes presented herein in a range format. It should be understood that this range format is used for convenience and brevity and should be interpreted flexibly as including the numerical values that are explicitly specified as the limits of the range, as well as all the individual numerical values or sub-ranges subsumed within the range as if each numerical value and sub-range were explicitly specified.

[0058] Although the present disclosure has been described and illustrated with reference to specific embodiments thereof, such description and illustration do not limit the present disclosure. Those skilled in the art will understand that various changes can be made and equivalents can be substituted without departing from the spirit and scope of the present disclosure as defined by the claims. The illustrations may not necessarily be drawn to scale. Due to manufacturing processes and tolerances, there may be differences between the artistic representation and the actual device in the present disclosure. There may be other embodiments of the present disclosure that are not specifically shown. The specification and the drawings are to be regarded as illustrative rather than restrictive. Modifications can be made to adapt a particular situation, material, composition of matter, method, or process to the objectives, spirit, and scope of the present disclosure. All such modifications are intended to fall within the scope of the appended claims. Although the methods disclosed herein are described with reference to specific operations performed in a particular order, it should be understood that these operations can be combined, sub-divided, or rearranged without departing from the teachings of the present disclosure to form equivalent methods. Accordingly, unless explicitly stated herein, the order and grouping of operations are not limitations of the present disclosure.

Claims

1. A semiconductor device package, comprising: A first substrate having a first surface; A first connector disposed on the first surface of the first substrate; A second substrate having a first surface facing the first surface of the first substrate; And A first conductor passing through the second substrate and electrically connected to the first connector; Wherein the second substrate has a second surface opposite to the first surface of the second substrate, and wherein the first conductor includes a first width adjacent to the first surface of the second substrate and a second width adjacent to the second surface of the second substrate, and wherein the second width is greater than the first width.

2. The semiconductor device package according to claim 1, further comprising: A second connector disposed on the second surface of the second substrate opposite to the first surface of the second substrate; A third substrate having a first surface facing the second surface of the second substrate; And A second conductor passing through the third substrate and electrically connected to the second connector.

3. The semiconductor device package according to claim 2, wherein the melting point of the first conductor is higher than the melting point of the second conductor.

4. The semiconductor device package according to claim 2, wherein the first conductor and the second connector are made of the same material.

5. The semiconductor device package according to claim 1, wherein each of the first substrate and the second substrate includes a through opening.

6. The semiconductor device package according to claim 1, wherein the first conductor includes a seed layer and a conductive portion, and the seed layer is in contact with the first connector.

7. A semiconductor device package, comprising: A first substrate; A first connector disposed on the first substrate; A second substrate disposed above the first substrate; A first conductor penetrating the second substrate and making electrical contact with the first connector; And An encapsulant located between the first substrate and the second substrate and surrounding a portion of the first conductor protruding from the second substrate toward the first substrate; It further includes a first spacer located between the first substrate and the second substrate and in contact with the first substrate and the second substrate.

8. The semiconductor device package according to claim 7, wherein the first conductor has a tapered cross-section.

9. The semiconductor device package according to claim 7, wherein the first spacer includes a tapered end adjacent to the second substrate.

10. The semiconductor device package according to claim 7, further comprising a second spacer located between the first substrate and the second substrate and in contact with the first substrate and the second substrate, and wherein the distance between the first spacer and the second spacer is greater than half of the cross-sectional width of the first substrate.

11. A manufacturing method for manufacturing a semiconductor device package, the method comprising: Providing a first substrate; Placing a first connector on a first surface of the first substrate; Providing a second substrate over the first substrate; Bonding the second substrate to the first substrate through an adhesive layer; Forming a first through-hole in the second substrate; And Forming a first conductor passing through the first through-hole and electrically connected to the first connector.

12. The method according to claim 11, wherein forming the first perforation comprises: Performing a laser drilling operation at a position of the second substrate vertically aligned with the first connector, the first through-hole further extending into the adhesive layer until the first connector is exposed.

13. The method according to claim 11, wherein forming the first conductor passing through the first through-hole includes screen-printing solder paste into the first through-hole.

14. The method according to claim 11, further comprising: Placing a first spacer and the first connector on the first surface of the first substrate; And Performing a first reflow, the first reflow fixing the first spacer and the first connector to the first surface of the first substrate; Placing a second connector and a second spacer on a second surface of the second substrate facing away from the first substrate; And Performing a second reflow, the second reflow fixing the second spacer and the second connector to the second surface of the second substrate, wherein the temperature of the second reflow is lower than the temperature of the first reflow.

Citation Information

Patent Citations

  • Method of manufacturing a multilayer wiring board

    US20080168652A1