Instruction interrupt suppression for overflow exception

Abstract

In a technique for instruction interrupt suppression for overflow conditions, an instruction is executed, an overflow condition is determined to have occurred, interrupt processing for the overflow condition is performed based on an overflow interrupt indicator per instruction being set to a defined value, and interrupt processing for the overflow condition is bypassed based on an overflow interrupt indicator per instruction being set to another defined value.

Description

Technical Field

[0001] The present invention relates generally to facilitating processing within a computing environment, and more particularly to facilitating processing associated with instructions that may generate an overflow condition. Background Art

[0002] For example, various instructions may generate overflow conditions during calculations when the result cannot be saved in the target format. This overflow condition causes the user program to jump to the interrupt handler, which requires hundreds of cycles to process the overflow condition interrupt. Summary of the invention

[0003] By providing a computer program product that is convenient for processing in a computing environment, the shortcomings of the prior art are overcome and additional advantages are provided. The computer program product includes a computer-readable storage medium that can be read by a processing circuit and stores instructions for performing a method. The method includes executing instructions on a processor of the computing environment, and based on executing the instructions, determining that an overflow condition has occurred. Obtaining a per-instruction overflow interrupt indicator for the instruction. Based on the per-instruction overflow interrupt indicator being set to a defined value, performing interrupt processing for the overflow condition. Based on the per-instruction overflow interrupt indicator being set to another defined value, bypassing interrupt processing for the overflow condition.

[0004] By providing a per-instruction overflow interrupt indicator, the user code is given the flexibility to determine when interrupt processing is performed, thereby reducing code complexity. In addition, performance is improved by bypassing selected interrupt processing.

[0005] As one example, the overflow interrupt indicator per instruction is located in a field of the instruction. In another example, the overflow interrupt indicator per instruction is located at a location accessible to the instruction.

[0006] In one embodiment, determining that an overflow condition has occurred includes checking an overflow indicator that is set based on executing the instruction.

[0007] As an example, executing interrupt processing includes reporting an interruptible condition. As another example, executing interrupt processing includes initiating an interrupt for the instruction.

[0008] Further, as an example, a defined value is one and another defined value is zero.

[0009] In one embodiment, executing the instruction includes performing one or more operations, and an overflow condition occurs based on a result of an operation in the one or more operations being greater than a target format of the result. As an example, the operation is an operation from a group of operations consisting of an arithmetic operation, a conversion operation, and a move operation.

[0010] In one embodiment, the overflow condition is a result of executing an operation of the instruction, and bypassing interrupt processing includes suppressing a machine exception that would be generated by the instruction.

[0011] Computer-implemented methods and systems related to one or more aspects are also described and claimed herein. Further, services related to one or more aspects are also described and may be claimed herein.

[0012] Additional features and advantages are realized through the techniques described herein.Other embodiments and aspects are described in detail herein and are considered a part of the claimed aspects. BRIEF DESCRIPTION OF THE DRAWINGS

[0013] One or more aspects are particularly pointed out and distinctly claimed as examples in the claims at the end of the specification. The objects, features and advantages of the above and one or more aspects will become apparent from the following detailed description in conjunction with the accompanying drawings, in which:

[0014] Figure 1A An example of a computing environment that includes and uses one or more aspects of the present invention is depicted;

[0015] Figure 1B Describes one or more aspects of the present invention Figure 1A Further details of the processor;

[0016] Figure 2 Another example of a computing environment that includes and uses one or more aspects of the present invention is depicted;

[0017] Figure 3 An example of executing an instruction based on an overflow interrupt indicator of the instruction according to an aspect of the present invention is depicted;

[0018] Figure 4 Describes an embodiment of the present invention and a method for using Figure 3 an instance of a process associated with an overflow interrupt indicator of an instruction;

[0019] Figure 5A-5B An example of facilitating processing within a computing environment according to an aspect of the present invention is depicted;

[0020] Fig. 6A Another example of a computing environment that includes and uses one or more aspects of the present invention is depicted;

[0021] Figure 6B Depicted Fig. 6A Further details of the memory;

[0022] Figure 7 An embodiment of a cloud computing environment is described; and

[0023] Figure 8 Depicts an instance of the abstract model layer. DETAILED DESCRIPTION

[0024] According to one aspect of the present invention, a capability is provided to facilitate processing in a computing environment. In one example, the capability includes temporarily disabling the overflow interrupt caused by the operation of the instruction that generates the overflow interrupt condition by instruction. As an example, the operation includes, for example, computational operations (e.g., arithmetic-decimal, binary coded decimal, floating point), conversion operations (e.g., binary to decimal, decimal to binary, etc.) and / or move operations (e.g., moving a decimal value from one position (e.g., a register) to another position). By temporarily disabling the interrupt, performance is improved.

[0025] As an example, an instruction is part of an instruction set architecture (ISA). For example, an instruction is a single architected hardware machine instruction at a hardware / software interface. An instruction may be one of a plurality of instructions that perform a calculation operation, a conversion operation, a move operation, and / or other operations that may cause an overflow condition leading to an interrupt. Instructions are used for many types of processing, including but not limited to computer processing, security processing, performing calculations for different technologies, etc.

[0026] According to one aspect of the invention, interrupts can be disabled on a per-instruction basis. For example, an overflow interrupt indicator (e.g., a modifier bit) is included in the instruction (or otherwise associated with the instruction), and when the overflow interrupt indicator is set, an overflow interrupt caused by an overflow condition is temporarily disabled. If desired, the status code generated by the instruction is still set to appropriately indicate the overflow condition that can be tested by user code.

[0027] See also Figure 1A An embodiment of a computing environment that includes and uses one or more aspects of the present invention is described. Computing environment 100 includes, for example, processor 102 (e.g., central processing unit), memory 104 (e.g., main memory; also known as system memory, main memory, central memory, storage), and one or more input / output (I / O) devices and / or interfaces 106 coupled to each other via, for example, one or more buses 108 and / or other connections.

[0028] In one example, processor 102 is based on a processor provided by International Business Machines Corporation in Armonk, New York, USA. hardware architecture, and is such as The z / Architecture hardware architecture is provided by IBM and is a portion of a server such as a server that is also provided by IBM and implements the z / Architecture hardware architecture. One embodiment of the z / Architecture hardware architecture is described in a publication entitled 'z / Architecture Principles of Operation' (IBM Publication No. SA22-7832-11, 12 th edition, September 2017), which is hereby incorporated by reference in its entirety. However, the z / Architecture hardware architecture is only one exemplary architecture; other architectures and / or other types of computing environments may include and / or use one or more aspects of the present invention. In one example, a processor executes an operating system, such as the z / Architecture also provided by International Business Machines Corporation. operating system.

[0029] Processor 102 includes multiple functional components for executing instructions. Figure 1B As depicted in , these functional components include, for example, an instruction fetch component 120 for fetching instructions to be executed; an instruction decode unit 122 for decoding the fetched instructions and obtaining operands of the decoded instructions; an instruction execution component 124 for executing the decoded instructions; a memory access component 126 for accessing memory for instruction execution when necessary; and a write-back component 130 for providing the results of the executed instructions. According to one or more aspects of the present invention, one or more of these components may include at least a portion of or access to one or more other components used in overflow processing (including overflow interrupt processing) as described herein. The one or more other components include, for example, an overflow component 136.

[0030] See also Figure 2 Another example of a computing environment that includes and uses one or more aspects of the present invention is described. In one example, the computing environment is based on the z / Architecture hardware architecture; however, the computing environment may be based on other architectures provided by International Business Machines Corporation or other companies.

[0031] Reference Figure 2 In one example, a computing environment includes a central electronic complex (CEC) 200. The CEC 200 includes a number of components, such as a memory 202 (also known as system memory, main memory, central storage, storage) coupled to one or more processors (also known as central processing units (CPUs)) 204 and an input / output subsystem 206.

[0032] The memory 202 includes, for example, one or more logical partitions 208, a hypervisor 210 for managing the logical partitions, and processor firmware 212. An example of the hypervisor 210 is the Processor Resource / System Manager (PR / SM) provided by International Business Machines Corporation of Armonk, New York, USA. TM ) hypervisor. As used herein, firmware includes, for example, microcode for a processor. It includes, for example, hardware-level instructions and / or data structures used in the implementation of higher-level machine code. In one embodiment, it includes, for example, proprietary code typically delivered in the form of microcode, including trusted software or microcode specific to the underlying hardware, controlling operating system access to system hardware.

[0033] Each logical partition 208 is capable of functioning as a separate system. That is, each logical partition can be independently reconfigured, run a client operating system 220 such as the z / OS operating system or another operating system, and operate with different programs 222. An operating system or application running in a logical partition appears to have access to the entire system, but in reality, only a portion of the system is available.

[0034] The memory 202 is coupled to a processor (e.g., CPU) 204, which is a physical processor resource that can be allocated to a logical partition. For example, a logical partition 208 includes one or more logical processors, each of which represents all or a portion of the physical processor resource 204 that can be dynamically allocated to a logical partition. In one example, the processor 204 includes an overflow component 260 that performs overflow processing, including overflow interrupt processing as described herein.

[0035] In addition, the memory 202 is coupled to an I / O subsystem 206. The I / O subsystem 206 may be part of the central electronic complex or separate therefrom. It directs the flow of information between the main memory 202 and an input / output control unit 230 and input / output (I / O) devices 240 coupled to the central electronic complex.

[0036] Many types of I / O devices may be used. One particular type is a data storage device 250. The data storage device 250 may store one or more programs 252, one or more computer-readable program instructions 254, and / or data, etc. The computer-readable program instructions may be configured to perform the functions of embodiments of aspects of the present invention.

[0037] Computer readable program instructions configured to carry out the functions of embodiments of aspects of the present invention may also or alternatively be included in memory 202. Many variations are possible.

[0038] The central electronic complex 200 may include and / or be coupled to removable / non-removable, volatile / non-volatile computer system storage media. For example, the central electronic complex 200 may include and / or be coupled to non-removable, non-volatile magnetic media (commonly referred to as "hard drives"); a disk drive for reading from and writing to removable, non-volatile disks (e.g., "floppy disks"), and / or an optical drive for reading from or writing to removable, non-volatile optical disks such as CD-ROMs, DVD-ROMs, or other optical media. It should be understood that other hardware and / or software components may be used in conjunction with the central electronic complex 200. Examples include, but are not limited to, microcode, device drivers, redundant processing units, external disk drive arrays, RAID systems, tape drives, and data archival storage systems, among others.

[0039] Further, the central electronic complex 200 can operate with numerous other general or special purpose computing system environments or configurations. Examples of well-known computing systems, environments, and / or configurations that may be suitable for use with the central electronic complex 200 include, but are not limited to, personal computer (PC) systems, server computer systems, thin clients, thick clients, handheld or laptop devices, multiprocessor systems, microprocessor-based systems, set-top boxes, programmable consumer electronics, network PCs, minicomputer systems, mainframe computer systems, and distributed cloud computing environments that include any of the above systems or devices, among others.

[0040] Although different examples of computing environments are described herein, one or more aspects of the invention can be used with many types of environments.The computing environments provided herein are only examples.

[0041] According to one aspect of the present invention, an instruction executed on a processor (e.g., processor 102 or 204) includes or has access to a per-instruction overflow interrupt indicator, which indicates whether overflow interrupt handling will be bypassed for the instruction. By bypassing interrupt handling, execution cycles are reduced and processor performance is improved. See Figure 3 and Figure 4 Further details regarding the overflow interrupt indicator and processing associated therewith are described.

[0042] First refer to Figure 3In one embodiment, instruction 300 includes a plurality of fields, including a field 302 having an overflow interrupt indicator (itr_ovr) and one or more fields 304 including instruction text (Itext). The instruction text includes, for example, operands for performing the operation specified by the instruction text. The instruction may perform many types of operations that may produce an overflow condition, including, for example (but not limited to), calculations, such as arithmetic operations, such as decimal operations, binary coded decimal operations, floating point operations, etc.; conversion operations, such as binary to decimal, decimal to binary, etc.; and / or move operations (e.g., move decimal).

[0043] In another embodiment, the overflow interrupt indicator is not in an explicit field of the instruction, but is included in an implicit field of the instruction or in a register. Further, in another embodiment, the overflow interrupt indicator is not part of the instruction itself, but is in a location accessible to the instruction (e.g., a register or memory location), or is part of another instruction (e.g., a prefix instruction) used to modify the instruction to be executed. Regardless of the embodiment, the overflow interrupt indicator is a per-instruction indicator that is specifically provided for instructions that perform one or more operations that may produce an overflow condition.

[0044] Continue to refer to Figure 3 , the instruction is dispatched to the issue queue 306 of the instruction ordering unit 310 of the processor, where it waits until, for example, its operands are available. When ready, the instruction is issued to the appropriate function execution unit 312 of the execution unit 315 of the processor. As an example, if the instruction is a decimal instruction, it is issued to the functional unit that performs decimal calculations; if it is a floating point instruction, it is issued to the floating point functional unit. Other examples are possible.

[0045] The execution unit 312 receives the instruction to be executed and the overflow interrupt indicator (itr_ovr) 302. The instruction is executed, where one or more operations are performed. An indication (e.g., ovf) is provided from the execution of the instruction whether an overflow condition occurred. Further, a status code 318 is derived from the execution of the instruction. If an overflow condition exists, it is reflected in the status code, in one example, allowing the user program to resolve the overflow condition if necessary.

[0046] In addition, according to one aspect of the present invention, an interrupt overflow indicator (itr_ovr) and an overflow condition indicator (ovf) are input to a logical operator, such as an AND gate 320, for indicating whether an overflow condition is to be reported. For example, if an overflow condition occurs (e.g., ovf is set to 1) and the overflow interrupt indicator is set to indicate that the overflow condition is to be reported (e.g., itr_ovr is set to 1), then interrupt processing is performed (322). However, if an overflow condition does not occur (e.g., ovf is set to 0), then interrupt processing is not performed regardless of the setting of the overflow interrupt indicator. Further, if an overflow condition does occur (e.g., ovf is set to 1) and the overflow interrupt indicator is set to bypass interrupt processing (e.g., ovr_itr is set to 0), then interrupt processing is bypassed.

[0047] In other embodiments, other logical operators and / or other values ​​for the indicator may be used (eg, in another example, ovr_itr is set to 1 to indicate that the interrupt is to be bypassed). Many variations and possibilities exist.

[0048] See also Figure 4 Further details regarding processing associated with the overflow interrupt indicator are described. In one example, the processing is performed by a processor such as processor 102 or processor 204.

[0049] See also Figure 4 Initially, an instruction to perform one or more operations that may result in an overflow condition is issued to an execution unit of a processor (e.g., execution unit 315), STEP 400. The instruction is executed by the execution unit of the processor, and the execution of the instruction may result in an overflow condition (STEP 402). A determination is made as to whether an overflow condition has occurred, INQUIRY 404. In one example, this determination is made by checking an overflow indicator (OVR). If the overflow condition does not exist (e.g., OVR is set to 0), then processing associated with the overflow interrupt indicator is completed (STEP 410).

[0050] Returning to inquiry 404, if the overflow condition does exist (e.g., ovr is set to 1), it is further determined whether the overflow interrupt indicator (itr_ovr) (also known as an instruction mask bit or modifier bit) of the instruction is set to reflect that interrupt processing is to be bypassed (inquiry 406). For example, if the overflow interrupt indicator is set to a defined value (e.g., set to one), interrupt processing based on the overflow condition is performed. However, if the overflow interrupt indicator is set to another defined value (e.g., zero), interrupt processing based on the overflow condition is bypassed. When the overflow interrupt indicator (also known as the instruction mask bit) is set to zero, for example, it is said to be "set", indicating that interrupt processing is to be bypassed.

[0051] Continuing with inquiry 406, a determination is made as to whether the instruction mask bit (e.g., itr_ovr) is set (e.g., set to zero). If the instruction mask bit (e.g., itr_ovr) is not set, i.e., it is set to a defined value (e.g., one), then overflow interrupt processing is initiated (step 408). For example, an interrupt is reported and / or an interrupt is initiated (e.g., an interrupt handler is notified). That is, the interrupt will not be bypassed. Processing involving the overflow interrupt indicator is completed (step 410).

[0052] However, according to one aspect of the invention, if the overflow interrupt indicator is set to another defined value (e.g., to zero), then interrupt processing is bypassed (step 412), and then processing associated with the overflow interrupt indicator is completed (step 410). In one example, bypassing interrupt processing includes suppressing a machine exception generated by the instruction. In a further example, bypassing interrupt processing includes not overwriting a status mask setting.

[0053] As described herein, according to one aspect of the present invention, an overflow interrupt indicator by instruction is used to determine whether to report an overflow interrupt (and / or to perform other interrupt processing) for an overflow condition. By using this indicator, it is not necessary to test input operands to determine whether an overflow is expected before executing an instruction that may generate an interrupt, which saves additional processing cycles, reduces code length and reduces complexity. Further, no special kernel is required to disable overflow interrupts, thereby reducing complexity. In addition, by providing an indicator by instruction, user code can specify whether to perform interrupt processing for different parts of the code. One or more parts of the code can suppress interrupts for performance reasons. The indicator by instruction allows accurate, instruction-by-instruction suppression of machine exceptions that will be generated by the instruction itself. Other variations are possible.

[0054] One or more aspects of the present invention are closely related to computer technology and facilitate processing within a computer, thereby improving its performance. By providing an overflow interrupt indicator per instruction, performance is enhanced by, for example, reducing the number of interrupts used and by providing flexibility in user code.

[0055] Instructions that use a per-instruction overflow interrupt indicator may be included in many types of processes that perform different types of tasks. For example, it may be included in an internal computer process where calculations, conversions, and / or moves are performed; in a security process that verifies credentials; in any process that uses arithmetic operations to perform tasks such as providing distance information, performing calculations in vehicles, robots, medical professions, warehousing, inventory control, etc. There are many possibilities.

[0056] See also Figure 5A-5B1 and 2 to describe further details of an embodiment that facilitates processing within a computing environment involving one or more aspects of the present invention.

[0057] Reference Figure 5A In one embodiment, an instruction is executed on a processor of a computing environment (500), and based on executing the instruction, it is determined that an overflow condition has occurred (502). Further, a per-instruction overflow interrupt indicator of the instruction is obtained (504). Based on the per-instruction overflow interrupt indicator being set to a defined value, interrupt processing for the overflow condition is performed (506), and based on the per-instruction overflow interrupt indicator being set to another defined value, interrupt processing for the overflow condition is bypassed (508).

[0058] As an example, a per-instruction overflow interrupt indicator is located in a field of the instruction (510) or in a location accessible to the instruction (512).

[0059] Further, in one embodiment, determining that an overflow condition has occurred includes checking an overflow indicator that is set based on executing the instruction (514).

[0060] Furthermore, performing interrupt processing includes reporting an interruptible condition (516) and / or initiating an interrupt for an instruction (518), as examples.

[0061] In one embodiment, see Figure 5B , a defined value is one, and another defined value is zero (520).

[0062] Executing the instruction includes, for example, executing one or more operations, and an overflow condition occurs based on a result of the operation of the one or more operations being greater than a target format of the result (522). As an example, the operation is an operation from a group of operations consisting of an arithmetic operation, a conversion operation, and a move operation (524).

[0063] Further, in one embodiment, the overflow condition is a result of executing an operation of the instruction, and bypassing interrupt processing includes suppressing a machine exception that would be generated by the instruction (526).

[0064] Other variations and embodiments are possible.

[0065] Aspects of the present invention may be used by many types of computing environments. Fig. 6A A computing environment that includes and uses one or more aspects of the present invention is described. In this example, computing environment 10 includes, for example, a local central processing unit (CPU) 12, memory 14, and one or more input / output devices and / or interfaces 16 coupled to each other by, for example, one or more buses 18 and / or other connections. As an example, computing environment 10 may include a processor provided by International Business Machines Corporation of Armonk, New York, USA. processors; HP Superdome with Intel Itanium II processors provided by Hewlett-Packard Company, Palo Alto, California, USA; and / or other machines based on architectures provided by International Business Machines Corporation, Hewlett-Packard, Intel Corporation, Oracle, or others. IBM, z / Architecture, IBM Z, z / OS, PR / SM, and PowerPC are trademarks or registered trademarks of International Business Machines Corporation in at least one jurisdiction. Intel and Itanium are trademarks or registered trademarks of Intel Corporation or its subsidiaries in the U.S. and other countries.

[0066] The local central processing unit 12 includes one or more local registers 20, such as one or more general purpose registers and / or one or more special purpose registers used during processing within the environment. These registers include information representing the state of the environment at any particular point in time.

[0067] In addition, the local central processing unit 12 executes instructions and codes stored in the memory 14. In a specific example, the central processing unit executes emulator code 22 stored in the memory 14. This code enables a computing environment configured in one architecture to simulate another architecture. For example, the emulator code 22 allows a machine based on an architecture other than the z / Architecture hardware architecture (such as a PowerPC processor, HP Superdome server, or other) to simulate the z / Architecture hardware architecture and execute software and instructions developed based on the z / Architecture hardware architecture.

[0068] refer to Figure 6B Describe further details related to the emulator code 22. The client instructions 30 stored in the memory 14 include software instructions (e.g., related to machine instructions) developed for execution in an architecture different from the architecture of the local CPU 12. For example, the client instructions 30 may have been designed to be executed on a processor based on the z / Architecture hardware architecture, but instead emulated on the local CPU 12, which may be, for example, an Intel Itanium II processor. In one example, the emulator code 22 includes an instruction acquisition routine 32 to obtain one or more client instructions 30 from the memory 14, and optionally provide local buffering for the obtained instructions. It also includes an instruction conversion routine 34 to determine the type of the client instructions that have been obtained and convert the client instructions into one or more corresponding native instructions 36. This conversion includes, for example, identifying the function to be performed by the client instruction and selecting native instructions to perform the function.

[0069] Further, the emulator code 22 includes an emulation control routine 40 to cause native instructions to be executed. The emulation control routine 40 may cause the local CPU 12 to execute a routine of native instructions that emulates one or more previously acquired guest instructions, and at the end of this execution, return control to the instruction fetch routine to emulate the acquisition of the next guest instruction or set of guest instructions. The execution of the native instructions 36 may include loading data from the memory 14 into a register; storing data from a register back to the memory; or performing some type of arithmetic or logic operation as determined by the conversion routine.

[0070] Each routine is implemented, for example, in software that is stored in memory and executed by the local central processing unit 12. In other examples, one or more of the routines or operations are implemented in firmware, hardware, software, or some combination thereof. The registers of the emulated processor may be emulated using the registers 20 of the local CPU or by using locations in memory 14. In an embodiment, the client instructions 30, the native instructions 36, and the emulator code 22 may reside in the same memory or may be distributed between different memory devices.

[0071] The computing environments described above are merely examples of computing environments that may be used. Other environments may be used, including but not limited to other non-partitioned environments, other partitioned environments, and / or other simulation environments; embodiments are not limited to any one environment.

[0072] Each computing environment can be configured to include one or more aspects of the present invention. For example, each can be configured to provide sorting and / or merging according to one or more aspects of the present invention.

[0073] One or more aspects may relate to cloud computing.

[0074] It should be understood that although the present disclosure includes detailed descriptions about cloud computing, the implementation of the teachings cited herein is not limited to cloud computing environments. Instead, embodiments of the present invention can be implemented in conjunction with any other type of computing environment now known or later developed.

[0075] Cloud computing is a service delivery model for enabling convenient, on-demand network access to a shared pool of configurable computing resources (e.g., networks, network bandwidth, servers, processing, memory, storage, applications, virtual machines, and services) that can be quickly provisioned and released with minimal management effort or interaction with a service provider. The cloud model can include at least five characteristics, at least three service models, and at least four deployment models.

[0076] Features are as follows:

[0077] On-demand self-service: Cloud consumers can unilaterally provision computing capabilities, such as server time and network storage, automatically on demand without requiring manual interaction with the service provider.

[0078] Broad Network Access: Functionality is provided over the network and accessed through standard mechanisms that facilitate use by heterogeneous thin-client or thick-client platforms (e.g., mobile phones, laptops, and PDAs).

[0079] Resource pooling: Providers' computing resources are pooled to serve multiple consumers using a multi-tenant model, with different physical and virtual resources dynamically allocated and reallocated as needed. Location independence is present in the sense that consumers typically have no control or knowledge over the exact location of the provided resources, but may be able to specify a location at a higher level of abstraction (e.g., country, state, or data center).

[0080] Rapid elasticity: Capabilities can be provisioned quickly and elastically, automatically scaling up quickly in some cases, and releasing quickly to scale down quickly. To the consumer, the capabilities available for provisioning often appear to be unlimited and can be purchased at any time and in any quantity.

[0081] Measured services: Cloud systems automatically control and optimize resource usage by leveraging metering capabilities at some level of abstraction appropriate to the type of service (e.g., storage, processing, bandwidth, and active user accounts). Resource usage can be monitored, controlled, and reported, providing transparency to both providers and consumers of the services being used.

[0082] The service model is as follows:

[0083] Software as a Service (SaaS): The functionality provided to the consumer is to use the provider's applications running on the cloud infrastructure. These applications are accessible from different client devices through a thin client interface such as a web browser (e.g., web-based email). The consumer does not manage or control the underlying cloud infrastructure including the network, servers, operating systems, storage, or even individual application functionality, with the possible exception of limited user-specific application configuration settings.

[0084] Platform as a Service (PaaS): The functionality provided to the consumer is to deploy consumer-created or acquired applications on the cloud infrastructure, which are created using programming languages ​​and tools supported by the provider. The consumer does not manage or control the underlying cloud infrastructure including networks, servers, operating systems, or storage, but has control over the deployed applications and possibly the configuration of the application hosting environment.

[0085] Infrastructure as a Service (IaaS): The functionality provided to consumers is to provide processing, storage, networking, and other basic computing resources on which consumers can deploy and run arbitrary software, which may include operating systems and applications. Consumers do not manage or control the underlying cloud infrastructure, but have control over the operating system, storage, deployed applications, and possibly limited control over selected networking components (e.g., host firewalls).

[0086] The deployment model is as follows:

[0087] Private Cloud: Cloud infrastructure is operated solely for an organization. It can be managed by the organization or a third party and can exist on-premises or off-premises.

[0088] Community cloud: The cloud infrastructure is shared by multiple organizations and supports a specific community with common concerns (e.g., mission, security requirements, policy, and compliance considerations). It can be managed by the organization or a third party and can exist on-premises or off-premises.

[0089] Public cloud: Cloud infrastructure is available to the general public or large industry groups and is owned by an organization that sells cloud services.

[0090] Hybrid cloud: A cloud infrastructure composed of two or more clouds (private, community, or public) that remain unique entities but are bound together by standardized or proprietary technologies that enable data and application portability (e.g., cloud bursting for load balancing between clouds).

[0091] The cloud computing environment is service-oriented, focusing on statelessness, low coupling, modularity, and semantic interoperability. At the core of cloud computing is the infrastructure that includes a network of interconnected nodes.

[0092] See now Figure 7 , depicting an illustrative cloud computing environment 50. As shown, the cloud computing environment 50 includes one or more cloud computing nodes 52, and local computing devices used by cloud consumers (such as personal digital assistants (PDAs) or cellular phones 54A, desktop computers 54B, laptop computers 54C, and / or automotive computer systems 54N) can communicate with the cloud computing nodes 52. The nodes 52 can communicate with each other. They can be physically or virtually grouped (not shown) in one or more networks, such as in the private clouds, community clouds, public clouds, or hybrid clouds described above, or a combination thereof. This allows the cloud computing environment 50 to provide infrastructure, platforms, and / or software as a service for which cloud consumers do not need to maintain resources on local computing devices. It should be understood that Figure 7The types of computing devices 54A-N shown in are intended to be illustrative only, and computing nodes 52 and cloud computing environment 50 may communicate with any type of computerized device over any type of network and / or network addressable connection (eg, using a web browser).

[0093] See now Figure 8 , showing the cloud computing environment 50 ( Figure 7 ) provides a set of functional abstraction layers. It should be understood in advance that Figure 8 The components, layers, and functions shown in are intended to be illustrative only, and embodiments of the present invention are not limited thereto. As depicted, the following layers and corresponding functions are provided:

[0094] The hardware and software layer 60 includes hardware and software components. Examples of hardware components include: host 61; server 62 based on RISC (Reduced Instruction Set Computer) architecture; server 63; blade server 64; storage 65; and network and networking components 66. In some embodiments, software components include network application server software 67 and database software 68.

[0095] Virtualization layer 70 provides an abstraction layer from which the following examples of virtual entities may be provided: virtual servers 71 ; virtual storage 72 ; virtual networks 73 , including virtual private networks; virtual applications and operating systems 74 ; and virtual clients 75 .

[0096] In one example, the management layer 80 may provide the functionality described below. Resource provisioning 81 provides dynamic acquisition of computing resources and other resources for performing tasks within a cloud computing environment. Metering and pricing 82 provides cost tracking when resources are utilized within a cloud computing environment, and bills or invoices for the consumption of these resources. In one example, these resources may include application software licenses. Security provides authentication for cloud consumers and tasks, as well as protection of data and other resources. User portal 83 provides access to the cloud computing environment for consumers and system administrators. Service level management 84 provides cloud computing resource allocation and management so that the required service levels are met. Service level agreement (SLA) planning and fulfillment 85 provides pre-arrangement and procurement of cloud computing resources for future requirements for cloud computing resources anticipated according to the SLA.

[0097] The workload layer 90 provides examples of functions that can utilize the cloud computing environment. Examples of workloads and functions that can be provided from this layer include: mapping and navigation 91; software development and lifecycle management 92; virtual classroom education delivery 93; data analysis processing 94; transaction processing 95; and overflow interrupt processing 96.

[0098] The various aspects of the present invention may be systems, methods and / or computer program products at any possible level of technical detail integration. The computer program product may include a computer-readable storage medium (or media) having computer-readable program instructions thereon, the computer-readable program instructions being used to cause a processor to perform aspects of the present invention.

[0099] A computer-readable storage medium may be a tangible device that can retain and store instructions for use by an instruction execution device. A computer-readable storage medium may be, for example, but not limited to, an electronic storage device, a magnetic storage device, an optical storage device, an electromagnetic storage device, a semiconductor storage device, or any suitable combination of the foregoing. A non-exhaustive list of more specific examples of computer-readable storage media includes the following: a portable computer disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), a static random access memory (SRAM), a portable compact disk read-only memory (CD-ROM), a digital versatile disk (DVD), a memory stick, a floppy disk, a mechanical encoding device (such as a punch card or a raised structure in a groove with instructions recorded thereon), and any suitable combination of the above. As used herein, a computer-readable storage medium should not be interpreted as a transient signal itself, such as a radio wave or other freely propagating electromagnetic wave, an electromagnetic wave propagated by a waveguide or other transmission medium (e.g., a light pulse by a fiber optic cable), or an electrical signal transmitted by a wire.

[0100] The computer-readable program instructions described herein may be downloaded from a computer-readable storage medium to a corresponding computing / processing device, or downloaded to an external computer or external storage device via a network (e.g., the Internet, a local area network, a wide area network, and / or a wireless network). The network may include copper transmission cables, optical transmission fibers, wireless transmissions, routers, firewalls, switches, gateway computers, and / or edge servers. The network adapter card or network interface in each computing / processing device receives computer-readable program instructions from the network and forwards these computer-readable program instructions to be stored in a computer-readable storage medium in the corresponding computing / processing device.

[0101] The computer-readable program instructions for performing the operation of the present technical solution can be assembly instructions, instruction set architecture (ISA) instructions, machine instructions, machine-related instructions, microcode, firmware instructions, state setting data, configuration data of integrated circuits, or source code or object code written in any combination of one or more programming languages, including object-oriented programming languages ​​such as Smalltalk, C++, and procedural programming languages, such as "C" programming language or similar programming languages. The computer-readable program instructions can be executed completely on the user's computer, partially on the user's computer, executed as an independent software package, partially on the user's computer, partially on a remote computer, or completely on a remote computer or server. In the latter case, the remote computer can be connected to the user's computer through any type of network (including a local area network (LAN) or a wide area network (WAN)), or can be connected to an external computer (for example, by using the Internet of an Internet service provider). In some embodiments, an electronic circuit (including, for example, a programmable logic circuit, a field programmable gate array (FPGA) or a programmable logic array (PLA)) can execute a computer-readable program instruction to personalize the electronic circuit by using the state information of the computer-readable program instructions, so as to perform various aspects of the present technical solution.

[0102] Various aspects of the technical solution are described herein with reference to the flowcharts and / or block diagrams of the methods, devices (systems) and computer program products according to the embodiments of the technical solution. It should be understood that each box in the flowchart and / or block diagram and the combination of boxes in the flowchart and / or block diagram can be implemented by computer-readable program instructions.

[0103] These computer-readable program instructions may be provided to a processor of a general-purpose computer, a special-purpose computer, or other programmable data processing apparatus to produce a machine that, when executed by a processor of the computer or other programmable data processing apparatus, creates a device for implementing the functions / actions specified in one or more blocks of the flowchart and / or block diagram. These computer-readable program instructions may also be stored in a computer-readable storage medium that can instruct a computer, a programmable data processing apparatus, and / or other device to function in a particular manner, such that a computer-readable storage medium having instructions stored therein includes an article of manufacture that includes instructions for implementing various aspects of the functions / actions specified in one or more blocks of the flowchart and / or block diagram.

[0104] Computer-readable program instructions may also be loaded onto a computer, other programmable data processing apparatus, or other apparatus that causes a series of operating steps to be performed on a computer, other programmable apparatus, or other device to produce a computer-implemented process, so that the instructions executed on the computer, other programmable apparatus, or other device implement the functions and actions specified in one or more blocks in the flowchart and / or block diagram.

[0105] The flowchart and block diagram in the accompanying drawings show the possible architecture, function and operation of the system, method and computer program product according to the different embodiments of the present technical solution. To this end, each box in the flowchart or block diagram can represent a part of a module, segment or instruction, which includes one or more executable instructions for realizing the specified logical function. In some alternative embodiments, the functions marked in the box may not occur in the order marked in the figure. For example, depending on the functions involved, the two boxes shown in succession can actually be executed substantially at the same time, or these boxes can sometimes be executed in the opposite order. It will also be noted that each box in the block diagram and / or flowchart, and the combination of boxes in the block diagram and / or flowchart can be implemented by a system based on special-purpose hardware, and the system based on special-purpose hardware performs a specified function or action or performs a combination of special-purpose hardware and computer instructions.

[0106] In addition to the above, one or more aspects may be provided, committed, deployed, managed, serviced, etc. by a service provider that provides customer environment management. For example, the service provider may create, maintain, support computer code and / or computer infrastructure that performs one or more aspects for one or more customers. In return, the service provider may receive payment from the consumer, for example, under a subscription and / or fee agreement. Additionally or alternatively, the service provider may receive payment from the sale of advertising content to one or more third parties.

[0107] In one aspect, an application program for executing one or more embodiments may be deployed. As an example, deployment of an application program includes providing a computer infrastructure operable to execute one or more embodiments.

[0108] As another aspect, a computing infrastructure may be deployed including integrating computer readable code into a computing system, wherein the code in combination with the computing system is capable of performing one or more embodiments.

[0109] As another aspect, a process for integrating a computing infrastructure may be provided, the process comprising integrating a computer readable code into a computer system. The computer system comprises a computer readable medium, wherein the computer medium comprises one or more embodiments. The code combined with the computer system is capable of executing one or more embodiments.

[0110] Although various embodiments are described above, these are merely examples. For example, computing environments of other architectures may be used to include and use one or more embodiments. Further, different instructions or operations may be used. In addition, different registers may be used and / or other types of indications (other than register numbers) may be specified. Many variations are possible.

[0111] Further, other types of computing environments can benefit and can be used. As an example, a data processing system suitable for storing and / or executing program code is available, which includes at least two processors that are directly or indirectly coupled to a memory element through a system bus. The memory element includes, for example, a local memory, a mass storage device, and a temporary storage of at least some program codes that is provided to reduce the number of times that code must be retrieved from a mass storage device during execution.

[0112] Input / output or I / O devices (including but not limited to keyboards, displays, pointing devices, DASD, tapes, CDs, DVDs, thumb drives and other storage media, etc.) may be coupled to the system either directly or through intervening I / O controllers. Network adapters may also be coupled to the system to enable the data processing system to become coupled to other data processing systems or remote printers or storage devices through intervening private or public networks. Modems, cable modems and Ethernet cards are just a few of the available types of network adapters.

[0113] The terms used herein are only used for the purpose of describing specific embodiments and are not intended to be limiting. As used herein, the singular forms "a", "an", and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that when the terms "comprise" and / or "comprising" are used in this specification, they specify the presence of stated features, integers, steps, operations, elements, and / or components, but do not exclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or groups thereof.

[0114] All means or steps in the following claims plus corresponding structures, materials, actions, and equivalents of functional elements (if any) are intended to include any structure, material, or action for performing a function in conjunction with other claimed elements as specifically claimed. A description of one or more embodiments has been given for purposes of illustration and description, but is not intended to be exhaustive or limited to the disclosed forms. Many modifications and variations will be apparent to those of ordinary skill in the art. The embodiments have been selected and described in order to best explain various aspects and practical applications so that those of ordinary skill in the art can understand different embodiments with different modifications suitable for the intended specific use.

Claims

1. A computer program product for facilitating processing in a computing environment, the computer program product comprising: A computer readable storage medium readable by a processing circuit and storing instructions for performing a method comprising: executing instructions on a processor of the computing environment; Based on executing the instructions, performing one or more operations; As a result of executing the instruction, setting a status code associated with the instruction; determining whether an overflow condition has occurred based on executing the instruction using the overflow condition indicator; Based on the overflow condition determined: setting the status code to reflect the overflow condition, the status code being separate from the overflow condition indicator and being set based on execution of the instruction being executed; obtaining a per-instruction overflow interrupt indicator of the instruction, the per-instruction overflow interrupt indicator being specified by the instruction and located in a field of the instruction, the per-instruction overflow interrupt indicator indicating whether interrupt processing is disabled based on an overflow condition for the instruction; performing a logic operation using the overflow condition indicator indicating the occurrence of the overflow condition and the per-instruction overflow interrupt indicator to obtain a result of the logic operation; and Based at least in part on a result of the logic operation and the overflow interrupt indicator per instruction being set to a defined value, interrupt handling for an overflow condition is bypassed, wherein the status code generated by executing the instruction and separate from the overflow condition indicator is still set to indicate an overflow condition that can be tested by user code, and the status code associated with the instruction reflects one or more overflow conditions of the instruction being executed.

2. The computer program product according to claim 1, wherein: The method also includes performing interrupt processing for the overflow condition based at least in part on the result of the logic operation and the per-instruction overflow interrupt indicator being set to another defined value.

3. The computer program product according to claim 1, wherein: The overflow condition occurs based on performing an operation of the one or more operations, the operation being an arithmetic operation.

4. The computer program product of claim 1, wherein: Bypassing interrupt processing includes suppressing machine exceptions generated by instructions.

5. The computer program product of claim 1, wherein: Performing interrupt processing includes reporting interruptible conditions.

6. The computer program product of claim 1, wherein: Executing interrupt processing includes initiating an interrupt for the instruction.

7. The computer program product of claim 1, wherein: The defined value is zero and the other defined value is one.

8. The computer program product of claim 1, wherein: An overflow condition occurs based on a result of an operation in the one or more operations being larger than a destination format of the result.

9. The computer program product according to claim 8, wherein: The operation is an operation from the group of operations consisting of an arithmetic operation, a conversion operation, and a move operation.

10. The computer program product of claim 1, wherein: The overflow condition is a result of executing an operation of the instruction, and wherein bypassing interrupt processing includes suppressing a machine exception generated by the instruction and not overwriting a status mask setting.

11. A computer system for facilitating processing in a computing environment, the computer system comprising: Memory; and A processor coupled to a memory, wherein the computer system is configured to perform a method comprising: Execute instructions on a processor; Based on executing the instructions, performing one or more operations; As a result of executing the instruction, setting a status code associated with the instruction; determining whether an overflow condition has occurred based on executing the instruction using the overflow condition indicator; Based on the overflow condition determined: setting the status code to reflect the overflow condition, the status code being separate from the overflow condition indicator and being set based on execution of the instruction being executed; obtaining a per-instruction overflow interrupt indicator of the instruction, the per-instruction overflow interrupt indicator being specified by the instruction and being located in a field of the instruction, the per-instruction overflow interrupt indicator indicating whether interrupt processing is disabled based on an overflow condition for the instruction; performing a logic operation using the overflow condition indicator indicating the occurrence of the overflow condition and the per-instruction overflow interrupt indicator to obtain a result of the logic operation; and Based at least in part on a result of the logic operation and the overflow interrupt indicator per instruction being set to a defined value, interrupt handling for an overflow condition is bypassed, wherein the status code generated by executing the instruction and separate from the overflow condition indicator is still set to indicate an overflow condition that can be tested by user code, and the status code associated with the instruction reflects one or more overflow conditions of the instruction being executed.

12. The computer system according to claim 11, wherein: The method also includes performing interrupt processing for the overflow condition based at least in part on the result of the logic operation and the per-instruction overflow interrupt indicator being set to another defined value.

13. The computer system according to claim 11, wherein: The overflow condition occurs based on performing an operation of the one or more operations, the operation being an arithmetic operation.

14. The computer system according to claim 11, wherein: An overflow condition occurs based on a result of an operation in the one or more operations being larger than a destination format of the result.

15. The computer system according to claim 11, wherein: Bypassing interrupt processing includes suppressing a machine exception generated by the instruction.

16. A computer-implemented method for facilitating processing in a computing environment, the computer-implemented method comprising: executing instructions on a processor of the computing environment; Based on executing the instructions, performing one or more operations; As a result of executing the instruction, setting a status code associated with the instruction; determining whether an overflow condition has occurred based on executing the instruction using the overflow condition indicator; Based on the overflow condition determined: setting the status code to reflect the overflow condition, the status code being separate from the overflow condition indicator and being set based on execution of the instruction being executed; obtaining a per-instruction overflow interrupt indicator of the instruction, the per-instruction overflow interrupt indicator being specified by the instruction and being located in a field of the instruction, the per-instruction overflow interrupt indicator indicating whether interrupt processing is disabled based on an overflow condition for the instruction; performing a logic operation using the overflow condition indicator indicating the occurrence of the overflow condition and the per-instruction overflow interrupt indicator to obtain a result of the logic operation; as well as Based at least in part on a result of the logic operation and the overflow interrupt indicator per instruction being set to a defined value, interrupt handling for an overflow condition is bypassed, wherein the status code generated by executing the instruction and separate from the overflow condition indicator is still set to indicate an overflow condition that can be tested by user code, and the status code associated with the instruction reflects one or more overflow conditions of the instruction being executed.

17. The computer-implemented method of claim 16, wherein: The method also includes performing interrupt processing for the overflow condition based at least in part on the result of the logic operation and the per-instruction overflow interrupt indicator being set to another defined value.

18. The computer-implemented method of claim 16, wherein: The overflow condition occurs based on performing an operation of the one or more operations, the operation being an arithmetic operation.

19. The computer-implemented method of claim 16, wherein: An overflow condition occurs based on a result of an operation in the one or more operations being larger than a destination format of the result.

20. The computer-implemented method of claim 16, wherein: Bypassing interrupt processing includes suppressing a machine exception generated by the instruction.

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