How to boot up a system on a chip

Abstract

The present invention provides a boot method for dynamically modifying the boot program of a system on chip without modifying the boot program in a read-only memory. The method changes the starting position of the boot program to read the springboard program by reading an external input signal, and then the springboard program reads the real target program. Since the springboard program is stored in an external storage device, it can be modified by the user at any time. In this way, the target program can be stored in an external storage device with existing data without modifying the boot program in the read-only memory, so as to achieve the goal of sharing the external storage device.

Description

Technical Field

[0001] The present invention relates to a startup method for a system-on-chip (SOC), and in particular to a startup method for dynamically modifying a startup program of the SOC without modifying a startup program in a read-only memory. Background Art

[0002] In embedded systems, the boot program is a piece of program code that is executed before the operating system runs. Its purpose is to perform hardware initialization operations before the operating system runs, and finally load the operating system into the memory for execution. In a system on a chip, the boot program is stored in a read-only memory. Before the operating system runs, the boot program is executed to read and execute the target program from the external storage device to complete the boot. This allows users to update the target program at any time.

[0003] However, as electronic products become more and more complex, multiple SoCs are often integrated into one electronic product. If each SoC has its own corresponding external storage device, the cost and wiring difficulty of the entire system will increase. On the contrary, if multiple SoCs share the same external storage device, it is necessary to modify the masks of multiple SoCs and re-download them to modify the boot programs in the read-only memories of multiple SoCs.

[0004] Therefore, the existing technology needs to be improved. Summary of the invention

[0005] Therefore, the main purpose of the present invention is to provide a boot method that can dynamically modify the boot program of the system on chip without modifying the boot program in the read-only memory, so as to improve the shortcomings of the prior art.

[0006] An embodiment of the present invention discloses a boot method, which is applicable to a boot program of a system on a chip, wherein the system on a chip includes an input port for providing an external input signal, a processing unit for executing a program, and a read-only memory for storing an initial boot program. The boot method includes selecting a starting position of a springboard program; reading the springboard program and executing the springboard program with the processing unit; and executing the target program with the processing unit through the springboard program; wherein the springboard program and the target program are stored in an external storage device; wherein the springboard program is used to execute and read the target program, and the target program is used to execute the boot program. BRIEF DESCRIPTION OF THE DRAWINGS

[0007] Figure 1A A schematic diagram of a prior art system on a chip and its system.

[0008] Figure 1BFIG. 1 is a schematic diagram of integrating two SoCs into one system according to the prior art.

[0009] Figure 2A , 2B It is a schematic diagram of a memory configuration method of an external storage device in the prior art.

[0010] Figure 3A , 3B Schematic diagram of a system on a chip and its system according to an embodiment of the present invention.

[0011] Figure 4 FIG. 1 is a schematic diagram of a memory configuration of an external storage device according to an embodiment of the present invention.

[0012] Figure 5A , 5B FIG. 1 is a schematic diagram of a memory configuration of an external storage device according to an embodiment of the present invention.

[0013] Figure 6 The figure is a schematic diagram of a system-on-a-chip booting method flow according to an embodiment of the present invention.

[0014] Figure 7 FIG. 4 is a schematic diagram of a system on a chip according to an embodiment of the present invention.

[0015] Description of Reference Numerals

[0016] 10: Prior Art System on Chip

[0017] 100: Prior art processing unit

[0018] 102: Prior Art Read-Only Memory

[0019] 104: Prior Art Random Access Memory

[0020] 12: Prior Art External Storage Device

[0021] 14: Prior Art System on Chip

[0022] 140: Prior art processing unit

[0023] 142: Prior Art Read-Only Memory

[0024] 144: Prior Art Random Access Memory

[0025] 16: Prior Art External Storage Device

[0026] 30: System on Chip

[0027] 300: Processing unit

[0028] 302: Read-only memory

[0029] 304: Random Access Memory

[0030] 306: Input port

[0031] 32: External storage device

[0032] 34: System on Chip

[0033] 340: Processing unit

[0034] 342: Read-only memory

[0035] 60: Process

[0036] 600~612: Steps DETAILED DESCRIPTION

[0037] Certain words are used in the specification and the scope of the patent application to refer to specific components. Those with general knowledge in the field should understand that hardware manufacturers may use different terms to refer to the same component. This specification and the scope of the patent application do not use the difference in name as a way to distinguish components, but use the difference in function of the components as the criterion for distinction. The words "include" and "including" mentioned in the specification and the scope of the patent application are open-ended terms and should be interpreted as "including but not limited to". In addition, the word "coupled" here includes any direct and indirect electrical connection means. Therefore, if the text describes a first device coupled to a second device, it means that the first device can be directly electrically connected to the second device, or indirectly electrically connected to the second device through other devices or connection means.

[0038] Figure 1A FIG. 1 is a schematic diagram of a prior art system on chip (SoC) 10 and its system. Figure 1A As shown, the system on chip 10 includes a processing unit 100, a read-only memory (ROM) 102 and a random access memory (RAM) 104. The system on chip 10 is coupled to an external storage device 12 to form a system. In order to initialize the system on chip 10, in the boot process, the processing unit 100 first reads and executes a boot program (BootLoader) stored in the read-only memory 102, and then loads the target program from the external storage device 12 to the RAM 104 through the boot program. Finally, the processing unit 100 executes the target program to complete the boot process.

[0039] In actual application, the system is not only implemented as a system on a chip, such as Figure 1B As shown, Figure 1BFIG. 1 is a schematic diagram of integrating two SoCs 10 and 14 into a system according to the prior art. In the prior art, the two SoCs 10 and 14 are respectively coupled to external storage devices 12 and 16 used by them and integrated into a system. In short, if a system includes multiple SoCs, the system needs multiple external storage devices to store target programs of the multiple SoCs.

[0040] For example, Figures 2A and 2B are schematic diagrams of a memory configuration of an external storage device in the prior art. Figure 2A As shown, if the boot programs stored in the two SoC ROMs 102 and 142 read data from the external storage devices 12 and 16 starting at 0000_0000 and 8000_0000, then Figure 1B The circuit in the embodiment can be simplified so that the two SoCs 30 and 34 are coupled to an external storage device. On the other hand, if the memory configuration of the external storage device is as follows Figure 2B As shown, the boot programs stored in the two SoC ROMs 102 and 142 will read data from the external storage devices 12 and 16 starting at 0000_0000 and 0000_0000. Since the two SoC boot programs read the same location, Figure 1B The circuit in the embodiment cannot be further simplified to be coupled to an external storage device. That is to say, two external storage devices 12 and 16 are needed at this time, and both of the two external storage devices 12 and 16 have idle space wasted.

[0041] After the SoC is tape-out, the ROM cannot be modified unless the mask is modified. Figure 2B As shown, unless the contents of the read-only memory 102 or the read-only memory 142 in the system on chip 10 or 14 are modified by modifying the mask, Figure 1B In the entire single-chip system, two external storage devices 12 and 16 are required.

[0042] 3A and 3B are schematic diagrams of a system on a chip 30 and its system according to an embodiment of the present invention. Figure 3AAs shown, the boot method provided by the present invention utilizes a springboard program and a target program, so that the system on chip 30 and other systems on chip 34 can share the same external storage device 32; wherein, the external storage device 32 already has existing programs or data, and the idle space of the external storage device 32 is larger than the size of the springboard program and the target program. The system on chip 30 includes a processing unit 300, a read-only memory 302, a random access memory 304, and an input port 306. The embodiment of the present invention stores the boot program in the read-only memory 302, first determines the signal of the input port 306 to determine the location of the springboard program, and then reads the springboard program from the external storage device 32 to the random access memory 304 and executes it by the processing unit 300. The springboard program describes the location, size and other information of the actual target program. Subsequently, the processing unit 300 can read the target program from the external storage device 32 to the random access memory 304 and then execute it to complete the boot program. In addition, the system on chip 30 can be modified differently depending on the usage scenario. For example, compared to Figure 3A , Figure 3B The random access memory 304 is removed from the system on chip 30 to save cost.

[0043] For the operation of the system on chip 30, please also refer to Figure 4 , Figure 4 FIG. 1 is a schematic diagram of an embodiment of the memory configuration of the external storage device 32. Figure 4 As shown, the external storage device 32 has existing data and programs at 4000_0000 to 7FFF_FFFF and C000_0000 to EFFF_FFFF. In this embodiment, a springboard program is stored at F000_0000. The startup program can be determined by the processing unit 300 reading the input signal of the input port 306 to determine the starting position of the springboard program as F000_0000. Then, the springboard program is loaded into the random access memory 304 and executed by the processing unit 300, and the target program is executed accordingly to complete the startup program of the system on chip 30.

[0044] Since the content in the external storage device 32 can be modified by the user at any time, the user can modify the springboard program stored in the external storage device 32 at any time, so that the processing unit 300 can change the position accordingly when reading the target program, so as to realize the dynamic modification of the boot method of the on-chip system boot program without modifying the boot program in the read-only memory.

[0045] However, in the boot process, the random access memory 304 is not an indispensable component. Figure 4In the memory configuration of the external storage device, the address of the external storage device 32 is 0000_0000 to 3FFF_FFFF, which is an idle space. The system on chip 30 can access the external storage device 32, load the instruction part of the springboard program and the target program into the processing unit 300 for direct execution, and temporarily store the intermediate data of the processing unit 300 in the external storage device 32 to realize the boot process.

[0046] In addition, the target program is loaded through the springboard program, wherein the user can modify the springboard program stored in the external storage device at any time according to different usage scenarios. Furthermore, the memory configuration of the target program in the external storage device does not need to be byte-aligned, nor does it need to include a header, end-of-file, checksum or hash value, and is not limited thereto. For example, Figure 5A FIG. 1 is a schematic diagram of an external storage device memory configuration according to an embodiment of the present invention. Figure 5A In the example, the target program starts at bit 3 of 8000_0002, and does not include a file header, file end, checksum, or hash value. The user can still load, read, and execute the target program by modifying the springboard program. Similarly, the memory configuration of the springboard program in the external storage device does not need to be byte aligned, which will not be described in detail here.

[0047] Figure 5B FIG. 1 is a schematic diagram of an external storage device memory configuration according to an embodiment of the present invention. Figure 5B Since the continuous idle space from 0000_0000 to 3FFF_FFFF in the memory configuration of the external storage device 32 is insufficient to accommodate the target program, in one embodiment, the user can still modify the springboard program to divide the target program into two segments, and store them in 0000_0000 to 3FFF_FFFF and 8000_0000 to 8FFF_FFFF respectively. In the booting procedure of the system on chip 32, the two target program segments are loaded into the random access memory 304 in succession through the modified springboard program and then executed by the processing unit 300 to complete the booting procedure.

[0048] It should be noted that the above embodiments are used to illustrate the concept of the present invention. For example, the springboard program and the target program can be divided into several segments according to the idle space of the external storage device, or the springboard program can be further divided into a primary springboard program and multiple secondary springboard programs, etc. The primary springboard program is read by the startup program in the read-only memory 302, and then the multiple secondary springboard programs are read through the primary springboard program, and finally the multiple target program segments are read to complete the booting program. Those skilled in the art can make different modifications accordingly, and are not limited to this.

[0049] Finally, the operation of the system on chip 30 booting method can be summarized as a system on chip booting method flow 60, such as Figure 6 The system-on-chip startup method process 60 includes the following steps:

[0050] Step 600: Start.

[0051] Step 602: The system on chip 30 determines the starting position of the springboard program through external input.

[0052] Step 604 : Read the springboard program from the external storage device 32 , and execute the springboard program with the processing unit 300 .

[0053] Step 606: Repeat step 604 until all springboard programs have been read and executed.

[0054] Step 608 : Read the target program from the external storage device 32 via the springboard program, and execute the target program with the processing unit 300 .

[0055] Step 610: Repeat step 608 until all target programs have been read and executed.

[0056] Step 612: End.

[0057] In step 602, the system on chip 30 obtains an external input signal through the input port 306 to determine the starting position of the springboard program, wherein the external input signal can be a direct address of the starting position, or a corresponding table stored in the read-only memory 302 to correspond to the starting position. For example, in one embodiment, the input port 306 has a single bit, and when its input value is 0, it means that the springboard program is located at the starting position 0000_0000 of the external storage device 32, and when its input value is 1, it means that the springboard is located at the starting position F000_0000 of the external storage device 32. In addition, the type of the input port is not limited to the general-purpose input / output port (GPIO) of the system on chip, and can also be a bonding option. The direct addressing or indirect addressing method is a common technique of those with ordinary knowledge in the art, and will not be repeated here.

[0058] In step 606 and step 610, due to the memory configuration factor of the external storage device, the springboard program and the target program may not be stored continuously in a space of the external storage device (such as Figure 5B As shown), the springboard program and the target program may need to be divided into multiple segments, so that after the starting position of the springboard program in step 602, the system on chip 30 still needs to read and execute the springboard program multiple times, and then read and execute the target program through the springboard program to achieve a complete boot process.

[0059] As for other steps of the SoC booting method flow 60 , reference may be made to the aforementioned description and will not be repeated herein.

[0060] It should be noted that the external input signal refers to the external of the SoC 30, not the external of the entire system. If there are multiple SoCs in the entire electronic device, as long as the other SoCs complete initialization earlier than the SoC 30, the external signal of the SoC 30 can be obtained by a wire selection or a programmable logic device coupling in the other SoCs, wherein the programmable logic device can be a one-time programmable (OTP), a few-time programmable (FTP), a multiple-time programmable (MTP), such as an electronic fuse (eFuse), an anti-fuse, a read-only memory, a random access memory, a CD-ROM, a magnetic tape, a floppy disk, an optical data storage device, a non-volatile memory, and is not limited thereto.

[0061] For example, Figure 7 FIG. 1 is a schematic diagram of a system on a chip according to an embodiment of the present invention. Figure 7 In the embodiment, the system on chip 30 is integrated with a SoC1, a SoC2 and an eFuse in a system, wherein the initialization sequence of SoC1 and eFuse is completed earlier than that of the system on chip 30, and the output port of the eFuse can be coupled to the input port 306 of the system on chip 30. A person with ordinary knowledge in the art can select an appropriate configuration according to different applicable devices. This circuit design method is a common skill of a person with ordinary knowledge in the art and will not be repeated here.

[0062] In addition, although the system on chip 30 and the external storage device 32 are shown as different units for the purpose of illustration, these units can be integrated into the same circuit in whole or in part. For example, the external storage device 32 and the system on chip 30 can be integrated into the same system on chip through a system in a package (SIP). In one embodiment, the electronic fuse and the anti-fuse can be independent components or integrated into the same system on chip with the system on chip 30.

[0063] The above embodiments are used to illustrate the concept of the present invention, and those skilled in the art can make different modifications accordingly, and are not limited thereto. Therefore, as long as the boot method of the system on chip can dynamically change the read position of the target program in the external storage device after reading a signal, it meets the requirements of the present invention and belongs to the scope of the present invention.

[0064] In summary, the present invention provides a boot method for dynamically modifying the boot program of a system on chip without modifying the boot program in a read-only memory. The method changes the starting position of the boot program to read the springboard program by reading an external input signal, and then the springboard program reads the real target program. Since the springboard program is stored in an external storage device, it can be modified by the user at any time. In this way, the target program can be stored in an external storage device with existing data without modifying the boot program in the read-only memory, so as to achieve the goal of sharing the external storage device.

[0065] The above description is only a preferred embodiment of the present invention. All equivalent changes and modifications made according to the claims of the present invention should fall within the scope of the present invention.

Claims

1. A boot method, applicable to a boot procedure of a system on a chip, characterized in that: The system on chip includes an input port for providing an external input signal, a processing unit for executing a program, and a read-only memory for storing an initial boot program. The boot method includes: Select a starting position of a springboard program; Reading the springboard program and executing the springboard program with the processing unit; and executing the target program with the processing unit through the springboard program; Wherein, the springboard program and the target program are stored in an external storage device; The springboard program is used to read the target program, and the target program is used to execute the boot program.

2. The startup method according to claim 1, characterized in that: This read-only memory cannot be modified after being programmed.

3. The startup method according to claim 1, characterized in that: The external storage device has existing programs or data, and its idle space is larger than the size of the springboard program and the target program.

4. The startup method according to claim 1, characterized in that: The system on chip further includes a random access memory for storing program codes for execution by the processing unit; The steps of reading the springboard program and executing the springboard program with the processing unit are: reading the springboard program, downloading the springboard program into the random access memory, and executing the springboard program with the processing unit.

5. The startup method according to claim 1, characterized in that: The system on chip further includes a random access memory for storing program codes for execution by the processing unit; The step of executing the target program with the processing unit through the springboard program is to download the target program into the random access memory through the springboard program and execute the target program with the processing unit.

6. The startup method according to claim 1, characterized in that: The starting position of the springboard program is controlled by an external signal input from the input port.

7. The startup method according to claim 6, characterized in that: The input port is a general input and output port.

8. The startup method according to claim 1, characterized in that: The system on chip further includes a wire selection or a programmable logic device for directly or indirectly determining the starting position of the springboard program.

9. The startup method according to claim 8, characterized in that: The programmable logic device is a one-time write memory, a few-time write memory, and a multiple-time write memory.

10. The startup method according to claim 1, characterized in that: The springboard program is composed of multiple sub-springboard programs.

11. The startup method according to claim 1, characterized in that: The target program is composed of multiple sub-target programs.

12. The startup method according to claim 1, characterized in that: The springboard process is not aligned with the location of an external storage device.

13. The startup method according to claim 1, characterized in that: The object program is not aligned with a location of an external storage device.

14. The startup method according to claim 1, characterized in that: The external storage device is serially addressed or parallel addressed.

15. The startup method according to claim 1, characterized in that: The external storage device and the system on chip are integrated into a chip.

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