High voltage semiconductor device

Abstract

A high voltage semiconductor device includes a substrate, a bulk region and a well region in the substrate and separated from each other, wherein the bulk region has a first conductivity type and the well region has a second conductivity type opposite to the first conductivity type, a block region and a source in the bulk region and separated from each other, wherein the block region has the first conductivity type and the source has the second conductivity type, a drain in the well region, an isolation region on the well region and between the drain and the source, a gate structure on the bulk region and extending onto a portion of the isolation region, and a resistor on the isolation region and electrically connected to the block region and the drain or to the drain and / or the source.

Description

Technical Field

[0001] The present invention relates to semiconductor devices, and more particularly to a high-voltage semiconductor device. Background Technology

[0002] High-voltage semiconductor devices are suitable for high-voltage and high-power integrated circuit applications. Their advantages include cost-effectiveness and compatibility with other processes, leading to their widespread use in display driver ICs, power supplies, power management, communications, automotive electronics, and industrial control. The principle of reducing surface field (RESURF) is frequently applied to high-voltage semiconductor devices to improve voltage withstand capability and device performance, leading to multi-RESURF methods such as double RESURF and triple RESURF.

[0003] High-voltage semiconductor devices often use voltage dividers composed of resistors. Generally, high-resistance resistors are used and placed on the field oxide (FOX) layer. To save area, the high-resistance resistors can be integrated with the high-voltage semiconductor elements. The on-state of a high-voltage semiconductor device is adjusted according to process and / or design requirements. However, due to the shape of the device, adjusting the on-resistance requires changing the resistor configuration, which disrupts the electric field distribution of the high-voltage semiconductor elements below the resistors. This reduces the effectiveness of reducing the surface electric field, resulting in insufficient overall withstand voltage. Summary of the Invention

[0004] This invention provides a high-voltage semiconductor device, comprising: a substrate; a body region and a well region located in the substrate and separated from each other, wherein the body region has a first conductivity type and the well region has a second conductivity type opposite to the first conductivity type; a bulk region and a source located in the body region and separated from each other, wherein the bulk region has a first conductivity type and the source has a second conductivity type; a drain located in the well region; an isolation region located on the well region and between the drain and the source; a gate located on the body region and extending onto a portion of the isolation region; and a resistor located on the isolation region and electrically connected to the bulk region and the drain, or electrically connected to the drain and / or the source. Attached Figure Description

[0005] The embodiments of the invention can be best understood from the following detailed description in conjunction with the accompanying drawings. It should be noted that, in accordance with industry standard practice, the various features are not drawn to scale. In fact, the dimensions of various components can be arbitrarily enlarged or reduced to clearly illustrate the features of the embodiments of the invention.

[0006] Figure 1 , Figure 2 , Figure 3A , Figure 3B ,and Figure 4 This is a schematic cross-sectional view of a high-voltage semiconductor device according to some embodiments of the present invention;

[0007] Figure 5 and Figure 6 According to some embodiments of the present invention, a high-voltage semiconductor device is illustrated along... Figure 7C or Figure 7D BB curve or Figure 8A , Figure 8B , Figure 9A or Figure 9B A partial cross-sectional view of the CC line in the diagram;

[0008] Figure 7A , Figure 7B , Figure 7C , Figure 7D , Figure 8A , Figure 8B , Figure 9A and Figure 9B The present invention relates to some embodiments thereof, and a top view schematic diagram of a high-voltage conductor device is shown.

[0009] Figure label:

[0010] 10, 50, 60, 70A, 70B, 80A, 80B, 90A, 90B: High-voltage semiconductor devices

[0011] 20: High-voltage metal-oxide-semiconductor devices

[0012] 30, 40: High-voltage lateral insulated-gate bipolar transistor devices

[0013] 100: Substrate

[0014] 102:Matrix area

[0015] 104: Tunnel

[0016] 106: Block Region

[0017] 108: Source Extreme

[0018] 110: Drain

[0019] 110P: Drain Profile

[0020] 112: Quarantine Zone

[0021] 114: Gate Structure

[0022] 114P: Inner contour of gate structure

[0023] 116, 716A, 716B, 816A, 816B, 916A, 916B: Resistors

[0024] 118, 120, 120A, 120B: Internal wiring

[0025] 202: First doped region

[0026] 204: Second doped region

[0027] 302, 304: Doped regions

[0028] 502, 602A, 602B: Contact elements

[0029] 506, 606: Insulation layer

[0030] 504, 604A, 604B: Conductors Detailed Implementation

[0031] The following disclosure provides numerous embodiments or examples for implementing different elements of the provided subject matter. Specific examples of each element and its configuration are described below to simplify the description of embodiments of the invention. Of course, these are merely examples and are not intended to limit the embodiments of the invention. For example, if the description refers to a first element formed on a second element, it may include embodiments where the first and second elements are in direct contact, or embodiments where an additional element is formed between the first and second elements such that they are not in direct contact. Furthermore, the embodiments of the invention may repeat reference values ​​and / or letters in various examples. Such repetition is for the purpose of brevity and clarity, and is not intended to indicate a relationship between the different embodiments and / or configurations discussed.

[0032] Furthermore, spatially relative terms may be used, such as "below," "below," "lower," "above," and "higher," to facilitate the description of the relationship between one or more components or features in the diagram. Spatially relative terms are used to include different orientations of the device in use or operation, as well as the orientations described in the diagram. When the device is turned to different orientations (rotated 90 degrees or other orientations), the spatially relative adjectives used will also be interpreted according to the orientation after the turn.

[0033] This invention provides a high-voltage semiconductor device. In some embodiments, by electrically connecting the resistor of the high-voltage semiconductor device to the bulk region and the drain, or electrically connecting the drain and / or the source, the surface electric field can be reduced and the device performance improved. In other embodiments, connecting the resistor in parallel with a conductor allows for adjustment of the device's on-resistance as needed. In some embodiments, the bulk region of the high-voltage semiconductor device is a ground terminal.

[0034] Figure 1This is a schematic cross-sectional view of a high-voltage semiconductor device according to some embodiments of the present invention. The high-voltage semiconductor device 10 includes a substrate 100, a body region 102, a well region 104, a bulk region 106, a source 108, a drain 110, an isolation region 112, a gate structure 114, a resistor 116, and interconnects 118 and 120. The substrate 100 may be a semiconductor substrate, for example, comprising: elemental semiconductors, including silicon or germanium; compound semiconductors, including silicon carbide, gallium arsenide, gallium phosphide, indium phosphide, indium arsenide, and / or indium antimonide; alloy semiconductors, including silicon-germanium alloys, gallium arsenide-phosphide alloys, aluminum-indium arsenide alloys, aluminum-indium arsenide alloys, gallium arsenide-phosphide alloys, indium-indium phosphide alloys, and / or combinations of the above materials. Furthermore, the substrate 100 may also be a semiconductor-on-insulator (SIOIS) device. In one embodiment, the substrate 100 may be an undoped substrate. In some embodiments, the substrate 100 may also be a doped substrate having a first conductivity type or a second conductivity type. In embodiments of the present invention, the first conductivity type is opposite to the second conductivity type. For example, the first conductivity type is P-type and the second conductivity type is N-type. In another embodiment, the first conductivity type is N-type and the second conductivity type is P-type.

[0035] The substrate region 102 is located in the substrate 100 and has a first conductivity type. In some embodiments, the substrate region 102 can be formed by ion implantation. In embodiments where the first conductivity type is P-type, boron ions or indium ions can be implanted in the region where the substrate region 102 is to be formed to form the substrate region 102. In embodiments where the first conductivity type is N-type, phosphorus ions or arsenic ions can be implanted in the region where the substrate region 102 is to be formed to form the substrate region 102.

[0036] Well region 104 is located in substrate 100 and has a second conductivity type. In some embodiments, well region 104 can be formed by a similar process to that described above for forming substrate region 102. In some embodiments, substrate region 102 and well region 104 are separated from each other, such as... Figure 1 As shown. In other embodiments, the substrate region 102 may contact the well region 104.

[0037] Bulk region 106 is located within substrate region 102 and has a first conductivity type. In some embodiments, bulk region 106 may also be formed by ion implantation. In one possible embodiment, the doping concentration of bulk region 106 is greater than the doping concentration of substrate region 102. In some embodiments, bulk region 106 is a ground terminal.

[0038] The source 108 is located in the substrate region 102 and has a second conductivity type opposite to that of the substrate region 102. In some embodiments, the source 108 may also be formed by ion implantation. In some embodiments, the bulk region 106 is separated from the source 108, such as... Figure 1 As shown. In other embodiments, the bulk region 106 is in contact with the source electrode 108.

[0039] Drain 110 is located in well region 104. In some embodiments, drain 110 may also be formed by ion implantation. In some embodiments, drain 110 has a second conductivity type opposite to that of well region 104, and its doping concentration is greater than that of well region 104. In one possible embodiment, drain 110 has a second conductivity type, and its doping concentration is approximately equal to that of source 108, and source 108 and drain 110 may be formed in the same ion implantation process.

[0040] Isolation region 112 is located on well region 104 and is situated between source 108 and drain 110. In some embodiments, isolation region 112 is adjacent to drain 110, such as... Figure 1 As shown. In other embodiments, isolation region 112 is separated from drain 110. Isolation region 112 may include silicon local oxide (LOCOS) or shallow trench isolation (STI). In some embodiments, isolation region 112 is a field oxide layer. Isolation region 112 may be an oxide, nitride, or oxynitride, or a combination thereof, and its formation method includes: oxidizing and / or nitriding the substrate, or performing a shallow trench isolation process. In some embodiments, the shallow trench isolation process includes: forming a hard mask layer on the substrate and patterning it; using the patterned hard mask layer as an etching mask to etch the substrate; performing a deposition process to fill the trenches etched into the substrate with dielectric material; and performing a planarization process, such as a chemical mechanical polishing (CMP) process or a mechanical grinding process, to remove excess portions of the dielectric material, the remaining portion being the shallow trench isolation region.

[0041] Gate structure 114 is located on substrate region 102 and extends onto a portion of isolation region 112. In one embodiment, gate structure 114 (or gate electrode) is a conductive material. In one embodiment, gate structure 114 further includes a gate dielectric layer (not shown) located between gate structure 114 and substrate 100. In some embodiments, the method of forming gate structure 114 includes: sequentially depositing a dielectric material layer (for forming gate dielectric layer) and a conductive material layer (for forming gate electrode) thereon on a substrate, and then patterning the dielectric material layer and the conductive material layer by photolithography and etching processes to form gate dielectric layer and gate electrode. The material of gate dielectric layer may include silicon oxide, silicon nitride, or multiple layers of the aforementioned materials. In some embodiments, gate dielectric layer includes a high dielectric constant dielectric material, for example, it may include silicates or oxides of Hf, Al, Zr, La, Mg, Ba, Ti, Ta, Pb or silicates or oxides of combinations thereof. In some embodiments, the method for forming the gate dielectric layer may include molecular-beam deposition (MBD), atomic layer deposition, plasma-enhanced chemical vapor deposition, or a combination thereof. The material of the gate electrode may include amorphous silicon, polycrystalline silicon, one or more metals, metal nitrides, metal silicides, conductive metal oxides, or a combination thereof. In some embodiments, the method for forming the gate electrode may include chemical vapor deposition, sputtering, resistance heating evaporation, electron beam evaporation, or a combination thereof.

[0042] Resistor 116 is located on isolation region 112. In some embodiments, the resistance range of resistor 116 is approximately from 1MΩ to 100MΩ. In some embodiments, resistor 116 is a connection of multiple polysilicon resistive segments, which are arc-shaped, straight-line-shaped, or a combination thereof. In some embodiments, resistor 116 is circular, racetrack-shaped, finger-shaped, or spiral-shaped in a top view of high-voltage semiconductor device 10. Resistor 116 is electrically connected to bulk region 106 and drain 110 via interconnects 118 and 120, respectively. In other embodiments, resistor 116 is electrically connected to drain 110 and / or source 108 via other interconnects. The materials of interconnects 118 and 120 include: amorphous silicon, polysilicon, one or more metals, metal nitrides, metal silicides, conductive metal oxides, or combinations thereof. In some embodiments, the materials of interconnects 118 and 120 may be the same as the material of the gate electrode. The resistor 116 of this embodiment electrically connects the bulk region 106 and the drain 110, which has the effects of reducing the surface electric field, improving device performance, and increasing tolerance to process and reliability issues. In some embodiments, the bulk region 106 is a ground terminal. The material of the resistor 116 may include: amorphous silicon, polycrystalline silicon, metal nitride, metal silicide, conductive metal oxide, metal, combinations thereof, or alloys thereof. In some possible embodiments, the material of the resistor 116 includes silicon-chromium (SiCr).

[0043] Figure 2 This is a schematic cross-sectional view of a high-voltage metal-oxide-semiconductor (MOS) device according to some embodiments of the present invention. The high-voltage MOS device 20 is similar to the high-voltage semiconductor device 10, except that the high-voltage MOS device 20 further includes a first doped region 202 and a second doped region 204. For simplicity, in... Figure 2 Zhongyu Figure 1 Identical components are referred to by the same reference numerals and their descriptions are omitted. A first doped region 202 is located below isolation region 112, and a second doped region 204 is located below and forms a junction with the first doped region 202, with the first doped region 202 and the second doped region 204 having opposite conductivity types. In some embodiments, the first and second doped regions are formed using ion implantation. In these embodiments, the first or second doped region includes at least two sub-implant regions with different implantation concentrations. In some embodiments, the sub-implant region with a higher implantation concentration is adjacent to the junction, and the sub-implant region with a lower implantation concentration is distant from the junction. In some embodiments, the first doped region 202 and the second doped region 204 can be used to reduce the surface field (RESURF) structure of isolation region 112 and homogenize the surface field of isolation region 112. Figure 2The widths of the first doped region 202 and the second doped region 204 are merely examples. For instance, the widths of the first doped region 202 and the second doped region 204 may be different from the bottom width of the isolation region 112, or in another example, the width of the first doped region 202 may be different from the width of the second doped region 204.

[0044] Figure 3A This is a schematic cross-sectional view of a high-voltage lateral insulated-gate bipolar transistor (LIGBT) device according to some embodiments of the present invention. The high-voltage lateral insulated-gate bipolar transistor device 30 is similar to the high-voltage semiconductor device 10, except for the drain configuration. The drain of the high-voltage lateral insulated-gate bipolar transistor device 30 is formed by two doped regions 302 and 304 having opposite conductivity types. For simplicity, in... Figure 3A , Figure 3B and Figure 1 Identical components are designated using the same reference numerals, and their descriptions are omitted. In some embodiments, the resistor 116 of the high-voltage lateral insulated-gate bipolar transistor device 30 is connected to the aforementioned two doped regions 302 and 304 via interconnects 120A and 120B, respectively. These embodiments also have the aforementioned effects of reducing surface electric field, improving device performance, and increasing tolerance to process and reliability issues. In other embodiments, such as Figure 3B As shown, the high-voltage lateral insulated-gate bipolar transistor device 30 further includes a doped region 306 located between the isolation region 112 and the doped region 302 and having a second conductivity type. In this embodiment, the aforementioned doped region located between the isolation region 112 and the doped region 302 is not connected to the interconnects 120A and 120B. This doped region located between the isolation region 112 and the doped region 302 can improve the breakdown voltage of the high-voltage lateral insulated-gate bipolar transistor device.

[0045] Figure 4 According to another embodiment of the present invention, a cross-sectional schematic diagram of an insulated-gate bipolar transistor (IGBT) device is shown. The high-voltage lateral IGBT device 40 is similar to the high-voltage lateral IGBT device 30, except that the two doped regions 302 and 304 of the high-voltage lateral IGBT device 40 are separated from each other. Because the doped regions 302 and 304 are separated, the current flowing through the doped region 302 into the interconnect 120A increases, thus increasing the voltage difference between the doped region 302 and the well region 104, causing the high-voltage lateral IGBT device 40 to be triggered quickly. In this embodiment, the distance between the doped regions 302 and 304 affects the trigger voltage of the high-voltage lateral IGBT device 40. As described above... Figure 3B In the embodiment shown with doped region 306, the two doped regions 302 and 304 may also be separated from each other.

[0046] Figure 5 and Figure 6 This is a partial cross-sectional schematic diagram illustrating a resistor connected in parallel with a conductor in a high-voltage semiconductor device, according to some embodiments of the present invention. In some embodiments, Figure 5 or Figure 6 Can be Figure 7C , Figure 7D , Figure 8A , Figure 8B , Figure 9A or Figure 9B The high-voltage semiconductor device in the diagram is shown in a cross-sectional view along the BB curve or CC line in some figures. The parallel connection method, purpose, and effect of these embodiments will be described below. Figure 5 This diagram illustrates a partial cross-sectional view of a high-voltage semiconductor device 50 according to some embodiments, including an isolation region 112, a resistor 116, a contact 502, a conductor 504, and an insulating layer 506. The conductor 504 is disposed on the resistor 116, the insulating layer 506 is disposed between the conductor 504 and the resistor 116, and the contact 502 is disposed within the insulating layer 506. In one embodiment, the conductor 504 is located in the extending direction of the resistor 116, and the conductor 504 has the function of adjusting the resistance value of the semiconductor device without affecting the surface electric field. In a preferred embodiment, the conductor 504 is located only in a portion of the extending direction of the resistor 116 and is connected in parallel with a portion of the resistor 116 via the contact 502. In some embodiments, the vertical projection ranges of the conductor 504 and the resistor 116 at least partially overlap. In other embodiments, the vertical projection range of the conductor 504 is smaller than the vertical projection range of the resistor 116. The material of conductor 504 may include: amorphous silicon, polycrystalline silicon, metal nitride, metal silicide, conductive metal oxide, metal, a combination of the above, or an alloy. For example, conductor 504 may include Cr, Au, Ag, W, Al, an alloy formed from the aforementioned metals, or SiCr. The shape of conductor 504 depends on the shape of resistor 414, and the shape of conductor 140 is not limited in this embodiment of the invention. The material of contact 502 may include: amorphous silicon, polycrystalline silicon, one or more metals, metal nitride, metal silicide, conductive metal oxide, or a combination of the above. The material of insulating layer 506 may include: oxide, nitride, or oxynitride, or a combination of the above. The relative area ratio of conductor 504 to resistor 116 can be adjusted by those skilled in the art according to actual needs.

[0047] Figure 6 A partial cross-sectional schematic diagram of a high-voltage semiconductor device 60 is shown according to other embodiments, and... Figure 5The difference between the high-voltage semiconductor device 50 and the high-voltage semiconductor device 60 lies in the arrangement of the conductors. The high-voltage semiconductor device 60 includes an isolation region 112, a resistor 116, contacts 602A and 602B, conductors 604A and 604B, and an insulating layer 606. Conductors 604A and 604B are disposed on the resistor 116, the insulating layer 606 is disposed between the conductors 604A and 604B and the resistor 116, and the contacts 602A and 602B are disposed within the insulating layer 606. In one embodiment, conductors 604A and 604B are located in the extending direction of the resistor 116 and are partially connected in parallel with the portions of the resistor 116 below them via contacts 602A and 602B, respectively. In some embodiments, the vertical projection ranges of conductors 604A and 604B at least partially overlap with the vertical projection ranges of the resistor 116. In other embodiments, the vertical projection ranges of conductors 604A and 604B are smaller than the vertical projection range of the resistor 116. The shapes of conductors 604A and 604B depend on the shape or design requirements of the resistors 116 connected in parallel, and the embodiments of the present invention do not limit the shapes of conductors 604A and 604B. Conductors 604A and 604B may include Cr, Au, Ag, W, Al, alloys formed of the aforementioned metals, or SiCr. In some embodiments, conductors 604A and 604B are formed of the same material. In other embodiments, conductors 604A and 604B are formed of different materials. The materials of contacts 602A and 602B may include: amorphous silicon, polycrystalline silicon, one or more metals, metal nitrides, metal silicides, conductive metal oxides, or combinations thereof. In some embodiments, contacts 602A and 602B are formed of the same material. In other embodiments, contacts 602A and 602B are formed of different materials. The material of insulating layer 606 may include: oxides, nitrides, or oxynitrides, or combinations thereof. The aforementioned conductors 604A and 604B are merely examples. The embodiments of this invention do not limit the number of conductors partially connected in parallel with the resistor; this number depends on process or design requirements and can be one or more. In some embodiments where conductors and resistors are partially connected in parallel, the on-resistance of the component can be adjusted according to process and / or design requirements without changing the resistor configuration, thus maintaining the effect of reducing the surface electric field. For example, a high-voltage semiconductor device with conductors and resistors partially connected in parallel has the function of adjusting the resistance value, which can be used to maintain the resistance value at the design value when the component size is enlarged or reduced. The relative area ratio of conductors 604A and 604B to resistor 116 can be adjusted by those skilled in the art according to actual needs.

[0048] Figure 7A , Figure 7B , Figure 7C , Figure 7D , Figure 8A , Figure 8B , Figure 9A and Figure 9BThe present invention relates to some embodiments thereof, and a top view schematic diagram of a high-voltage conductor device is shown. Figure 7A A top view of a high-voltage semiconductor device 70A is shown, including: a substrate region 102, a bulk region 106, a source 108, a drain 110, an isolation region 112, a gate structure 114, and a resistor 716A. The bulk region 106 surrounds the substrate region 102, the substrate region 102 surrounds the source 108, the source 108 surrounds the gate structure 114, the gate structure 114 surrounds the isolation region 112, and the isolation region 112 surrounds the drain 110. The drain 110 has a drain profile 110P, and the gate structure 114 has a gate structure inner profile 114P. In some embodiments, the drain 110 is ring-shaped. Figure 7A As shown, resistor 716A is a circular spiral disposed on isolation region 112 and between drain profile 110P and gate structure inner profile 114P, and surrounds drain profile 110P. In some embodiments, one end of resistor 716A is electrically connected to drain 110 and the other end is electrically connected to bulk region 106 via an interconnect (not shown). In other embodiments, resistor 716A is electrically connected to drain 110 and / or source 108 via other interconnects. In some embodiments, the resistance range of resistor 716A is approximately from 1MΩ to 100MΩ. According to some embodiments of the present invention, such as Figure 7C As illustrated, the high-voltage semiconductor device 70A has a conductor 704 disposed on a portion of resistor 716A. The conductor 704, in the top view, has the same shape and area as the portion of resistor 716A below it and is connected in parallel with this portion of resistor 716A. In other embodiments, the shape or area of ​​the conductor 704 may differ from that of the portion of resistor 716A below it. The number of conductors 704 is not limited in this embodiment; depending on process or design requirements, there may be one or more. The material of the conductor 704 may include: amorphous silicon, polycrystalline silicon, metal nitrides, metal silicides, conductive metal oxides, metals, combinations thereof, or alloys thereof. In some embodiments, the material of the aforementioned conductor includes Cr, Au, Ag, W, Al, alloys formed from the aforementioned metals, or SiCr. In some embodiments, Figure 1 , Figure 2 , Figure 3A , Figure 3B ,and Figure 4 It can be used for high-voltage semiconductor devices 70A. Figure 7A or Figure 7C A cross-sectional view of line A-A'. According to some embodiments, Figure 5 It can be used for high-voltage semiconductor devices 70A. Figure 7C A schematic diagram of the cross-section of the BB curve.

[0049] Figure 7BThis is a top view schematic diagram of a high-voltage semiconductor device according to some embodiments of the present invention. High-voltage semiconductor device 70B is similar to high-voltage semiconductor device 70A, except for the arrangement of resistors. For simplicity, ... Figure 7B Zhongyu Figure 7A Identical components are referred to by the same designations and their descriptions are omitted. The resistor 716B of the high-voltage semiconductor device 70B comprises a plurality of concentric ring resistors disposed on the isolation region 112 and between and separated from the drain profile 110P and the gate structure inner profile 114P, and surrounding the drain profile 110P. In some embodiments, the plurality of concentric ring resistors of resistor 716B are each electrically connected to the drain 110 and the bulk region 106. In some embodiments, two non-overlapping contacts are provided on individual ring resistors, using interconnects to electrically connect one contact to the drain 110 and the other contact to the bulk region 106. The contact arrangement may be determined according to process requirements. The number of ring resistors is not limited in this embodiment; it may also be one. The shape of the ring resistor may be determined according to the shape of the high-voltage semiconductor device; for example, it may include a circle or an ellipse. In some embodiments, the resistance range of resistor 716B is approximately from 1 MΩ to 100 MΩ. According to some embodiments of the invention, such as... Figure 7D As illustrated, the high-voltage semiconductor device 70B has a conductor 704 disposed on a portion of resistor 716B. The conductor 704 has the same shape and area in the top view as the portion of resistor 716B below it and is connected in parallel with the portion of resistor 716B below it. In other embodiments, the shape or area of ​​conductor 704 may be different from that of the portion of resistor 716B below it. Figure 7D The two conductors 704 shown are merely exemplary, and the number may be one or more depending on process or design requirements. In some embodiments, the materials of the aforementioned conductors include Cr, Au, Ag, W, Al, or alloys formed from the aforementioned metals. In some embodiments, Figure 6 It can be used for high-voltage semiconductor devices 70B along Figure 7D A schematic diagram of the cross-section of the BB curve.

[0050] Figure 8A This is a top view schematic diagram of a high-voltage semiconductor device according to some embodiments of the present invention. As shown, the high-voltage semiconductor device 80A is a racetrack-shaped device, including: a substrate region 102, a bulk region 106, a source 108, a drain 110, an isolation region 112, a gate structure 114, and a resistor 816A. The bulk region 106 surrounds the substrate region 102, the substrate region 102 surrounds the source 108, the source 108 surrounds the gate structure 114, the gate structure 114 surrounds the isolation region 112, and the isolation region 112 surrounds the drain 110. The drain 110 has a drain profile 110P, and the gate structure 114 has a gate structure inner profile 114P. Figure 8AAs shown, resistor 816A is a racetrack-shaped spiral disposed on isolation region 112 and between drain profile 110P and gate structure inner profile 114P, and surrounding drain profile 110P. In some embodiments, one end of resistor 816A is electrically connected to drain 110 and the other end is electrically connected to bulk region 106 via interconnects (not shown). In other embodiments, resistor 816A is electrically connected to drain 110 and / or source 108 via other interconnects. In some embodiments, the resistance range of resistor 816A is approximately from 1MΩ to 100MΩ. According to some embodiments of the present invention, high-voltage semiconductor device 80A has one or more conductors disposed on a portion of resistor 816A. The configuration of these conductors, including their shape and area in the top view, their parallel connection with the portion of resistor 816A below them, the material of the conductors, etc., is similar to the conductors disposed on resistor 716A described above, and will not be repeated here. It should be noted that the embodiments of the present invention do not limit the placement of the conductor. For example, it can be placed on the resistor 816A in the curved portion, or on the resistor 816A in the straight portion, or simultaneously on the resistor 816A in both the curved and straight portions. In some embodiments, Figure 1 , Figure 2 , Figure 3A , Figure 3B ,and Figure 4 It can be used for high-voltage semiconductor devices with an 80A edge. Figure 8A A cross-sectional view of line A-A'. The high-voltage semiconductor device 80A has a section... Figure 8A In embodiments where one or more conductors are on the CC line, Figure 5 or Figure 6 It can be used for high-voltage semiconductor devices with an 80A edge. Figure 8A A cross-sectional view of the CC line.

[0051] Figure 8B This is a top view schematic diagram of a high-voltage semiconductor device according to some embodiments of the present invention. High-voltage semiconductor device 80B is similar to high-voltage semiconductor device 80A, except for the arrangement of resistors. For simplicity, ... Figure 8B Zhongyu Figure 8AIdentical components are designated using the same reference numerals and their descriptions are omitted. The resistor 816B of the high-voltage semiconductor device 20B comprises a plurality of ring-shaped racetrack resistors disposed on the isolation region 112 and between and separated from the drain profile 110P and the gate structure inner profile 114P, and surrounding the drain profile 110P. In some embodiments, each of the plurality of racetrack resistors of resistor 816B is electrically connected to the drain 110 and the bulk region 106. For example, two non-overlapping contacts may be provided on individual racetrack resistors, with one contact electrically connected to the drain 110 and the other contact electrically connected to the bulk region 106 using interconnects. The contact arrangement may be determined according to process requirements. The number of racetrack resistors is not limited in this embodiment; it may also be one. In some embodiments, the resistance range of resistor 816B is approximately from 1 MΩ to 100 MΩ. According to some embodiments of the present invention, the high-voltage semiconductor device 80B has one or more conductors disposed on a portion of resistor 816B. The configuration of these conductors, including their shape and area in the top view, their parallel connection with the portion of resistor 816B below them, the material of the conductors, etc., is similar to the conductors disposed on resistor 716B described above and will not be repeated here. In the high-voltage semiconductor device 80B having one or more conductors disposed on a portion of resistor 816B... Figure 8B In embodiments where one or more conductors are on the CC line, Figure 5 or Figure 6 It can be used for high-voltage semiconductor devices 80B along Figure 8B A cross-sectional view of the CC line. The aforementioned conductor is positioned on the straight line. Figure 8B The CC line is only used as an example; the conductor can also be placed elsewhere, such as on the curved section of resistor 816B or on the straight section of resistor 816B.

[0052] Figure 9A This is a top view schematic diagram of a high-voltage semiconductor device 90A according to some embodiments of the present invention. As shown, the high-voltage semiconductor device 90A is a finger-shaped device, including: a substrate region 102, a bulk region 106, a source 108, a drain 110, an isolation region 112, a gate structure 114, and a resistor 916A. The bulk region 106 surrounds the substrate region 102, the substrate region 102 surrounds the source 108, the source 108 surrounds the gate structure 114, the gate structure 114 surrounds the isolation region 112, and the isolation region 112 surrounds the drain 110. The drain 110 has a drain profile 110P, and the gate structure 114 has a gate structure inner profile 114P. In some embodiments, the drain 110 is finger-shaped. Figure 9AAs shown, resistor 916A is a finger-like spiral shape, disposed on isolation region 112 and between drain profile 110P and gate structure inner profile 114P, and surrounding drain profile 110P. In some embodiments, one end of resistor 916A is electrically connected to drain 110 and the other end is electrically connected to bulk region 106 via an interconnect (not shown). In other embodiments, resistor 916A is electrically connected to drain 110 and / or source 108 via other interconnects. In some embodiments, the resistance range of resistor 916A is approximately from 1MΩ to 100MΩ. According to some embodiments of the present invention, high-voltage semiconductor device 90A has one or more conductors disposed on a portion of resistor 916A. The configuration of this (or these) conductors, including their shape and area in the top view, their parallel connection with the resistor 916A below or the portion of resistor 916A, the material of the conductors, etc., is similar to the conductors disposed on resistor 716A described above, and will not be repeated here. It should be noted that the embodiments of the present invention do not limit the placement of the conductor. For example, it can be placed on the resistor 916A in the curved portion, on the resistor 916A in the straight portion, or simultaneously on the resistor 916A in both the curved and straight portions. In some embodiments, Figure 1 , Figure 2 , Figure 3A , Figure 3B ,and Figure 4 It can be used for high-voltage semiconductor devices 90A. Figure 9A A cross-sectional view of line A-A'. The high-voltage semiconductor device 90A has a section... Figure 9A In embodiments where one or more conductors are on the CC line, Figure 5 or Figure 6 It can be used for high-voltage semiconductor devices 90A. Figure 9A A cross-sectional view of the CC line.

[0053] Figure 9B This is a top view schematic diagram of a high-voltage semiconductor device 90B according to some embodiments of the present invention. The high-voltage semiconductor device 90B is similar to the high-voltage semiconductor device 90A, except for the arrangement of the resistors. For simplicity, in... Figure 9B Zhongyu Figure 9AIdentical components are designated using the same reference numerals and their descriptions are omitted. Resistor 916B of the high-voltage semiconductor device 90B comprises a plurality of finger resistors (or concentric finger resistors) disposed on isolation region 112 and spaced apart from each other between drain profile 110P and gate structure inner profile 114P, and surrounding drain profile 110P. In some embodiments, the plurality of finger resistors of resistor 916B are each electrically connected to drain 110 and bulk region 106. In some embodiments, two non-overlapping contacts are provided on individual ring resistors, using interconnects to electrically connect one contact to drain 110 and the other contact to bulk region 106. The contact arrangement may be determined according to process requirements. The number of finger resistors is not limited in this embodiment; it may also be one. In some embodiments, the resistance range of resistor 916B is approximately from 1MΩ to 100MΩ. According to some embodiments of the present invention, the high-voltage semiconductor device 90B has one or more conductors disposed on a portion of resistor 916B. The configuration of these conductors includes: their shape and area in the top view, their parallel connection with the resistor 916B or portion of resistor 916B below them, the material of the conductors, etc., similar to the conductors disposed on resistor 716B described above, and will not be repeated here. In the high-voltage semiconductor device 90B having conductors disposed on... Figure 9B In embodiments where one or more conductors are on the CC line, Figure 5 or Figure 6 It can be used for high-voltage semiconductor devices 90B along Figure 9B A cross-sectional view of the CC line. The aforementioned conductor is positioned on the straight line. Figure 9B The CC line is merely an example; the conductor can also be placed elsewhere, such as on the curved portion of resistor 916B or on other straight portions of resistor 916B. The aforementioned high-voltage semiconductor devices of various shapes are merely examples of embodiments of the present invention and are not intended to limit the embodiments of the present invention. Embodiments of the present invention are also applicable to high-voltage semiconductor devices of other shapes.

[0054] According to some embodiments of the present invention, placing the resistor of a high-voltage semiconductor device on an isolation region and electrically connecting it to the bulk region and the drain can reduce the surface electric field and improve device performance. For example, under different process conditions, the breakdown voltage can be maintained at a specific value; for instance, the well region of the device can maintain a breakdown voltage above 500V under different doping concentrations. In a further embodiment of the present invention, the conductor and the resistor are partially connected in parallel, which, in addition to reducing the surface electric field and improving device performance, also allows adjustment of the device's on-resistance according to process and / or design requirements.

[0055] The foregoing outlines the features of several embodiments to enable those skilled in the art to better understand various aspects of the present invention. Those skilled in the art should understand that they can readily utilize the present invention as a basis to design or modify other processes and structures to achieve the same objectives and / or advantages as the embodiments described herein. Those skilled in the art should also understand that such equivalent structures do not depart from the spirit and scope of the present invention, and that various changes, substitutions, and replacements can be made therein without departing from the spirit and scope of the present invention.

Claims

1. A high-voltage semiconductor device, characterized in that, include: A substrate; A substrate region and a well region are located in the substrate and separated from each other, wherein the substrate region has a first conductivity type and the well region has a second conductivity type opposite to the first conductivity type; A bulk region and a source electrode are located in the substrate region and separated from each other, wherein the bulk region has the first conductivity type and the source electrode has the second conductivity type; A drain electrode is located in the well region; An isolation region is located on the well region and between the drain and the source; A gate structure is located on the substrate region and extends onto a portion of the isolation region; A resistor is located on the isolation region and electrically connected to the block region and the drain. At least one conductor is disposed on the resistor; An insulating layer is disposed between the at least one conductor and the resistor; as well as Multiple contacts are disposed in the insulating layer, wherein at least one conductor is connected in parallel with the resistor via the multiple contacts.

2. The high-voltage semiconductor device as described in claim 1, characterized in that, The drain has a certain outline, and the resistor surrounds that outline.

3. The high-voltage semiconductor device as described in claim 2, characterized in that, The gate structure has an inner contour, and the resistor is located between the inner contour and the contour.

4. The high-voltage semiconductor device as claimed in claim 1, characterized in that, The drain is a ring shape and the resistor is a spiral or multiple concentric rings.

5. The high-voltage semiconductor device as claimed in claim 1, characterized in that, The drain is finger-shaped and the resistor is a finger-shaped spiral or multiple concentric fingers.

6. The high-voltage semiconductor device as claimed in claim 1, characterized in that, The at least one conductor is located in an extending direction of the resistor, and the at least one conductor at least partially overlaps with the vertical projection range corresponding to the resistor.

7. The high-voltage semiconductor device as claimed in claim 1, characterized in that, The vertical projection range of at least one conductor is smaller than the vertical projection range of the resistor.

8. The high-voltage semiconductor device as claimed in claim 1, characterized in that, The material of the at least one conductor includes amorphous silicon, polycrystalline silicon, metal nitride, metal silicide, conductive metal oxide, metal, combination of the above or alloy.

9. The high-voltage semiconductor device as claimed in claim 1, characterized in that, The materials of the resistor include amorphous silicon, polycrystalline silicon, metal nitrides, metal silicides, conductive metal oxides, metals, combinations thereof, or alloys thereof.

10. The high-voltage semiconductor device as claimed in claim 1, characterized in that, It further includes a first doped region located below the isolation region, and a second doped region located below the first doped region and forming a junction with the first doped region, wherein the first doped region and the second doped region have opposite conductivity types.

11. The high-voltage semiconductor device as claimed in claim 1, characterized in that, The drain is formed by two doped regions with opposite conductivity types.

12. The high-voltage semiconductor device as claimed in claim 11, characterized in that, The resistor is connected to the two doped regions respectively.

13. The high-voltage semiconductor device as claimed in claim 11, characterized in that, The two doped regions are separated from each other.

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