Vertical power semiconductor device and method of manufacturing

Abstract

A vertical power semiconductor device (100) is presented. The vertical power semiconductor device (100) comprises a semiconductor body (102) having a first main surface (104) and a second main surface (106) opposite to the first main surface (104) along a vertical direction (y). The vertical power semiconductor device (100) further comprises a drift region (108) in the semiconductor body (102). The drift region (108) comprises platinum atoms (109). The vertical power semiconductor device (100) further comprises a field stop region (110) in the semiconductor body (102) between the drift region (108) and the second main surface (106). The field stop region (110) comprises a plurality of impurity peaks (P1, P2). A first impurity peak (P1) of the plurality of impurity peaks (P1, P2) has a greater concentration (c) than a second impurity peak (P2) of the plurality of impurity peaks (P1, P2). The first impurity peak (P1) comprises hydrogen, while the second impurity peak (P2) comprises helium.

Description

Technical Field

[0001] This disclosure relates to semiconductor devices, and more particularly, to vertical power semiconductor devices including field stop regions. Background Technology

[0002] In semiconductor switching devices such as IGBTs (Insulated Gate Bipolar Transistors) or diodes, mobile charge carriers fill the lightly doped drift region and form a charge carrier plasma that provides low on-state resistance. One goal of semiconductor device technology is to reduce power dissipation in semiconductor switching devices. While power dissipation can be improved by changing one device parameter, this may lead to degradation of other device characteristics. Therefore, during technology development, device parameters are designed based on multiple trade-offs that must be satisfied with the target device specifications.

[0003] There is a need to reduce the power dissipation in vertical power semiconductor devices. Summary of the Invention

[0004] Examples of this disclosure relate to a vertical power semiconductor device. The vertical power semiconductor device includes a semiconductor body having a first main surface and a second main surface opposite to the first main surface along a vertical direction. The vertical power semiconductor device also includes a drift region in the semiconductor body. The drift region includes platinum atoms (Pt). A field-stopping region is disposed in the semiconductor body between the drift region and the second main surface. The field-stopping region includes multiple impurity peaks. A first impurity peak among the multiple impurity peaks has a higher concentration than a second impurity peak among the multiple impurity peaks. The first impurity peak includes hydrogen (H) or a hydrogen peak, while the second impurity peak includes helium (He) or a helium peak.

[0005] Another example of this disclosure relates to a method of manufacturing a vertical power semiconductor device. The method includes forming a drift region in a semiconductor body having a first main surface and a second main surface perpendicular to the first main surface in a vertical direction, wherein the drift region comprises platinum atoms. The method further includes forming a field-stopping region in the semiconductor body between the drift region and the second main surface, wherein the field-stopping region comprises a plurality of impurity peaks, and a first impurity peak among the plurality of impurity peaks is set to a concentration greater than that of a second impurity peak among the plurality of impurity peaks. The first impurity peak comprises hydrogen or a hydrogen peak, while the second impurity peak comprises helium or a helium peak.

[0006] Those skilled in the art will recognize the additional features and advantages upon reading the following detailed description and reviewing the accompanying drawings. Attached Figure Description

[0007] The accompanying drawings are included to provide a further understanding of the embodiments and are incorporated in and constitute a part of this specification. The drawings illustrate embodiments of vertical power semiconductor devices and methods of manufacturing vertical power semiconductor devices, and, together with the description, serve to explain the principles of the embodiments. Further embodiments are described in the following detailed description and claims.

[0008] Figures 1 to 3 This is a schematic cross-sectional view used to illustrate an example of a vertical power semiconductor device that includes platinum in the drift region and hydrogen gettering in the field stop region;

[0009] Figures 4 to 6 This is a schematic diagram illustrating an exemplary impurity concentration c in the field stop region of a vertical power semiconductor device relative to the vertical direction y;

[0010] Figure 7 This is a schematic diagram illustrating an exemplary impurity concentration c of a vertical power semiconductor diode relative to the vertical direction y;

[0011] Figure 8 This is a schematic diagram showing the experimental leakage current Il of a vertical power semiconductor device relative to the reverse or blocking voltage Vr. Detailed Implementation

[0012] In the following detailed description, reference is made to the accompanying drawings, which form part of the detailed description and illustrate specific embodiments in which the invention may be practiced. It should be understood that other embodiments may be utilized and structural or logical changes may be made without departing from the scope of the invention. For example, features shown or described for one embodiment may be used in other embodiments or in combination with other embodiments to produce yet another embodiment. The invention is intended to include such modifications and variations. Examples are described using specific language, which should not be construed as limiting the scope of the appended claims. The drawings are not drawn to scale and are for illustrative purposes only. For clarity, unless otherwise stated, the same elements are indicated by corresponding reference numerals in different drawings.

[0013] The terms “having,” “containing,” “including,” “comprising,” etc., are open-ended and indicate the presence of the stated structure, element, or feature, but do not exclude the presence of additional elements or features. The articles “a,” “an,” and “the” are intended to include both plural and singular forms unless the context clearly indicates otherwise.

[0014] The term "electrical connection" describes a permanent low-resistance connection between electrically connected elements, such as a direct contact between related elements or a low-resistance connection via a metal and / or heavily doped semiconductor material. The term "electrical coupling" includes one or more intermediate elements suitable for signal and / or power transfer that can be connected between electrically coupled elements; for example, elements controllable to temporarily provide a low-resistance connection in a first state and temporarily provide high-resistance electrical decoupling in a second state. An ohmic contact is a non-rectified electrical junction with linear or nearly linear current-voltage characteristics.

[0015] The given range of physical dimensions includes boundary values. For example, the range of parameter y from a to b should be understood as a ≤ y ≤ b. A parameter y with a value of at least c should be understood as c ≤ y, and a parameter y with a value of at most d should be understood as y ≤ d.

[0016] The term “on” should not be interpreted as simply “directly on it”. Rather, if an element is “on” another element (e.g., one layer is “on” another layer or “on” a substrate), then another component (e.g., another layer) may be located between the two elements (e.g., if one layer is “on” a substrate, then another layer may be located between that layer and the substrate).

[0017] Examples of vertical power semiconductor devices may include a semiconductor body having a first main surface and a second main surface opposite the first main surface along a vertical direction. The vertical power semiconductor device may also include a drift region within the semiconductor body. The drift region may include platinum atoms. The vertical power semiconductor device may also include a field-stopping region within the semiconductor body between the drift region and the second main surface. The field-stopping region may include multiple impurity peaks. A first impurity peak among the multiple impurity peaks has a higher concentration than a second impurity peak among the multiple impurity peaks. The first impurity peak may include hydrogen or may be a hydrogen peak, while the second impurity peak may include helium or may be a helium peak.

[0018] Vertical power semiconductor devices can be power semiconductor diodes, or power semiconductor IGBTs (Insulated Gate Bipolar Transistors), or reverse-conduction (RC) IGBTs, or power semiconductor transistors such as power semiconductor IGFETs (Insulated Gate Field-Effect Transistors, such as Metal-Oxide-Semiconductor Field-Effect Transistors). Vertical power semiconductor devices can be configured to conduct currents greater than 1A, greater than 10A, or even greater than 30A, and can be further configured to block voltages in the range of several hundred to several thousand volts between load terminals (e.g., between the emitter and collector of an IGBT, or between the cathode and anode of a diode, or between the drain and source of a MOSFET), such as 400V, 650V, 1.2kV, 1.7kV, 3.3kV, 4.5kV, 5.5kV, 6kV, and 6.5kV. For example, the blocking voltage may correspond to the voltage rating specified in the power semiconductor device's datasheet.

[0019] The semiconductor body may include or be composed of semiconductor materials derived from group IV semiconductors, IV-IV compound semiconductor materials, III-V compound semiconductor materials, or II-VI compound semiconductor materials. Examples of semiconductor materials derived from group IV semiconductors include silicon (Si) and germanium (Ge). Examples of IV-IV compound semiconductor materials include silicon carbide (SiC) and silicon germanium (SiGe). Examples of III-V compound semiconductor materials include gallium arsenide (GaAs), gallium nitride (GaN), gallium phosphide (GaP), indium phosphide (InP), indium gallium nitride (InGaN), and indium gallium arsenide (InGaAs). Examples of II-VI compound semiconductor materials include cadmium telluride (CdTe), mercury cadmium telluride (CdHgTe), and cadmium magnesium telluride (CdMgTe). For example, the semiconductor body may be a magnetically Czochralski (MCZ) or floating zone (FZ) or epitaxially deposited silicon semiconductor body.

[0020] For example, the impurity concentration in the drift region may gradually or progressively increase or decrease, at least in its vertically extending portion, with increasing distance from the first main surface. According to other examples, the impurity concentration in the drift region may be approximately uniform. For silicon-based IGBTs, the average impurity concentration in the drift region may be 5 × 10⁻⁶. 12 cm -3 Up to 1×10 15 cm -3 Between, for example, in 1×10 13 cm -3 Up to 2×10 14 cm -3 Within a certain range. In the case of SiC-based semiconductor devices, the average impurity concentration in the drift region can be as low as 5 × 10⁻⁶. 14 cm -3Up to 1×10 17 cm -3 Between, for example, in 1×10 15 cm -3 Up to 2×10 16 cm -3 Within a certain range. The vertical extension of the drift region can depend on the voltage blocking requirements of the vertical power semiconductor device, such as a specified voltage level. When the vertical power semiconductor device is operated in voltage blocking mode, the space charge region can extend vertically partially or completely through the drift region depending on the blocking voltage applied to the vertical power semiconductor device. When the vertical power semiconductor device is operated at or near a specified maximum blocking voltage, the space charge region can reach or penetrate into the field stop region. The field stop region is configured to prevent the space charge region from further reaching the cathode or collector at the second main surface of the semiconductor body. In this way, the drift or base region can be formed with a desired low doping level and a desired thickness, while achieving soft switching of the resulting semiconductor device.

[0021] Since the purpose of the field stop region is to prevent the space charge region from reaching the cathode or collector at the second main surface of the semiconductor body in voltage blocking mode at or near the maximum specified voltage blocking capability of the semiconductor device, the average net impurity concentration in the field stop layer can be, for example, at least one order of magnitude higher than the average net impurity concentration in the drift region. Furthermore, the average net impurity concentration in the field stop layer can be, for example, at least one order of magnitude lower than the impurity concentration in the cathode contact layer or collector contact layer.

[0022] For example, the total impurity concentration at the vertical position of the first impurity peak may primarily consist of hydrogen, such as greater than 60% hydrogen, or greater than 70% hydrogen, or greater than 80% hydrogen, or even greater than 90% hydrogen. For example, the vertical impurity concentration profile of hydrogen may have a peak at, for example, the vertical position of the first impurity peak.

[0023] For example, the vertical impurity concentration distribution of helium can have a peak, for example, at a position perpendicular to the second peak.

[0024] By combining platinum in the drift region with helium in the second impurity peak, the leakage current can be reduced by avoiding or at least minimizing the undesirable formation of platinum-hydrogen complexes in the drift region. This can be achieved through the adsorption of hydrogen via the second impurity peak, which includes helium. Thus, undesirable diffusion of hydrogen from the first impurity peak into the drift region can be reduced or suppressed.

[0025] For example, the first vertical distance between the first impurity peak and the second impurity peak can range from 0 μm to ±5 μm, or from 2 μm to 5 μm, or from -2 μm to -5 μm. For example, the first impurity peak can be positioned between the second impurity peak and the second host surface. According to another example, the first impurity peak can be positioned between the second impurity peak and the first host surface. The first and second impurity peaks can also overlap.

[0026] For example, the third impurity peak among multiple impurity peaks can be located at a certain vertical distance from the second main surface, which differs from the second vertical distance of the second impurity peak by 0 to 300 nm and / or is less than the half-width (HW) of the second impurity peak P2. The third impurity peak may include hydrogen or may be a hydrogen peak. For example, the concentration of the third impurity peak may be greater than the concentration of the second impurity peak.

[0027] For example, the second vertical distance can be greater than the third vertical distance between the second main surface and the first impurity peak. Therefore, the helium peak can be positioned between the hydrogen peak in the field-stop region (e.g., the hydrogen peak with the highest hydrogen concentration in the field-stop region) and the drift region. This allows for the beneficial adsorption of hydrogen, for example, diffusing from the hydrogen peak toward the drift region. Thus, leakage current can be reduced by avoiding or at least minimizing the undesirable formation of platinum-hydrogen complexes in the drift region.

[0028] For example, the second vertical distance can be smaller than the third vertical distance between the second main surface and the first impurity peak. For example, decoration of vacancies caused by He implantation may result in a beneficial reduction in the lateral resistance in the surface region of the second main surface.

[0029] For example, the fourth impurity peak among multiple impurity peaks may include helium and may be located at a fourth vertical distance from the second main surface. The third vertical distance may range between the second and fourth vertical distances. For example, the vertical impurity concentration distribution of helium may have a peak not only at the vertical position of the second impurity peak but also at the vertical position of the fourth impurity peak. Along the vertical direction, the deepest hydrogen peak in the field-stopping region (i.e., the hydrogen peak in the field-stopping region with the largest vertical distance to the second main surface, such as the first impurity peak) may be arranged between opposing helium peaks (e.g., the second and fourth impurity peaks). Thus, for example, the adsorption of hydrogen diffusing from the hydrogen peak into the drift region can be further improved. Furthermore, reducing the diffusion constant of hydrogen in the helium-containing peak region located below the hydrogen-containing main peak may also help reduce hydrogen diffusion into the drift region. Therefore, leakage current can be reduced by avoiding or at least reducing the undesirable formation of platinum-hydrogen complexes in the drift region. For example, the helium dose associated with a second impurity peak can also be dispersed across multiple second helium sub-peaks, for example, by performing multiple helium ion implantations at different ion implantation energies and / or different ion implantation angles, wherein the second helium sub-peaks can be positioned between the first impurity peak (e.g., a hydrogen peak in a drift region) and the first host surface, or between the first impurity peak and the second host surface. Similarly, the helium dose associated with a fourth impurity peak can also be dispersed across multiple second helium sub-peaks, for example, by performing multiple helium ion implantations at different ion implantation energies and / or different ion implantation angles, wherein the fourth helium sub-peak can be positioned between the first impurity peak (e.g., a hydrogen peak in a drift region) and the second host surface, or between the first impurity peak and the first host surface. This can result in an approximately box-shaped helium concentration distribution along the vertical direction. By dispersing helium across multiple helium sub-peaks over a larger vertical distance compared to a single helium peak implantation, for example, a specific helium dose or hydrogen removal can be achieved with relatively lower ion implantation damage compared to a single ion implantation.

[0030] For example, the ratio between the peak concentration of the first impurity peak (e.g., hydrogen peak concentration) and the peak concentration of the second impurity peak (e.g., helium peak concentration) can be in the range of 10 to 1000, or in the range of 50 to 500. Since the helium ion implantation dose is significantly smaller than the proton implantation dose in terms of generating a specific concentration of vacancies, the total implantation dose required to achieve different peaks with a specific total integral (in the direction perpendicular to the field stop distribution) of the field stop doping dose can be significantly reduced, thus reducing processing time and processing costs.

[0031] For example, the helium peak concentration (e.g., helium concentration) of the second impurity peak can be 1×10⁻⁶. 16 cm -3 Up to 2×10 18 cm -3 Within the range, or within 2×10 16 cm -3Up to 1×10 18 cm -3 Within the range, or within 5×10 16 cm -3 Up to 5×10 17 cm -3 Within the range.

[0032] For example, the maximum concentration of platinum in the drift region can be 5 × 10⁻⁶. 12 cm -3 Up to 3×10 14 cm -3 Within a certain range. For example, the concentration of platinum can decrease from the second master surface toward and at least partially through the drift region. For example, the concentration of platinum can exhibit a minimum within the drift region. For example, platinum can be introduced into the drift region by one or more ion implantation processes to the front or back side of the wafer and / or by one or more diffusion processes from a diffusion source (e.g., platinum silicide on the surface of the semiconductor body).

[0033] For example, the drift region can have a vertical extension from the field stop region to the pn junction, such as the pn junction between the drift region and the body region of an IGBT or the pn junction between the drift region and the anode region of a diode. The pn junction can be positioned closer to the first main surface than to the second main surface, for example, by a smaller vertical distance. Along at least 50% of the vertical extension of the drift region, the maximum hydrogen concentration in the drift region can be less than 100%, 50%, or 20% of the concentration of platinum. The vertical extension of the drift region can be limited by the pn junction at a first end of the drift region facing the first main surface and a second end of the drift region facing the second main surface, wherein the second end of the drift region can be at the transition between the drift region and the field stop region. For example, the hydrogen concentration in the drift region can be reduced by introducing helium into the drift region to remove hydrogen from the field stop region.

[0034] For example, platinum atoms in the drift region can be configured as a platinum-hydrogen complex and substituted platinum. For at least 50% of the vertical extension of the drift region, the maximum concentration of the platinum-hydrogen complex in the drift region can be less than the concentration of substituted platinum. For example, for at least 50% of the vertical extension of the drift region, the maximum concentration of the platinum-hydrogen complex in the drift region can be at most 60%, or even 40%, or even 20% of the concentration of substituted platinum. By maintaining a concentration of the platinum-hydrogen complex less than the concentration of substituted platinum along the main portion of the drift region, leakage current in the semiconductor device can be reduced, and thus power dissipation of the semiconductor device can be reduced.

[0035] The details described above regarding vertical semiconductor power devices (such as materials, dimensions, and technological effects) also apply to the examples of manufacturing methods described below.

[0036] Examples of methods for manufacturing vertical power semiconductor devices may include forming a drift region in a semiconductor body having a first main surface and a second main surface opposite the first main surface in a vertical direction, wherein the drift region may include platinum. The method may also include forming a field-stop region in the semiconductor body between the drift region and the second main surface. The field-stop region may include a plurality of impurity peaks, and a first impurity peak among the plurality of impurity peaks is set to have a higher concentration than a second impurity peak among the plurality of impurity peaks. The first impurity peak may include hydrogen or may be a hydrogen peak, while the second impurity peak may include helium or may be a helium peak.

[0037] For example, forming the first impurity peak may include at least one proton implantation process having a range from 2 × 10⁻⁶. 13 cm -2 Up to 5×10 14 cm -2 The proton implantation dose. For example, multiple proton implantation processes can be performed, wherein the proton implantation dose can decrease as the proton implantation energy increases. Therefore, for example, the hydrogen peak concentration in the field stop region can decrease as the vertical distance from the second master surface increases.

[0038] For example, forming the second impurity peak may include at least one helium ion implantation process. After at least one proton implantation process and after at least one helium ion implantation process, the semiconductor body may be annealed for 0.5 to 5 hours in a temperature range of 350°C to 430°C.

[0039] For example, the first vertical distance between the first impurity peak and the second impurity peak can be set in the range of 0 μm to ±5 μm.

[0040] For example, the method may further include forming a fourth impurity peak in the field stop region by at least one helium ion implantation process. The fourth impurity peak may be located at a fourth vertical distance from the second main surface. The first impurity peak may be arranged vertically between the second and fourth impurity peaks.

[0041] For example, the method may also include implanting helium ions into the semiconductor bulk at multiple different ion implantation tilt angles. This allows for setting a box-shaped vertical concentration distribution of helium, which can be a concentration distribution with a larger vertical extension, smaller damage concentration, and lower peak concentration than a single helium peak distribution, when equal helium implantation doses are assumed for both cases. For example, different ion implantation angles can be combined with different helium ion implantation energies to achieve a desired vertical concentration distribution of helium for improving hydrogen adsorption.

[0042] For example, platinum at 5 × 10 12 cm -3 Up to 3×1014 cm -3 The maximum concentration within the range is introduced into the drift region. For example, platinum can be introduced into the drift region via a diffusion process at temperatures above 750°C or 800°C. For example, platinum can be introduced before hydrogen injection.

[0043] For example, the drift region has a vertical extension from the field-stop region to the pn junction. For at least 50% of this vertical extension, the maximum hydrogen concentration in the drift region can be set to be less than the platinum concentration.

[0044] For example, platinum in the drift region may include platinum-hydrogen complexes and substituted platinum. For at least 50% of the vertical extension of the drift region, the maximum concentration of the platinum-hydrogen complex in the drift region can be set to be less than the concentration of substituted platinum.

[0045] For example, the maximum hydrogen concentration in the field stopping region can be at least 5 times, or 20 times, or 100 times, or 500 times greater than the maximum hydrogen concentration in the drift region.

[0046] The examples and features described above and below can be combined.

[0047] Below, other examples of vertical power semiconductor devices and manufacturing methods are described with reference to the accompanying drawings. The functional and structural details described in the above examples also apply to the exemplary embodiments shown in the drawings and further described below.

[0048] Figure 1 This is a schematic cross-sectional view illustrating an embodiment of a vertical power semiconductor device 100. The vertical power semiconductor device 100 includes a semiconductor body 102 having a first main surface 104 and a second main surface 106 opposite to the first main surface 104. The thickness of the semiconductor body 102 between the first main surface 104 and the second main surface 106 ranges from tens of micrometers to hundreds of micrometers, depending particularly on, for example, the specified voltage level of the vertical power semiconductor device.

[0049] Active device elements can be formed in the active device region of the semiconductor body 102 at the first main surface 104. In the figure, the portion where the active device element is located is schematically indicated by the dashed box 107. The active device region is the region of the semiconductor body 102 in which load current flows through the first main surface 104 into / out of the semiconductor body. In the case of an IGFET or IGBT, the active device region may include a source region electrically connected to a contact electrode through the first main surface 104. Source-to-drain current or emitter-to-collector current can flow from the contact electrode through the first main surface 104 into the source region. In the case of a diode, the active device region may include an anode or cathode region electrically connected to a contact electrode through the first main surface 104. Anode-to-cathode current can flow from the contact electrode through the first main surface 104 into the anode or cathode region. Therefore, for example, the active device region can be confined to a first portion of the first main surface through which load current flow is directed.

[0050] Edge-terminating elements can be formed in an edge-terminating region, which is a region of the semiconductor body 102 that partially or completely surrounds the active device region. Because the pn junctions within the semiconductor body 102 (e.g., the pn junction between the body and drift regions of an IGFET or IGBT, or the pn junction between the cathode and anode regions of a diode) are not infinite but terminate at the edge band of the semiconductor body, this edge effect limits the device breakdown voltage below the ideal value set by an infinite parallel planar junction. Care must be taken to ensure proper and efficient termination of the pn junction at the edge of the semiconductor body. An edge-terminating region is a measure used to ensure proper and efficient termination of the pn junction. In the edge-terminating region, an edge-terminating structure is formed to reduce the electric field at the edge of the semiconductor body. Depending on the voltage level of the semiconductor device, the lateral dimensions of the edge-terminating region can vary. Semiconductor devices with higher voltage levels typically require a larger lateral extension of their edge-terminating regions to ensure proper termination of the pn junction. Examples of edge-terminating structures in the edge-terminating region include, for example, field plates, junction termination extension (JTE) structures, and lateral doping variation (VLD) structures.

[0051] The vertical power semiconductor device 100 also includes a drift region 108 in a semiconductor body 102. The drift region 108 comprises platinum. The platinum in the drift region 108 is schematically shown in the figure by a cross 109. A field stop region 110 is disposed in the semiconductor body 102 between the drift region 108 and the second main surface 106. The field stop region 110 includes multiple impurity peaks. Figure 1In the example shown, three impurity peaks are illustrated. The first impurity peak P1 has a higher concentration c than the second impurity peak P2. The first impurity peak P1 is a hydrogen peak, while the second impurity peak P2 is a helium peak. The first vertical distance d1 between the first impurity peak P1 and the second impurity peak P2 ranges from 0 μm to ±5 μm. In the example shown, the first vertical distance d1 is negative. Therefore, the second impurity peak P2 is positioned between the first impurity peak P1 and the first host surface 104. Consequently, the second vertical distance d2 from the second host surface 106 to the second impurity peak P2 is greater than the third vertical distance d3 from the second host surface 106 to the first impurity peak P1.

[0052] The vertical power semiconductor device 100 also includes a third impurity peak P3, for example, a hydrogen peak configured to be close to or consistent with the second impurity peak P2. For example, the third impurity peak P3 may be located at a certain vertical distance from the second main surface 106, this vertical distance differing from the second vertical distance d2 of the second impurity peak P2 by 0 to ±300 nm. The third impurity peak P3 is a hydrogen peak.

[0053] Figure 2 This is a schematic cross-sectional view illustrating another embodiment of the vertical power semiconductor device 100. In the example shown, the first distance d1 is positive. Therefore, the second impurity peak P2 is arranged between the first impurity peak P1 and the second main surface 106. The second vertical distance d2 from the second main surface 106 to the second impurity peak P2 is therefore less than the third vertical distance d3 from the second main surface 106 to the first impurity peak P1.

[0054] Figure 3 This is a schematic cross-sectional view illustrating another embodiment of the vertical power semiconductor device 100. In the example shown, the vertical power semiconductor device 100 further includes a fourth impurity peak P4 disposed at a fourth vertical distance d4 from the second main surface 106. The fourth impurity peak P4 is a helium peak. The third vertical distance d3 ranges between the second vertical distance d2 and the fourth vertical distance d4. Therefore, the first impurity peak P1 is disposed between the second impurity peak P2 and the fourth impurity peak P4. The vertical power semiconductor device 100 also includes a fifth impurity peak P5, for example, a hydrogen peak disposed close to or consistent with the fourth impurity peak P4. For example, the fifth impurity peak P5 may be disposed at a certain vertical distance from the second main surface 106, which differs from the fourth vertical distance d4 of the fourth impurity peak P4 by 0 to ±300 nm. The fifth impurity peak P5 is a hydrogen peak.

[0055] Figures 4 to 6 The schematic diagram illustrates an example of hydrogen and helium concentration distribution along the vertical direction y in the field stop region 108 of a vertical power semiconductor device 100. For clarity, in Figures 4 to 6 The middle part is omitted Figures 1 to 3The third impurity peak P3 and the fifth impurity peak P5 are shown in the figure, although these peaks may also exist.

[0056] Reference Figure 4 The schematic diagram shows helium ions being implanted into the semiconductor body 102 at multiple different ion implantation tilt angles. The vertical distribution of helium concentration c2 is a superposition of the distributions of individual vertical helium concentrations c21, c22, and c23, which are formed by helium ion implantation at constant energy but different ion implantation angles. The helium peak P2 is positioned between the hydrogen peak P1 and the first main surface.

[0057] Reference Figure 5 The schematic diagram shown in the figure, except as referenced Figure 5 In addition to the helium ions implanted into the semiconductor body 102, other helium ions are implanted into the semiconductor body 102 with an ion implantation energy equal to but at a tilt angle even larger than that associated with the helium peak P2. As a result, a helium peak P4 is formed, positioned between the hydrogen peak P1 and the second main surface. The vertical distribution of helium concentration c4 is a superposition of individual vertical distributions of helium concentrations c41 and c42, which are formed by helium ion implantation at constant energy but different ion implantation angles.

[0058] Reference Figure 6 The schematic diagram shows helium ions implanted into the semiconductor body 102 at multiple different ion implantation tilt angles. The vertical distribution of helium concentration c4 is a superposition of the distributions of individual vertical helium concentrations c41, c42, c43, c44, c45, and c46, which are formed by helium ion implantation at constant energy but different ion implantation angles. The helium peak P4 is positioned between the hydrogen peak P1 and the second main surface.

[0059] Reference Figure 7 The schematic diagram illustrates an exemplary vertical distribution of impurity concentration c along the vertical direction y from the second main surface (e.g., the cathode side of a diode) toward the first main surface (e.g., the anode side of a diode). The vertical distribution is divided into a cathode region 112, a field stop region 110, and a drift region 108.

[0060] The vertical distribution of helium concentration cHe is similar to Figure 1 The example shown. The vertical distribution of hydrogen concentration cH has a main peak P1 in the field stop region 110, which is arranged between the peak P2 of helium concentration cH and the first main surface.

[0061] The vertical distribution of vacancy concentration cV includes peaks located near or equal to the first peak P1 and the second peak P2.

[0062] The vertical distribution of the n-type doping concentration cD includes peaks located near or equal to the first peak P1 and the second peak P2, due to the formation of hydrogen-related donors. The vertical distribution of the n-type doping concentration cD increases toward a maximum value at or near the second main surface in the collector or cathode region 112. For example, the maximum value can be configured in the cathode contact region.

[0063] In the illustrative example shown, the vertical distribution of the Pt concentration cPt decreases from the second master surface toward the drift region 108 and is greater than the hydrogen concentration cH in the drift region. By removing hydrogen around the helium peak P2, the hydrogen concentration cH in the drift region 108 can be reduced, and thus the undesirable platinum-hydrogen complex in the drift region can be reduced.

[0064] The above example reduces power dissipation in the semiconductor device by reducing leakage current in the drift region 108 of the semiconductor device. Figure 8 This is a schematic diagram illustrating experimental results for leakage current Il at reverse or blocking voltage Vr. Leakage current Il1 is associated with semiconductor device samples as described in the examples above, i.e., semiconductor device samples that include helium peaks in the field stop region for hydrogen adsorption and reduction of undesirable platinum-hydrogen complexes in the drift region. Leakage current Il2 is associated with semiconductor device samples lacking the specifications described with reference to Il1. For example, the difference in leakage current ΔIl allows quantification of the reduction in the relationship between the platinum / hydrogen complex and the concentration of substituted platinum, and thus quantification of the reduction in power dissipation caused by leakage current.

[0065] The aspects and features mentioned and described together with the accompanying drawings and one or more of the previously described examples may also be combined with one or more other examples in order to replace similar features in other examples or to additionally introduce features to other examples.

[0066] Although specific embodiments have been shown and described herein, those skilled in the art will understand that various alternatives and / or equivalent implementations may be used instead of the shown and described specific embodiments without departing from the scope of the invention. This application is intended to cover any adaptations or variations of the specific embodiments discussed herein. Therefore, the invention is intended to be limited only by the claims and their equivalents.

Claims

1. A vertical power semiconductor device, comprising: A semiconductor body has a first main surface and a second main surface that is opposite to the first main surface along a vertical direction; A drift region in the semiconductor body, wherein the drift region comprises platinum atoms; A field-stop region is defined in the semiconductor body between the drift region and the second main surface. The field-stop region includes a plurality of impurity peaks, wherein a first impurity peak has a higher concentration than a second impurity peak, and wherein the first impurity peak comprises hydrogen, while the second impurity peak comprises helium. The third impurity peak among the plurality of impurity peaks is located at a third vertical distance from the second main surface, which is different from the second vertical distance of the second impurity peak relative to the second main surface, and wherein the third impurity peak includes hydrogen. The fourth impurity peak among the plurality of impurity peaks includes helium and is located at a fourth vertical distance from the second main surface, wherein the third vertical distance is between the second vertical distance and the fourth vertical distance.

2. The vertical power semiconductor device according to claim 1, wherein, The first vertical distance between the first impurity peak and the second impurity peak ranges from 0 μm to 5 μm.

3. The vertical power semiconductor device according to claim 1, wherein, The concentration of the third impurity peak is greater than the concentration of the second impurity peak.

4. The vertical power semiconductor device according to claim 1, wherein, The second vertical distance is greater than the vertical distance between the second main surface and the first impurity peak.

5. The vertical power semiconductor device according to claim 1, wherein, The second vertical distance is less than the vertical distance between the second main surface and the first impurity peak.

6. The vertical power semiconductor device according to claim 1, wherein, The ratio between the peak concentration of the first impurity peak and the peak concentration of the second impurity peak ranges from 10 to 1000.

7. The vertical power semiconductor device according to claim 1, wherein, The helium peak concentration range of the second impurity peak is 1×10⁻⁶. 16 cm -3 Up to 2×10 18 cm -3 .

8. The vertical power semiconductor device according to claim 1, wherein, The maximum platinum concentration range in the drift region is 5 × 10⁻⁶. 12 cm -3 Up to 3×10 14 cm -3 .

9. The vertical power semiconductor device according to claim 1, wherein, The drift region has a vertical extension from the field stop region to the pn junction, and wherein, for at least 50% of the vertical extension of the drift region, the maximum concentration of hydrogen in the drift region is less than the concentration of platinum.

10. The vertical power semiconductor device according to claim 1, wherein, The platinum atoms in the drift region are configured as a platinum-hydrogen complex and substituted platinum, and wherein, for at least 50% of the drift region extending vertically, the maximum concentration of the platinum-hydrogen complex in the drift region is less than the concentration of the substituted platinum.

11. The vertical power semiconductor device according to claim 1, wherein, The maximum hydrogen concentration in the field stopping region is at least five times greater than the maximum hydrogen concentration in the drift region.

12. A method for manufacturing a vertical power semiconductor device, comprising: A drift region is formed in a semiconductor body having a first main surface and a second main surface opposite to the first main surface along a vertical direction, wherein the drift region comprises platinum atoms; A field-stop region is formed in the semiconductor body between the drift region and the second main surface. The field-stop region includes a plurality of impurity peaks, and a first impurity peak among the plurality of impurity peaks is set to have a higher concentration than a second impurity peak among the plurality of impurity peaks. The first impurity peak includes hydrogen, while the second impurity peak includes helium. The third impurity peak among the plurality of impurity peaks is located at a third vertical distance from the second main surface, which is different from the second vertical distance of the second impurity peak relative to the second main surface, and wherein the third impurity peak includes hydrogen. The fourth impurity peak among the plurality of impurity peaks includes helium and is located at a fourth vertical distance from the second main surface, wherein the third vertical distance is between the second vertical distance and the fourth vertical distance.

13. The method according to claim 12, wherein, The formation of the first impurity peak includes at least one proton implantation process, the at least one proton implantation process having a range of 2 × 10 13 cm -2 Up to 5×10 14 cm -2 The proton injection dose.

14. The method according to claim 12, wherein, The formation of the second impurity peak includes at least one helium ion implantation process, wherein, after the at least one proton implantation process and after the at least one helium ion implantation process, the semiconductor body is annealed for 0.5 to 5 hours at a temperature range of 350°C to 430°C.

15. The method according to claim 12, wherein, The first vertical distance between the first impurity peak and the second impurity peak is set in the range of 0 μm to 5 μm.

16. The method of claim 12, further comprising forming the fourth impurity peak in the field stop region by at least one helium ion implantation process, wherein, The first impurity peak is arranged along the vertical direction between the second impurity peak and the fourth impurity peak.

17. The method of claim 12, further comprising implanting helium ions into the semiconductor body at multiple different ion implantation tilt angles.

18. The method according to claim 12, wherein, Platinum in the range of 5×10 12 cm -3 Up to 3×10 14 cm -3 The maximum concentration is introduced into the drift region.

19. The method according to claim 12, wherein, The drift region has a vertical extension from the field stop region to the pn junction, and wherein, for at least 50% of the vertical extension of the drift region, the maximum concentration of hydrogen in the drift region is set to be less than the concentration of platinum.

20. The method according to claim 12, wherein, The platinum in the drift region comprises a platinum-hydrogen complex and a substituted platinum, and wherein, for at least 50% of the vertical extension of the drift region, the maximum concentration of the platinum-hydrogen complex in the drift region is set to be less than the concentration of the substituted platinum.

21. The method according to claim 12, wherein, The maximum hydrogen concentration in the field stopping region is at least five times greater than the maximum hydrogen concentration in the drift region.

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