Semiconductor device

By forming step portions on the glass substrate and bonding semiconductor elements, and using heat dissipation materials with the same thermal expansion coefficient, the distortion problem caused by the difference in linear expansion coefficient between the packaging component and the imaging element is solved, and a more stable installation structure and better heat dissipation effect are achieved.

CN113519058BActive Publication Date: 2025-06-10SONY SEMICON SOLUTIONS CORP
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Patent Information

Application Number
CN202080018337.9
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Priority Date
2019-03-12
Filing Date
2020-01-09
Publication Date
2025-06-10
Estimated Expiration
2040-01-09

AI Technical Summary

Technical Problem

In existing semiconductor devices, the difference in the linear expansion coefficient between the package component and the imaging element causes distortion or tilt to occur, affecting the focus of light and image quality.

Method used

Using a glass substrate, a step portion is formed on its surface and around the through holes, and a semiconductor element is bonded to the step portion to reduce the difference in linear expansion coefficient. Meanwhile, a material with the same or close to the thermal expansion coefficient is used as the heat dissipation component to further improve structural stability.

Benefits of technology

It effectively suppresses distortion or inclination caused by the difference in linear expansion coefficient, ensures a stable installation structure of the semiconductor element, improves heat dissipation effect, and improves image quality.

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Abstract

An object of the present invention is to eliminate the influence caused by the difference in the linear expansion coefficient between a substrate and another material, and to ensure a stable mounting structure for a semiconductor element. A semiconductor device is provided with a glass substrate and a semiconductor element. The glass substrate is provided with through holes penetrating the front surface and the rear surface. The glass substrate is further provided with a stepped portion located at the periphery of the through holes. The semiconductor element is bonded to the stepped portion of the glass substrate. When an imaging element is used as the semiconductor element, for example, light incident on the imaging element is prevented from being defocused, thereby improving the image quality of an image obtained by imaging.
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Description

Technical Field

[0001] The present technology relates to a semiconductor device. More specifically, it relates to a semiconductor device in which a semiconductor element is bonded to a substrate and a heat dissipation member is provided. Background Art

[0002] Imaging elements such as charge-coupled devices (CCDs) and complementary metal-oxide semiconductor (CMOS) image sensors that apply semiconductor microfabrication technology are widely used in digital cameras, mobile phones, etc. These imaging elements are mounted on an electronic device as a camera module by installing a lens structure. For example, in order to reduce the size and thickness of the camera module, an imaging device has been proposed in which a rectangular opening hole penetrating the front and rear of a package member is formed and the imaging element is provided on one end side of the opening hole (for example, see Patent Document 1).

[0003] Citation List

[0004] Patent Documents

[0005] Patent Document 1: Japanese Patent Application Laid-Open No. 2013-085095 Summary of the Invention

[0006] Problems to be Solved by the Invention

[0007] In the above conventional technology, the package member is formed with an opening hole penetrating the front and rear to reduce the size and thickness of the module. However, in this conventional technology, it is premised that the package member includes a resin molded product, and there is a possibility of distortion due to the difference in the linear expansion coefficient between the package member and the imaging measurement. Specifically, in the case of mounting an imaging element, if distortion or the like occurs and flatness cannot be ensured, there is a possibility that the light incident on the imaging element is not focused and the image quality of the image obtained by imaging deteriorates.

[0008] In view of this situation, the present technology is proposed, and its object is to eliminate the influence caused by the difference in the linear expansion coefficient between the substrate and another material and to ensure a stable mounting structure for the semiconductor element.

[0009] Solutions to the Problems

[0010] The present technology has been proposed to solve the above problems, and its first aspect is a semiconductor device including: a glass substrate having a through hole penetrating the front surface and the rear surface and a stepped portion on the periphery of the through hole; and a semiconductor element bonded to the stepped portion. Therefore, there is an effect of reducing the difference in the linear expansion coefficient between the glass substrate and the semiconductor element to suppress distortion or inclination caused by the difference in the linear expansion coefficient.

[0011] Further, in this first aspect, the glass substrate may include a wiring layer on its surface. The usage mode of the glass substrate is assumed. Then, the semiconductor element may be disposed at a position where its surface is substantially in the same plane as the wiring layer. Therefore, there is an effect of enclosing the semiconductor element and the wiring layer in the glass substrate to reduce the height of the semiconductor device.

[0012] Further, in this first aspect, the stepped portion may include a first stepped portion provided on the periphery of the through hole and a second stepped portion provided on the periphery of the first stepped portion, and the semiconductor element may be bonded to the first stepped portion. Therefore, there is an effect of keeping the mounting position of the semiconductor element low.

[0013] Further, in this first aspect, the glass substrate may include a wiring layer on each of its surface and the second stepped portion. The usage mode of the glass substrate is assumed. Then, the semiconductor element may be disposed at a position where its surface is substantially in the same plane as the wiring layer on the bottom surface of the second stepped portion. Therefore, there is an effect of enclosing the semiconductor element and the wiring layer in the glass substrate to reduce the height of the semiconductor device.

[0014] Further, in this first aspect, for example, it is assumed that the semiconductor element is an imaging element. At this time, the semiconductor element may be bonded to the glass substrate on the surface on the side opposite to the light receiving portion of the imaging element. Therefore, there is an effect of ensuring the bonding area between the semiconductor element and the glass substrate. On the other hand, the semiconductor element may be bonded to the glass substrate on the surface on the side opposite to the light receiving portion of the imaging element. Therefore, there is an effect of ensuring the heat dissipation area.

[0015] Further, in this first aspect, a heat dissipation member bonded to the semiconductor element may be further provided. Therefore, there is an effect of improving heat dissipation. In this case, the heat dissipation member may be further bonded to the glass substrate. Therefore, there is an effect of further improving heat dissipation. At this time, a flexible heat sink may be used for the heat dissipation member. Further, a cladding material may be used for the heat dissipation member. Therefore, there is an effect of reducing the difference in the linear expansion coefficient of silicon to suppress distortion or tilt due to the difference in the linear expansion coefficient.

[0016] Further, in this first aspect, in the glass substrate, the side surface of the opening in the through hole may be tapered. When wet etching is used in the manufacturing process, it usually has such a tapered shape. On the other hand, in the glass substrate, the side surface of the opening in the through hole may be substantially perpendicular to the surface of the glass substrate. For this purpose, a combination with laser irradiation may be considered. Therefore, there is an effect of reducing the size in the planar direction.

[0017] Further, in this first aspect, the glass substrate may include at least two base materials joined to each other. Thus, there is an effect of forming a stepped portion vertically with high flatness on the side surface to be processed.

[0018] Further, in this first aspect, a resin having a light-shielding property covering the side surface of the opening in the through hole of the glass substrate may be further provided. Thus, in the case where the imaging element is mounted on the glass substrate, there is an effect of preventing external light from affecting the imaging element on the glass substrate.

[0019] Further, in this first aspect, a lens structure in which a plurality of lenses are laminated may be further provided, and light focused by the plurality of lenses may be incident on the imaging element. Thus, there is an effect of integrating an optical system into the semiconductor device.

[0020] Further, in this first aspect, the glass substrate may include a plurality of through holes, and a plurality of semiconductor elements joined to the stepped portions of each of the plurality of through holes may be provided. Thus, there is an effect of realizing a compound eye imaging element. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] Figure 1 is a cross-sectional view showing an example of a semiconductor device according to a first embodiment of the present technology.

[0022] Figure 2 is a cross-sectional view showing a first modification of the semiconductor device according to the first embodiment of the present technology.

[0023] Figure 3 is a cross-sectional view showing a second modification of the semiconductor device according to the first embodiment of the present technology.

[0024] Figure 4 is a cross-sectional view showing an example of a semiconductor device according to a second embodiment of the present technology.

[0025] Figure 5 is a view showing an example of a method for manufacturing a semiconductor device according to a second embodiment of the present technology.

[0026] Figure 6 is a cross-sectional view showing an example of a semiconductor device according to a third embodiment of the present technology.

[0027] Figure 7 is a cross-sectional view showing an example of a semiconductor device according to a fourth embodiment of the present technology.

[0028] Figure 8 is a cross-sectional view showing an example of a semiconductor device according to a fifth embodiment of the present technology.

[0029] Figure 9 This is a cross-sectional view showing an example of a semiconductor device according to a sixth embodiment of the present technology.

[0030] Figure 10 This is a first diagram showing an example of a method for manufacturing a semiconductor device according to a sixth embodiment of the present technology.

[0031] Figure 11 This is a second diagram showing an example of a method for manufacturing a semiconductor device according to a sixth embodiment of the present technology.

[0032] Figure 12 This is a third diagram showing an example of a method for manufacturing a semiconductor device according to a sixth embodiment of the present technology. Detailed Embodiments

[0033] Hereinafter, the modes for implementing the present technology (hereinafter referred to as embodiments) will be described. The description will be given in the following order.

[0034] 1. First Embodiment (Example of forming a through hole in a glass substrate)

[0035] 2. Second Embodiment (Example of providing a stepped portion having two steps)

[0036] 3. Third Embodiment (Example of bonding to the periphery of the light receiving surface)

[0037] 4. Fourth Embodiment (Example of vertically processing the side surface)

[0038] 5. Fifth Embodiment (Example of forming a stepped portion by bonding two base materials)

[0039] 6. Sixth Embodiment (Example of mounting two imaging elements)

[0040] <1. First Embodiment>

[0041] [Mounting Structure]

[0042] Figure 1 This is a cross-sectional view showing an example of a semiconductor device according to a first embodiment of the present technology.

[0043] The semiconductor device has a package structure in which an image sensor package 200 is bonded to a through hole of a glass substrate 100, and a heat dissipation member 300 is bonded to a surface opposite to the light receiving surface of the image sensor package 200. A lip 400 and a lens structure 500 are provided on the light receiving surface side of the image sensor package 200.

[0044] The glass substrate 100 is penetrated from the front and rear main surfaces through counterbores having different opening areas to form a stepped surface. The image sensor package 200 contacts and is bonded to the stepped surface of the glass substrate 100. Further, the heat dissipation member 300 is bonded to the surface opposite to the light receiving surface of the image sensor package 200 exposed from the through hole. It should be noted that the image sensor package 200 is an embodiment of the semiconductor element described in the claims.

[0045] The glass substrate 100 is a substrate using glass as a material. As the glass substrate 100, a material having a coefficient of thermal expansion (CTE) close to that of silicon (Si) is used. Specifically, non-alkali glasses such as Eagle-XG, EN-A1, etc. and borosilicate glasses such as PYREX (registered trademark) can be used. It should be noted that the linear expansion coefficient of silicon is 3 ppm / °C, and the linear expansion coefficient of the glass substrate 100 using the above materials is about 3 ppm / °C to 4 ppm / °C.

[0046] The heat dissipation member 300 dissipates heat generated in the glass substrate 100. As the heat dissipation member 300, clad materials such as copper indium copper (CIC), Cu-Mo-Cu (CMC), etc. are used. By using this clad material, the difference in linear expansion coefficient from silicon can be reduced. Here, the linear expansion coefficient of copper (Cu) is 16 ppm / °C, the linear expansion coefficient of indium (Inver) is 1.2 ppm / °C, and the linear expansion coefficient of molybdenum (Mo) is 5.1 ppm / °C. The linear expansion coefficient of the clad material is about 8 ppm / °C to 13 ppm / °C. Therefore, it can be regarded as more advantageous than dissipating heat using a copper plate (linear expansion coefficient of 16 ppm / °C), etc.

[0047] In other words, the difference in linear expansion coefficient between the glass substrate 100 and the image sensor package 200 and between the heat dissipation member 300 and the image sensor package 200 is reduced. Therefore, distortion or tilt due to the difference in linear expansion coefficient can be suppressed.

[0048] A through hole is formed by connecting counterbores having different opening areas from the upper and lower surfaces of the glass substrate 100, and a stepped portion is formed around the through hole. In this embodiment, the side surface of the opening of the stepped portion forms a tapered shape. For example, an image sensor package 200 including an imaging element, a processing circuit, etc. is formed by including wafer level packaging (WLP). The image sensor package is then separated into individual chips and brought into contact with and mounted on the stepped portion of the glass substrate 100 located on the surface opposite to the light receiving portion.

[0049] In the glass countersink process, the flatness of the bottom surface is several μm or less, and the height change between the glass surface and the stepped portion is as small as ten μm to several μm or less. Therefore, distortion or tilt caused by initial shape change can be reduced.

[0050] A pad is formed on the light-receiving surface of the image sensor package 200 and is bonded to a pad formed as a wiring layer 140 on the surface of the glass substrate 100 via a bonding wire 210.

[0051] A dam material 230 is formed on the light-receiving surface side of the image sensor package 200 to surround the light-receiving portion, and a light-shielding resin 220 is potted from the periphery of the dam material 230 to the side surface of the countersink hole. It should be noted that the light-shielding resin 220 is an example of the light-shielding resin 220 described in the claims.

[0052] The surface of the glass substrate 100 is covered with a lip 400 to protect the image sensor package 200. A light-shielding film 410 is patterned on the lip 400 to limit the light incident on the light-receiving portion.

[0053] Furthermore, the surface of the glass substrate 100 is covered with a lens structure 500 to cover the lip 400, and light is collected. The light collected by the lens structure 500 is incident on the light-receiving surface of the image sensor package 200.

[0054] In the drawing, t1 is the countersink depth on the front surface side of the glass substrate 100, and t2 is the countersink depth on the back surface of the glass substrate 100. In other words, t1 represents the distance from the front surface of the glass substrate 100 to the stepped portion. Here, it is preferable that t1 is substantially the same as the thickness of the image sensor package 200. Therefore, the height of the pad on the glass substrate 100 side is substantially the same as the height of the pad on the image sensor package 200 side, the loop height of the bonding wire 210 can be reduced, and interference between the bonding wire 210 and the lip 400 can be reduced.

[0055] As described above, according to the first embodiment of the present technology, the image sensor package 200 is bonded to a stepped portion provided on the periphery of the through hole of the glass substrate 100 so that distortion or tilt between the reference surface and the light-receiving surface caused by the difference in linear expansion coefficients can be reduced, and a stable mounting structure can be ensured. Further, since the mounting components can be included in the glass substrate 100, the height of the semiconductor device can be reduced.

[0056] [First Variation Example]

[0057] Figure 2 It is a cross-sectional view showing a first variation example of a semiconductor device according to the first embodiment of the present technology.

[0058] In the above-described first embodiment, the pads located on the light-receiving surface of the image sensor package 200 are electrically connected to the wiring layer 140 located on the surface of the glass substrate 100 via bonding wires 210. On the other hand, in this first modification, a through electrode 160 that connects the stepped portion of the glass substrate 100 and the rear surface of the glass substrate 100 is provided, and this through electrode 160 is used for electrical connection. Therefore, it is not necessary to take out the electrodes from the rear surface of the image sensor package 200 to form the bonding wires 210 on the light-receiving surface side. Thus, interference between the bonding wires 210 and the lip portion 400 can be eliminated.

[0059] [Second Modification Example]

[0060] Figure 3 FIG. is a cross-sectional view showing a second modification example of a semiconductor device according to the first embodiment of the present technology.

[0061] In the above-described first embodiment, a cladding material is used as the heat dissipation member 300. On the other hand, in this second modification example, a graphite sheet (i.e., a flexible heat sink) is used as the heat dissipation member 310. Since the heat dissipation member 310 has flexibility, bonding can be performed by following the shape of the counterbore on the rear surface side of the glass substrate 100, and the rear surface of the image sensor package 200 and the rear surface of the glass substrate 100 can be continuously covered. Therefore, heat generated from the image sensor package 200 can be diffused over the entire rear surface of the glass substrate 100, thereby improving heat dissipation.

[0062] Here, the smaller the depth t2 of the counterbore on the rear surface of the glass substrate 100, the smaller the step, and thus the graphite sheet as the heat dissipation member 310 can easily follow. However, if t2 is small, the rigidity of the stepped portion of the glass substrate 100 joined to the image sensor package 200 becomes small, and thus cracks may occur. Therefore, it is necessary to set t2 by balancing the rigidity of the stepped portion of the glass substrate 100 and the step followability of the graphite sheet as the heat dissipation member 310.

[0063] <2. Second Embodiment>

[0064] [Mounting Structure]

[0065] Figure 4 FIG. is a cross-sectional view showing an example of a semiconductor device according to the second embodiment of the present technology.

[0066] In this second embodiment, the stepped portion of the glass substrate 100 has two steps. In this structure, the image sensor package 200 is brought into contact with and joined to the first step of the stepped portion (i.e., the deepest step when viewed from the surface of the glass substrate 100). Further, it is electrically connected to the second step of the stepped portion via the bonding wire 210.

[0067] Here, it is preferable that the depth t1 of the counterbore on the front surface side of the glass substrate 100 is equal to or greater than the circuit height of the bonding wire 210. Therefore, interference between the bonding wire 210 and the lip 400 can be avoided in a manner similar to the above-described first embodiment.

[0068] Furthermore, it is preferable that the depth t2 of the counterbore on the rear surface of the glass substrate 100 is substantially the same as the thickness of the image sensor package 200. Therefore, the pad surfaces on the glass substrate 100 side and the image sensor package 200 side have the same height, and the circuit height of the bonding wire 210 can be reduced.

[0069] [Manufacturing Method]

[0070] Figure 5 FIG. is a diagram showing an example of a method for manufacturing a semiconductor device according to the second embodiment of the present technology.

[0071] First, a glass substrate 100 as a base material is prepared, through holes 110 are formed, and after electroplating is applied to the inside of the through holes 110, metal is embedded inside to form through electrodes 120. Then, as shown in a of the drawings, wiring layers 140 are formed on both surfaces of the glass substrate 100.

[0072] Next, as shown in b of the drawings, a resist 151 is patterned to protect portions of the glass substrate 100 other than the position of the first step where the stepped portion is formed, and the open portion is wet-etched. Therefore, as shown in c of the drawings, the first step of the stepped portion 191 is formed. It should be noted that the stepped portion 191 is an example of the second stepped portion described in the claims.

[0073] Next, as shown in d of the drawings, resists 152 and 153 are patterned to protect portions of the glass substrate 100 other than the positions of the second step of the stepped portion and the through holes, and the open portion is wet-etched. Therefore, as shown in e of the drawings, the second step of the stepped portion 192 and the through hole 193 are formed. It should be noted that the stepped portion 192 is an example of the first stepped portion described in the claims.

[0074] It should be noted that, for example, as this etching process, it is considered that it is easy to perform the etching process by injecting an etching solution while transporting the glass substrate 100 in the horizontal direction.

[0075] As described above, in the second embodiment of the present technology, the stepped portion of the glass substrate 100 has two steps, the image sensor package 200 is bonded to the deeper stepped portion, and the bonding wire 210 is formed in the shallower stepped portion. Therefore, interference between the bonding wire 210 and the lip 400 can be avoided.

[0076] <3. Third Embodiment>

[0077] [Mounting Structure]

[0078] Figure 6 It is a cross-sectional view showing an example of a semiconductor device according to the third embodiment of the present technology.

[0079] In the above-described first embodiment, the image sensor package 200 is bonded to the glass substrate 100 on the surface on the side opposite to the light receiving portion. However, in the third embodiment, the image sensor package 200 is bonded to the glass substrate 100 on the light receiving surface. Therefore, a margin is provided on the periphery of the light receiving portion on the light receiving surface of the image sensor package 200, and the margin portion is bonded to the stepped portion.

[0080] The dam material 230 is formed on the periphery of the light receiving portion. Pads for electrical connection are formed between the dam material 230 and the margin portion and are electrically connected to pads formed on the surface of the glass substrate 100 through bonding wires 210.

[0081] The depth t2 of the counterbore on the rear surface of the glass substrate 100 is substantially the same as the thickness of the image sensor package 200, and the rear surface of the glass substrate 100 and the rear surface of the image sensor package 200 are located on substantially the same plane. The heat dissipation member 320 is bonded to the rear surfaces of the glass substrate 100 and the image sensor package 200. Therefore, the area of the heat dissipation member 320 can be widely ensured so that heat dissipation can be improved. Further, since this structure can ensure a long distance from the surface of the glass substrate 100 to the light receiving surface, the focal length of the lens can be increased.

[0082] As described above, according to the third embodiment of the present technology, the rear surface of the glass substrate 100 and the rear surface of the image sensor package 200 are provided on substantially the same plane so that the area of the heat dissipation member 320 can be widely ensured and heat dissipation can be improved.

[0083] <4. Fourth Embodiment>

[0084] [Mounting Structure]

[0085] Figure 7 It is a cross-sectional view showing an example of a semiconductor device according to the fourth embodiment of the present technology.

[0086] Since wet etching is a prerequisite in the above-described first embodiment, the side surface of the opening of the stepped portion is formed in a tapered shape. On the other hand, in the fourth embodiment, the glass substrate 100 is vertically processed by using laser irradiation and etching treatment during the counterbore processing.

[0087] In other words, vertical processing can be achieved by irradiating with a laser to change the glass in the thickness direction and performing wet etching starting from the changed portion. In this case, since wet etching can be completed in a short time, tapering can be suppressed and miniaturization can be achieved in the planar direction.

[0088] As described above, according to the fourth embodiment of the present technology, laser irradiation and etching treatment are used during the counterbore processing of the glass substrate 100, so as to prevent the side surface of the stepped portion from becoming tapered and enable miniaturization in the planar direction.

[0089] <5. Fifth Embodiment>

[0090] [Mounting Structure]

[0091] Figure 8 FIG. is a cross-sectional view showing an example of a semiconductor device according to the fifth embodiment of the present technology.

[0092] In the above-described first embodiment, it is assumed that a through hole is formed by performing counterbore processing on one glass substrate 100. On the other hand, in this fifth embodiment, two or more glass substrates 101 and 102 having through holes of different sizes are joined together to form a stepped portion.

[0093] During the formation of the through hole, etching treatment, laser irradiation and etching treatment, machining, sandblasting, etc. can be used. Specifically, since the plating material can be polished, manufacturing can be performed with high flatness. Therefore, the side surface of the stepped portion can be vertically formed in a manner similar to the above-described fourth embodiment. Therefore, tapering is suppressed so that miniaturization can be achieved in the planar direction.

[0094] As described above, according to the fifth embodiment of the present technology, two or more glass substrates 101 and 102 having through holes of different sizes are joined so as to prevent the side surface of the stepped portion from becoming tapered and enable miniaturization in the planar direction.

[0095] <6. Sixth Embodiment>

[0096] [Mounting Structure]

[0097] Figure 9 FIG. is a cross-sectional view showing an example of a semiconductor device according to the sixth embodiment of the present technology.

[0098] In the above-described first embodiment, it is assumed that one image sensor package 200 is mounted. On the other hand, in this sixth embodiment, two or more image sensor packages 200 are mounted. Therefore, a compound eye of the imaging device is designed. In other words, a mounting structure in which a plurality of imaging devices 11 and 12 are integrated is realized.

[0099] Even if the mounting area is enlarged due to the compound eye, by using the glass substrate 100, it is possible to reduce the initial distortion or tilt and the distortion or tilt caused by the difference in linear expansion coefficients.

[0100] [Manufacturing Method]

[0101] Figures 10 to 12 It is a diagram showing an example of a method for manufacturing a semiconductor device according to the sixth embodiment of the present technology.

[0102] First, as shown in a of the attached drawings, a glass substrate 100 is prepared as a base material. Then, as shown in b of the attached drawings, a through-hole 110 is formed. As shown in c of the attached drawings, after applying electroplating 121 such as copper to the inside of the through-hole 110, as shown in d of the attached drawings, a metal 131 such as copper is embedded inside, and a through electrode 120 is formed. Then, as shown in e of the attached drawings, wiring layers 140 are formed on both surfaces of the glass substrate 100.

[0103] Next, as shown in f of the attached drawings, the resist 150 is patterned to protect portions of the glass substrate 100 other than the positions where the through-holes are formed, and the open portions are wet-etched. At this time, resists 150 having different sizes are formed on both surfaces of the glass substrate 100 to form a stepped portion. After the wet etching, the resist 150 is removed to obtain the cross-sectional structure shown in g of the attached drawings.

[0104] Next, as shown in h of the attached drawings, the image sensor package 200 is brought into contact with and bonded to the stepped portion of the glass substrate 100. Then, as shown in i of the attached drawings, the heat dissipation component 300 is bonded to the surface opposite to the light receiving surface of the image sensor package 200. As shown in j of the attached drawings, a bonding of a bonding wire 210 is formed between the pad of the wiring layer 140 of the glass substrate 100 and the image sensor package 200.

[0105] Next, as shown in k of the attached drawings, a lip 400 is formed on the light receiving surface side of the image sensor package 200. Then, as shown in 1 of the attached drawings, a lens structure 500 is formed to cover the lip 400.

[0106] It should be noted that this manufacturing method can also be applied to the above-mentioned other embodiments. Further, since the compound eye mounting structure in the sixth embodiment is assumed in this embodiment, an example in which the lip 400 and the lens structure 500 are mounted before cutting is shown. However, these can be mounted after cutting.

[0107] As described above, according to the sixth embodiment of the present technology, by using the glass substrate 100, it is possible to reduce the initial distortion and tilt, as well as the torque and tilt caused by the difference in the linear expansion coefficient, while mounting two or more image sensor packages 200.

[0108] It should be noted that the above embodiments illustrate examples for covering the present technology, and the subject matter in the embodiments and the subject matter of the present invention in the specified claims have a corresponding relationship with each other. Similarly, the subject matter of the present invention in the specified claims and the subject matter in the embodiments of the present technology with the same name have a corresponding relationship with each other. However, the present technology is not limited to the embodiments, and can be covered by applying various modifications to the embodiments without departing from its essence.

[0109] It should be noted that the effects described in this specification are only examples and are not limited, and further, there may be other effects.

[0110] It should be noted that the present technology can have the following configurations.

[0111] (1) A semiconductor device, comprising:

[0112] A glass substrate having a through hole penetrating the front and rear surfaces and a stepped portion located on the periphery of the through hole; and

[0113] A semiconductor element bonded to the stepped portion.

[0114] (2) The semiconductor device according to (1) above,

[0115] wherein the glass substrate includes a wiring layer on its surface.

[0116] (3) The semiconductor device according to (2) above,

[0117] wherein the semiconductor element is disposed at a position where its surface is substantially in the same plane as the wiring layer.

[0118] (4) The semiconductor device according to (1) above,

[0119] wherein the stepped portion includes a first stepped portion provided on the periphery of the through hole and a second stepped portion provided on the periphery of the first stepped portion; and

[0120] The semiconductor element is bonded to the first stepped portion.

[0121] (5) The semiconductor device according to (4) above,

[0122] wherein the glass substrate includes a wiring layer on each of its surface and the second stepped portion.

[0123] (6) The semiconductor device according to (5) above,

[0124] wherein the semiconductor element is disposed at a position where the surface thereof and the wiring layer on the bottom surface of the second step portion are substantially in the same plane.

[0125] (7) The semiconductor device according to any one of (1) to (6) above,

[0126] wherein the semiconductor element is an imaging element.

[0127] (8) The semiconductor device according to (7) above,

[0128] wherein the semiconductor element is bonded to a glass substrate on a surface located on a side opposite to the light receiving portion of the imaging element.

[0129] (9) The semiconductor device according to (7) above,

[0130] wherein the semiconductor element is bonded to a glass substrate on the periphery of the light receiving portion of the imaging element.

[0131] (10) The semiconductor device according to any one of (1) to (9) above, further comprising:

[0132] a heat dissipation member bonded to the semiconductor element.

[0133] (11) The semiconductor device according to (10) above,

[0134] wherein the heat dissipation member is further bonded to the glass substrate.

[0135] (12) The semiconductor device according to (10) or (11) above,

[0136] wherein the heat dissipation member is a flexible heat sink.

[0137] (13) The semiconductor device according to (10) above,

[0138] wherein the heat dissipation member is a cladding material.

[0139] (14) The semiconductor device according to any one of (1) to (13) above,

[0140] wherein, in the glass substrate, the side surface of the opening in the through hole is tapered.

[0141] (15) The semiconductor device according to any one of (1) to (13) above,

[0142] wherein, in the glass substrate, the side surface of the opening in the through hole is substantially perpendicular to the surface of the glass substrate.

[0143] (16) The semiconductor device according to any one of (1) to (15) above,

[0144] wherein the glass substrate includes at least two base materials bonded to each other.

[0145] (17) The semiconductor device according to any one of (1) to (16) above, further comprising: a resin having a light-shielding property that covers a side surface of an opening in a through hole of the glass substrate.

[0146] (18) The semiconductor device according to (7) above, further comprising:

[0147] a lens structure in which a plurality of lenses are laminated;

[0148] wherein light focused by the plurality of lenses is incident on the imaging element.

[0149] (19) The semiconductor device according to any one of (1) to (18) above,

[0150] wherein the glass substrate includes a plurality of through holes; and

[0151] a plurality of semiconductor elements are provided that are bonded to step portions of each of the plurality of through holes.

[0152] List of reference numerals

[0153] 11, 12 Imaging device

[0154] 100 to 102 Glass substrate

[0155] 110 Through hole

[0156] 120 Through electrode

[0157] 121 Electroplating

[0158] 131 Metal

[0159] 140 Wiring layer

[0160] 150 to 152 Resist

[0161] 160 Through electrode

[0162] 191, 192 Step portion

[0163] 193 Through hole

[0164] 200 Image sensor package

[0165] 210 Bonding wire

[0166] 220 Light-shielding resin

[0167] 230 Dam materials

[0168] 300, 310, 320 Heat dissipation components

[0169] 400 Lip

[0170] 410 Light-shielding film

[0171] 500 Lens structure.

Claims

1. A semiconductor device, comprising: a glass substrate having a through hole penetrating a front surface and a rear surface and a stepped portion located on a periphery of the through hole; and a semiconductor element bonded to the stepped portion, wherein the glass substrate includes a wiring layer on its surface, wherein the semiconductor element is disposed at a position where its surface is in the same plane as the wiring layer.

2. The semiconductor device according to claim 1, wherein the stepped portion includes a first stepped portion provided on the periphery of the through hole and a second stepped portion provided on a periphery of the first stepped portion; and the semiconductor element is bonded to the first stepped portion.

3. The semiconductor device according to claim 2, wherein the glass substrate includes wiring layers on each of its surface and the second stepped portion.

4. The semiconductor device according to claim 3, wherein the semiconductor element is disposed at a position where its surface is in the same plane as the wiring layer on a bottom surface of the second stepped portion.

5. The semiconductor device according to claim 1, wherein the semiconductor element is an imaging element.

6. The semiconductor device according to claim 5, wherein the semiconductor element is bonded to the glass substrate on a surface located on a side opposite to a light receiving portion of the imaging element.

7. The semiconductor device according to claim 5, wherein the semiconductor element is bonded to the glass substrate on a periphery of the light receiving portion of the imaging element.

8. The semiconductor device according to claim 1, further comprising: a heat dissipation member bonded to the semiconductor element.

9. The semiconductor device according to claim 8, wherein the heat dissipation member is further bonded to the glass substrate.

10. The semiconductor device according to claim 8, wherein the heat dissipation member is a flexible heat sink.

11. The semiconductor device according to claim 8, wherein the heat dissipation member is a cladding material.

12. The semiconductor device according to claim 1, wherein in the glass substrate, a side surface of an opening in the through hole is tapered.

13. The semiconductor device according to claim 1, wherein in the glass substrate, the side surface of the opening in the through hole is perpendicular to the surface of the glass substrate.

14. The semiconductor device according to claim 1, wherein the glass substrate includes at least two base materials bonded to each other.

15. The semiconductor device according to claim 1, further comprising: a resin having a light shielding property covering a side surface of an opening in the through hole of the glass substrate.

16. The semiconductor device according to claim 5, further comprising: a lens structure in which a plurality of lenses are laminated; wherein light focused by the plurality of lenses is incident on the imaging element.

17. The semiconductor device according to claim 1, wherein the glass substrate includes a plurality of through holes; and a plurality of the semiconductor elements are provided which are bonded to the stepped portions of each of the plurality of through holes.

Citation Information

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