Method of forming a layer comprising nitrogen-containing vanadium and structures comprising the same

Abstract

The present disclosure relates to methods of forming a vanadium nitride-containing layer. The methods include providing a substrate within a reaction chamber of a reactor and depositing a vanadium nitride-containing layer on a surface of the substrate, where the deposition process includes providing a vanadium precursor to the reaction chamber and providing a nitrogen precursor to the reaction chamber. The present disclosure also relates to structures and devices including a vanadium nitride-containing layer.

Description

Technical Field

[0001] This disclosure generally relates to methods and systems suitable for producing thin films. More particularly, this disclosure relates to methods and systems for producing vanadium nitride-containing layers by deposition processes, and structures comprising the same. Background Technology

[0002] Miniaturization of semiconductor devices, such as complementary metal-oxide-semiconductor (CMOS) devices, has led to significant improvements in the speed and density of integrated circuits. However, conventional device miniaturization techniques face major challenges at future technology nodes.

[0003] For example, one challenge is finding a suitable conductive material for use as the gate electrode in CMOS devices. CMOS devices conventionally use n-type doped polysilicon as the gate electrode material. However, doped polysilicon may not be an ideal gate electrode material for advanced node applications. Although doped polysilicon is conductive, a surface region capable of depleting charge carriers may still exist under bias conditions. This region may manifest as additional gate insulator thickness, commonly referred to as gate depletion, and may affect the equivalent oxide thickness. While the gate depletion region may be thin, approximately a few angstroms... However, in advanced node applications, the gate depletion region can become apparent as the gate oxide thickness decreases. As another example, polysilicon does not possess an ideal effective work function (eWF) for either NMOS or PMOS devices. To overcome the non-ideal eWF of doped polysilicon, threshold voltage-regulated injection can be used. However, as device geometry shrinks in advanced node applications, threshold voltage-regulated injection processes may become increasingly complex and impractical.

[0004] To overcome the problems associated with doped polysilicon gate electrodes, alternative materials such as metals like titanium nitride layers can be used instead of polysilicon gate materials. Titanium nitride layers can provide a more desirable efficient work function for CMOS applications. However, in some cases where a higher work function value than that obtained with titanium nitride layers is desired—for example, in the PMOS region of CMOS devices—improved materials are needed. Such materials are suitable for electrode / capacitor applications, such as for gate electrodes, threshold voltage tuning, p-dipole shifters, or dynamic random access memory (DRAM) applications.

[0005] Any discussion introduced in this disclosure, including the discussion of the problems and solutions set forth in this section, is introduced solely for the purpose of providing context for this disclosure. Such discussion should not be construed as an admission that any or all information was known at the time of making this invention or otherwise constitutes prior art. Summary of the Invention

[0006] This invention may introduce a series of simplified concepts, which may be described in further detail below. This invention is not intended to define any key or essential features of the claimed subject matter, nor is it intended to limit the scope of the claimed subject matter.

[0007] Various embodiments of this disclosure relate to methods for forming vanadium nitride-containing layers, structures and devices formed using such methods, and apparatus for performing said methods and / or for forming said structures and / or devices. While the ways in which various embodiments of this disclosure address the shortcomings of existing methods and systems will be discussed in more detail below, in general, various embodiments of this disclosure provide improved methods for forming vanadium nitride-containing layers having relatively high work function values. Alternatively or additionally, one or more vanadium precursors may be used to form vanadium nitride-containing layers. Furthermore, thermal cycling deposition processes may be used to form exemplary vanadium nitride-containing layers. They may also be formed using plasma or plasma-activated species.

[0008] In this disclosure, depending on the context, "gas" may include materials that are gaseous at normal temperature and pressure (NTP), vaporized solids and / or vaporized liquids, and may consist of a single gas or a mixture of gases. Non-process gases, i.e., gases introduced without passing through gas distribution components, other gas distribution devices, etc., may be used to, for example, seal the reaction space, and may include sealing gases such as rare gases.

[0009] The term "precursor" can refer to a compound that participates in a chemical reaction to produce another compound. The terms reactant and precursor are used interchangeably. The term "inert gas" can refer to a gas that does not participate in a chemical reaction and / or is not part of the layer to a perceptible extent. Exemplary inert gases include He and Ar and any combination thereof. In some cases, molecular nitrogen and / or hydrogen may be inert gases.

[0010] As used herein, the term "purge" can refer to a procedure in which an inert or substantially inert gas is supplied to a reactor chamber between two gas pulses that react with each other. For example, a purging or purging action, such as using nitrogen, can be provided between pulses of two precursors to avoid or at least minimize gas-phase interactions between the two precursors. It should be understood that purging can be performed temporally, spatially, or both. For example, in the case of temporal purging, the purging steps can be used, for example, in the temporal sequence of supplying a first precursor to the reactor chamber, supplying a purge gas to the reactor chamber, and supplying a second precursor to the reactor chamber, wherein the substrate to which the deposited layer is deposited is not moved. For example, in the case of spatial purging, the purging step can take the form of moving the substrate from a first position where the first precursor is continuously supplied via a purge gas curtain to a second position where the second precursor is continuously supplied.

[0011] As used herein, the term "substrate" can refer to any one or more underlying materials that can be used to form structures, devices, circuits, or layers, or on which structures, devices, circuits, or layers can be formed. A substrate may include a bulk material such as silicon (e.g., monocrystalline silicon), other group IV materials such as germanium, or other semiconductor materials such as group II-VI or III-V semiconductor materials, and may include one or more layers stacked on or beneath the bulk material. Furthermore, a substrate may include various features such as recesses, protrusions, etc., formed within or on at least a portion of the layers of the substrate. For example, a substrate may include a bulk semiconductor material and an insulating or dielectric material layer stacked on at least a portion of the bulk semiconductor material.

[0012] As used herein, the terms “film” and / or “layer” can refer to any continuous or discontinuous structure and material, such as materials deposited by the methods disclosed herein. For example, films and / or layers can include two-dimensional materials, three-dimensional materials, nanoparticles, or even partially or entirely molecular layers, or partially or entirely atomic layers, or clusters of atoms and / or molecules. A “film” or “layer” can comprise a material or layer with pinholes, which can be at least partially continuous. A seed layer can be a discontinuous layer used to increase the nucleation rate of another material. However, a seed layer can also be substantially or completely continuous.

[0013] As used herein, "structure" can be or may include a substrate as described herein. A structure may include one or more layers stacked on the substrate, such as one or more layers formed according to the methods of this disclosure.

[0014] The term "cyclic deposition process" or "periodic deposition process" can refer to the sequential introduction of precursors (and / or reactants) into a reaction chamber to deposit a layer over a substrate and includes processing techniques such as atomic layer deposition (ALD), cyclic chemical vapor deposition (cyclic CVD), and hybrid cyclic deposition processes that include ALD components and cyclic CVD components. The process may include a purging step between the introduction of precursors.

[0015] The term "atomic layer deposition" can refer to a vapor deposition process in which deposition cycles, typically multiple consecutive deposition cycles, are performed in a process chamber. When performed using alternating pulses of precursor / reactive gas and purge gas (e.g., inert carrier gas), as used herein, the term "atomic layer deposition" is also intended to include processes specified by related terms such as chemical vapor deposition.

[0016] Typically, for ALD processes, during each cycle, a precursor is introduced into the reaction chamber and chemisorbed onto the deposition surface (e.g., a substrate surface, which may contain previously deposited material from previous ALD cycles or other materials), forming a nearly monolayer or submonolayer material that is not readily reactive with additional precursors (i.e., a self-limiting reaction). Subsequently, in some cases, reactants (e.g., another precursor or reactive gas) may be introduced into the process chamber to convert the chemisorbed precursor into the desired material on the deposition surface. The reactants may be able to react further with the precursor. During one or more cycles, such as during each step of each cycle, a purging step may be employed to remove any excess precursor from the process chamber and / or any excess reactants and / or reaction byproducts from the reaction chamber.

[0017] As used herein, a "vanadium nitride-containing layer" can be a layer of material represented by a chemical formula comprising vanadium and nitrogen. The vanadium nitride layer may contain additional elements, such as oxygen (e.g., vanadium oxynitride layer). In some embodiments, the vanadium nitride-containing layer may contain a large proportion of other elements besides vanadium and nitrogen. In some embodiments, the vanadium nitride-containing layer comprises vanadium nitride (VN). In some embodiments, the vanadium nitride-containing layer may contain, for example, 80, 90, 95, or 99 atomic percentages (at%) of VN. In some embodiments, the vanadium nitride-containing layer may consist substantially of vanadium nitride. In some embodiments, the vanadium nitride-containing layer may consist of vanadium nitride. The layer composed of vanadium nitride may contain acceptable amounts of impurities, such as oxygen, carbon, chlorine, or other halogens and / or hydrogen that may originate from one or more precursors used to deposit the vanadium nitride-containing layer.

[0018] In some embodiments, the vanadium content of the vanadium nitride layer is at least 1.0 atomic percentage to at most 99.0 atomic percentage, or at least 3.0 atomic percentage to at most 97.0 atomic percentage, or at least 5.0 atomic percentage to at most 95.0 atomic percentage, or at least 10.0 atomic percentage to at most 90.0 atomic percentage, or at least 20.0 atomic percentage to at most 80.0 atomic percentage, or at least 30.0 atomic percentage to at most 70.0 atomic percentage, or at least 40.0 atomic percentage to at most 60.0 atomic percentage.

[0019] In some embodiments, the nitrogen content of the vanadium nitride-containing layer is at least 1.0 atomic percentage to at most 99.0 atomic percentage, or at least 3.0 atomic percentage to at most 97.0 atomic percentage, or at least 5.0 atomic percentage to at most 95.0 atomic percentage, or at least 10.0 atomic percentage to at most 90.0 atomic percentage, or at least 20.0 atomic percentage to at most 80.0 atomic percentage, or at least 30.0 atomic percentage to at most 70.0 atomic percentage, or at least 40.0 atomic percentage to at most 60.0 atomic percentage.

[0020] As used herein, vanadium precursors include gases or materials that can be converted into a gaseous state and can be represented by chemical formulas including vanadium, such as one or more of vanadium halides, alkylaminovanadium compounds, and amidine vanadium compounds. Vanadium precursors can be organic or inorganic molecules.

[0021] The term nitrogen precursor can refer to a gas or a material that can be converted into a gaseous state and can be represented by a chemical formula that includes nitrogen. In some cases, the chemical formula includes both nitrogen and hydrogen. In some cases, nitrogen precursors do not include diatomic nitrogen.

[0022] If the amount of material deposited per surface area or per volume on the first surface material (e.g., at / cm²) 2 or at / cm 3 If the amount of material deposited on the first surface material is greater than the amount deposited per surface area or per volume on the second surface material, then the deposition is generally defined as selective. The amount of material deposited on the surface material can be determined by measuring the thickness of each layer. In some cases, the thickness may not be measurable because the film is discontinuous. In some cases, selectivity can be determined by measuring the number of atoms deposited per surface area or per volume. As mentioned above, selectivity can be expressed as the ratio of the amount of material formed on the first surface material to the total amount of material formed on both the first and second surface materials.

[0023] The deposition selectivity on the first surface material relative to the second surface material can be given as a percentage, calculated as: [(deposition on the first surface material) - (deposition on the second surface material)] / (deposition on the first surface material). Deposition can be measured using any of a variety of methods. For example, deposition can be given by a measured thickness of the deposited material, or by a measured amount of material that can be deposited. In the embodiments described herein, selective deposition of a vanadium nitride-containing layer can be performed on the first surface material relative to the second surface material.

[0024] The selectivity is preferably greater than about 70%, greater than about 80%, more preferably greater than 90%, even more preferably greater than 95%, and most preferably about 100%. In some cases, for certain applications, a selectivity of more than 80% is acceptable. In some cases, for certain applications, a selectivity of more than 50% is acceptable.

[0025] Furthermore, in this disclosure, any two numbers of a variable may constitute a working range of the variable, and any indicated range may include or exclude endpoints. Additionally, any indicated variable value (whether or not it is indicated by “about”) may refer to an exact value or an approximate value and includes equivalent values, and may refer to an average, median, representative value, multi-value, etc. Furthermore, in some embodiments of this disclosure, the terms “comprising,” “consisting of,” and “having” independently mean “generally or broadly comprising,” “including,” “substantially consisting of,” or “consisting of.” In some embodiments of this disclosure, the meaning of any definition does not necessarily exclude the common and conventional meaning. Attached Figure Description

[0026] The accompanying drawings, which are included to provide a further understanding of the present disclosure and form part of the specification, illustrate exemplary embodiments and, together with the description, help to explain the principles of the present disclosure. In the drawings...

[0027] Figure 1 This illustrates the method according to the present disclosure.

[0028] Figure 2 An embodiment of the method according to this disclosure is illustrated.

[0029] Figure 3 The structure of a vanadium nitride-containing layer according to the present disclosure is depicted.

[0030] Figure 4 Another exemplary structure according to this disclosure is depicted.

[0031] Figure 5 Another exemplary structure according to this disclosure is shown.

[0032] Figure 6 The deposition apparatus according to the present disclosure is presented schematically. Detailed Implementation

[0033] The descriptions of exemplary embodiments of methods, structures, devices, and apparatuses provided below are merely illustrative and intended for purposes of illustration only. The following description is not intended to limit the scope of this disclosure or the claims. Furthermore, the description of multiple embodiments having the stated features is not intended to exclude other embodiments having additional features or other embodiments incorporating different combinations of the stated features. For example, various embodiments are set forth as exemplary embodiments and may be recited in the dependent claims. Unless otherwise stated, exemplary embodiments or components thereof may be combined or applied separately from each other.

[0034] This disclosure relates to a method for forming a vanadium nitride-containing layer. The method includes providing a substrate within a reaction chamber of a reactor and depositing a vanadium nitride-containing layer onto the surface of the substrate. In the method according to this disclosure, the deposition process includes (e.g., sequentially and separately) providing a vanadium precursor to the reaction chamber and providing a nitrogen precursor to the reaction chamber.

[0035] The methods according to this disclosure can be used to generate structures containing vanadium nitride layers and devices containing vanadium nitride layers. The vanadium nitride layers and structures according to this disclosure can be used as work function metals in metal gates, pads / barriers, metal electrodes (DRAM, logic, 3D NAND), and p-metal gates for logic, and also as dipole (p) tuning layers for logic and other applications.

[0036] The method according to this disclosure can be carried out in small batches in a single-wafer reactor or a space reactor in a batch processing tool such as a vertical furnace.

[0037] In one embodiment, the vanadium precursor may comprise an organic compound. In another embodiment, the vanadium precursor may comprise an inorganic compound.

[0038] Organovanadium precursors may include one or more of the following: alkylaminovanadium precursors, dialkylaminovanadium precursors, amidine vanadium precursors, vanadium alcohol precursors, vanadium oxovanadium alkoxide precursors, vanadium β-diketoate precursors, and cyclopentadienylvanadium precursors.

[0039] Throughout this disclosure, the following abbreviations shall be used: Me represents methyl (CH3), and Et represents ethyl (C2H5). n Pr represents n-propyl. i Pr stands for isopropyl. n Bu represents n-butyl. t Bu stands for tert-butyl. n Pn represents n-pentyl. t Pn represents tert-pentyl. AMD represents acetamidine, while FMD represents methyltamidine.

[0040] Examples of alkylaminovanadium precursors include V(NMe2)4, V(NEt2)4, and V(NEtMe)4. Exemplary dialkylaminovanadium precursors include V(NMe2)4, V(NEt2)4, and V(NEtMe)4 (named tetra(dimethylamino)vanadium(IV), tetra(diethylamino)vanadium(IV), and tetra(ethylmethylamino)vanadium(IV), respectively).

[0041] Examples of amidine-based vanadium precursors include V( i PrAMD)3、V( t BuAMD)3、V( i PrFMD)3 and V( tBuFMD)3. Examples of vanadium alkoxide precursors include V(OMe)4, V(OEt)4, and V(O n Pr)4、V(O i Pr)4、V(O i Bu)4、V(O t Bu)4、V(O t Pn)4 and V(O n Pn)4. In addition, examples of vanadium oxyalkoxide precursors include VO(OMe)3, VO(OEt)3, and VO(O)4. n Pr)3、VO(O i Pr)3、VO(O i Bu)3、VO(O t Bu)3、VO(O t Pn)3 and VO(O n Pn)3.

[0042] Examples of β-diketoate vanadium precursors include V(acac)3(tri-(2,4-pentanedione acid)vanadium(IV)), V(thd)3(tri-(2,2,6,6-tetramethyl-3,5-heptadecanoic acid)vanadium(IV)), V(hfac)3(tri-(1,1,1,5,5,5-hexafluoro-2,4-pentanedione acid)vanadium(IV)), VO(acac)2(oxobis(2,4-pentanedione acid)vanadium(IV)), VO(thd)2(oxobis(2,2,6,6-tetramethyl-3,5-heptadecanoic acid)vanadium(IV)) and VO(hfac)2(oxobis(1,1,1,5,5,5-hexafluoro-2,4-pentanedione acid)vanadium(IV)).

[0043] Cyclopentadienylvanadium precursors include VCP2Cl2, VCP2, and VCP2(CO)4 (named bis(cyclopentadienyl)vanadium(IV), bis(cyclopentadienyl)vanadium(II), and tetracarbonylcyclopentadienylvanadium, respectively)). Other exemplary cyclopentadienylvanadium compounds include variations of these compounds, wherein Cp is unsubstituted or contains one or more alkyl groups, such as MeCp, EtCp, iPrCp, etc.

[0044] Examples of inorganic vanadium precursors include vanadium halide precursors and vanadium halide precursors. Vanadium halide precursors can be selected from vanadium fluoride, vanadium chloride, vanadium bromide, vanadium iodide, etc. Vanadium halide precursors can be selected from vanadium fluoride oxychloride, vanadium chloride oxybromide, vanadium iodide oxychloride, etc.

[0045] Furthermore, exemplary vanadium precursors may include "heterogeneous" or mixed-ligand precursors, wherein exemplary ligand types may be attached to vanadium atoms in any achievable number (typically 3-5 ligands, but exceptions may exist). Examples may include V(Cl). x (NMe) 4-xand V(Cl) x (iPrAMD) x .

[0046] The nitrogen precursor may be selected from one or more of ammonia (NH3), hydrazine (N2H4), and other compounds containing or composed of nitrogen and hydrogen. For example, a mixture of nitrogen and hydrogen may be used. In one embodiment, the nitrogen precursor does not include diatomic nitrogen, i.e., the nitrogen precursor is a non-diatomic precursor.

[0047] Using vanadium halide precursors may be advantageous compared to methods using other precursors such as organometallic vanadium precursors because vanadium halide precursors are likely to be relatively inexpensive, can produce vanadium layers with lower impurities such as carbon concentration, and / or processes using such precursors may be more controllable compared to processes using organometallic or other vanadium precursors. Furthermore, such reactants can be used to form excited species without plasma assistance. Additionally, processes using vanadium halide precursors may be easier to scale up compared to methods using organometallic vanadium precursors.

[0048] In one embodiment, the deposition process includes a continuous flow of at least one precursor. In another embodiment, the flow of both precursors may be continuous. In yet another embodiment, the flow of the two precursors may be at least partially simultaneous.

[0049] Cyclic deposition processes may include one or more of atomic layer deposition (ALD) and cyclic chemical vapor deposition (CVD). Cyclic deposition processes may include thermal processes—that is, processes that do not use plasma to activate species. In some cases, reactants may be exposed to plasma to form activated reactant species. In some embodiments, a cyclic deposition process may include only one or more thermal processes.

[0050] In one embodiment, the temperature of the substrate within the reaction chamber during a cyclic deposition process is between about 20°C and about 800°C. For example, the cyclic deposition process may include heating the substrate to a desired deposition temperature within the reaction chamber. The temperature may be below 800°C. For example, heating the substrate to the deposition temperature may include heating the substrate to a temperature between about 20°C and about 800°C. In some embodiments, the substrate temperature may be between about 100°C and about 400°C, or between about 200°C and about 500°C, such as 250°C, 300°C, or 450°C, or between about 20°C and about 200°C.

[0051] In the case of a thermal cycling deposition process, the duration for which a precursor is supplied to the reaction chamber can be relatively long to allow the precursor to react with another precursor or its derivative. For example, the duration can be greater than or equal to 5 seconds, greater than or equal to 10 seconds, or between about 5 seconds and 10 seconds. In one embodiment, the duration for which a nitrogen precursor is supplied to the reaction chamber is greater than or equal to 5 seconds, greater than or equal to 10 seconds, or between about 5 seconds and about 10 seconds.

[0052] In addition to controlling the temperature of the substrate, the pressure inside the reaction chamber can also be adjusted. For example, in some embodiments of this disclosure, the pressure inside the reaction chamber may be less than 760 Torr or between 0.2 Torr and 760 Torr, between 1 Torr and 100 Torr, or between 1 Torr and 10 Torr.

[0053] In one embodiment, the surface of the substrate comprises a first surface material and a second surface material, and wherein a cyclic deposition process causes a vanadium nitride-containing layer to be selectively deposited on the first surface material relative to the second surface material.

[0054] In some embodiments, a vanadium nitride layer is selectively deposited on a first metallic or metallic surface of the substrate relative to a second dielectric surface of the substrate. In some embodiments, the second surface contains -OH groups, such as on a SiO2-based surface. In some embodiments, vanadium nitride is selectively deposited on a first metallic, metallic, metal oxide, or dielectric surface of the substrate relative to a second distinct SiO2 surface.

[0055] Unless otherwise specified, if a surface is referred to herein as a metallic surface, then it may be a metallic surface or a metal-containing surface. In some embodiments, a metallic or metallic surface may comprise a metal, such as an elemental metal, a metal nitride, a metal silicide, a metal carbide, and / or mixtures thereof. In some embodiments, a metallic or metallic surface may comprise a surface oxide, such as a surface layer of a natural metal oxide. In some embodiments, the metallic or metallic material of the metallic or metallic surface is conductive, with or without surface oxide. In some embodiments, a metallic or metallic surface comprises silicon, such as H-terminated silicon. In some embodiments, a metallic or metallic surface is a silicon surface, such as an H-terminated silicon surface. In some embodiments, a metallic or metallic surface is not a silicon surface, and is not an H-terminated silicon surface. A first metallic or metallic surface may also be referred to herein as a first surface.

[0056] In some embodiments, the metal or metallic surface comprises one or more transition metals. In some embodiments, the metal or metallic surface comprises aluminum. In some embodiments, the metal or metallic surface comprises one or more of Al, Cu, Co, Ni, and W. In some embodiments, the metallic surface comprises titanium nitride. In some embodiments, the metal or metallic surface comprises one or more noble metals such as Ru. In some embodiments, the metal or metallic surface comprises a conductive metal oxide, such as a noble metal oxide such as RuO2.

[0057] In some embodiments, the material is selectively deposited on a first metal surface comprising a metal oxide surface. The metal oxide surface may be, for example, WO4. x The surface can be HfO2, TiO2, Al2O3, or ZrO2. In some embodiments, the metal oxide surface is an oxidized surface of a metallic material. In some embodiments, the metal oxide surface is formed by oxidizing the surface of at least a metallic material using an oxygen compound, such as a compound containing O3, H2O, H2O2, O2, oxygen atoms, plasma, or atomic groups or mixtures thereof. In some embodiments, the metal oxide surface is a naturally occurring oxide formed on a metallic material.

[0058] In some embodiments, a vanadium nitride-containing layer is selectively deposited on a first surface containing a dielectric surface relative to a second SiO2 surface. For simplicity, the term dielectric is used herein to distinguish it from another surface, namely a metal or metallic surface. Unless otherwise specified with respect to a particular embodiment, in the context of this application, the term dielectric can be understood as covering all surfaces that are non-conductive or have very high resistivity. As used herein, the term “dielectric surface” can refer to the surface of a dielectric material, including but not limited to silicon-containing dielectric materials such as, for example, silicon oxide, silicon nitride, silicon oxynitride, silicon carbide, and mixtures thereof. Additionally, the term “dielectric surface” can also refer to the surface of a metal oxide material or the oxide surface of a metal nitride material.

[0059] In some embodiments, the dielectric surface may be referred to herein as the second surface. In some embodiments, the second surface may comprise any dielectric surface. In some embodiments, a substrate comprising a first metal or metallic surface and a second dielectric surface is provided. In some embodiments, a substrate comprising a first metal surface comprising a metal oxide surface is provided. In some embodiments, the second surface may comprise -OH groups. In some embodiments, the second surface may be a SiO2-based surface. In some embodiments, the second surface may comprise Si-O bonds. In some embodiments, the second surface may comprise a low-k SiO2-based material. In some embodiments, the second surface may comprise more than about 30%, preferably more than about 50%, of SiO2. In some embodiments, the second surface may comprise GeO2. In some embodiments, the second surface may comprise Ge-O bonds.

[0060] In one embodiment, the first surface may comprise a metal, and the second surface may comprise a metal. In another embodiment, the first surface may comprise a metal, and the second surface may comprise a dielectric material. In yet another embodiment, the first surface may comprise a dielectric material, and the second surface may comprise a metal. In still another embodiment, both the first and second surfaces comprise a dielectric material.

[0061] In one embodiment, the deposition selectivity is at least 50%, or at least 80%, or at least 90%. In another embodiment, the deposition selectivity may be at least 95%, at least 98%, or at least 99%. The deposition selectivity may even be at least 99.5% or about 100%. The deposition selectivity may alternatively be evaluated based on the nucleation rate on a given surface material under given conditions. For example, a vanadium nitride-containing layer may begin to grow on a first surface material after one, two, or three deposition cycles. Alternatively, a vanadium nitride-containing layer may begin to grow on a first surface material after ten deposition cycles. A vanadium nitride-containing layer may begin to grow on a second surface material after 50 or 100 deposition cycles.

[0062] In one embodiment, the selectivity of deposition is modulated during cyclic deposition via etchback. Herein, etchback refers to the process of removing some of the deposited layer between deposition cycles. Etchingback can increase selectivity because it can slow down layer growth on a second surface material more significantly than on a first surface material. The method according to this disclosure may include one or more etchback stages, the time interval, duration, and other characteristics of which can be selected independently of the deposition cycle. This allows the process to be tuned to achieve desired layer selectivity, thickness, etc.

[0063] In one embodiment, the vanadium nitride-containing layer serves as a seed layer. The seed layer can increase the nucleation rate of the other deposited material. This, in turn, can result in a substantially or fully continuous layer with fewer deposition cycles and improve layer integrity. This allows for the deposition of thinner layers. Alternatively or additionally, the surface of the resulting layer can be smoother. This can be advantageous, for example, in avoiding defects in sensitive applications and applications containing high aspect ratio structures. In one embodiment, the vanadium nitride-containing layer can be deposited as a seed layer prior to the deposition of the titanium nitride layer. The titanium nitride layer can be deposited from TiCl4 and NH3 using a cyclic deposition process.

[0064] Using a vanadium nitride-containing layer as a seed layer before depositing a metal layer can be advantageous. Examples of metals that can be deposited on a vanadium nitride-containing seed layer include molybdenum, tungsten, copper, and cobalt. The metal layer can be used, for example, as a barrier metal, a work function metal for logic, or as a DRAM electrode.

[0065] In one embodiment, the seed layer thickness is 0.6 nm or less, for example, 0.4 nm. A substantially continuous thin layer of vanadium nitride may be deposited. Such a layer can be advantageous in space-constrained structures. The seed layer can be substantially continuous. In one embodiment, the seed layer can be discontinuous. The nucleation rate can also be improved with a discontinuous seed layer. This may be desirable, for example, to reduce the influence of the seed layer on the properties of the resulting structure.

[0066] In another embodiment, the vanadium nitride-containing layer may be deposited on a seed layer (referred to herein as the underlayer). Using the underlayer between the substrate and the vanadium nitride-containing layer allows for the deposition of a vanadium nitride-containing layer with reduced resistivity. Therefore, using the underlayer may allow for the deposition of substantially or completely continuous vanadium-containing layers with a smaller number of deposition cycles, thereby improving layer integrity and / or surface smoothness, as described above. In some embodiments, the underlayer is deposited on a substrate comprising, substantially composed of, or composed of a dielectric material. In some embodiments, the dielectric material is a thermal oxide.

[0067] Using an underlayer beneath a vanadium nitride layer, wherein the thickness of the vanadium nitride layer is less than 10 nm, or less than 5 nm, or less than 3 nm, or less than 2 nm, or less than 1.5 nm, may be advantageous. In some embodiments, the thickness of the underlayer may be, for example, from about 0.05 nm to about 0.4 nm, or from about 0.1 nm to about 0.3 nm, such as about 0.15 nm, about 0.2 nm, about 0.25 nm, or about 0.35 nm.

[0068] The substrate can be substantially continuous. In some embodiments, the substrate can be discontinuous. The substrate can contain various chemicals, such as silicon oxide or carbon-containing metal oxides deposited as known in the art. In some embodiments, the substrate is deposited in one to five deposition cycles, such as one, two, or three deposition cycles.

[0069] As a non-limiting example of the method according to this disclosure, when the vanadium nitride layer according to this disclosure contains substantially only vanadium and nitrogen and the thickness of the layer is approximately At this point, the resistivity of the film can be 200 μOhm cm or lower. When the thickness of the vanadium nitride-containing layer is approximately... When the resistivity is less than 300 μΩ·cm, and when the layer thickness is approximately At this point, the resistivity can be less than 350 μOhm. Furthermore, when the thickness of the vanadium nitride-containing film is approximately... At this point, the resistivity can be less than 500 μΩ·cm. Compared to the resistivity increase of TiN layers of similar thickness, the resistivity increase of vanadium nitride-containing layers may be slower.

[0070] The method according to this disclosure can be performed on a single-wafer tool or in a batch reactor. The reaction chamber can be a separate reaction chamber or part of a multi-functional tool.

[0071] For vanadium nitride-containing layers in batch deposition, good in-wafer thickness inhomogeneity, as well as good down-boat thickness and resistivity properties, can be obtained. In some embodiments, the wafers are rotated during processing. In some embodiments, the batch reactor includes a reactor configured to accommodate 25 or more, 50 or more, 75 or more, 100 or more, or 150 or more wafers stacked vertically on a wafer boat. In other embodiments, the batch reactor may include a small-batch reactor configured to accommodate 10 or fewer wafers, 8 or fewer wafers, 6 or fewer wafers, 4 or fewer wafers, or 2 wafers. In some embodiments where a batch reactor is used, and when the thickness of the vanadium nitride-containing layer is less than 20 nm, less than 15 nm, less than 10 nm, less than 7 nm, less than 5 nm, less than 4 nm, or less than 3 nm, the wafer-to-wafer thickness or resistivity inhomogeneity can be less than 20% (1 sigma), less than 10%, less than 5%, less than 3%, less than 2%, or even less than 1%.

[0072] Within the wafer, the non-uniformity of thickness or resistivity is less than 30% (1 sigma), less than 20%, less than 15%, less than 10%, less than 5%, less than 3%, less than 2%, less than 1%, or even less than 0.5%.

[0073] In one embodiment, the vanadium nitride-containing layer is used as an etch stop layer. In another embodiment, the vanadium nitride-containing layer may be used as an etch stop layer of a metal oxide such as a dielectric metal oxide (e.g., aluminum oxide).

[0074] In one embodiment, the cyclic deposition process includes annealing in the presence of SiH4. Annealing can be used to reduce layer stress. Annealing can be performed during the cyclic deposition process. Alternatively, annealing can be performed after the cyclic deposition process. Annealing can be performed once. Alternatively, annealing can be performed several times at predetermined time intervals during the cyclic deposition process. Annealing can affect layer properties by reducing the inherent stress and / or thermal stress of the layer. The reduction of stress in the deposited layer can positively affect the properties of the final device.

[0075] In one embodiment, a silane compound, such as silane (SiH4), silane (Si2H6), propane (Si3H8), or butane (Si4H), can be used in the annealing process. 10 Other silane compounds include halosilanes, such as chlorosilanes, for example, octachloropropylsilane (OCTS), HCDS (hexachloroethylsilane), and DCS (dichlorosilane).

[0076] Without limiting this disclosure to any particular theory, annealing in the presence of silicon-containing compounds such as silanes may introduce some amount of silicon into the layer. The amount of silicon introduced can vary and be adjusted by appropriately selecting the annealing scheme.

[0077] In one embodiment, annealing may be performed at a temperature between 300°C and 500°C, for example at approximately 350°C, 370°C, or 400°C.

[0078] This disclosure is further illustrated by the following exemplary embodiments depicted in the accompanying drawings. Furthermore, the illustrations presented herein are not intended to be actual views of any particular material, structure, or device, but are merely schematic representations used to describe embodiments of this disclosure. It should be understood that the elements in the figures are schematic for simplicity and clarity and are not necessarily drawn to scale. For example, the dimensions of some elements in the figures may be enlarged relative to other elements to aid in understanding the illustrated embodiments of this disclosure.

[0079] Figure 1 A method 100 according to an exemplary embodiment of the present disclosure is illustrated. Method 100 can be used to form a vanadium nitride-containing layer, i.e., a vanadium nitride-containing layer. The vanadium nitride-containing layer can be used in the formation of devices such as those mentioned herein. However, unless otherwise stated, the method is not limited to such applications.

[0080] Method 100 includes providing a substrate within the reaction chamber of a reactor (102) and depositing a layer containing vanadium nitride onto the surface of the substrate (104).

[0081] During step 102, a substrate may be provided within the reaction chamber. The reaction chamber used during step 102 may be, or may include, a reaction chamber of a chemical vapor deposition reactor system configured to perform a deposition process. The deposition process may be a cyclic deposition process. The reaction chamber may be a stand-alone reaction chamber or part of a multi-functional tool. The reaction chamber may be a batch processing tool.

[0082] Step 102 may include heating the substrate to a desired deposition temperature within the reaction chamber. In some embodiments of this disclosure, step 102 includes heating the substrate to a temperature below 800°C. For example, in some embodiments of this disclosure, heating the substrate to the deposition temperature may include heating the substrate to a temperature between about 100°C and about 500°C, about 250°C and about 450°C, about 250°C and about 400°C, or about 200°C and about 350°C.

[0083] In addition to controlling the temperature of the substrate, the pressure within the reaction chamber can also be adjusted. For example, in some embodiments of this disclosure, the pressure within the reaction chamber during step 102 may be less than 760 Torr or between 0.5 Torr and 760 Torr, about 1 Torr and 100 Torr, or about 1 Torr and 10 Torr. The pressure may be, for example, 10 Torr or less, 5 Torr or less, 3 Torr or less, 2 Torr or less, 1 Torr or less, 0.1 Torr or less, or 0.001 Torr or less.

[0084] During step 104, a vanadium nitride-containing layer is deposited onto the surface of the substrate using a deposition process. As described above, the deposition process can be a cyclic deposition process and can include cyclic CVD, ALD, or a hybrid cyclic CVD / ALD process. For example, in some embodiments, the growth rate of a particular ALD process may be lower than that of a CVD process. One way to increase the growth rate is to operate at a higher deposition temperature than typically used in an ALD process, resulting in some portions of the chemical vapor deposition process, but still utilizing the sequential introduction of precursors. Such a process can be referred to as cyclic CVD. In some embodiments, a cyclic CVD process may include the introduction of two or more precursors into a reaction chamber, wherein there may be overlapping time periods between the two or more precursors in the reaction chamber, resulting in both the deposited ALD component and the deposited CVD component. This is referred to as a hybrid process. According to a further example, a cyclic deposition process may include a continuous flow of one reactant / precursor and a periodic pulse of a second precursor entering the reaction chamber. The pressure and / or temperature in the reaction chamber during step 104 may be the same as or similar to any of the pressures and temperatures described above in conjunction with step 102.

[0085] According to some examples of this disclosure, the deposition process is a thermal deposition process. In these cases, the deposition process does not include the use of plasma to form active species for use in the deposition process. For example, the deposition process may not include the formation or use of plasma, may not include the formation or use of excited species, and / or may not include the formation or use of free radicals. In the case of a thermal cycling deposition process, the duration of the step of providing a precursor to the reaction chamber can be relatively long to allow the precursor to react with another precursor or its derivative. For example, the duration may be greater than or equal to 5 seconds, or greater than or equal to 10 seconds, or between about 5 seconds and 10 seconds.

[0086] In other cases, plasma can be used to excite one or more precursors, one or more precursors and / or one or more inert gases.

[0087] Cyclic deposition processes may include (e.g., separately and / or sequentially) providing a vanadium precursor to the reaction chamber and a nitrogen precursor to the reaction chamber. In some cases, a hydrogen reactant may be provided to the reaction chamber along with the vanadium precursor or the nitrogen precursor. The hydrogen reactant may contain, for example, H2 or excited, atomic, plasma, or radical hydrogen species.

[0088] Figure 2 An exemplary cyclic method 200 suitable for step 104 of method 100 is depicted. Method 200 includes a step of providing a vanadium precursor to a reaction chamber (step 202) and a step of providing a nitrogen precursor to a reaction chamber (step 204). According to an example of this disclosure, during the step of providing the nitrogen precursor to the reaction chamber (step 204), a vanadium nitride-containing layer is formed.

[0089] In some embodiments of this disclosure, method 100 includes repeating a cell deposition cycle comprising steps 202 and 204, with an optional purging or moving step following step 202 and / or step 204. The deposition cycle may be repeated once or multiple times based on, for example, the desired thickness of the vanadium nitride-containing layer. For example, if the thickness of the vanadium nitride-containing layer is less than the thickness desired for a particular application, steps 202 and 204 may be repeated once or multiple times. In some embodiments, the method includes at least 1 cycle to at most 100 cycles, or at least 2 cycles to at most 80 cycles, or at least 3 cycles to at most 70 cycles, or at least 4 cycles to at most 60 cycles, or at least 5 cycles to at most 50 cycles, or at least 10 cycles to at most 40 cycles, or at least 20 cycles to at most 30 cycles. In some embodiments, the method includes up to 100 cycles, or up to 90 cycles, or up to 80 cycles, or up to 70 cycles, or up to 60 cycles, or up to 50 cycles, or up to 40 cycles, or up to 30 cycles, or up to 20 cycles, or up to 10 cycles, or up to 5 cycles, or up to 4 cycles, or up to 3 cycles, or up to 2 cycles, or a single cycle.

[0090] The vanadium precursor may include any precursor indicated in this disclosure.

[0091] The reaction chamber may be purged with vacuum and / or inert gas before or after one or more steps to, for example, mitigate the gas-phase reaction between precursors and achieve a self-saturating surface reaction (e.g., in the case of ALD). For example, the reaction chamber may be purged after one or more of steps 202, 204. Alternatively or additionally, the substrate may be moved to separately contact the first and second gas-phase precursors. Excess chemicals and reaction byproducts (if any) may be removed from the substrate surface or the reaction chamber, such as by purging the reaction space or by moving the substrate, before contacting the substrate with the next reactive chemical. The reaction chamber may be purged after the step of providing the precursor to the reaction chamber and / or after the step of providing the precursor to the reaction chamber.

[0092] In some embodiments, in / on structures with an aspect ratio (height / width) greater than about 2, greater than about 5, greater than about 10, greater than about 25, greater than about 50, greater than about 100, or between about 10 and 100 or about 5 and about 25, the step coverage of the vanadium nitride layer is equal to or greater than about 50%, or greater than about 80%, or greater than about 90%, or about 95%, or about 98%, or about 99% or higher.

[0093] In some embodiments, the growth rate of the vanadium nitride-containing layer can be relatively low—for example, less than 3 Å / cycle, between about 0.2 and 3 Å / cycle, or between about 0.1 and about 1 Å / cycle. Alternatively, the growth rate of the vanadium nitride-containing layer can be less than 10 Å / cycle, or less than 5 Å / cycle, or less than 4 Å / cycle. A relatively low growth rate can promote desired film thickness accuracy and / or film thickness uniformity. However, faster growth rates can be achieved when process conditions are appropriately selected. Preferred layer growth rates depend on the application and can be selected by those skilled in the art as needed.

[0094] Figure 3 The diagram illustrates the structure / part of a device 300 according to another embodiment of the present disclosure. The device or structure 300 includes a substrate 302, a dielectric or insulating material 305, and a vanadium nitride-containing layer 308. In the illustrated embodiment, structure 300 further includes an additional conductive layer 310.

[0095] The substrate 302 may be or may include any substrate material described herein.

[0096] The dielectric or insulating material 305 may include one or more dielectric or insulating material layers. For example, the dielectric or insulating material 305 may include an interface layer 304 and a high-k material 306 deposited and stacked on the interface layer 304. In some cases, the interface layer 304 may be absent or may be present to an imperceptible degree. The interface layer 304 may comprise an oxide, such as silicon oxide, which may be formed on the surface of the substrate 302 using, for example, a chemical oxidation process or an oxide deposition process. The high-k material 306 may be or may include, for example, a metal oxide with a dielectric constant greater than about 7. In some embodiments, the dielectric constant of the high-k material is higher than that of silicon oxide. In some embodiments, the high-k material may include hafnium oxide (HfO2), tantalum oxide (Ta2O5), zirconium oxide (ZrO2), titanium oxide (TiO2), hafnium silicate (HfSiO2), etc. x One or more of aluminum oxide (Al2O3), lanthanum oxide (La2O3), and mixtures / layers containing one or more such layers.

[0097] The vanadium nitride-containing layer 308 can be formed according to the methods described herein. When a cyclic deposition process is used to form the vanadium nitride-containing layer 308, the concentrations of vanadium, nitrogen, and / or other components in the vanadium nitride-containing layer 308 can vary from the bottom to the top of the vanadium nitride-containing layer 308, for example, by controlling the amount of vanadium precursors and / or one or more reactants and / or the corresponding pulse times or pulse numbers during one or more deposition cycles. In some cases, the vanadium nitride-containing layer 308 may have a stoichiometric composition. The work function and other properties of the vanadium nitride-containing layer 308 can be altered by changing the amount of vanadium, nitrogen, and / or other compounds in the layer or during the deposition cycle.

[0098] The vanadium nitride layer 308 may contain impurities, such as halogens, hydrogen, etc., in amounts of less than one atomic percentage, less than 0.2 atomic percentage, or less than 0.1 atomic percentage, or less than 0.05 atomic percentage, alone or in combination.

[0099] The thickness of the vanadium nitride-containing layer 308 can vary depending on the application. As examples, the thickness of the vanadium nitride-containing layer 308 can be less than 5 nm or from about 0.1 nm to about 10 nm, or from about 0.1 nm to about 5 nm, or from about 0.2 nm to about 5 nm, or from about 0.3 nm to about 3 nm, or from about 0.3 nm to about 1 nm. When used to replace layers that may contain aluminum instead of vanadium, the vanadium nitride-containing layer 308 can be relatively thin, which may be desirable for many applications, including work function and / or voltage threshold adjustment layers. In some cases, the thickness of the vanadium nitride-containing layer 308 can be greater than 2 nm—for example, when the vanadium nitride-containing layer 308 is used as a barrier layer or pad.

[0100] The work function of the shifted vanadium nitride-containing layer 308 can be >4.6 eV, >4.7 eV, >4.8 eV, >4.9 eV, >4.95 eV, or >5.0 eV. Using the vanadium nitride-containing layer as described herein, the work function value of the device can be shifted from about 30 meV to about 300 meV, or from about 30 meV to about 200 meV, or from about 50 meV to about 100 meV. The thickness and / or composition of the vanadium nitride-containing layer can be manipulated to obtain the desired shift in work function and / or threshold voltage.

[0101] Alternatively or concurrently, the vanadium nitride-containing layer 308 may—for example, using method 100—form a continuous film with a thickness of <5 nm, <4 nm, <3 nm, <2 nm, <1.5 nm, <1.2 nm, <1.0 nm, or <0.9 nm. The vanadium nitride-containing layer 308 may be relatively smooth, with relatively low grain boundary formation. In some cases, the vanadium nitride-containing layer 308 may be amorphous, with a relatively low columnar crystal structure (compared to TiN). At a thickness of less than 10 nm, the RMS roughness of the exemplary vanadium nitride-containing layer 308 may be <1.0 nm, <0.7 nm, <0.5 nm, <0.4 nm, <0.35 nm, or <0.3 nm.

[0102] The additional conductive layer 310 may include, for example, a metal, such as a refractory metal. As an example, the conductive layer 310 may be or may include one or more of the following: titanium nitride; vanadium nitride; a metal stack comprising titanium nitride and a metal (e.g., W, Co, Ru, Mo) or titanium nitride, titanium aluminum carbon and titanium nitride; tungsten carbide; cobalt; copper; molybdenum; ruthenium, etc.

[0103] Although schematically depicted as a vanadium nitride-containing layer 308 stacked on a dielectric or insulating material 305, in some cases, the vanadium nitride-containing layer 308 may additionally or alternatively be formed directly above a substrate 302 (which may include various layers and / or topologies) and / or below the dielectric or insulating material 305, between the interface layer 304 and the high-k material 306, and / or between layers of the high-k material 306. Furthermore, the vanadium nitride-containing layer 308 may be deposited and at least partially removed, such that the resulting structure may no longer include the vanadium nitride-containing layer 308 or may include fewer layers than originally formed on the structure.

[0104] Figure 4 Another exemplary structure 400 according to an embodiment of the present disclosure is illustrated. The device or structure 400 includes a substrate 402, a dielectric or insulating material 404, and a vanadium nitride-containing layer 406. In the illustrated embodiment, structure 400 further includes an additional conductive layer 412. The substrate 402, dielectric or insulating material 404, vanadium nitride-containing layer 406, and additional conductive layer 412 may be the same as or similar to the substrate 402, dielectric or insulating material 404, vanadium-containing and / or vanadium nitride-containing layer 408, and conductive layer 410. Similarly to the above, the vanadium nitride-containing layer 406 may additionally or alternatively be configured to be stacked on top of the substrate 402 (which may include various layers and / or topologies) and / or below the insulating material 404, between the interface layer 408 and the high-k material 410, and / or between layers of the high-k material 410. Furthermore, a vanadium nitride-containing layer 406 can be deposited and at least partially removed, such that the resulting structure may no longer include the vanadium nitride-containing layer 406 or may include fewer layers than the number of vanadium nitride-containing layers 406 originally formed on the structure.

[0105] In the illustrated example, substrate 402 includes a source region 414, a drain region 416, and a channel region 418. Although schematically shown as a horizontal structure, structures and devices according to embodiments of this disclosure may include vertical and / or three-dimensional structures and devices, such as FinFET devices, gate-around devices, and nanosheet devices.

[0106] Figure 5 Another structure 500 according to an example of this disclosure is illustrated. Structure 500 is suitable for gate-around field-effect transistors (GAA FETs) (also known as lateral nanowire FETs), etc.

[0107] In the illustrated example, structure 500 includes a semiconductor material 502, a dielectric material 504, a vanadium nitride-containing layer 506, and a conductive layer 508. Structure 500 may be formed stacked on a substrate, including any substrate material described herein.

[0108] Semiconductor material 502 may include any suitable semiconductor material. For example, semiconductor material 502 may include group IV, group III-V, or group II-VI semiconductor materials. For instance, semiconductor material 502 includes silicon.

[0109] The dielectric material 504, the vanadium nitride-containing layer 506, and the conductive layer 508 may be the same as or similar to the dielectric or insulating material 305, the vanadium nitride-containing layer 308, and the conductive layer 310 described above. According to a further embodiment of this disclosure, the vanadium nitride-containing layer 506 may be formed to be stacked on top of the semiconductor material 502 and / or below the dielectric material 504.

[0110] Figure 6 A deposition apparatus 600 according to further exemplary embodiments of the present disclosure is illustrated. The apparatus 600 can be used to perform the methods described herein and / or form structural or device portions as described herein.

[0111] In the illustrated example, device 600 includes one or more reaction chambers 602, a first precursor gas source 604, a second precursor gas source 606, a purge gas source 608, an exhaust source 610, and a controller 612.

[0112] The reaction chamber 602 may include any suitable reaction chamber, such as an ALD or CVD reaction chamber.

[0113] The first precursor gas source 604 may include a container and one or more vanadium precursors as described herein—either alone or in mixture with one or more carrier gases (e.g., inert gases). The second precursor gas source 606 may include a container and one or more precursors as described herein (e.g., nitrogen precursors)—either alone or in mixture with one or more carrier gases. The purge gas source 608 may include one or more inert gases as described herein. Although illustrated as having three gas sources 604-608, the apparatus 600 may include any suitable number of gas sources. Gas sources 604-608 may be coupled to the reaction chamber 602 via lines 614-618, each of which may include a flow controller, valve, heater, etc.

[0114] The exhaust source 610 may include one or more vacuum pumps.

[0115] Controller 612 includes electronic circuitry and software to selectively operate valves, manifolds, heaters, pumps, and other components included in apparatus 600. The operation of such circuitry and components introduces precursors, reactants, and purge gases from corresponding sources 604-608. Controller 612 can control the timing of gas pulse sequences, the temperature of the substrate and / or reaction chamber, the pressure within the reaction chamber, and various other operations to ensure proper operation of apparatus 600. Controller 612 may include control software to control the flow of precursors, reactants, and purge gases into and out of reaction chamber 602 via electrically or pneumatically controlled valves. Controller 612 may include modules, such as software or hardware components like FPGAs or ASICs, to perform certain tasks. Modules may advantageously be configured to reside on addressable storage media of the control system and configured to perform one or more processes.

[0116] Other configurations of the apparatus 600 are possible, including different numbers and types of precursor and reactant sources and purge gas sources. Furthermore, it should be understood that numerous arrangements of valves, conduits, precursor sources, and purge gas sources exist to achieve the goal of selectively feeding gases into the reaction chamber 602. Additionally, for the sake of illustration and simplicity, many components are omitted, such as various valves, manifolds, purifiers, heaters, containers, vents, and / or bypasses.

[0117] During operation of the deposition apparatus 600, a substrate, such as a semiconductor wafer (not shown), is transferred from, for example, a substrate transport system to a reaction chamber 602. Once one or more substrates have been transferred to the reaction chamber 602, one or more gases, such as precursors, reactants, carrier gases, and / or purge gases, from gas sources 604-608 are introduced into the reaction chamber 602.

[0118] The exemplary embodiments described above do not limit the scope of the invention, as these embodiments are merely examples of embodiments of the invention, which is defined by the appended claims and their legal equivalents. Any equivalent embodiments are intended to be included within the scope of the invention. In fact, various modifications to this disclosure, such as alternative combinations of the described elements, will be apparent to those skilled in the art from the specification, in addition to those shown and described herein. Such modifications and embodiments are also intended to fall within the scope of the appended claims.

Claims

1. A method for forming a vanadium nitride-containing layer, the method comprising: - A substrate is provided within the reaction chamber of the reactor, the surface of the substrate comprising a first surface material and a second surface material, wherein the first surface material comprises a metal or a metallic material, and the second surface material comprises a dielectric material; and - A vanadium nitride-containing layer is deposited on the surface of the substrate using a deposition process, wherein the deposition process results in the vanadium nitride-containing layer being selectively deposited on the first surface material relative to the second surface material. The deposition process includes: - Provide vanadium precursor to the reaction chamber; as well as - Provide nitrogen precursor to the reaction chamber The vanadium nitride-containing layer is a seed layer, and the thickness of the vanadium nitride-containing layer is discontinuous; and A metal layer is deposited on the seed layer.

2. The method according to claim 1, wherein the deposition process is a cyclic deposition process.

3. The method of claim 1, wherein the reaction chamber is purged between providing the vanadium precursor to the reaction chamber and providing the nitrogen precursor to the reaction chamber.

4. The method according to claim 1, wherein the nitrogen precursor is selected from ammonia (NH3), hydrazine (N2H4), and one or more other compounds containing nitrogen and hydrogen or composed of nitrogen and hydrogen.

5. The method of claim 1, wherein the nitrogen precursor does not include diatomic nitrogen.

6. The method of claim 1, wherein the selectivity of the deposition is at least 50%, or at least 80%, or at least 90%.

7. The method of claim 1, wherein the selectivity of the deposition is adjusted by back etching during the deposition process.

8. The method of claim 1, wherein the seed layer is deposited prior to the deposition of titanium nitride from the TiCl4 precursor and NH3 precursor using a cyclic deposition process.

9. The method according to claim 1, wherein the thickness of the seed layer is 0.6 nm or less.

10. The method of claim 1, wherein the deposition process comprises annealing in the presence of a silane compound.

11. The method according to claim 10, wherein the silane compound is SiH4.

12. A structure comprising a vanadium nitride layer, said vanadium nitride layer being produced by the method according to claim 1.

13. A device comprising a vanadium nitride layer, said vanadium nitride layer being produced according to the method of claim 1.

14. A method for forming a vanadium nitride-containing layer structure, the method comprising: - A substrate is provided within the reaction chamber of the reactor, the surface of the substrate comprising a first surface material and a second surface material, wherein the first surface material comprises a metal or a metallic material, and the second surface material comprises a dielectric material; and - A vanadium nitride-containing layer is deposited on the surface of the substrate using a cyclic deposition process, wherein the cyclic deposition process results in the vanadium nitride-containing layer being selectively deposited on the first surface material relative to the second surface material. The deposition process described herein includes: - Provide vanadium precursor to the reaction chamber; as well as - Provide nitrogen precursor to the reaction chamber The vanadium nitride-containing layer is a seed layer, and the thickness of the vanadium nitride-containing layer is discontinuous; and A metal layer is deposited on the seed layer.

15. A structure produced by the method according to claim 14.

16. The structure of claim 15, wherein the structure is a work function metal in a metal gate, a pad / barrier, a metal electrode in a DRAM, logic, or 3D NAND, a p-metal gate for logic, or a dipole (p) tuning layer for logic applications.

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