Silicon / perovskite tandem solar cell and preparation method thereof

Abstract

The present application relates to a silicon / perovskite tandem solar cell and a preparation method thereof, and belongs to the technical field of perovskite tandem cells. The silicon / perovskite tandem solar cell comprises a silicon bottom cell and a perovskite top cell, wherein a seed crystal silicon layer and a tunneling layer are sequentially arranged between the surface of the silicon bottom cell and the bottom surface of the perovskite top cell, wherein the seed crystal silicon layer is close to the silicon bottom cell, and the tunneling layer is close to the perovskite top cell. Among them, the seed crystal silicon layer is an amorphous silicon layer, and the tunneling layer is a doped microcrystalline silicon oxygen layer. The cell makes tunneling between the silicon bottom cell and the perovskite top cell easier to improve the open circuit voltage and conversion efficiency of the cell.

Description

Technical Field

[0001] The present application relates to the technical field of perovskite tandem cells, and in particular to a silicon / perovskite tandem solar cell and a method for preparing the same. Background Art

[0002] Figure 1 Schematic diagram of the layer structure of existing perovskite tandem cells. Figure 1 The preparation method of the perovskite tandem cell is as follows: a P-type doped amorphous silicon layer is formed on the back of an N-type silicon wafer, and a silicon dioxide layer and an N-type doped amorphous silicon layer are sequentially formed on the front of the N-type silicon wafer, and then the N-type doped amorphous silicon layer is used as the light-receiving surface, and a perovskite cell is formed on the top thereof (the hole transport layer of the perovskite cell is in contact with the N-type doped amorphous silicon layer), to obtain a perovskite tandem cell.

[0003] However, after the perovskite stack cell is prepared, the open circuit voltage and conversion efficiency are not high. Summary of the invention

[0004] The inventors have found that in existing perovskite tandem cells, since the crystallinity of the N-type doped amorphous silicon layer is too high, and the material of the hole transport layer is a P-type amorphous organic material, after stacking, the lattice of the N-type doped amorphous silicon layer and the hole transport layer does not match, resulting in difficult tunneling, resulting in the open circuit voltage and conversion efficiency of the perovskite tandem cell being low.

[0005] In view of the deficiencies in the prior art, the purpose of the embodiments of the present application includes providing a silicon / perovskite tandem solar cell and a method for preparing the same, which can improve the open circuit voltage and conversion efficiency of the cell.

[0006] In the first aspect, the embodiment of the present application provides a silicon / perovskite tandem solar cell, including a silicon bottom cell and a perovskite top cell, wherein a seed crystal silicon layer and a tunneling layer are sequentially arranged between the surface of the silicon bottom cell and the bottom surface of the perovskite top cell, the seed crystal silicon layer is close to the silicon bottom cell, and the tunneling layer is close to the perovskite top cell. The seed crystal silicon layer is an amorphous silicon layer, and the tunneling layer is a doped microcrystalline silicon oxygen layer, a doped microcrystalline silicon carbide layer, or a doped microcrystalline silicon carbide oxygen layer.

[0007] In the present application, the amorphous silicon layer is used as a seed crystal silicon layer, which can induce the growth of a nucleation layer so as to subsequently grow a large-grained microcrystalline silicon oxygen layer, a carbide microcrystalline silicon layer or a carbide microcrystalline silicon oxygen layer, and the layer has a high degree of crystallinity and can accommodate more doping elements to make its doping concentration higher. Moreover, compared with the doped polycrystalline layer, the doped microcrystalline oxygen layer, the doped microcrystalline silicon carbide layer or the doped microcrystalline silicon carbide oxygen layer has a lower crystallinity and a higher defect state density, which facilitates the movement of carriers and can be used as a good tunneling material, thereby making the tunneling between the silicon bottom cell and the perovskite top cell easier to improve the open circuit voltage and conversion efficiency of the cell.

[0008] In some embodiments of the present application, the thickness of the amorphous silicon layer is 1-3 nm; the thickness of the tunneling layer is 10-30 nm.

[0009] The thin amorphous silicon layer will basically not affect the thickness of the perovskite stacked battery, and can form a tunneling layer very well, making the open circuit voltage and conversion efficiency of the battery higher.

[0010] In some embodiments of the present application, the silicon-bottom battery includes an N-type doped amorphous silicon layer, an intrinsic amorphous silicon layer, an N-type silicon wafer, an intrinsic amorphous silicon layer and a P-type doped amorphous silicon layer arranged in sequence from top to bottom, and the tunneling layer is a P-type doped microcrystalline silicon oxygen layer, a P-type doped microcrystalline silicon carbide layer or a P-type doped microcrystalline silicon carbide oxygen layer.

[0011] The amorphous silicon layer serves as a seed layer for a P-type doped microcrystalline silicon oxygen layer, a P-type doped microcrystalline silicon carbide layer or a P-type doped microcrystalline silicon carbide oxygen layer. In the process of forming the P-type doped microcrystalline silicon oxygen layer, the P-type doped microcrystalline silicon carbide layer or the P-type doped microcrystalline silicon carbide oxygen layer, a nucleation layer can be induced to grow first, and then the deposition can be continued to form a microcrystalline silicon layer with large particles, and the P-type doping concentration is relatively high, so as to form a tunneling layer with multiple defect state density and multiple carrier recombination centers, thereby making the tunneling between the N-type silicon bottom cell and the perovskite top cell easier.

[0012] In some embodiments of the present application, the silicon-bottom battery includes a P-type doped amorphous silicon layer, an intrinsic amorphous silicon layer, a P-type silicon wafer, an intrinsic amorphous silicon layer and an N-type doped amorphous silicon layer arranged in sequence from top to bottom, and the tunneling layer is an N-type doped microcrystalline silicon oxygen layer, an N-type doped microcrystalline silicon carbide layer or an N-type doped microcrystalline silicon carbide oxygen layer.

[0013] The amorphous silicon layer serves as a seed layer for an N-type doped microcrystalline silicon oxygen layer, an N-type doped microcrystalline silicon carbide layer or an N-type doped microcrystalline silicon carbide oxygen layer. In the process of forming the N-type doped microcrystalline silicon oxygen layer, the N-type doped microcrystalline silicon carbide layer or the N-type doped microcrystalline silicon carbide oxygen layer, a nucleation layer can be induced to grow first, and then the deposition can be continued to form a microcrystalline silicon layer with large particles, and the N-type doping concentration is relatively high, so as to form a tunneling layer with multiple defect state density and multiple carrier recombination centers, thereby making the tunneling between the P-type silicon bottom cell and the perovskite top cell easier.

[0014] In a second aspect, the present application provides a method for preparing a silicon / perovskite stacked solar cell, comprising: forming a silicon bottom cell; depositing an amorphous silicon layer on the upper surface of the silicon bottom cell, and depositing a tunneling layer on the surface of the amorphous silicon layer, wherein the tunneling layer is a doped microcrystalline silicon oxygen layer, a doped microcrystalline silicon carbide layer, or a doped microcrystalline silicon carbide oxygen layer; and forming a perovskite top cell on the surface of the tunneling layer.

[0015] In the present application, a seed crystal silicon layer is first formed on the silicon bottom battery. In the process of forming the tunneling layer, a nucleation layer can be induced to grow through the seed crystal silicon layer, so as to subsequently grow a large-grained microcrystalline silicon oxygen layer, a carbide microcrystalline silicon layer or a carbide microcrystalline silicon oxygen layer, and the layer has a high degree of crystallinity and can accommodate more doping elements to make its doping concentration higher. Moreover, compared with the doped polycrystalline layer, the doped microcrystalline oxygen layer, the doped microcrystalline silicon carbide layer or the doped microcrystalline silicon carbide oxygen layer has a lower crystallinity and a higher defect state density, which facilitates the movement of carriers and can be used as a good tunneling material, thereby making the tunneling between the silicon bottom battery and the perovskite top battery easier, so as to improve the open circuit voltage and conversion efficiency of the battery.

[0016] In some embodiments of the present application, the deposition conditions of the amorphous silicon layer include: the flow rate of the gas source SiH4 is in the range of 200-1000 sccm; the gas pressure is in the range of 0.3-1 mbar, and the RF power is in the range of 300-800 W. An amorphous silicon layer with a thickness of 1-3 nm can be formed to facilitate the subsequent formation of a tunneling layer.

[0017] In some embodiments of the present application, the tunneling layer is a P-type doped microcrystalline silicon oxide layer, and the deposition conditions of the tunneling layer are: the flow ratio of H2, SiH4, CO2, and B2H6 is (200-500): (1-3): 1: (1-3), the gas pressure range is 0.5-2 mbar, and the RF power range is 1000-3000 W. A tunneling layer (P-type doped microcrystalline silicon oxide layer) with a thickness of 10-30 nm can be formed to cooperate with an N-type silicon wafer bottom cell.

[0018] In some embodiments of the present application, the tunneling layer is a P-type doped microcrystalline silicon carbide layer, and the deposition conditions of the tunneling layer are: the flow ratio of H2, SiH4, CH4, and B2H6 is (200-500):(1-3):1:(1-3), the gas pressure range is 0.5-2mbar, and the RF power range is 1000-3000W.

[0019] In some embodiments of the present application, the tunneling layer is a P-type doped microcrystalline silicon carbide layer, and the deposition conditions of the tunneling layer are: the flow ratio of H2, SiH4, CO2, CH4, and B2H6 is (200-500):(1-3):1:(1-3):(1-3), the gas pressure range is 0.5-2mbar, and the RF power range is 1000-3000W.

[0020] In some embodiments of the present application, a method for forming a silicon-bottom battery includes: texturing an N-type silicon wafer; depositing a first intrinsic amorphous silicon layer on the front side of the N-type silicon wafer, and depositing a second intrinsic amorphous silicon layer on the back side of the silicon wafer; forming an N-type doped amorphous silicon layer on a surface of the first intrinsic amorphous silicon layer facing away from the N-type silicon wafer, and forming a P-type doped amorphous silicon layer on a surface of the second intrinsic amorphous silicon layer facing away from the N-type silicon wafer.

[0021] In some embodiments of the present application, the tunneling layer is an N-type doped microcrystalline silicon oxide layer, and the deposition conditions of the tunneling layer are: the flow ratio of H2, SiH4, CO2, and PH3 is (200-500): (1-3): 1: (1-3), the gas pressure range is 0.5-2 mbar, and the RF power range is 1000-3000 W. A tunneling layer (N-type doped microcrystalline silicon oxide layer) with a thickness of 10-30 nm can be formed to cooperate with a P-type silicon wafer bottom cell.

[0022] In some embodiments of the present application, the tunneling layer is an N-type doped microcrystalline silicon carbide layer, and the deposition conditions of the tunneling layer are: the flow ratio of H2, SiH4, CH4, and PH3 is (200-500):(1-3):1:(1-3), the gas pressure range is 0.5-2mbar, and the RF power range is 1000-3000W.

[0023] In some embodiments of the present application, the tunneling layer is an N-type doped microcrystalline silicon carbide layer, and the deposition conditions of the tunneling layer are: the flow ratio of H2, SiH4, CO2, CH4, and PH3 is (200-500):(1-3):1:(1-3):(1-3), the gas pressure range is 0.5-2mbar, and the RF power range is 1000-3000W.

[0024] In some embodiments of the present application, a method for forming a silicon bottom battery includes: texturing a P-type silicon wafer; depositing a first intrinsic amorphous silicon layer on the front side of the P-type silicon wafer, and depositing a second intrinsic amorphous silicon layer on the back side of the silicon wafer; forming a P-type doped amorphous silicon layer on the surface of the first intrinsic amorphous silicon layer facing away from the P-type silicon wafer, and forming an N-type doped amorphous silicon layer on the surface of the second intrinsic amorphous silicon layer facing away from the P-type silicon wafer. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings required for use in the embodiments will be briefly introduced below. It should be understood that the following drawings only show certain embodiments of the present application and therefore should not be regarded as limiting the scope. For ordinary technicians in this field, other related drawings can be obtained based on these drawings without paying creative work.

[0026] Figure 1 A schematic diagram of the first structure of a silicon / perovskite tandem solar cell provided in an embodiment of the present application;

[0027] Figure 2 A second structural schematic diagram of a silicon / perovskite tandem solar cell provided in an embodiment of the present application;

[0028] Figure 3 A schematic diagram of the structure of a silicon / perovskite tandem solar cell provided in Comparative Example 1;

[0029] Figure 4 A schematic diagram of the structure of a silicon / perovskite tandem solar cell provided in Comparative Example 2;

[0030] Figure 5 A schematic diagram of the structure of a silicon / perovskite tandem solar cell provided in Comparative Example 3;

[0031] Figure 6 A schematic diagram of the structure of a silicon / perovskite tandem solar cell provided in Comparative Example 4;

[0032] Figure 7 TEM image after step (6) of the method for preparing a silicon / perovskite tandem solar cell provided in Example 1 of the present application;

[0033] Figure 8 Raman spectrum test chart of the doped microcrystalline silicon oxygen layer prepared by the preparation method of the silicon / perovskite tandem solar cell provided in Examples 1 and 2 of the present application and Comparative Example 4.

[0034] Icons: 116, 212-N-type doped amorphous silicon layer; 115, 215-first intrinsic amorphous silicon layer; 114-N-type silicon wafer; 113, 213-second intrinsic amorphous silicon layer, 112, 216-P-type doped amorphous silicon layer; 111, 211-ITO conductive film layer; 134-transparent conductive oxide layer; 133-electron transport layer; 132-perovskite layer; 131-hole transport layer; 121, 221-seed crystal silicon layer; 122-P-type doped microcrystalline silicon oxide layer; 214-P-type silicon wafer; 222-N-type doped microcrystalline silicon oxide layer; 311-silicon oxide layer; 312-aluminum oxide and silicon nitride layer. DETAILED DESCRIPTION

[0035] In order to make the objectives, technical solutions and advantages of the embodiments of the present application clearer, the technical solutions of the present application are clearly and completely described below.

[0036] The present application provides two silicon / perovskite tandem solar cells. Figure 1 This is a schematic diagram of the first structure of the silicon / perovskite tandem solar cell provided in the embodiment of the present application. Figure 1 The silicon bottom cell of the first silicon / perovskite tandem solar cell is a silicon cell formed on an N-type silicon wafer.

[0037] The silicon cell includes, arranged from top to bottom in sequence, an N-type doped amorphous silicon layer 116 , a first intrinsic amorphous silicon layer 115 , an N-type silicon wafer 114 , a second intrinsic amorphous silicon layer 113 , a P-type doped amorphous silicon layer 112 , an ITO conductive film layer 111 , and a silver electrode forming an ohmic contact with the ITO conductive film layer 111 .

[0038] The perovskite top cell includes a transparent conductive oxide layer 134, an electron transport layer 133, a perovskite layer 132 and a hole transport layer 131 arranged in sequence from top to bottom. Among them, the transparent conductive oxide layer 134 can be an IZO transparent conductive film layer, and the upper surface of the IZO transparent conductive film layer has a silver electrode in ohmic contact with it. The electron transport layer 133 can be a SnO2 layer, a C60 layer and a LiF layer arranged overlapping from top to bottom. The material of the hole transport layer 131 is Spiro-TTB or PTAA.

[0039] If the perovskite top cell is directly overlapped on the silicon bottom cell, the N-type doped amorphous silicon layer is in direct contact with the hole transport layer. Since the crystallinity of the N-type doped amorphous silicon layer is too high, and the material of the hole transport layer is a P-type amorphous organic material, the direct overlap of the two will lead to the problem of lattice mismatch and difficult tunneling, resulting in low open circuit voltage and conversion efficiency of the perovskite stacked cell.

[0040] In order to solve the above problems, in the present application, a seed crystal silicon layer 121 and a tunneling layer are sequentially arranged between the surface of the silicon bottom cell and the bottom surface of the perovskite top cell, the seed crystal silicon layer is close to the silicon bottom cell, and the tunneling layer is close to the perovskite top cell. The seed crystal silicon layer 121 is an amorphous silicon layer, and the tunneling layer is a P-type doped microcrystalline silicon oxygen layer 122, a P-type doped microcrystalline silicon carbide layer, or a P-type doped microcrystalline silicon carbide oxygen layer ( Figure 1 The description is made by taking the tunneling layer as the P-type doped microcrystalline silicon oxide layer 122 as an example).

[0041] That is, a seed crystal silicon layer 121 (amorphous silicon layer), a tunneling layer (a P-type doped microcrystalline silicon oxygen layer 122, a P-type doped microcrystalline silicon carbide layer or a P-type doped microcrystalline silicon carbide oxygen layer) are sequentially arranged on the N-type doped amorphous silicon layer 116 of the silicon bottom cell, and then the hole transport layer 131 of the perovskite top cell is overlapped on the tunneling layer. On the one hand, the seed crystal silicon layer 121 can be used as a seed crystal silicon layer, which can induce the growth of a nucleation layer so as to subsequently grow a large-grained microcrystalline silicon oxygen layer, a microcrystalline silicon carbide layer or a microcrystalline silicon carbide oxygen layer, and the layer has a high degree of crystallinity and can accommodate more doping elements to make its doping concentration higher. On the other hand, compared with the N-type doped polycrystalline layer 116, the P-type doped microcrystalline silicon oxygen layer 122, the P-type doped microcrystalline silicon carbide layer or the P-type doped microcrystalline silicon carbide oxygen layer has lower crystallinity and higher defect state density, which facilitates the movement of carriers and can serve as a good tunneling material, thereby making tunneling between the silicon bottom cell and the perovskite top cell easier, thereby improving the open circuit voltage and conversion efficiency of the cell.

[0042] Optionally, the thickness of the amorphous silicon layer is 1-3 nm; the thickness of the P-type doped microcrystalline silicon oxide layer 122, the P-type doped microcrystalline silicon carbide layer or the P-type doped microcrystalline silicon carbide oxide layer is 10-30 nm. The thin amorphous silicon layer will not substantially affect the thickness of the perovskite stacked cell, and can form a tunneling layer well, making the open circuit voltage and conversion efficiency of the cell higher.

[0043] As an example, the thickness of the amorphous silicon layer is 1nm, 2nm or 3nm; the thickness of the P-type doped microcrystalline silicon oxygen layer 122 is 10nm, 15nm, 20nm, 25nm or 30nm, or the thickness of the P-type doped microcrystalline silicon carbide layer is 10nm, 15nm, 20nm, 25nm or 30nm, or the thickness of the P-type doped microcrystalline silicon carbide oxygen layer is 10nm, 15nm, 20nm, 25nm or 30nm.

[0044] The method for preparing the above-mentioned silicon / perovskite tandem solar cell comprises the following steps:

[0045] S110, forming a silicon bottom cell.

[0046] S111, texturing the N-type silicon wafer 114. Optionally, texturing and cleaning are performed on the N-type silicon wafer 114 with a size of 156.75 mm and a thickness of 180 μm.

[0047] S112, depositing a first intrinsic amorphous silicon layer 115 on the front side of the N-type silicon wafer 114, and depositing a second intrinsic amorphous silicon layer 113 on the back side of the N-type silicon wafer 114. Optionally, the first intrinsic amorphous silicon layer 115 and the second intrinsic amorphous silicon layer 113 are prepared by PECVD.

[0048] For example, H2 is used to dilute SiH4 or pure SiH4 to deposit a single layer or a stacked layer of amorphous silicon film, wherein the deposition conditions of the intrinsic amorphous silicon layer include: a flow ratio of H2 to SiH4 of (1-15):1, a gas pressure range of 0.3-1 mbar, and a radio frequency power range of 300-1200 W. Thus, the first intrinsic amorphous silicon layer 115 and the second intrinsic amorphous silicon layer 113 with a thickness of 3-10 nm are obtained.

[0049] S113, forming an N-type doped amorphous silicon layer 116 on the surface of the first intrinsic amorphous silicon layer 115 away from the N-type silicon wafer 114, and the N-type doped amorphous silicon layer 116 is a light-receiving surface. Optionally, the N-type doped amorphous silicon layer 116 is deposited on the surface of the first intrinsic amorphous silicon layer 115 away from the N-type silicon wafer 114.

[0050] The deposition conditions of the N-type doped amorphous silicon layer 116 include: the flow ratio of H2, SiH4 and PH3 is (5-10):1:(1-10), the gas pressure range is 0.5-2 mbar, and the RF power range is 1000-3000 W. Thus, the N-type doped amorphous silicon layer 116 with a thickness of 10-30 nm is obtained.

[0051] S114, forming a P-type doped amorphous silicon layer 112 on the surface of the second intrinsic amorphous silicon layer 113 away from the N-type silicon wafer 114. Optionally, the P-type doped amorphous silicon layer 112 is deposited on the surface of the second intrinsic amorphous silicon layer 113 away from the N-type silicon wafer 114.

[0052] The deposition conditions of the P-type doped amorphous silicon layer 112 include: the flow ratio of H2, SiH4 and B2H6 is (5-10):1:(1-10), the gas pressure range is 0.5-2 mbar, and the RF power range is 1000-3000 W. The P-type doped amorphous silicon layer 112 with a thickness of 10-30 nm is obtained.

[0053] S115, using RPD or PVD method to deposit an ITO conductive film layer 111 on the back side of the P-type doped amorphous silicon layer 112, with a thickness of 80-100 nm.

[0054] S116, forming a back Ag electrode by screen printing, and curing to form a good ohmic contact between the silver grid line and the ITO conductive film layer 111, and the HJT bottom cell is completed.

[0055] Among them, the above-mentioned steps S115 and S116 can be prepared here or prepared after the step S20 is completed, which is not limited in this application.

[0056] S120, depositing a seed crystal silicon layer 121 on the upper surface of the silicon bottom cell, and depositing a tunneling layer on the surface of the seed crystal silicon layer 121, wherein the tunneling layer is a P-type doped microcrystalline silicon oxygen layer 122, a P-type doped microcrystalline silicon carbide layer, or a P-type doped microcrystalline silicon carbide oxygen layer. Optionally, deposit an amorphous silicon layer on the surface of the N-type doped amorphous silicon layer 116, and deposit a tunneling layer on the surface of the amorphous silicon layer.

[0057] Optionally, the deposition conditions of the amorphous silicon layer are: the flow rate of the gas source SiH4 is in the range of 200-1000 sccm, the gas pressure is in the range of 0.3-1 mbar, and the radio frequency power is in the range of 300-800 W, so as to obtain an amorphous silicon layer with a thickness of 1-3 nm.

[0058] If the tunneling layer is a P-type doped microcrystalline silicon oxide layer 122, the deposition conditions are: the flow ratio of H2, SiH4, CO2, and B2H6 is (200-500):(1-3):1:(1-3), the gas pressure range is 0.5-2 mbar, and the RF power range is 1000-3000 W. The P-type doped microcrystalline silicon oxide layer 122 with a thickness of 10-30 nm is obtained.

[0059] If the tunneling layer is a P-type doped microcrystalline silicon carbide layer, the deposition conditions are: the flow ratio of H2, SiH4, CH4, and B2H6 is (200-500):(1-3):1:(1-3), the gas pressure range is 0.5-2 mbar, and the RF power range is 1000-3000 W. In other embodiments, the carbon source is not limited to methane, but can also be ethane or propane.

[0060] If the tunneling layer is a P-type doped microcrystalline silicon carbide layer, the deposition conditions are: the flow ratio of H2, SiH4, CO2, CH4, B2H6 is (200-500):(1-3):1:(1-3):(1-3), the gas pressure range is 0.5-2 mbar, and the RF power range is 1000-3000 W. In other embodiments, the carbon source is not limited to methane, but can also be ethane or propane.

[0061] S130, forming a perovskite top cell on the surface of the tunneling layer.

[0062] Optionally, a hole transport layer 131 , a perovskite layer 132 , an electron transport layer 133 and a transparent conductive oxide layer 134 are sequentially deposited on the surface of the tunneling layer.

[0063] For example, a Spiro-TTB layer, a Perovskite layer, a LiF layer, a C60 layer, a SnO2 layer, a TCO layer and a silver electrode are sequentially deposited on the surface of the tunneling layer.

[0064] Figure 2 This is a schematic diagram of the second structure of the silicon / perovskite tandem solar cell provided in the embodiment of the present application. Figure 2 The silicon bottom cell of the second silicon / perovskite tandem solar cell is a silicon cell formed on a P-type silicon wafer 214 .

[0065] The silicon cell includes, arranged from top to bottom in sequence, a P-type doped amorphous silicon layer 216, a first intrinsic amorphous silicon layer 215, a P-type silicon wafer 214, a second intrinsic amorphous silicon layer 213, an N-type doped amorphous silicon layer 212, an ITO conductive film layer 211 and a silver electrode forming an ohmic contact with the ITO conductive film layer 211.

[0066] The structure of the perovskite top cell is the same as that of the perovskite top cell of the silicon bottom cell of the first silicon / perovskite tandem solar cell, and will not be repeated here.

[0067] If the perovskite top cell is directly overlapped on the silicon bottom cell, the P-type doped amorphous silicon layer is in direct contact with the hole transport layer. Since the crystallinity of the P-type doped amorphous silicon layer is too high, and the material of the electron transport layer is N-type amorphous material, the direct overlap of the two will lead to the problem of lattice mismatch and difficult tunneling, resulting in low open circuit voltage and conversion efficiency of the perovskite stacked cell.

[0068] In order to solve the above problems, in the present application, a seed crystal silicon layer 221 and a tunneling layer are sequentially arranged between the surface of the silicon bottom cell and the bottom surface of the perovskite top cell, the seed crystal silicon layer is close to the silicon bottom cell, and the tunneling layer is close to the perovskite top cell. Among them, the seed crystal silicon layer 221 is an amorphous silicon layer, and the tunneling layer is an N-type doped microcrystalline silicon oxygen layer 222, an N-type doped microcrystalline silicon carbide layer or an N-type doped microcrystalline silicon carbide oxygen layer ( Figure 2 The description is made by taking the tunneling layer as the N-type doped microcrystalline silicon oxide layer 222 as an example).

[0069] That is, a seed crystal silicon layer 221 (amorphous silicon layer), a tunneling layer (N-type doped microcrystalline silicon oxygen layer 222, N-type doped microcrystalline silicon carbide layer or N-type doped microcrystalline silicon carbide oxygen layer) are sequentially arranged on the P-type doped amorphous silicon layer 216 of the silicon bottom cell, and then the hole transport layer 131 of the perovskite top cell is overlapped on the tunneling layer. On the one hand, the seed crystal silicon layer 221 can be used as a seed crystal silicon layer, which can induce the growth of a nucleation layer so as to subsequently grow a large-grained microcrystalline silicon oxygen layer, a microcrystalline silicon carbide layer or a microcrystalline silicon carbide oxygen layer, and the layer has a high degree of crystallinity and can accommodate more doping elements to make its doping concentration higher. On the other hand, compared with the P-type doped polycrystalline layer 216, the N-type doped microcrystalline silicon oxygen layer 222, the N-type doped microcrystalline silicon carbide layer or the N-type doped microcrystalline silicon carbide oxygen layer has lower crystallinity and higher defect state density, which facilitates the movement of carriers and can serve as a good tunneling material, thereby making tunneling between the silicon bottom cell and the perovskite top cell easier, thereby improving the open circuit voltage and conversion efficiency of the cell.

[0070] Optionally, the thickness of the amorphous silicon layer is 1-3 nm; the thickness of the N-type doped microcrystalline silicon oxide layer 222, the N-type doped microcrystalline silicon carbide layer or the N-type doped microcrystalline silicon carbide oxide layer is 10-30 nm. The thin amorphous silicon layer will not substantially affect the thickness of the perovskite stacked cell, and can form a tunneling layer well, making the open circuit voltage and conversion efficiency of the cell higher.

[0071] As an example, the thickness of the amorphous silicon layer is 1nm, 2nm or 3nm; the thickness of the N-type doped microcrystalline silicon oxygen layer 222 is 10nm, 15nm, 20nm, 25nm or 30nm, or the thickness of the N-type doped microcrystalline silicon carbide layer is 10nm, 15nm, 20nm, 25nm or 30nm, or the thickness of the N-type doped microcrystalline silicon carbide layer is 10nm, 15nm, 20nm, 25nm or 30nm.

[0072] The method for preparing the above-mentioned silicon / perovskite tandem solar cell comprises the following steps:

[0073] S210, forming a silicon bottom cell.

[0074] S211, texturing the P-type silicon wafer 214. Optionally, texturing and cleaning are performed on the P-type silicon wafer 214 with a size of 156.75 mm and a thickness of 180 μm.

[0075] S212, depositing a first intrinsic amorphous silicon layer 215 on the front side of the P-type silicon wafer 214, and depositing a second intrinsic amorphous silicon layer 213 on the back side of the P-type silicon wafer 214. Optionally, the first intrinsic amorphous silicon layer 215 and the second intrinsic amorphous silicon layer are prepared 213 by PECVD.

[0076] For example, H2 is used to dilute SiH4 or pure SiH4 to deposit a single layer or a stacked layer of amorphous silicon film, wherein the deposition conditions of the intrinsic amorphous silicon layer include: the flow ratio of H2 to SiH4 is (1-15):1, the gas pressure range is 0.3-1mbar, and the RF power range is 300-1200W. The first intrinsic amorphous silicon layer 215 and the second intrinsic amorphous silicon layer 213 with a thickness of 3-10nm are obtained.

[0077] S213, forming a P-type doped amorphous silicon layer 216 on the surface of the first intrinsic amorphous silicon layer 215 away from the P-type silicon wafer 214, and the P-type doped amorphous silicon layer 216 is a light-receiving surface. Optionally, the P-type doped amorphous silicon layer 216 is deposited on the surface of the first intrinsic amorphous silicon layer 215 away from the P-type silicon wafer 214.

[0078] The deposition conditions of the P-type doped amorphous silicon layer 216 include: the flow ratio of H2, SiH4 and B2H6 is (5-10):1:(1-10), the gas pressure range is 0.5-2 mbar, and the RF power range is 1000-3000 W. The P-type doped amorphous silicon layer 216 with a thickness of 10-30 nm is obtained.

[0079] S214, forming an N-type doped amorphous silicon layer 212 on the surface of the second intrinsic amorphous silicon layer 213 away from the P-type silicon wafer 214. Optionally, depositing an N-type doped amorphous silicon layer 212 on the surface of the second intrinsic amorphous silicon layer 213 away from the P-type silicon wafer 214.

[0080] The deposition conditions of the N-type doped amorphous silicon layer 212 include: the flow ratio of H2, SiH4 and PH3 is (5-10):1:(1-10), the gas pressure range is 0.5-2 mbar, and the RF power range is 1000-3000 W. The N-type doped amorphous silicon layer 212 with a thickness of 10-30 nm is obtained.

[0081] S215 , depositing an ITO conductive film layer 211 on the back side of the N-type doped amorphous silicon layer 212 by using an RPD or PVD method, with a thickness of 80-100 nm.

[0082] S216, forming a back Ag electrode by screen printing, and curing to form a good ohmic contact between the silver grid line and the ITO conductive film layer 211, and the HJT bottom cell is completed.

[0083] Among them, the above-mentioned steps S215 and S216 can be prepared here or prepared after the step S20 is completed, and this application does not limit it.

[0084] S220, depositing a seed crystal silicon layer 221 on the upper surface of the silicon bottom cell, and depositing a tunneling layer on the surface of the seed crystal silicon layer 221, wherein the tunneling layer is an N-type doped microcrystalline silicon oxygen layer 222, an N-type doped microcrystalline silicon carbide layer, or an N-type doped microcrystalline silicon carbide oxygen layer. Optionally, deposit an amorphous silicon layer on the surface of the P-type doped amorphous silicon layer 216, and deposit a tunneling layer on the surface of the amorphous silicon layer.

[0085] Optionally, the deposition conditions of the amorphous silicon layer are: the flow range of the gas source SiH4 is 200-1000sccm; the gas pressure range is 0.3-1mbar, and the RF power range is 300-800W, so as to obtain an amorphous silicon layer with a thickness of 1-3nm.

[0086] If the tunneling layer is an N-type doped microcrystalline silicon oxide layer 222, the deposition conditions are as follows: the flow ratio of H2, SiH4, CO2, and PH3 is (200-500):(1-3):1:(1-3), the gas pressure range is 0.5-2 mbar, and the RF power range is 1000-3000 W, so as to obtain an N-type doped microcrystalline silicon oxide layer 222 with a thickness of 10-30 nm.

[0087] If the tunneling layer is an N-type doped microcrystalline silicon carbide layer, the deposition conditions are: the flow ratio of H2, SiH4, CH4, PH3 is (200-500): (1-3): 1: (1-3), the gas pressure range is 0.5-2 mbar, and the RF power range is 1000-3000 W. In other embodiments, the carbon source is not limited to methane, but can also be ethane or propane.

[0088] If the tunneling layer is an N-type doped microcrystalline silicon carbide layer, the deposition conditions are: the flow ratio of H2, SiH4, CO2, CH4, PH3 is (200-500): (1-3): 1: (1-3): (1-3), the gas pressure range is 0.5-2 mbar, and the RF power range is 1000-3000 W. In other embodiments, the carbon source is not limited to methane, but can also be ethane or propane.

[0089] S230, forming a perovskite top cell on the surface of the tunneling layer.

[0090] Optionally, a hole transport layer 131 , a perovskite layer 132 , an electron transport layer 133 and a transparent conductive oxide layer 134 are sequentially deposited on the surface of the tunneling layer.

[0091] For example, a Spiro-TTB layer, a Perovskite layer, a LiF layer, a C60 layer, a SnO2 layer, a TCO layer and a silver electrode are sequentially deposited on the surface of the tunneling layer.

[0092] In order to make the purpose, technical scheme and advantages of the embodiments of the present application clearer, the technical scheme in the embodiments of the present application will be described clearly and completely below. If the specific conditions are not specified in the embodiments, they are carried out according to the conventional conditions or the conditions recommended by the manufacturer. If the manufacturer is not specified for the reagents or instruments used, they are all conventional products that can be purchased commercially.

[0093] Example 1

[0094] See also Figure 1 The method for preparing a silicon / perovskite tandem solar cell provided in the present application comprises the following steps:

[0095] (1) An N-type silicon wafer 114 with a size of 156.75 mm and a thickness of 180 μm is subjected to texturing and cleaning treatment.

[0096] (2) A first intrinsic amorphous silicon layer 115 is deposited on the front side of the N-type silicon wafer 114, and a second intrinsic amorphous silicon layer 113 is deposited on the back side of the silicon wafer. The deposition conditions of the intrinsic amorphous silicon layer include: a flow ratio of H2 to SiH4 of 5:1, a gas pressure of 0.6 mbar, and a radio frequency power of 800 W, to obtain the first intrinsic amorphous silicon layer 115 and the second intrinsic amorphous silicon layer 113 with a thickness of 8 nm.

[0097] (3) Depositing an N-type doped amorphous silicon layer 116 on the surface of the first intrinsic amorphous silicon layer 115 away from the N-type silicon wafer 114. The deposition conditions of the N-type doped amorphous silicon layer 116 include: a flow ratio of H2, SiH4 and PH3 of 8:1:5, a gas pressure range of 1 mbar, and a radio frequency power range of 2000 W, to obtain an N-type doped amorphous silicon layer 116 with a thickness of 20 nm.

[0098] (4) A P-type doped amorphous silicon layer 112 is deposited on the surface of the second intrinsic amorphous silicon layer 113 that is away from the N-type silicon wafer 114. The deposition conditions of the P-type doped amorphous silicon layer 112 include: a flow ratio of H2, SiH4, and B2H6 of 8:1:5, a gas pressure range of 1 mbar, and a radio frequency power range of 12000 W, so as to obtain a P-type doped amorphous silicon layer 112 with a thickness of 10-30 nm.

[0099] (5) A seed crystal silicon layer 121 is deposited on the surface of the N-type doped amorphous silicon layer 116. The seed crystal silicon layer 121 is an amorphous silicon layer, and its deposition conditions are as follows: the flow range of the source gas SiH4 is 800sccm; the gas pressure range is 0.7mbar, and the RF power range is 500W, to obtain an amorphous silicon layer film with a thickness of 2nm.

[0100] (6) A P-type doped microcrystalline silicon oxide layer 122 is deposited on the surface of the amorphous silicon layer. The deposition conditions of the P-type doped microcrystalline silicon oxide layer 122 are as follows: the flow ratio of H2, SiH4, CO2, and B2H6 is 400:2:1:2, the gas pressure range is 1 mbar, and the RF power range is 2000 W, so as to obtain a P-type doped microcrystalline silicon oxide layer 122 with a thickness of 20 nm.

[0101] (7) Using PVD method, an ITO conductive film layer 111 with a thickness of 90 nm is deposited on the back side of the P-type doped amorphous silicon layer 112.

[0102] (8) The back Ag electrode is formed by screen printing and cured to form a good ohmic contact between the silver grid line and the ITO conductive film layer 111, and the HJT bottom cell is completed.

[0103] (9) A Spiro-TTB layer, a Perovskite layer, a LiF layer, a C60 layer, a SnO2 layer, a TCO layer and a silver electrode are sequentially deposited on the surface of the P-type doped microcrystalline silicon oxide layer 122.

[0104] Example 2

[0105] See also Figure 2 The method for preparing a silicon / perovskite tandem solar cell provided in the present application comprises the following steps:

[0106] (1) A P-type silicon wafer 214 with a size of 156.75 mm and a thickness of 180 μm is textured and cleaned.

[0107] (2) A first intrinsic amorphous silicon layer 215 is deposited on the front side of the P-type silicon wafer 214, and a second intrinsic amorphous silicon layer 213 is deposited on the back side of the P-type silicon wafer 214. The deposition conditions of the intrinsic amorphous silicon layer include: a flow ratio of H2 to SiH4 of 5:1, a gas pressure of 0.6 mbar, and a radio frequency power of 800 W, to obtain a first intrinsic amorphous silicon layer 215 and a second intrinsic amorphous silicon layer 213 with a thickness of 8 nm.

[0108] (3) A P-type doped amorphous silicon layer 216 is deposited on the surface of the first intrinsic amorphous silicon layer 215 that is away from the P-type silicon wafer 214. The deposition conditions of the P-type doped amorphous silicon layer 216 include: a flow ratio of H2, SiH4 and B2H6 of 8:1:5, a gas pressure range of 1 mbar, and a radio frequency power range of 2000 W, to obtain an N-type doped amorphous silicon layer 216 with a thickness of 20 nm.

[0109] (4) Depositing an N-type doped amorphous silicon layer 212 on the surface of the second intrinsic amorphous silicon layer 213 away from the P-type silicon wafer 214. The deposition conditions of the N-type doped amorphous silicon layer 212 include: a flow ratio of H2, SiH4 and PH3 of 8:1:5, a gas pressure range of 1 mbar, and a radio frequency power range of 12000 W, so as to obtain an N-type doped amorphous silicon layer 212 with a thickness of 10-30 nm.

[0110] (5) A seed crystal silicon layer 221 is deposited on the surface of the P-type doped amorphous silicon layer 216. The seed crystal silicon layer 221 is an amorphous silicon layer, and its deposition conditions are as follows: the flow range of the source gas SiH4 is 800sccm; the gas pressure range is 0.7mbar, and the RF power range is 500W, to obtain an amorphous silicon layer film with a thickness of 2nm.

[0111] (6) An N-type doped microcrystalline silicon oxide layer 222 is deposited on the surface of the seed crystal silicon layer 221. The deposition conditions of the N-type doped microcrystalline silicon oxide layer 222 are as follows: the flow ratio of H2, SiH4, CO2, and PH3 is 400:2:1:2, the gas pressure range is 1 mbar, and the RF power range is 2000 W, so as to obtain an N-type doped microcrystalline silicon oxide layer 222 with a thickness of 20 nm.

[0112] (7) Using PVD method, an ITO conductive film layer 211 with a thickness of 90 nm is deposited on the back side of the N-type doped amorphous silicon layer 212 .

[0113] (8) The back Ag electrode is formed by screen printing and cured to form a good ohmic contact between the silver grid line and the ITO conductive film layer 211, and the HJT bottom cell is completed.

[0114] (9) A Spiro-TTB layer, a Perovskite layer, a LiF layer, a C60 layer, a SnO2 layer, a TCO layer and a silver electrode are sequentially deposited on the surface of the P-type doped microcrystalline silicon oxide layer 122.

[0115] Example 3

[0116] Example 3 is an improvement on Example 1. The difference between Example 3 and Example 1 is that in step (6), a P-type doped microcrystalline silicon carbide layer is deposited on the surface of the amorphous silicon layer. The deposition conditions of the P-type doped microcrystalline silicon carbide layer are as follows: the flow ratio of H2, SiH4, CH4, and B2H6 is 400:2:1:2, the gas pressure range is 1 mbar, and the RF power range is 2000 W, so as to obtain a P-type doped microcrystalline silicon carbide layer with a thickness of 20 nm.

[0117] Example 4

[0118] Example 4 is an improvement on Example 1. The difference between Example 4 and Example 1 is that in step (6), a P-type doped microcrystalline silicon carbide oxygen layer is deposited on the surface of the amorphous silicon layer, and the deposition conditions of the P-type doped microcrystalline silicon carbide oxygen layer are as follows: the flow ratio of H2, SiH4, CO2, CH4, and B2H6 is 400:2:1:2:2, the gas pressure range is 1 mbar, and the RF power range is 2000 W, so as to obtain a P-type doped microcrystalline silicon carbide oxygen layer with a thickness of 20 nm.

[0119] Comparative Example 1

[0120] Figure 3 Schematic diagram of the layer structure of the silicon / perovskite tandem solar cell provided in Comparative Example 1. Figure 3 The difference between Comparative Example 1 and Example 1 is that in Comparative Example 1, step (5) and step (6) in Example 1 are not performed.

[0121] Comparative Example 2

[0122] Figure 4 Schematic diagram of the layer structure of the silicon / perovskite tandem solar cell provided for comparative example 2. Figure 4 The difference between comparative example 2 and embodiment 1 is that in comparative example 2, step (5) and step (6) in embodiment 1 are not performed. From top to bottom, the layer structure of the silicon bottom cell is: N-type doped amorphous silicon layer 116, silicon oxide layer 311, N-type silicon wafer 114, P-type doped amorphous silicon layer 112, aluminum oxide and silicon nitride layer 312, and silver electrodes disposed thereon.

[0123] Comparative Example 3

[0124] Figure 5 Schematic diagram of the layer structure of the silicon / perovskite tandem solar cell provided for comparative example 3. Figure 5 The difference between Comparative Example 3 and Example 1 is that in Comparative Example 3, step (5) in Example 1 is not performed.

[0125] Comparative Example 4

[0126] Figure 6 Schematic diagram of the layer structure of the silicon / perovskite tandem solar cell provided for comparative example 4. Figure 6 The difference between Comparative Example 4 and Example 1 is that in Comparative Example 4, step (6) in Example 1 is not performed.

[0127] Comparative Example 5

[0128] The difference between Comparative Example 5 and Example 2 is that in Comparative Example 5, step (5) and step (6) in Example 2 are not performed.

[0129] Test example

[0130] The preparation method provided in Example 1, after completing step (6), is subjected to TEM test, and the test results are as follows: Figure 7 ,from Figure 7 It can be seen that the lattice arrangement of the P-type doped microcrystalline silicon oxygen layer is: partly long-range ordered and partly disordered. A PN junction can be formed through the P-type doped microcrystalline silicon oxygen layer and the N-type doped amorphous silicon layer below the amorphous silicon layer. Its built-in electric field can promote hole tunneling. In addition, the PN junction can promote the superposition of the Voc of the bottom battery and the top battery, thereby increasing the open circuit voltage of the entire stacked battery and improving the battery efficiency.

[0131] Figure 8 The Raman spectrum test graph of the doped microcrystalline silicon oxide layer prepared by the preparation method of the silicon / perovskite stacked solar cell provided in Examples 1 and 2 of the present application and Comparative Example 4. Among them, the comparison group is the Raman spectrum test graph of the P-type doped microcrystalline silicon oxide layer provided in Comparative Example 4 (Xc=8.49%); the experimental group-1 is the Raman spectrum test graph of the P-type doped microcrystalline silicon oxide layer provided in Example 1 (Xc=29.54%); the experimental group-2 is the Raman spectrum test graph of the N-type doped microcrystalline silicon oxide layer provided in Example 2 (Xc=28.48%). Figure 8 It can be seen that the seed crystal silicon layer (the setting of the amorphous silicon layer) can make the doped microcrystalline silicon oxygen layer on its upper surface more crystallinity.

[0132] The performance of the silicon / perovskite tandem solar cells provided by Examples 1 to 4 and Comparative Examples 1 to 5 are respectively tested as shown in Table 1; wherein the testing method is: using a BERGER online IV testing system to test the electrical performance parameters such as conversion efficiency, open circuit voltage, short circuit current, and fill factor of the silicon / perovskite tandem solar cells under the conditions of 25°C, AM 1.5, and 1 standard sun.

[0133] Table 1 Performance of silicon / perovskite tandem solar cells

[0134]

[0135]

[0136] As can be seen from Table 1, the silicon / perovskite tandem solar cell provided in the present application has an amorphous silicon layer and a doped microcrystalline silicon oxygen layer arranged in sequence between the silicon bottom cell and the perovskite cell, which can improve the conversion efficiency of the cell and increase the open circuit voltage.

[0137] From the comparison between Example 1 and Comparative Example 1 and Comparative Example 2, it can be seen that by sequentially arranging an amorphous silicon layer and a P-type doped microcrystalline silicon oxide layer between the silicon-based cell and the perovskite cell, the conversion efficiency of the cell can be improved and the open circuit voltage can be increased.

[0138] From the comparison between Example 1 and Comparative Example 3 and Comparative Example 4, it can be seen that if only a P-type doped microcrystalline silicon oxygen layer is set between the silicon bottom cell and the perovskite cell, the conversion efficiency of the cell is not significantly improved. If only an amorphous silicon layer is set between the silicon bottom cell and the perovskite cell, the conversion efficiency of the cell is reduced. However, if an amorphous silicon layer and a P-type doped microcrystalline silicon oxygen layer are sequentially set between the silicon bottom cell and the perovskite cell, the two have a certain synergistic effect, which can improve the conversion efficiency of the cell and increase the open circuit voltage.

[0139] From the comparison between Example 2 and Comparative Example 5, it can be seen that by sequentially arranging an amorphous silicon layer and an N-type doped microcrystalline silicon oxide layer between the silicon-based cell and the perovskite cell, the conversion efficiency of the cell can be improved and the open circuit voltage can be increased.

[0140] It can be seen from Example 1, Example 3 and Example 4 that the P-type doped microcrystalline silicon oxide layer, the P-type doped microcrystalline silicon carbide layer and the P-type doped microcrystalline silicon carbide oxide layer, when combined with the amorphous silicon layer, can improve the conversion efficiency of the battery and the open circuit voltage.

[0141] The embodiments described above are part of the embodiments of the present application, rather than all of the embodiments. The detailed description of the embodiments of the present application is not intended to limit the scope of the present application for protection, but merely represents the selected embodiments of the present application. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of the present application.

Claims

1. A silicon / perovskite tandem solar cell, comprising a silicon bottom cell and a perovskite top cell, characterized in that: A seed crystal silicon layer and a tunneling layer are sequentially arranged between the surface of the silicon bottom cell and the bottom surface of the perovskite top cell, the seed crystal silicon layer is close to the silicon bottom cell, and the tunneling layer is close to the perovskite top cell; Wherein, the seed crystal silicon layer is an undoped amorphous silicon layer, and the tunneling layer is a doped microcrystalline silicon carbide oxygen layer; the thickness of the amorphous silicon layer is 1-3 nm; and the thickness of the tunneling layer is 10-30 nm.

2. The silicon / perovskite tandem solar cell according to claim 1, characterized in that: The silicon bottom cell comprises an N-type doped amorphous silicon layer, a first intrinsic amorphous silicon layer, an N-type silicon wafer, a second intrinsic amorphous silicon layer and a P-type doped amorphous silicon layer arranged in sequence from top to bottom, and the tunneling layer is a P-type doped microcrystalline silicon carbide oxygen layer.

3. The silicon / perovskite tandem solar cell according to claim 1, characterized in that: The silicon bottom cell comprises a P-type doped amorphous silicon layer, a first intrinsic amorphous silicon layer, a P-type silicon wafer, a second intrinsic amorphous silicon layer and an N-type doped amorphous silicon layer arranged in sequence from top to bottom, and the tunneling layer is an N-type doped microcrystalline silicon carbide oxygen layer.

4. A method for preparing a silicon / perovskite tandem solar cell according to any one of claims 1 to 3, characterized in that: include: forming the silicon bottom cell; Depositing the amorphous silicon layer on the upper surface of the silicon bottom cell, and depositing the tunneling layer on the surface of the amorphous silicon layer, wherein the tunneling layer is the doped microcrystalline silicon carbide oxygen layer; The perovskite top cell is formed on the surface of the tunneling layer.

5. The preparation method according to claim 4, characterized in that The deposition conditions of the amorphous silicon layer include: the flow rate range of the gas source SiH4 is 200-1000 sccm; the gas pressure range is 0.3-1 mbar, and the radio frequency power range is 300-800 W.

6. The preparation method according to claim 4, characterized in that: The tunneling layer is a P-type doped microcrystalline silicon carbide layer, and the deposition conditions of the tunneling layer are: the flow ratio of H2, SiH4, CO2, CH4, and B2H6 is (200-500):(1-3):1:(1-3):(1-3), the gas pressure range is 0.5-2 mbar, and the RF power range is 1000-3000 W.

7. The preparation method according to claim 6, characterized in that: The method for forming the silicon bottom battery comprises: texturing an N-type silicon wafer; depositing a first intrinsic amorphous silicon layer on the front side of the N-type silicon wafer, and depositing a second intrinsic amorphous silicon layer on the back side of the silicon wafer; forming an N-type doped amorphous silicon layer on the surface of the first intrinsic amorphous silicon layer away from the N-type silicon wafer, and forming a P-type doped amorphous silicon layer on the surface of the second intrinsic amorphous silicon layer away from the N-type silicon wafer.

8. The preparation method according to claim 4, characterized in that The tunneling layer is an N-type doped microcrystalline silicon carbide layer, and the deposition conditions of the tunneling layer are: the flow ratio of H2, SiH4, CO2, CH4, and PH3 is (200-500):(1-3):1:(1-3):(1-3), the gas pressure range is 0.5-2 mbar, and the RF power range is 1000-3000 W.

9. The preparation method according to claim 8, characterized in that: The method for forming the silicon bottom battery includes: texturing a P-type silicon wafer; depositing a first intrinsic amorphous silicon layer on the front side of the P-type silicon wafer, and depositing a second intrinsic amorphous silicon layer on the back side of the silicon wafer; forming a P-type doped amorphous silicon layer on the surface of the first intrinsic amorphous silicon layer facing away from the P-type silicon wafer, and forming an N-type doped amorphous silicon layer on the surface of the second intrinsic amorphous silicon layer facing away from the P-type silicon wafer.

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