A silicon-based infrared upconversion device and its preparation method
By forming a heterojunction of a conical micro-nano structure and a thin-layer structure of molybdenum diselenide on a single crystal silicon substrate, the problem that silicon materials cannot be applied to the short-wave infrared industry field of the 1.55μm band is solved, and cost-effective infrared detection band expansion is achieved.
Patent Information
- Application Number
- CN202111006508.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2021-08-30
- Publication Date
- 2025-07-29
- Estimated Expiration
- 2041-08-30
AI Technical Summary
In the prior art, silicon materials cannot be applied to the short-wave infrared industry field above the 1.1μm band, especially the 1.55μm band, resulting in high costs.
A tapered micro-nano structure is formed on a single crystal silicon substrate, and a thin layer structure of molybdenum diselenide is deposited on its surface to form a heterojunction of molybdenum diselenide and silicon, combining an organic light emitting layer and a top electrode to prepare a silicon-based infrared upconversion device.
The detection band upper limit of silicon-based infrared upconversion devices is greatly improved, from 1.1μm to 1.8μm, reducing the preparation cost.
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Figure CN113690375B_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of short-wave infrared imaging technology, and particularly to a silicon-based infrared upconversion device and a preparation method thereof. Background Art
[0002] Short-wave infrared (SWIR) is generally defined as electromagnetic waves in the wavelength band of 0.9 - 1.7 μm. Different from visible light waves, short-wave infrared cannot be observed by the human naked eye. Short-wave infrared imaging is becoming an important technology in multiple fields and application scenarios, including semiconductor wafer inspection, agricultural product inspection, biomedical inspection, space remote sensing, military reconnaissance, automotive night vision systems, security monitoring systems, various semiconductor lasers, infrared light-emitting diode emission light tracking, calibration, identification, and optical communication device beam calibration, etc.
[0003] The core part of traditional short-wave infrared imagers is a short-wave infrared imaging chip based on III-V semiconductor materials such as InGaAs. Due to the high costs of the InP substrate material, epitaxial growth technology, and indium pillar interconnection technology necessary for manufacturing traditional short-wave infrared imaging chips, their manufacturing cost is hundreds of times that of silicon-based imaging chips for visible light imaging. Since silicon materials can only absorb light waves within 1.1 μm, even though they are inexpensive and the processing technology is mature, they cannot be applied in the short-wave infrared industrial field with a wavelength band higher than 1.1 μm (especially 1.55 μm). In recent years, a structure of an upconversion device integrating an InGaAs / InP PIN photodetector and an organic light-emitting diode in series has been proposed, avoiding indium pillar interconnection and reducing the cost of short-wave infrared detection. However, since it is still necessary to epitaxially grow InGaAs materials on an InP substrate, the preparation cost is still dozens of times higher than that of silicon-based detectors. Therefore, whether it is possible to bypass technical routes such as epitaxial growth and indium pillar interconnection, prepare a short-wave infrared imaging chip based on an inexpensive silicon substrate, and achieve infrared detection in the wavelength band above 1.1 μm is the key to whether short-wave infrared imaging technology can significantly reduce costs and be commercially applied on a large scale. Summary of the Invention
[0004] An object of the present invention is to solve the technical problem in the prior art that silicon materials cannot be applied in the short-wave infrared industrial field with a wavelength band higher than 1.1 μm, especially 1.55 μm.
[0005] In particular, the present invention provides a preparation method for a silicon-based infrared upconversion device, including the following steps:
[0006] Etching a monocrystalline silicon substrate with a window array using a wet etching solution containing an alcohol and an alkali to form tapered micro-nano structures on the window array of the monocrystalline silicon substrate;
[0007] Depositing a thin layer of molybdenum diselenide on the surface of the conical micro-nanostructure by a co-evaporation method, and annealing the layer to obtain a heterojunction of molybdenum diselenide and silicon;
[0008] A bottom electrode is formed on the other surface of the single crystal silicon substrate opposite to the surface where the window array is located, and an organic light-emitting layer and a top electrode are sequentially formed on the heterojunction of molybdenum diselenide and silicon, thereby preparing a silicon-based infrared up-conversion device.
[0009] Optionally, in the step of depositing a thin layer of molybdenum diselenide on the surface of the conical micro-nanostructure by a co-evaporation method and annealing to obtain a heterojunction of molybdenum diselenide and silicon, the co-evaporation method includes the following steps:
[0010] placing a molybdenum evaporation source and a selenium evaporation source into an evaporator;
[0011] The co-evaporation is carried out for 10-30s under the condition that the co-evaporation rate ratio of the molybdenum evaporation source to the selenium evaporation source is 1:2.5-4.5.
[0012] Optionally, in the step of depositing a thin layer of molybdenum diselenide on the surface of the conical micro-nanostructure by a co-evaporation method and annealing to obtain a heterojunction of molybdenum diselenide and silicon, the annealing conditions are: annealing is performed in a segmented step-by-step temperature increase manner, wherein the segmented step-by-step temperature increase consists of a first stage temperature increase and a second stage temperature increase;
[0013] The first stage of heating is maintained at 100-300°C for 0.5-3 minutes;
[0014] The second stage of heating is carried out by maintaining the temperature at 650-850° C. for 20-40 seconds.
[0015] Optionally, in the step of etching the single crystal silicon substrate using a wet etching solution comprising an alcohol and an alkali solution to form a conical micro-nano structure on the first surface of the single crystal silicon substrate, the wet etching solution comprises the following components:
[0016] The mass percentage of the alcohol is 12%-16%, the mass percentage of the water is 82%-85% and the mass percentage of the alkali is 2%-4%.
[0017] Optionally, before etching the single crystal silicon substrate with a wet etching solution containing an alcohol and an alkali solution to form a conical micro-nano structure on the first surface of the single crystal silicon substrate, the following steps are included:
[0018] Provide P-type single crystal silicon oxide wafers;
[0019] Coating a photoresist on the P-type single crystal silicon oxide wafer, covering it with a mask pattern, exposing and developing it, and then removing the photoresist on the exposed portion to expose the silicon oxide layer;
[0020] The P-type single crystal silicon oxide wafer processed in the above steps is placed in a hydrofluoric acid solution, the exposed oxide layer is etched away, and the remaining photoresist is removed to obtain the single crystal silicon substrate with the window array.
[0021] Optionally, the mask pattern includes a plurality of square windows arranged in an array and spaced apart from each other.
[0022] Optionally, in the step of etching the single crystal silicon substrate using a wet etching solution containing an alcohol and an alkali solution to form a conical micro-nano structure on the first surface of the single crystal silicon substrate, the conditions for etching the single crystal silicon substrate using a wet etching solution containing an alcohol and an alkali solution are: etching at 70-90°C for 40-60 minutes, so that the height of the obtained conical micro-nano structure is any value in the range of 0.5-1.5 μm.
[0023] In particular, the present invention further provides a silicon-based infrared up-conversion device prepared using the aforementioned preparation method, comprising:
[0024] A single crystal silicon substrate having a first surface and a second surface opposite to the first surface, wherein a window array is formed on the first surface;
[0025] a conical micro-nanostructure formed on the window array of the single crystal silicon substrate;
[0026] A molybdenum diselenide thin layer structure wrapped on the surface of the conical micro-nano structure;
[0027] a bottom electrode formed on the second surface of the single crystal silicon substrate;
[0028] An organic light-emitting layer is formed on the single crystal silicon substrate having the molybdenum diselenide thin layer structure;
[0029] A top electrode is formed on the organic light-emitting layer.
[0030] Optionally, the conical micro-nanostructure is composed of a plurality of large, medium and small conical structures, and the ratio of the large, medium and small conical structures is 3-4:2-3:1 respectively;
[0031] Optionally, the taper of the conical micro-nanostructure is any value in the range of 30-60°;
[0032] Optionally, the height of the conical micro-nanostructure is any value in the range of 0.5-1.5 μm.
[0033] Optionally, the thickness of the molybdenum diselenide thin layer structure is any value in the range of 2-30 nm.
[0034] According to the solution of the embodiment of the present invention, by forming a conical micro-nano structure on the window array of a single-crystalline silicon substrate and depositing a molybdenum diselenide thin-layer structure on the conical micro-nano structure, a heterojunction of molybdenum diselenide and silicon is obtained, thereby greatly improving the upper limit of the detection band of the silicon-based infrared upconversion device. The upper limit of the detection band of the silicon-based infrared upconversion device can be increased from 1.1 μm in the prior art to 1.8 μm at most. Through research, it is found that the reason for greatly improving the upper limit of the detection band of the silicon-based infrared upconversion device is mainly due to the synergistic effect between the conical micro-nano structure and the molybdenum diselenide thin-layer structure. The molybdenum diselenide thin-layer structure forms a heterojunction of molybdenum diselenide and silicon with the conical micro-nano structure. Moreover, the conical micro-nano structure improves the absorption efficiency of the heterojunction of molybdenum diselenide and silicon for short-wave infrared. Without either the conical micro-nano structure or the molybdenum diselenide thin-layer structure, the corresponding technical effect cannot be achieved.
[0035] Furthermore, the co-evaporation rate ratio of the molybdenum evaporation source and the selenium evaporation source in the co-evaporation method, the annealing conditions, the mass percentage of each component in the wet etching solution, and the conditions for etching the single-crystalline silicon substrate all have a very important impact on the upper limit of the detection band of the silicon-based infrared upconversion device.
[0036] From the following detailed description of the specific embodiments of the present invention in conjunction with the drawings, those skilled in the art will become more clear about the above and other objects, advantages, and features of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS
[0037] Some specific embodiments of the present invention will be described in detail hereinafter with reference to the drawings in an exemplary but non-limiting manner. The same reference numerals in the drawings denote the same or similar components or parts. Those skilled in the art should understand that these drawings are not necessarily drawn to scale. In the drawings:
[0038] Figure 1 shows a schematic flow chart of a method for fabricating a silicon-based infrared upconversion device according to an embodiment of the present invention;
[0039] Figure 2 shows Figure 1 a schematic flow chart of the steps included before step S100 shown;
[0040] Figure 3 shows a scanning electron microscope image of a conical micro-nano structure according to an embodiment of the present invention;
[0041] Figure 4 shows a schematic structural diagram of a silicon-based infrared upconversion device according to an embodiment of the present invention;
[0042] Figure 5Shows a comparison diagram of the absorption spectra of a single-crystalline silicon substrate in the prior art and a heterojunction of molybdenum diselenide and silicon in an embodiment of the present invention;
[0043] Figure 6 Shows a change curve diagram of the visible light brightness output by a silicon-based infrared upconversion device according to an embodiment of the present invention under different incident infrared light intensities, and its operating voltage is 4-10V;
[0044] Figure 7 Shows a comparison diagram of the absorption spectra of a conical micro-nano structure, a molybdenum diselenide thin layer structure, and a conical micro-nano structure plus a molybdenum diselenide thin layer structure in an embodiment of the present invention;
[0045] Figure 8 Shows a comparison diagram of the photocurrent responses of a conical micro-nano structure, a molybdenum diselenide thin layer structure, and a conical micro-nano structure plus a molybdenum diselenide thin layer structure in an embodiment of the present invention under an incident light intensity of 10 mW / cm of 1.55 μm infrared laser; 2 Incident light intensity;
[0046] In the figure: 1 - single-crystalline silicon substrate, 11 - P-type single-crystalline silicon, 12 - silicon oxide, 2 - molybdenum diselenide thin layer structure, 3 - bottom electrode, 4 - organic light-emitting layer, 5 - top electrode. Detailed implementation manners
[0047] Figure 1 Shows a schematic flow chart of a preparation method of a silicon-based infrared upconversion device according to an embodiment of the present invention. As Figure 1 Shown, the preparation method includes:
[0048] Step S100, etching a single-crystalline silicon substrate with a window array using a wet etching solution containing an alcohol and an alkali to form a conical micro-nano structure on the window array of the single-crystalline silicon substrate;
[0049] Step S200, depositing a molybdenum diselenide thin layer structure on the surface of the conical micro-nano structure by co-evaporation and annealing to obtain a heterojunction of molybdenum diselenide and silicon;
[0050] Step S300, forming a bottom electrode on the other surface of the single-crystalline silicon substrate opposite to the surface where the window array is located, and sequentially forming an organic light-emitting layer and a top electrode on the heterojunction of molybdenum diselenide and silicon, thereby preparing a silicon-based infrared upconversion device.
[0051] According to the solution of the embodiment of the present invention, by forming a conical micro-nano structure on the window array of a single-crystalline silicon substrate and depositing a molybdenum diselenide thin-layer structure on the conical micro-nano structure, a heterojunction of molybdenum diselenide and silicon is obtained, thereby greatly improving the upper limit of the detection band of the silicon-based infrared upconversion device. The upper limit of the detection band of the silicon-based infrared upconversion device can be increased from 1.1 μm in the prior art to 1.8 μm at most. Through research, it is found that the reason for greatly improving the upper limit of the detection band of the silicon-based infrared upconversion device is mainly due to the synergistic effect between the conical micro-nano structure and the molybdenum diselenide thin-layer structure. The molybdenum diselenide thin-layer structure forms a heterojunction of molybdenum diselenide and silicon with the conical micro-nano structure. Moreover, the conical micro-nano structure internally reflects infrared light multiple times through the light trapping effect, improving the absorption efficiency of the heterojunction of molybdenum diselenide and silicon for short-wave infrared. Without either the conical micro-nano structure or the molybdenum diselenide thin-layer structure, the corresponding technical effect cannot be achieved. And if either of the conical micro-nano structure and the molybdenum diselenide thin-layer structure is replaced with other structures, the corresponding technical effect cannot be achieved either.
[0052] Figure 2 shows Figure 1 A schematic flowchart showing the steps included before step S100. Before step S100, it also includes:
[0053] Step S001, providing a P-type single-crystalline silicon oxide wafer;
[0054] Step S002, coating a photoresist on the P-type single-crystalline silicon oxide wafer, covering a mask pattern for exposure and development, and then removing the photoresist of the exposed part, thereby exposing the silicon oxide layer;
[0055] Step S003, placing the P-type single-crystalline silicon oxide wafer processed through the foregoing steps into a hydrofluoric acid solution, etching away the silicon oxide layer, and obtaining a single-crystalline silicon substrate with a window array after removing the remaining photoresist.
[0056] In a specific embodiment, in step S001, the size of the P-type single-crystal silicon oxide wafer can be taken as four inches, for example. The thickness of the oxide layer of the P-type single-crystal silicon oxide wafer is 300 nm, and the resistance value is 0.1 - 1 Ω. The P-type single-crystal silicon oxide wafer is cut into a rectangle of 1.1 cm * 1.8 cm with a diamond knife. It is ultrasonically cleaned in acetone, isopropyl alcohol, ethanol, and ultrapure water for 10 min respectively, and then dried with a nitrogen gun. In step S002, the photoresist coated is a positive photoresist, and when coating, it can be spin-coated with a spin coater at 3000 rmp for 30 s, and then dried at 100 °C for 3 min. The mask pattern includes a plurality of square windows arranged at intervals in an array. For example, the mask pattern can be a square with a side length of 40 μm, and the centers of the plurality of squares are spaced 50 μm apart. During exposure, ultraviolet light of a lithography machine is used for exposure for 2 s. During development, it is immersed in a positive photoresist developer for 10 s. In step S003, the concentration of hydrofluoric acid can be 5%, for example. After soaking for 25 min to remove the exposed oxide layer, the sample is ultrasonically treated in acetone for a period of time and then dried with nitrogen.
[0057] In the above specific embodiment, only one example is given for each parameter. In fact, each parameter is not limited to the corresponding parameter above. Some values can be selected near each point value as long as a single-crystal silicon substrate with a window array that meets the requirements can be prepared.
[0058] In step S100, the wet etching solution is composed of the following components: alcohol with a mass percentage of 12% - 16%, water with a mass percentage of 82% - 85%, and alkali with a mass percentage of 2% - 4%. In one embodiment, the mass percentage of the alcohol is 12%, the mass percentage of the water is 85%, and the mass percentage of the alkali is 3%. In another embodiment, the mass percentage of the alcohol is 16%, the mass percentage of the water is 82%, and the mass percentage of the alkali is 2%. In yet another embodiment, the mass percentage of the alcohol is 14%, the mass percentage of the water is 83%, and the mass percentage of the alkali is 3%. In this step, the conditions for etching the single-crystal silicon substrate with a window array using the wet etching solution are etching at 70 - 90 °C for 40 - 60 min. In a specific embodiment, the conditions for etching the single-crystal silicon substrate with a window array using the wet etching solution can be etching at 90 °C for 40 min, or etching at 80 °C for 50 min, or etching at 70 °C for 60 min. The height of the finally prepared tapered micro-nano structure is any value in the range of 0.5 - 1.5 μm. For example, it can be 0.5 μm, 1 μm, or 1.5 μm. The taper of the finally obtained tapered micro-nano structure is any value in the range of 30 - 60 °. For example, it can be 30 °, 40 °, 50 °, or 60 °. As Figure 3As shown, the finally obtained conical micro-nano structure is composed of multiple large, medium, and small conical structures, and the ratios of the large, medium, and small conical structures are 3-4:2-3:1 respectively. For example, it can be 3:2:1, 4:3:1, or 2.5:2.5:1.
[0059] The conditions for etching with the wet etching solution, the composition ratio of the wet etching solution, and the etching temperature and time are the most important conditions affecting the performance of the finally prepared conical micro-nano structure. These conditions basically determine whether large, medium, and small conical structures can be obtained, whether the ratio of these three conical structures can reach 3-4:2-3:1, and whether the taper and height can reach the above-defined values, ultimately providing a basis for the silicon-based infrared upconversion device to achieve unexpected technical effects.
[0060] In step S200, the thickness of the molybdenum diselenide thin layer structure is any value in the range of 2-30 nm, such as 2 nm, 10 nm, or 30 nm. The co-evaporation method includes: placing a molybdenum evaporation source and a selenium evaporation source in an evaporator; co-evaporating for 10-30 s under the condition that the co-evaporation rate ratio of the molybdenum evaporation source and the selenium evaporation source is 1:2.5-4.5.
[0061] In a specific embodiment, the molybdenum evaporation source can be, for example, molybdenum powder, and the selenium evaporation source can be, for example, selenium powder. The evaporator can be, for example, a metal thermal evaporator. During co-evaporation, first fix the single-crystalline silicon substrate with the formed conical micro-nano structure in step S100 on the metal tray of the metal thermal evaporator and heat it to 350 °C, and then place the molybdenum powder and selenium powder in the evaporation boat and evaporate them simultaneously. Among them, co-evaporate for 10-30 s under the condition that the co-evaporation rate ratio of the molybdenum evaporation source and the selenium evaporation source is 1:2.5-4.5. For example, it can be co-evaporation for 10 s when the co-evaporation rate ratio of the molybdenum powder and the selenium powder is 1:3.5, where the evaporation rate of the molybdenum powder is 0.2 Å / s and the evaporation rate of the selenium powder is 0.7 Å / s. During the co-evaporation process, the molybdenum diselenide thin layer is formed and deposited on the conical micro-nano structure.
[0062] The annealing condition in step S200 is carried out by means of segmented stepwise heating. Among them, the segmented stepwise heating consists of the first-stage heating and the second-stage heating. The condition for the first-stage heating is to maintain at 100-300 °C for 0.5-3 min. The condition for the second-stage heating is to maintain at 650-850 °C for 20-40 s. In one embodiment, the condition for the first-stage heating can be, for example, to maintain at 100 °C for 3 min, or to maintain at 200 °C for 1.5 min, or to maintain at 300 °C for 0.5 min. The condition for the second-stage heating can be, for example, to maintain at 650 °C for 40 s, or to maintain at 750 °C for 30 s, or to maintain at 850 °C for 20 s. After annealing, cool it to room temperature.
[0063] In step S200 , the ratio of the co-evaporation rates and the annealing conditions are key factors in ultimately obtaining a silicon-based infrared up-conversion device with excellent performance.
[0064] Furthermore, the ratio of the co-evaporation rates of the molybdenum evaporation source and the selenium evaporation source in the co-evaporation method, as well as the annealing conditions, the mass percentage of each component in the wet etching solution, and the conditions for etching the single-crystalline silicon substrate all have a very important influence on the upper limit of the detection band of the silicon-based infrared up-conversion device.
[0065] In step S300, the bottom electrode can be, for example, a gold electrode, which is formed on the other surface of the single crystal silicon substrate opposite to the surface where the window array is located by electron beam deposition, and the deposition thickness is 15 nm, so that the formed gold electrode is a transparent electrode.
[0066] The organic light-emitting layer includes 40nm of NPB, 40nm of mCBP:ReO3 (5wt%), 15nm of mCBP, 30nm of mCBP:PO-T2T:FIrpic (44wt%:44wt%:12wt%), 20nm of PO-T2T, and 30nm of PO-T2T:Rb2CO3 (5wt%) from bottom to top.
[0067] The top electrode is composed of 12nm calcium and 15nm transparent silver electrodes from bottom to top.
[0068] The detection band of the silicon-based infrared up-conversion device finally prepared is 1.8 μm. The detection band of the silicon-based infrared up-conversion device prepared by the above specific embodiment is 1550 nm, and the final output wavelength is 480 nm.
[0069] Accordingly, the present invention also provides a silicon-based infrared up-conversion device, which is prepared using the above-mentioned preparation method. Figure 4 As shown, the silicon-based infrared up-conversion device includes a single crystal silicon substrate 1, a conical micro-nanostructure (obscured by a molybdenum diselenide thin layer structure, not shown), a molybdenum diselenide thin layer structure 2, a bottom electrode 3, an organic light-emitting layer 4, and a top electrode 5. The main body of the single crystal silicon substrate 1 is P-type single crystal silicon 11, and the surface of the P-type single crystal silicon 11 has silicon oxide 12. The single crystal silicon substrate 1 has a first surface and a second surface opposite to the first surface, and a window array is formed on the first surface. The conical micro-nanostructure is formed on the window array of the single crystal silicon substrate 1. The molybdenum diselenide thin layer structure 2 is wrapped around the surface of the conical micro-nanostructure. The bottom electrode 3 is formed on the second surface of the single crystal silicon substrate 1. The organic light-emitting layer 4 is formed on the single crystal silicon substrate 1 on which the molybdenum diselenide thin layer structure 2 is formed. The top electrode 5 is formed on the organic light-emitting layer 4.
[0070] All other features of the silicon-based infrared upconversion device are exactly the same as those of the silicon-based infrared upconversion device obtained by the above preparation method, and will not be elaborated here one by one.
[0071] Figure 5 Figure 4 shows a comparison diagram of the absorption spectra of a single-crystalline silicon substrate in the prior art and a heterojunction of molybdenum diselenide and silicon in an embodiment of the present invention. Figure 5 As can be seen, in the embodiment of the present invention, by preparing a conical micro-nano structure on a single-crystalline silicon substrate and then depositing a molybdenum diselenide thin-layer structure on the surface of the conical micro-nano structure, the formed heterojunction of molybdenum diselenide and silicon has excellent performance, and the absorption ability in the wavelength range above 1.1 μm is significantly improved compared with the single-crystalline silicon substrate in the prior art.
[0072] Figure 6 Figure 5 shows a curve graph of the change in the visible light brightness output by the silicon-based infrared upconversion device according to an embodiment of the present invention under different incident infrared light intensities, and its operating voltage is 4 - 10V. Figure 6 As can be seen, at an operating voltage of 4 - 10V, as the incident infrared light intensity increases, the output visible light brightness increases.
[0073] In order to illustrate the synergistic effect between the conical micro-nano structure and the molybdenum diselenide thin-layer structure, the inventor compared the conical micro-nano structure, the molybdenum diselenide thin-layer structure, and the structure of the conical micro-nano structure plus the molybdenum diselenide thin-layer structure in the embodiment of the present invention. Figure 7 Figure 6 shows a comparison diagram of the absorption spectra of the conical micro-nano structure, the molybdenum diselenide thin-layer structure, and the structure of the conical micro-nano structure plus the molybdenum diselenide thin-layer structure in the embodiment of the present invention. Figure 7 As can be seen, for the individual conical micro-nano structure and the individual molybdenum diselenide thin-layer structure, their absorption spectra are both relatively low and cannot significantly improve the absorption ability of light in the wavelength range above 1.1 μm. However, when the structure of the present application is adopted, the absorption ability of light in the wavelength range above 1.1 μm can be significantly improved.
[0074] Figure 8 Figure 7 shows a comparison diagram of the photocurrent responses of the conical micro-nano structure, the molybdenum diselenide thin-layer structure, and the structure of the conical micro-nano structure plus the molybdenum diselenide thin-layer structure in the embodiment of the present invention under an incident light intensity of 10 mW / cm² of 1.55 μm infrared laser. 2 As can be seen, neither the individual conical micro-nano structure nor the individual molybdenum diselenide thin-layer structure can absorb light in this wavelength range, while the structure of the conical micro-nano structure plus the molybdenum diselenide thin-layer structure in the embodiment of the present application can absorb light in this wavelength range and can also absorb light in the 1.8 μm wavelength range. Figure 8
[0075] At this point, those skilled in the art will recognize that, although a number of exemplary embodiments of the present invention have been shown and described in detail herein, many other variations or modifications consistent with the principles of the present invention may be directly determined or derived from the disclosure of the present invention without departing from the spirit and scope of the present invention. Therefore, the scope of the present invention should be understood and deemed to cover all such other variations or modifications.
Claims
1. A preparation method of a silicon-based infrared up-conversion device, characterized in that, The steps include: Etching a single crystal silicon substrate having a window array using a wet etching solution comprising an alcohol and an alkali solution to form a conical micro-nano structure on the window array of the single crystal silicon substrate; Depositing a thin layer of molybdenum diselenide on the surface of the conical micro-nanostructure by a co-evaporation method, and annealing the layer to obtain a heterojunction of molybdenum diselenide and silicon; A bottom electrode is formed on the other surface of the single crystal silicon substrate opposite to the surface where the window array is located, and an organic light-emitting layer and a top electrode are sequentially formed on the heterojunction of molybdenum diselenide and silicon, thereby preparing a silicon-based infrared upconversion device; The conical micro-nano structure is composed of a plurality of large, medium and small conical structures, and the ratio of the large, medium and small conical structures is 3-4:2-3:1 respectively.
2. The preparation method according to claim 1, characterized in that, In the step of depositing a thin layer of molybdenum diselenide on the surface of the conical micro-nanostructure by a co-evaporation method and annealing to obtain a heterojunction of molybdenum diselenide and silicon, the co-evaporation method includes the following steps: placing a molybdenum evaporation source and a selenium evaporation source into an evaporator; The co-evaporation is performed for 10-30 s under the condition that the co-evaporation rate ratio of the molybdenum evaporation source to the selenium evaporation source is 1:2.5-4.
5.
3. The preparation method according to claim 2, characterized in that, In the step of depositing a thin layer of molybdenum diselenide on the surface of the conical micro-nanostructure by a co-evaporation method and annealing to obtain a heterojunction of molybdenum diselenide and silicon, the annealing conditions are: annealing is performed in a segmented step-by-step heating manner, wherein the segmented step-by-step heating comprises a first stage heating and a second stage heating; The first stage of heating is maintained at 100-300°C for 0.5-3 min; The second stage of heating is carried out by maintaining the temperature at 650-850° C. for 20-40 s.
4. The preparation method according to any one of claims 1-3, characterized in that, In the step of etching a single crystal silicon substrate having a window array using a wet etching solution containing an alcohol and an alkali solution to form a conical micro-nano structure on the window array of the single crystal silicon substrate, the wet etching solution includes the following components: 12%-16% by mass of alcohol, 82%-85% by mass of water, and 2%-4% by mass of alkali.
5. The preparation method according to claim 4, characterized in that, Before etching a single crystal silicon substrate having a window array using a wet etching solution containing an alcohol and an alkali solution to form a conical micro-nano structure on the window array of the single crystal silicon substrate, the method includes the following steps: Provide P-type single crystal silicon oxide wafers; Coating a photoresist on the P-type single crystal silicon oxide wafer, covering it with a mask pattern, exposing and developing it, and then removing the photoresist on the exposed portion to expose the silicon oxide layer; The P-type single crystal silicon oxide wafer processed in the above steps is placed in a hydrofluoric acid solution, the exposed oxide layer is etched away, and the remaining photoresist is removed to obtain the single crystal silicon substrate with the window array.
6. The preparation method according to claim 5, characterized in that, The mask pattern includes a plurality of square windows arranged in an array and spaced apart from each other.
7. The preparation method according to any one of claims 1-3, 5-6, characterized in that, In the step of etching a single-crystalline silicon substrate with a window array using a wet etching solution containing an alcohol and an alkali to form tapered micro-nano structures on the window array of the single-crystalline silicon substrate, the conditions for etching the single-crystalline silicon substrate with the wet etching solution containing an alcohol and an alkali are: etching at 70 - 90 °C for 40 - 60 min so that the height of the obtained tapered micro-nano structures is any value in the range of 0.5 - 1.5 μm.
8. A silicon-based infrared upconversion device prepared by using the preparation method according to any one of claims 1-7, characterized in that, Comprising: A single-crystalline silicon substrate having a first surface and a second surface opposite to the first surface, and a window array is formed on the first surface; Tapered micro-nano structures formed on the window array of the single-crystalline silicon substrate; A molybdenum diselenide thin-layer structure wrapped on the surface of the tapered micro-nano structures; A bottom electrode formed on the second surface of the single-crystalline silicon substrate; An organic light-emitting layer formed on the single-crystalline silicon substrate on which the molybdenum diselenide thin-layer structure is formed; A top electrode formed on the organic light-emitting layer.
9. The silicon-based infrared up-conversion device according to claim 8, wherein The taper of the tapered micro-nano structures is any value in the range of 30 - 60°; The height of the tapered micro-nano structures is any value in the range of 0.5 - 1.5 μm.
10. The silicon-based infrared upconversion device according to claim 8, wherein The thickness of the molybdenum diselenide thin-layer structure is any value in the range of 2 - 30 nm.