Clock failure detection and correction between synchronized network devices

Abstract

Embodiments of the present application relate to clock failure detection and correction between synchronized network devices. A first network device may receive a clock quality indication associated with a clock of the second network device from a second network device, wherein the clock of the second network device is a reference clock for a network including the first network device and the second network device. The first network device may determine, based on a clock signal of the second network device, that a quality metric of the clock does not meet a threshold. The first network device may provide a clock failure notification to the second network device to cause the second network device to downgrade a clock quality indication transmitted by the second network device. The first network device may select a new reference clock for the first network device based on receiving the downgraded clock quality indication from the second network device.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims the benefit of Indian Provisional Application No. 202041021034, filed on May 19, 2020, titled “CLOCK FAULT DETECTION AND CORRECTION BETWEEN SYNCHRONIZED NETWORK DEVICES”, the entire contents of which are expressly incorporated herein by reference. Technical Field

[0003] Various embodiments of the present application relate to clock failure detection and correction between synchronized network devices. Background Art

[0004] In some networks, timing may be critical to telecommunication system performance. For example, in some networks, synchronized clocks may be required at both the source and destination nodes. Synchronous networks, such as synchronous Ethernet networks, facilitate the transmission of clock signals over the physical layer to provide synchronization signals to network resources that may ultimately require synchronization. Summary of the invention

[0005] According to some implementations, a method may include: receiving, by a first network device, a clock quality indication associated with a clock of a second network device from a second network device, wherein the clock of the second network device is a reference clock for a network including the first network device and the second network device; determining, by the first network device, that a quality metric of the clock does not satisfy a threshold based on a clock signal of the second network device; providing, by the first network device, a clock failure notification to the second network device to cause the second network device to downgrade the clock quality indication transmitted by the second network device; and selecting, by the first network device, a new reference clock for the first network device based on receiving the downgraded clock quality indication from the second network device.

[0006] According to some implementations, a first network device may include one or more memories and one or more processors. In some implementations, the one or more processors are communicatively coupled to the one or more memories. The one or more processors may be configured to: measure a quality metric of a clock signal, wherein the clock signal is associated with a clock of a second network device, and wherein the clock of the second network device is a reference clock for the first network device and the second network device; determine based on the clock signal that the quality metric does not meet a threshold; provide a clock failure notification to the second network device based on the threshold not being met to cause the second network device to downgrade a clock quality indication transmitted by the second network device; and perform actions associated with establishing a new reference clock for the first network device.

[0007] According to some implementations, a system may include a first network device, the first network device being configured to: receive a clock quality indication associated with a clock of a second network device, wherein the clock of the second network device is a reference clock for a network including the first network device and the second network device; determine, based on a clock signal of the second network device, that a quality metric of the clock does not satisfy a threshold; and provide a clock failure notification to the second network device to cause the second network device to downgrade the clock quality indication. BRIEF DESCRIPTION OF THE DRAWINGS

[0008] Figures 1A to 1F is a diagram of an example implementation described herein;

[0009] Figure 2 is a diagram of an example implementation described herein;

[0010] Figure 3 is a diagram of one or more example clock failure notification configurations described herein;

[0011] Figure 4A is a diagram of an example process for a network device to detect a clock failure as described herein;

[0012] Figure 4B is a diagram of an example process of a network device experiencing a clock failure as described herein;

[0013] Figure 5 is a diagram of an example environment in which the systems and / or methods described herein may be implemented;

[0014] Figure 6 yes Figure 5 diagrams of example components of one or more devices;

[0015] Figure 7 yes Figure 5 diagrams of example components of one or more devices; and

[0016] Figures 8 to 10 is a flow diagram of an example process related to clock failure detection and correction between synchronized network devices. DETAILED DESCRIPTION

[0017] The following detailed description of example implementations refers to the accompanying drawings.The same reference numbers in different drawings may identify the same or similar elements.

[0018] In a synchronous network such as a synchronous Ethernet network, network devices can be synchronized by sharing a clock signal at the physical layer. The network device can transmit an indication of the quality of the clock signal to each network device via a packet. For example, a first network device can receive a first physical clock signal and an indication of the quality of the first clock signal from a second network device via a packet. The first network device can receive a second physical clock signal and an indication of the quality of the second clock signal from a third network device via a packet. The first network device can determine that the clock signal from the second network device should be used as a reference clock for the network (e.g., based on comparing the indication of the quality of the clock signals from the second network device and the third network device).

[0019] The first network device may provide the clock signal of the second network device to the third network device, and indicate to the third network device that the clock signal of the second network device will be used to synchronize the first network device, the second network device, and the third network device. However, if the clock signal of the network device fails (e.g., due to an error of the network device, degradation of the hardware of the network device, a bad port, a bad line card, etc.), the network device may continue to transmit an indication of the quality of the clock signal through a packet that does not reflect the actual quality of the physical clock signal (e.g., when the actual quality of the clock signal is poor, the network device may continue to transmit an indication that the quality of the clock signal is very high). Another network device (e.g., the first network device) may receive an indication of the quality of the clock signal (e.g., indicating a high-quality clock signal), and select the clock signal as a reference clock based on the indication of the quality of the clock signal. As a result, a poor physical clock signal may be selected (e.g., due to a failure of the clock signal of the reference clock), and it is transmitted to other network devices of the network and used to synchronize the network devices. In addition, using a poor clock signal to synchronize network devices of a synchronous network may degrade the performance and reliability of communications sent by the network device through the synchronous network.

[0020] Some implementations described herein implement clock fault detection and correction between synchronized network devices. For example, a first network device may be configured to compare a quality metric of a physical clock signal received from another network device with a threshold value. The first network device may determine that the clock of another network device has failed based on determining that the quality metric of the clock signal does not meet the threshold value. The first network device may send a clock failure notification to another network device to cause the other network device to downgrade the clock quality indication transmitted by the other network device via packets. The first network device may select different clock signals as the reference clock of the synchronization network based on the downgraded clock quality indication received from another network device. As a result, the synchronization network will not use a bad clock signal to synchronize the network devices of the synchronization network. This can save computing resources and / or network resources, otherwise these computing resources and / or network resources will be used to synchronize the network devices of the synchronization network using a bad clock signal. In addition, ensuring that the network devices of the synchronization network are not synchronized using a bad clock signal can improve the performance and reliability of the communication sent by the network device through the synchronization network.

[0021] Figures 1A to 1E is a diagram of an example implementation 100 described herein. Figures 1A to 1E As shown, the example implementation 100 includes a plurality of network devices (e.g., R0, R1, R2, and R3) within a synchronous network. R2 may be a first network device, R0 may be a second network device, R1 may be a third network device, and R3 may be a fourth network device. R2 may be located between R0 and R1 and R3 within the topology of the synchronous network (e.g., R0 and R1 may be located upstream of R2 in the synchronous network topology (e.g., before R2 in the synchronous network topology), and R3 may be downstream of R2 in the synchronous network topology (e.g., after R2 in the synchronous network topology). In some implementations, R0, R1, and / or R2 may be router devices, switching devices, server devices, wireless nodes, etc.

[0022] Network devices (e.g., R0, R1, R2, R3, etc.) can transmit clock signals at the physical layer of the network. The network devices can use a selected reference clock (e.g., a clock of a network device from a synchronous network) to synchronize (e.g., based on a clock signal and a clock quality indication associated with the clock signal arriving via a packet) an internal clock to form a chain or tree of interconnected Ethernet equipment clocks (EECs). The EEC can be based on a primary reference clock (PRC) (e.g., the source of the EEC can be traced to the PRC, which can be the selected reference clock). The synchronous network can be a synchronous Ethernet network that uses a synchronous Ethernet protocol to synchronize network devices within the synchronous network (e.g., using a reference clock of the synchronous network).

[0023] like Figure 1AAs shown in FIG. 110, R2 may be based on a clock quality indication (e.g., Figures 1A to 1E The clock quality of one or more clocks of the synchronization network can be monitored by using a clock quality indication (QL) as shown in the figure and a clock signal received from other network devices (e.g., R0, R1, etc.) of the synchronization network. The clock quality indication can indicate the quality of the clock signal sent by the network device. The clock quality indication can indicate that the clock signal is associated with a primary reference clock (e.g., PRC), the clock signal is associated with a synchronization providing unit (e.g., SSU), the clock signal is associated with a synchronous digital hierarchy (SDH) equipment clock (e.g., SEC), the clock signal should not be used (e.g., DNU), and the like. The clock quality indication can be prioritized so that the network device receiving the clock quality indication can select the clock signal as the reference clock of the synchronization network based on the priority of the clock quality indication. For example, according to ITU-T standard G.8264, the clock quality indication can be prioritized so that the indication of the PRC has the highest priority, followed by the indication of the SSU, and then the indication of the SEC. In some implementations, the indication of the SSU can include a higher priority SSU (e.g., SSU-A) and a lower priority SSU (e.g., SSU-B). In some implementations, the network device selects the clock signal associated with the highest priority clock quality indication as a reference clock for synchronizing the network.

[0024] The clock quality indication may be communicated via the Ethernet communication layer of the synchronization network (e.g., by Figures 1A to 1E The Ethernet communication layer may be an Ethernet synchronization message channel of the network. For example, the clock quality indication may be sent within a packet using packet-based communication, using an Ethernet synchronization message channel (ESMC), etc. The clock quality indication may be included in a synchronization status message (SSM), may be sent as an SSM, etc. The clock quality indication may be indicated in a type-length-value (TLV) field of the SSM. For example, the SSM may include a TLV field including a value. The value may indicate a clock quality indication (e.g., PRC, SSU, SEC, DNU, etc.).

[0025] The clock signal can be transmitted via the physical layer of the synchronization network (e.g., Figures 1A to 1EThe clock signal may be transmitted by a network device (e.g., a clock module of the network device). The clock signal may be received via a phase-locked loop (PLL) of the network device. The clock signal may be associated with one or more quality metrics, such as a frequency error rate, a frequency accuracy level, a frequency drift, a noise transfer level, a noise generation level, a retention performance level, etc. The quality metric may be measured in parts per million (ppm). The quality metric may indicate a quality level of the clock signal (e.g., a good amount, a bad quality, etc.). The network device may measure or determine the quality metric via the PLL of the network device.

[0026] like Figure 1A As shown, R2 may receive a clock signal (e.g., Clk-0) and an associated clock quality indication (e.g., PRC) from R0. R2 may receive the clock signal via a PLL associated with R2. R2 may receive the clock quality indication via a first port (e.g., P2-1) of R2. R2 may determine that the clock signal of R0 should be selected as the reference clock of the synchronization network based on the Best Master Clock Algorithm (BMCA). The BMCA may compare the clock quality indication received from R2 with the clock quality indication received from one or more other network devices (e.g., R1, etc.) to verify the input, compare the clock quality indication, select the reference clock, and the like. For example, R2 may determine that the clock signal of R0 should be selected as the reference clock of the synchronization network based on the clock quality indication received from R0. In this case, R0 may transmit an indication that the clock quality of the clock signal is a PRC (e.g., indicating that the clock signal sent by R0 is associated with the PRC of the synchronization network, the clock signal sent by R0 is of high quality, the clock signal sent by R0 is associated with the highest priority, and the like). R1 may transmit a clock quality indication of R1's clock signal to an SSU (e.g., SSU-A, SSU-B, etc.). R2 may compare a clock quality indication (e.g., PRC) received from R0 with a clock quality indication (e.g., SSU) received from R1. R2 may select R0's clock signal as a reference clock based on the clock quality indication received from R0 having a higher priority than the clock quality indication received from R1.

[0027] In some implementations, the clock signal (e.g., Clk-0) may be a clock signal generated by R0. In some implementations, R0 may receive a clock signal from a network device (e.g., Clk-1) upstream of R0. Figure 1AR0 may receive a clock signal from a network device upstream of R0 (not shown). As described above, R0 may determine that a clock signal from a network device upstream of R0 should be selected as a reference clock (e.g., based on a clock quality indication associated with the clock signal from the network device upstream of R0 and using BMCA, as described above). R0 may generate a clock signal (e.g., Clk-0) that is identical to (e.g., matches) the clock signal received from the network device upstream of R0. R0 may transmit the clock signal and the clock quality indication of the PRC to R2 and / or other network devices downstream of R0.

[0028] In some implementations, R2 may transmit a clock signal and a clock quality indication to R0. In this case, since R2 has determined that the clock signal of R0 should be selected as the reference clock of the synchronization network, R2 may transmit the clock quality indication of DNU to R0 (e.g., indicating that R0 should continue to use Clk-0 as the reference clock and that R0 should not select the physical clock sent by R2 to R0).

[0029] R2 may generate a clock signal (e.g., Clk-0) identical to the clock signal received from R0 based on determining that the clock signal of R0 should be selected as the reference clock for the synchronization network. R2 may transmit the clock signal Clk-0 and the clock quality indication of the PRC to R1. The clock quality indication transmitted by R2 to R1 may indicate to R1 that the clock signal transmitted by R2 should be used as the reference clock for the synchronization network. As a result, R1 may determine that the clock signal transmitted by R2 should be selected as the reference clock for the synchronization network (e.g., using BMCA in a manner similar to that described above). R1 ​​may generate a clock signal (e.g., Clk-0) identical to the clock signal received from R2, and transmit the clock signal and the clock quality indication of the PRC to other network devices downstream of R1.

[0030] Similarly, R2 may transmit a clock signal (e.g., Clk-0) and an associated clock quality indicator (e.g., PRC) to one or more downstream network devices such as R3, which may cause the downstream network devices to select the clock signal (e.g., Clk-0) transmitted by R2 as a reference clock.

[0031] In some implementations, the clock signal Clk-0 transmitted by R0 may be a clock signal of poor quality. For example, due to a fault associated with R0, the clock signal generated by R0 may have a higher frequency error rate (e.g., 4.1ppm, etc.). In some implementations, the higher frequency error rate may be based on a fault associated with R0. The fault may be a transmission fault (e.g., a fault based on a port of R0, a fault of a line card of R0, a fault of an optical module used at R0, etc.), a hardware fault associated with generating a clock signal, etc. In some implementations, the higher frequency error rate may be based on a fault associated with a network device upstream of R0 (e.g., a network device that transmits a clock signal to R0). However, R0 may not be able to detect a higher frequency error rate because R0 can only select a reference clock and match the clock of R0 with the selected reference clock. In some implementations, R0 may not detect a transmission fault associated with sending a clock signal (e.g., because the internal hardware of R0 that generates the clock signal may not fail). As a result, R0 may transmit a clock signal with a higher frequency error rate to R2 while indicating (e.g., via a clock quality indication) that the clock signal is associated with a high quality (e.g., 0 ppm frequency error rate, etc.) clock signal. This may cause R2 to select the clock signal transmitted by R0 and drive the clock signal to R1 and / or other downstream network devices (e.g., R3, etc.) with a higher frequency error rate while indicating (e.g., via a clock quality indication) that the clock signal is associated with a high quality clock signal.

[0032] like Figure 1B As shown in reference numeral 120, R2 may determine that the quality metric of the clock signal received from R0 does not meet a threshold value (e.g., does not meet a threshold value, is not within a threshold range, etc.). As described above, R0 may indicate in a clock quality indication (via an SSM packet) that the clock quality of the clock signal transmitted by R0 is PRC (e.g., indicating that the clock signal of R0 should be used as a reference clock for a synchronization network). For example, R2 may be configured with one or more threshold quality metrics (e.g., frequency error rate, frequency accuracy, etc.). The threshold quality metric may indicate that the quality metric of the physical clock signal must meet a specific value (e.g., in ppm), must be within a specific value range, etc.

[0033] R2 may determine a quality metric associated with the clock signal received from R0. For example, R2 may analyze or measure the clock signal received from R0 to determine the quality metric. R2 may determine or measure the quality metric of the clock signal of R0 via a PLL (or the like) of R2 (e.g., R2 may input the clock signal of R0 into a PLL of R2 to measure or determine the quality metric). As a result, R2 may determine that an error (e.g., a clock failure) associated with the clock signal received from R0 has occurred based on the quality metric of the clock signal received from R0 not satisfying a threshold.

[0034] like Figure 1C As shown at 130, R2 may provide clock failure feedback to R0 using the clock quality indication provided to R0 (e.g., as described above with respect to Figure 1A For example, R2 may provide a clock failure notification to R0 via an SSM packet to notify R0 that the clock signal transmitted from R0 to R2 is bad (e.g., as described above, the quality metric of the clock signal does not meet the threshold). During this time, since the clock quality indication received from R0 has not changed (e.g., the clock quality indication transmitted by R0 is still PRC), R2 may continue to use the clock signal from R0 as the reference clock.

[0035] The clock failure notification may be an indication in the TLV field of the SSM transmitted to R0. In some implementations, the SSM may be the same type of SSM used to transmit the clock quality indication (e.g., if R0 is an updated or enhanced network device, as described below with respect to Figure 3 In some implementations, the SSM may be a different type of SSM (e.g., if R0 is not configured to detect clock failure notifications in the SSM). Figure 3 Examples of one or more clock failure notifications are discussed in more detail.

[0036] like Figure 1D As shown at 140, the clock failure notification may be configured to cause R0 to downgrade the clock quality indication transmitted by R0 (e.g., to a lower priority clock quality indication, to a clock quality indication of the DNU, to a clock quality indication indicating a clock failure, etc.). For example, based on the clock failure notification received from R2, R0 may transmit the clock quality indication of the DNU to R2.

[0037] As shown in reference numeral 150, R2 may select R1's clock signal (e.g., Clk-1) as a new reference clock based on receiving a degraded clock quality indication from R0. For example, R2 may select R1's clock signal as a new reference clock in a manner similar to that described above (e.g., using BMCA, etc.). R2 may compare the clock quality indication (e.g., SSU) received from R1 with the clock quality indication (e.g., DNU) received from R0. R2 may select R1's clock signal based on the clock quality indication received from R1 having a higher priority than the clock quality indication (e.g., the degraded clock quality indication) received from R0. In some implementations, when determining a clock signal to be selected as a new reference clock for the synchronization network, R2 may receive a clock signal and an associated clock quality indication from one or more other network devices. R2 may transmit a clock quality indication of DNU to D1 based on selecting R1's clock signal as the reference clock (e.g., indicating to R1 that R1 should not use the clock signal sent by R2 as the reference clock).

[0038] As shown in the reference numeral 160, R2 can provide the selected reference clock to R0, R3 and / or one or more other network devices. For example, R2 can generate a clock signal (e.g., Clk-1) identical to the clock signal received from R1. R2 can transmit the clock signal and the associated clock quality indication (e.g., SSU) to R0 and / or R3. For example, R2 can transmit the clock signal (e.g., Clk-1) to R0 and / or R3 via the physical layer of the synchronization network. R2 can transmit the clock quality indication of SSU to R0 and / or R3 via the ESMC of the synchronization network. As a result, the clock signal (e.g., Clk-1) can be selected as the reference clock of R0, R1, R2 and / or R3, and can be used to synchronize R0, R1, R2 and / or R3 (e.g., according to the synchronous Ethernet protocol). In some implementations, R0 may not select the clock signal of R1 as the reference clock. For example, R0 can receive the clock quality indication of PRC from one or more other network devices (not shown) upstream of R0. As a result, R0 may select a clock signal transmitted by one or more other network devices because the clock quality indication (eg, PRC) transmitted by the one or more other network devices has a higher priority than the clock quality indication (eg, SSU) transmitted by R1.

[0039] like Figure 1E As shown, it is shown Figure 1D That is, the network device can perform Figure 1D The action described or concerning Figure 1E Whether the network device performs the action described above. Figure 1D or Figure 1EThe actions described may be based on whether R0 is a legacy network device (e.g., not configured to detect clock failure notifications) or an enhanced or updated network device (e.g., configured to detect clock failure notifications). If R0 is an enhanced or updated network device (e.g., configured to perform one or more of the functions described herein), the network device may perform actions related to Figure 1D If R0 is a traditional network device, the network device can perform the following operations: Figure 1E In some implementations, R0 may not be configured to detect a clock failure notification. For example, R0 may be a legacy network device (e.g., may not be updated, may not be upgraded, or may not be able to detect a clock failure notification). In this case, R0 may not perform any actions associated with receiving a clock failure notification.

[0040] As shown in the reference numeral 170, after R2 provides a clock failure notification to R0, R0 may not downgrade the clock quality indication transmitted by R0 to R2. That is, R2 may continue to transmit the clock quality indication of the PRC to R0. For example, if R0 is not configured to detect the clock quality notification, R0 may continue to transmit the clock quality indication of the PRC because R0 can ignore the clock failure notification, discard the packet carrying the clock failure notification (for example, based on the type of packet that R0 is configured to process), and so on. For example, if R0 is a legacy network device, R2 may transmit the clock failure notification according to a new type of SSM that is different from the type of SSM used to transmit the clock quality indication. R0 may not be configured to process the new type of SSM and may therefore discard the new type of SSM carrying the clock failure notification. Refer to the following Figure 3 Configuration of clock failure notification for conventional network devices is discussed in more detail.

[0041] As shown in reference numeral 180, based on R0 not degrading the clock quality indication transmitted to R2, R2 can continue to use the clock signal of R0 (e.g., Clk-0) as the reference clock. For example, the clock quality indication transmitted by R0 can still be PRC, which has a higher priority than the clock quality indication transmitted by R1 (e.g., SSU). As a result, R2 can continue to select the clock signal of R0 instead of the clock signal of R1. In this way, R2 can continue to transmit the clock signal of Clk-0 and the clock quality indication of PRC to R1, R3 and / or one or more other network devices.

[0042] like Figure 1FAs shown in the figure 190, R2 providing a new reference clock signal (e.g., Clk-1) can cause R0 and / or R3 to use R1's clock as a new reference clock for the synchronization network and transmit the clock signal (e.g., Clk-1) and the clock quality indication of the SSU (e.g., the clock quality indication transmitted by R1) to other network devices. For example, R0 and / or R3 can select R1's clock signal as the reference clock for the synchronization network. As a result, R0 and / or R3 can transmit R1's clock signal and the associated clock quality indication of the SSU to one or more other network devices of the synchronization network. This can cause one or more other network devices of the synchronization network to select R1's clock signal as the reference clock for the synchronization network. In some implementations, if R0, R3, and / or one or more other network devices are receiving a higher priority clock quality indication (e.g., PRC) from another network device, R0, R3, and / or one or more other network devices can select the clock signal of the network device that transmits the higher priority clock quality indication instead of R1's clock signal.

[0043] As a result, the network devices of the synchronization network can be synchronized using the clock signal of R1 instead of the clock signal of R0 that is determined to be associated with a clock failure or poor quality. Therefore, the synchronization network will not use a poor clock signal (e.g., Clk-0) to synchronize the network devices of the synchronization network. This can save computing resources and / or network resources that would otherwise be used to synchronize the network devices of the synchronization network using the poor clock signal. In addition, ensuring that the network devices of the synchronization network are not synchronized using a poor clock signal can improve the performance and reliability of communications sent by the network devices through the synchronization network.

[0044] As shown above, Figures 1A to 1F are provided as examples. Other examples may be related to Figures 1A to 1F The examples described are different. Figures 1A to 1F The number and arrangement of devices shown are provided as examples. In practice, Figures 1A to 1F There may be more devices, fewer devices, different devices, or differently arranged devices than shown. Figures 1A to 1F Two or more of the devices shown may be implemented in a single device, or Figures 1A to 1F The single device shown may be implemented as multiple distributed devices. Additionally or alternatively, Figures 1A to 1F The illustrated set of devices (e.g., one or more devices) may perform the operations described as being performed by Figures 1A to 1F Another group of devices is shown performing one or more functions.

[0045] Figure 2 is a diagram of an example implementation 200 described herein. Figure 2As shown, the example implementation 200 includes a network device (e.g., R2) receiving a clock quality indication (QL) from a second network device (e.g., R0) and a third network device (e.g., R1) in a synchronous network. R0, R1, and R2 may correspond to the above reference Figures 1A to 1E The network devices R0, R1 and R2.

[0046] like Figure 2 As shown, R2 can select different clocks as the reference clocks for synchronizing the network at different points in time. For example, as shown by the circled arrow, R2 can select the clock signal received from R0 or R1 based on the clock quality indication received from R0 or R1 and / or the clock failure detected by R2. R2 can receive the clock signal and the clock quality indication and use the same method as described above with respect to Figures 1A to 1F The reference clock is selected in a similar (or identical) manner.

[0047] The clock quality indications received from different network devices may be received in different ports of R2. For example, the clock quality indication received by R2 from R0 may be received in a first port (e.g., P2-1) of R2. The clock quality indication received by R2 from R1 may be received in a second port (e.g., P2-2) of R2.

[0048] like Figure 2 As shown at 205, R2 may receive a clock quality indication of a primary reference clock (PRC) from R0 via port P2-1 of R2. As shown at 210, R2 may determine that R1 is not transmitting a clock at the time (e.g., no clock) or that the clock quality indication transmitted by R1 is of a lower priority (e.g., SSU). As a result, R2 may select R0's clock as the reference clock for the synchronization network. R2 may determine that a clock failure has occurred in the physical clock signal received from R0 (e.g., based on the above description of the clock quality indication). Figures 1A to 1F R2 may transmit a clock failure notification to R0 based on the determination that a clock failure has occurred. As a result, as shown by reference numeral 215, R0 may downgrade the clock quality indication transmitted by R0 to not used (DNU).

[0049] As shown in reference numeral 220, R2 may have a port P2-2 of R2 receive a clock quality indication of the SSU from R1. R2 may select the clock of R1 as the reference clock of the synchronization network based on detecting a clock failure associated with R0, R0 downgrading the clock quality indication to DNU, and / or the clock quality indication of R1 from the SSU. For example, even if the clock quality indication (e.g., PRC) transmitted by R0 indicates a high-quality clock, the clock signal transmitted by R0 may have a high frequency error rate (e.g., 4.1 PPM, etc.). Even if the clock quality indication (e.g., SSU) transmitted by R1 indicates a lower priority than the clock quality indication transmitted by R0, the clock signal of R1 may have a lower frequency error rate (e.g., 0 ppm, etc.). As a result, even if the clock quality indication transmitted by R1 (e.g., SSU) has a lower priority than the clock quality indication initially transmitted by R2 (e.g., the clock quality indication initially transmitted by R2 was PRC, but is now DNU, which enables R2 to select the clock signal transmitted by R1 as the reference clock), R2 can be enabled to select a clock signal with a lower frequency error rate (e.g., the clock signal transmitted by R1) as the reference clock.

[0050] As shown at reference numerals 225 and 235, R2 may receive other clock quality indications from R0 and may determine that the clock quality indications indicate that the clock of DNU or R0 has not recovered from a clock failure (e.g., due to Figure 2 As shown by the arrow labeled “clock failure” in FIG. 2 , R2 can continue to select the clock of R1 as the reference clock of the synchronization network during this time.

[0051] As shown at reference numeral 240, R2 may determine that R1's clock has experienced a clock failure (e.g., based on the same principles as described above with respect to Figures 1A to 1F In a similar manner as described above, R2 may determine that the quality metric of the clock signal received from R1 does not meet the threshold. R2 may transmit a clock failure notification to R1. In addition, R2 may determine that the clock of R0 has not yet recovered from the clock failure. As a result, during this time (e.g., where all clock signals received by R2 have not yet recovered from the clock failure), R2 may not select a clock for synchronizing the reference clock of the network. During this time, R2 may be in a holding state or a free running state.

[0052] As shown at reference numeral 245, R2 may determine that the clock quality indication transmitted by R0 is DNU, whereas the clock quality indication was originally PRC. As a result, R2 may not select R0's clock as a reference clock for the synchronization network. R2 may determine that R1's clock has recovered from a clock failure (e.g., based on an indication received from R1, based on determining that a quality metric of the clock signal received from R1 satisfies a threshold, etc.). As shown at reference numeral 250, R2 may determine that the clock quality indication transmitted by R1 is SSU. R2 may select R1's clock as a reference clock for the synchronization network (e.g., based on the clock quality indication of the SSU).

[0053] As shown at reference numeral 260, R2 may determine that another clock failure associated with the clock of R1 has occurred. Additionally, as shown at reference numeral 255, R2 may determine that the most recent clock quality indication received from R0 is DNU. As a result, R2 may not select the clock as the reference clock, but may enter a holdover state or a free-running state.

[0054] As shown at reference numeral 265, R0 may continue to transmit the clock quality indication of the DNU. As shown at reference numeral 270, R2 may determine that the clock of R1 has recovered from the clock failure (e.g., based on the indication received from R1, based on determining that a quality metric of the clock signal received from R1 satisfies a threshold, etc.). R2 may determine that the clock quality indication transmitted by R1 is an SSU. As a result, R2 may select the clock of R1 as the reference clock for the synchronization network.

[0055] As mentioned above, Figure 2 are provided as examples. Other examples may be related to Figure 2 The examples described are different. Figure 2 The number and arrangement of devices shown are provided as examples. Figure 2 There may be more devices, fewer devices, different devices, or differently arranged devices than shown. Figure 2 Two or more of the devices shown may be implemented in a single device, or Figure 2 The single device shown may be implemented as multiple distributed devices. Additionally or alternatively, Figure 2 The illustrated set of devices (e.g., one or more devices) may perform the operations described as being performed by Figure 2 Another group of devices is shown performing one or more functions.

[0056] Figure 3 1 includes a diagram of one or more example clock failure notification configurations 300 described herein. Figure 3As shown, a clock quality indication (QL) may be transmitted in one or more packets via an Ethernet communication layer of a synchronization network. The packets may use a synchronization status message (SSM) format including different TLV fields to indicate the type of TLV format or the type of SSM, the length of the TLV, the SSM code (e.g., associated with a clock quality indication such as PRC, SSU, SEC, DNU, etc.), and / or one or more unused fields. For example, Figure 3 The tables shown (eg, Table 1 and Table 2) may represent configurations of a QL-TLV format transmitted via an Ethernet Synchronization Message Channel (ESMC) of a synchronization network.

[0057] As described above, a network device of a synchronization network may use a first type of SSM format to transmit a clock quality indication. The first type of SSM format may be an SSM TLV format. The first type of SSM format may be modified to include a fault notification. The configuration of the first type of SSM format may be as shown in Table 1. For example, 8 bits may be used to indicate the type of SSM, 16 bits may be used to indicate the length of the SSM, 4 bits may be used to indicate the SSM code, and 4 bits may not be used. The SSM code may indicate the clock quality indication, as described above with respect to Figures 1A to 1F For example, SSM code 0010 may indicate PRC, SSM code 0100 may indicate SSU-A, SSM code 1000 may indicate SSU-B, SSM code 1011 may indicate SEC, and SSM code 1111 may indicate DNU.

[0058] In some implementations, an unused field (e.g., 4 unused bits) may be used to insert a fault code into a first type of SSM format. For example, the first type of SSM format may be configured such that a fault code (e.g., in 4 unused bits) indicates a default state or a non-fault state (e.g., using a fault code "0000"). The first type of SSM format may be configured such that a fault code (e.g., in 4 unused bits) indicates a clock fault state (e.g., using a fault code "0001"). The first type of SSM format may be used to transmit SSM in a similar manner as described above (e.g., via an ESMC of a synchronization network). The receiving network device may be configured to detect a fault code in the first type of SSM format, so that the receiving network device may detect a fault code "0001" in the first type of SSM format, and determine that the transmitting network device has detected a clock fault associated with the clock of the receiving network device.

[0059] In some implementations, the receiving network device may not be configured to detect fault codes in the first type of SSM format. For example, the receiving network device may be a legacy network device that has not been updated, upgraded, cannot detect fault codes, etc. The legacy network device may experience a fault associated with processing the first type of SSM format with a fault code (e.g., timeout, processing error, etc.). In some implementations, the legacy network device may ignore information included in a previously unused field of the SSM format. For example, a legacy device may attempt to process the first type of SSM format based on identifying the first type of SSM format. The SSM format may experience a fault associated with processing a fault code within the first type of SSM format.

[0060] In some implementations, the fault code may be indicated in a second type of SSM format. The second type of SSM format may be a new TLV format type. The configuration of the second type of SSM format may be as shown in Table 2. For example, 8 bits may be used to indicate a second type of SSM format (e.g., type: 0x03, etc.), 16 bits may be used to indicate the length of the SSM, 4 bits may be used to indicate a fault code, and 4 bits may be reserved and / or unused. The second type of SSM format may be sent by a network device to indicate a clock failure (e.g., a clock failure notification) and may be separate from an SSM (e.g., a first type of SSM format) sent to indicate a clock quality indication.

[0061] The legacy network device may not recognize the second type of SSM format because the second type of SSM format may be a new SSM format. As a result, the legacy network device may discard or reject the SSM using the second type of SSM format. Therefore, as described above, the legacy network device will not attempt to process the SSM using the second type of SSM format and may not experience failures associated with processing the SSM. In this way, the network device can be enabled to use the second type of SSM format to indicate a clock failure to other network devices having the same configuration (e.g., configured to detect and / or process a fault code in an SSM) without causing the legacy network device to experience a failure associated with processing the fault code.

[0062] When the network device associated with the clock failure is an enhanced or updated network device, the network device detecting the clock failure may transmit a modified TLV (e.g., as shown in Table 1). This may cause the enhanced or updated network device to perform the above-mentioned Figure 1D In some implementations, if the network device that detects the clock failure determines that the network device associated with the clock failure is a legacy network device, the network device may transmit a new TLV type (e.g., as shown in Table 1). This may cause the legacy network device to perform the actions described above with respect to Figure 1E The action described.

[0063] As mentioned above, Figure 3 are provided as one or more examples. Other examples may be related to Figure 3 Different from what is described.

[0064] Figure 4A FIG. 4 is a diagram of an example process 400 for a network device detecting a clock failure as described herein. In some implementations, one or more process blocks of FIG. 4 may be performed by Figures 1A to 1F and / or Figure 2 The example process 400 may include steps or actions performed by a network device when selecting a reference clock, as described above.

[0065] As shown in reference numeral 405, the network device may select a reference clock from all available clock sources. For example, the network device may select a reference clock according to a best master clock algorithm (BMCA). The network device may select a reference clock according to the above description of Figures 1A to 1F The reference clock is selected in a similar manner as described above.

[0066] As shown at 410, the network device may determine whether the clock signal of the selected reference clock is good. For example, the network device may determine whether a quality metric of the clock signal meets a threshold (e.g., using a phase-locked loop of the network device). The network device may perform the same steps as described above with respect to Figures 1A to 1F Whether the clock signal of the selected reference clock is good is determined in a similar manner as described above.

[0067] If the network device determines that the clock signal of the selected reference clock is good (e.g., the quality metric of the clock signal satisfies a threshold), the network device may lock to the selected reference clock, as shown by reference numeral 415. After locking to the selected reference clock, the network device may operate in accordance with recommendations of the International Telecommunication Union (ITU) Telecommunication Standardization Sector (ITU-T) on synchronous Ethernet clocks, Ethernet synchronization message channels, etc. (e.g., ITU-T Rec. G.8262, G.8264, etc.).

[0068] As shown at reference numeral 420, if the network device determines that the clock signal of the selected reference clock is not good (e.g., the quality metric of the clock signal does not meet the threshold), the network device can determine whether to enable clock failure handling. That is, the network device can determine whether the network device is enabled to notify the upstream network device (multiple) of the bad clock signal. For example, if the network device is a legacy network device (e.g., a network device that is not configured with the ability to detect clock failure notifications or notify other network devices of clock failures), the network device can determine that clock failure handling is not enabled.

[0069] As shown at reference numeral 425, if the network device determines that clock failure processing is enabled, the network device may send a clock failure notification upstream to the network device that sends the clock signal of the selected reference clock and / or to one or more other network devices. The network device may follow the above-mentioned Figures 1A to 1F , Figure 2 and Figure 3 A clock failure notification is sent in a similar manner as described above.

[0070] As shown at reference numeral 430, if the network device determines that clock failure processing is not enabled (e.g., if the network device is a legacy network device), the network device can lock to the selected reference clock (e.g., the clock signal is bad). After locking to the selected reference clock, the network device can operate in accordance with ITU-T recommendations on synchronous Ethernet clocks, Ethernet synchronization message channels, etc. (e.g., ITU-T Rec. G.8262, G.8264, etc.).

[0071] although Figure 4A An example block diagram of the example process 400 is shown, but in some implementations, Figure 4A The example process 400 may include more blocks, fewer blocks, different blocks, or differently arranged blocks than shown. Additionally or alternatively, two or more blocks of the process 400 may be performed in parallel.

[0072] Figure 4B is a diagram of an example process 450 for a network device experiencing a clock failure as described herein. In some implementations, Figure 4B One or more process boxes can be Figures 1A to 1F and / or Figure 2 The example process 450 may include steps or actions performed by a network device upon receiving a clock failure notification as described above.

[0073] The network device may determine whether a clock failure notification has been received, as indicated by reference numeral 455. If a clock failure notification has not been received, the network device may continue to operate normally, as indicated by reference numeral 460. For example, if a clock failure notification has not been received, the network device may operate in accordance with ITU-T recommendations for synchronous Ethernet clocks, Ethernet synchronization message channels, etc. (e.g., ITU-T Rec. G.8262, G.8264, etc.).

[0074] As shown in reference numeral 465, if the network device determines that a clock failure notification has been received, the network device may determine whether clock failure processing is enabled. For example, a conventional network device (e.g., a network device that is not configured with the ability to detect a clock failure notification) may determine that clock failure processing is not enabled. As shown in reference numeral 460, if the network device determines that clock failure processing is not enabled, the network device may continue to operate normally (e.g., receiving a clock failure notification may not affect or change the performance of a network device that does not enable clock failure processing). For example, if clock failure processing for a network device is not enabled, the network device may operate in accordance with ITU-T recommendations for synchronous Ethernet clocks, Ethernet synchronization message channels, etc. (e.g., ITU-T Rec. G.8262, G.8264, etc.).

[0075] As shown at reference numeral 470, if the network device determines that a clock failure notification has been received, the network device may determine whether all ports of the network device are downgradeable. For example, the network device may be using one or more ports of the network device to transmit clock quality indications to one or more other network devices. The network device may determine that one or more ports of the network device cannot be downgraded (e.g., based on the configuration of the network device, the communication status of the network device, the operating status of the network device, etc.). For example, the network device may determine that some ports of the network device but not all ports can be downgraded.

[0076] If the network device determines that one or more ports of the network device cannot be downgraded, the network device may downgrade the clock quality indication (QL) on the port that received the clock failure notification, as shown at reference numeral 475. For example, if the network device receives a clock quality notification in a first port, the network device may downgrade the clock quality indication transmitted by the network device via the first port.

[0077] If the network device determines that all ports of the network device are capable of degradation, the network device may degrade the clock quality indication transmitted by the network device on all ports, as shown at reference numeral 480. In some implementations, the network device may adjust a clock signal of a clock of the network device based on receiving a clock failure notification.

[0078] The network device may continue to transmit the degraded clock quality indication until the network device determines that the clock of the network device has recovered from the clock failure. In some implementations, the network device may determine that the clock of the network device has recovered from the clock failure based on a measurement of a quality metric of the clock performed by the network device, based on a restart or shutdown of the network device, based on an indication received from a different network device, and the like.

[0079] Although Figure 4 shows example blocks of the example process 400, in some implementations, the example process 400 may include more blocks, fewer blocks, different blocks, or differently arranged blocks than shown in Figure 4. Additionally or alternatively, two or more blocks of the process 400 may be performed in parallel.

[0080] Figure 5 is a diagram of an example environment 500 in which the systems and / or methods described herein may be implemented. Figure 5 As shown, environment 500 may include a set of network devices 510 (shown as network device 510-1 through network device 510-N), and network 520. The devices of environment 500 may be interconnected via wired connections, wireless connections, or a combination of wired and wireless connections.

[0081] The network device 510 includes one or more devices capable of receiving, processing, storing, routing and / or providing services (e.g., packets, other information or metadata, etc.) in the manner described herein. For example, the network device 510 may include a router, such as a label switching router (LSR), a label edge router (LER), an ingress router, an egress router, a provider router (e.g., a provider edge router, a provider core router, etc.), a virtual router, etc. Additionally or alternatively, the network device 510 may include a gateway, a switch, a firewall, a hub, a bridge, a reverse proxy, a server (e.g., a proxy server, a cloud server, a data center server, etc.), a load balancer, and / or the like. In some implementations, the network device 510 may be a physical device implemented in a housing such as a rack. In some implementations, the network device 510 may be a virtual device implemented by one or more computer devices of a cloud computing environment or a data center. In some implementations, a group of network devices 510 may be a group of data center nodes for routing business flows through a network 520.

[0082] The network 520 includes one or more wired and / or wireless networks. For example, the network 520 may include a packet switching network, a cellular network (e.g., a fifth generation (5G) network, a fourth generation (4G) network (such as a long term evolution (LTE) network), a third generation (3G) network, a code division multiple access (CDMA) network, a public land mobile network (PLMN), a local area network (LAN), a wide area network (WAN), a metropolitan area network (MAN), a telephone network (e.g., a public switched telephone network (PSTN)), a private network, an ad hoc network, an intranet, the Internet, a fiber-optic-based network, a cloud computing network, etc., and / or a combination of these or another type of network.

[0083] Figure 5 The number and arrangement of devices and networks shown are provided as examples. Figure 5There may be more devices and / or networks, fewer devices and / or networks, different devices and / or networks, or differently arranged devices and / or networks than those shown. Figure 5 Two or more of the devices shown may be implemented in a single device, or Figure 5 The single device shown may be implemented as multiple distributed devices. Additionally or alternatively, one set of devices (eg, one or more devices) of environment 500 may perform one or more functions described as being performed by another set of devices of environment 500.

[0084] Figure 6 600. Device 600 may correspond to one or more network devices 510-1 through 510-N, etc. In some implementations, one or more network devices 510-1 through 510-N may include one or more devices 600 and / or one or more components of device 600. Figure 6 As shown, device 600 may include a bus 610 , a processor 620 , a memory 630 , a storage component 640 , an input component 650 , an output component 660 , and a communication interface 670 .

[0085] The bus 610 includes components that allow communication between components of the device 600. The processor 620 is implemented in hardware, firmware, or a combination of hardware and software. The processor 620 is a central processing unit (CPU), a graphics processing unit (GPU), an accelerated processing unit (APU), a microprocessor, a microcontroller, a digital signal processor (DSP), a field programmable gate array (FPGA), an application-specific integrated circuit (ASIC), or another type of processing component. In some implementations, the processor 620 includes one or more processors that can be programmed to perform functions. The memory 630 includes a random access memory (RAM), a read-only memory (ROM), and / or another type of dynamic or static storage device (e.g., flash memory, magnetic memory, and / or optical memory) that stores information and / or instructions for use by the processor 620.

[0086] The storage component 640 stores information and / or software related to the operation and use of the device 600. For example, the storage component 640 may include a hard disk (e.g., a magnetic disk, an optical disk, a magneto-optical disk, and / or a solid-state disk), a compact disk (CD), a digital versatile disk (DVD), a floppy disk, a cassette, a magnetic tape, and / or another type of non-transitory computer-readable medium, and a corresponding drive.

[0087] Input components 650 include components that allow device 600 to receive information, such as via user input (e.g., a touch screen display, a keyboard, a keypad, a mouse, buttons, switches, and / or a microphone). Additionally or alternatively, input components 650 may include sensors for sensing information (e.g., a global positioning system (GPS) component, an accelerometer, a gyroscope, and / or an actuator). Output components 660 include components that provide output information from device 600 (e.g., a display, a speaker, and / or one or more LEDs).

[0088] The communication interface 670 includes transceiver-like components (e.g., a transceiver and / or a separate receiver and transmitter) that enable the device 600 to communicate with other devices, such as via a wired connection, a wireless connection, or a combination of wired and wireless connections. The communication interface 670 can allow the device 600 to receive information from another device and / or provide information to another device. For example, the communication interface 670 may include an Ethernet interface, an optical interface, a coaxial interface, an infrared interface, an RF interface, a universal serial bus (USB) interface, a wireless local area network interface, a cellular network interface, etc.

[0089] Device 600 can perform one or more processes described herein. Device 600 can perform these processes based on processor 620 executing software instructions stored by non-transitory computer readable media (such as memory 630 and / or storage component 640). Computer readable media is defined herein as non-transitory memory devices. Memory devices include storage space within a single physical storage device or storage space distributed between multiple physical storage devices.

[0090] The software instructions may be read into the memory 630 and / or storage component 640 from another computer-readable medium or another device via the communication interface 670. When executed, the software instructions stored in the memory 630 and / or storage component 640 may cause the processor 620 to perform one or more processes described herein. Additionally or alternatively, hardwired circuitry may be used in place of or in combination with software instructions to perform one or more processes described herein. Therefore, the implementations described herein are not limited to any specific combination of hardware circuitry and software.

[0091] Figure 6 The number and arrangement of components shown are provided as examples. In practice, Figure 6 Compared to the illustrated, device 600 may include more components, fewer components, different components, or differently arranged components. Additionally or alternatively, a set of components (e.g., one or more components) of device 600 may perform one or more functions described as being performed by another set of components of device 600.

[0092] Figure 7 700. Device 700 may correspond to one or more network devices 510-1 through 510-N, etc. In some implementations, one or more network devices 510-1 through 510-N, etc. may include one or more devices 700 and / or one or more components of device 700. Figure 7 As shown, the device 700 may include one or more input components 710-1 to 710-B (B≥1) (hereinafter collectively referred to as input component 710, and individually referred to as input component 710), a switch component 720, one or more output components 730-1 to 730-C (C≥1) (hereinafter collectively referred to as output component 730, and individually referred to as output component 730), and a controller 740.

[0093] The input component 710 may be one or more attachment points for a physical link and may be one or more entry points for incoming traffic such as packets. The input component 710 may process incoming traffic, such as by performing data link layer encapsulation or decapsulation. In some implementations, the input component 710 may transmit and / or receive packets. In some implementations, the input component 710 may include an input line card that includes one or more packet processing components (e.g., in the form of an integrated circuit), such as one or more interface cards (IFCs), a packet forwarding component, a line card controller component, an input port, a processor, a memory, and / or an input queue. In some implementations, the device 700 may include one or more input components 710.

[0094] The switching component 720 can interconnect the input component 710 with the output component 730. In some implementations, the switching component 720 can be implemented via one or more crossbar switches, via a bus, and / or by providing a shared memory. The shared memory can act as a temporary buffer to store packets from the input component 710 before the packets are finally scheduled for transmission to the output component 730. In some implementations, the switching component 720 can enable the input component 710, the output component 730, and / or the controller 740 to communicate with each other.

[0095] The output component 730 can store packets and can schedule packets for transmission on an output physical link. The output component 730 can support data link layer encapsulation or decapsulation and / or various advanced protocols. In some implementations, the output component 730 can transmit packets and / or receive packets. In some implementations, the output component 730 may include an output line card, which includes one or more packet processing components (e.g., in the form of an integrated circuit), such as one or more IFCs, packet forwarding components, line card controller components, output ports, processors, memory and / or output queues. In some implementations, the device 700 may include one or more output components 730. In some implementations, the input component 710 and the output component 730 can be implemented by the same set of components (e.g., the input / output component can be a combination of the input component 710 and the output component 730).

[0096] The controller 740 includes a processor in the form of, for example, a CPU, a GPU, an APU, a microprocessor, a microcontroller, a DSP, an FPGA, an ASIC, and / or another type of processor. The processor is implemented in hardware, firmware, or a combination of hardware and software. In some implementations, the controller 740 may include one or more processors that can be programmed to perform a function.

[0097] In some implementations, the controller 740 may include RAM, ROM, and / or another type of dynamic or static storage device (eg, flash memory, magnetic storage, optical storage, etc.) that stores information and / or instructions for use by the controller 740 .

[0098] In some implementations, the controller 740 can communicate with other devices, networks, and / or systems connected to the device 700 to exchange information about the network topology. The controller 740 can create a routing table based on the network topology information, can create a forwarding table based on the routing table, and can forward the forwarding table to the input component 710 and / or the output component 730. The input component 710 and / or the output component 730 can use the forwarding table to perform a routing lookup for incoming and / or outgoing packets.

[0099] The controller 740 may perform one or more processes described herein. The controller 740 may perform these processes in response to executing software instructions stored by a non-transitory computer readable medium. A computer readable medium is defined herein as a non-transitory memory device. A memory device includes storage space within a single physical storage device or storage space distributed between multiple physical storage devices.

[0100] The software instructions may be read into a memory and / or storage component associated with the controller 740 from another computer-readable medium or from another device via a communication interface. When executed, the software instructions stored in the memory and / or storage component associated with the controller 740 may cause the controller 740 to perform one or more processes described herein. Additionally or alternatively, hardwired circuitry may be used in place of or in combination with software instructions to perform one or more processes described herein. Therefore, the implementations described herein are not limited to any specific combination of hardware circuitry and software.

[0101] Figure 7 The number and arrangement of components shown are provided as examples. In practice, Figure 7 Compared to the illustrated, the device 700 may include more components, fewer components, different components, or differently arranged components. Additionally or alternatively, a set of components (e.g., one or more components) of the device 700 may perform one or more functions described as being performed by another set of components of the device 700.

[0102] Figure 8 is a flow chart of an example process 800 associated with clock failure detection and correction between synchronized network devices. In some implementations, Figure 8 One or more process blocks of may be performed by a first network device (eg, network device 510-1). In some implementations, Figure 8 One or more process blocks of may be performed by another device or group of devices separate from or including the first network device, such as one or more other network devices (e.g., network device 510-2, network device 510-N, etc.). Additionally or alternatively, Figure 8 One or more process blocks may be executed by one or more components of device 600 (e.g., processor 620, memory 630, storage component 640, input component 650, output component 660, communication interface 670, etc.), one or more components of device 700 (e.g., input component 710, switching component 720, output component 730, controller 740, etc.), etc.

[0103] like Figure 8 As shown, process 800 may include: receiving a clock quality indication associated with a clock of the second network device from a second network device, wherein the clock of the second network device is a reference clock for a network including the first network device and the second network device (block 810). For example, the first network device may receive a clock quality indication associated with the clock of the second network device from the second network device, as described above. In some implementations, the clock of the second network device is a reference clock for a network including the first network device and the second network device.

[0104] like Figure 8 As further shown, process 800 may include determining based on the clock signal of the second network device that the quality metric of the clock does not meet the threshold (block 820). For example, the first network device may determine based on the clock signal of the second network device that the quality metric of the clock does not meet the threshold, as described above.

[0105] like Figure 8 As further shown, process 800 may include providing a clock failure notification to the second network device to cause the second network device to downgrade the clock quality indication transmitted by the second network device (block 830). For example, the first network device may provide a clock failure notification to the second network device to cause the second network device to downgrade the clock quality indication transmitted by the second network device, as described above.

[0106] like Figure 8 As further shown, process 800 may include selecting a new reference clock for the first network device based on receiving the degraded clock quality indication from the second network device (block 840). For example, the first network device may select a new reference clock for the first network device based on receiving the degraded clock quality indication from the second network device, as described above.

[0107] Process 800 may include other implementations, such as any single implementation or any combination of implementations described below and / or in conjunction with one or more other processes described elsewhere herein.

[0108] In a first implementation, the clock quality indication is received via an Ethernet communication layer of the network and the clock signal is received via a physical communication layer of the network.

[0109] In a second implementation, either alone or in combination with the first implementation, a new reference clock is associated with a third network device of a network including the first network device and the second network device, and the new reference clock is used to synchronize the first network device and the third network device.

[0110] In a third implementation, alone or in combination with one or more of the first and second implementations, the first network device is located downstream from the second network device and the third network device within the topology of the network.

[0111] In a fourth implementation, alone or in combination with one or more of the first to third implementations, a clock quality indication associated with the clock of the second network device has a higher priority than a clock quality indication associated with the new reference clock.

[0112] In a fifth implementation, either alone or in combination with one or more of the first to fourth implementations, providing a clock failure notification includes inserting a fault code within an unused field of a synchronization status message associated with a type of synchronization status message indicating clock quality, the first network device and the second network device being configured to detect the fault code and provide the synchronization status message as a clock failure notification.

[0113] In a sixth implementation, alone or in combination with one or more of the first to fifth implementations, the network includes a synchronous Ethernet network, and the clock quality indication, the clock failure notification, and the new clock quality indication are synchronization status messages transmitted via an Ethernet synchronization message channel of the synchronous Ethernet network.

[0114] although Figure 8 Example blocks of process 800 are shown, but in some implementations, Figure 8 Process 800 may include more blocks, fewer blocks, different blocks, or differently arranged blocks than shown. Additionally or alternatively, two or more blocks of process 800 may be performed in parallel.

[0115] Fig. 9 is a flow chart of an example process 900 associated with clock failure detection and correction between synchronized network devices. In some implementations, Fig. 9 One or more process blocks of may be performed by a first network device (eg, network device 510-1). In some implementations, Fig. 9 One or more process blocks of may be performed by another device or group of devices separate from or including the first network device, such as one or more other network devices (e.g., network device 510-2, network device 510-N, etc.). Additionally or alternatively, Fig. 9 One or more process blocks may be executed by one or more components of device 600 (e.g., processor 620, memory 630, storage component 640, input component 650, output component 660, communication interface 670, etc.), one or more components of device 700 (e.g., input component 710, switching component 720, output component 730, controller 740, etc.), etc.

[0116] like Fig. 9As shown, process 900 may include measuring a quality metric of a clock signal, wherein the clock signal is associated with a clock of a second network device, and wherein the clock of the second network device is a reference clock for the first network device and the second network device (block 910). For example, the first network device may measure the quality metric of the clock signal, as described above. In some implementations, the clock signal is associated with a clock of the second network device. In some implementations, the clock of the second network device is a reference clock for the first network device and the second network device.

[0117] like Fig. 9 As further shown, process 900 may include determining that the quality metric does not meet the threshold based on the clock signal (block 920).For example, the first network device may determine that the quality metric does not meet the threshold based on the clock signal, as described above.

[0118] like Fig. 9 As further shown, process 900 may include providing a clock failure notification to the second network device based on the threshold not being met to cause the second network device to downgrade the clock quality indication transmitted by the second network device (block 930). For example, the first network device may provide a clock failure notification to the second network device based on the threshold not being met to cause the second network device to downgrade the clock quality indication transmitted by the second network device, as described above.

[0119] like Fig. 9 As further shown, process 900 may include performing actions associated with establishing a new reference clock for the first network device (block 940). For example, the first network device may perform actions associated with establishing a new reference clock for the first network device, as described above.

[0120] Process 900 may include other implementations, such as any single implementation or any combination of implementations described below and / or in conjunction with one or more other processes described elsewhere herein.

[0121] In a first implementation, a clock quality indication and a clock signal are received from a second network device.

[0122] In a second implementation, either alone or in combination with the first implementation, the first network device and the second network device are routers of a synchronous Ethernet network.

[0123] In a third implementation, alone or in combination with one or more of the first and second implementations, the clock quality indication is received via an Ethernet communication layer of the network and the clock signal is received via a physical communication layer of the network.

[0124] In a fourth implementation, alone or in combination with one or more of the first to third implementations, process 900 includes: receiving a downgraded clock quality indication from a second network device; selecting a new reference clock based on a different clock quality indication associated with the new reference clock; and forwarding the second clock quality indication to one or more other network devices to cause the one or more other network devices to use the new reference clock.

[0125] In a fifth implementation, alone or in combination with one or more of the first to fourth implementations, a new reference clock is associated with a third network device of the network, and the new reference clock is configured to synchronize the first network device and the third network device.

[0126] In a sixth implementation, alone or in combination with one or more of the first to fifth implementations, process 900 includes inserting a fault code within a field of a first type of synchronization status message, wherein a clock quality indication is associated with a second type of synchronization status message that is different from the first type, wherein the first network device and the second network device are different types of network devices; and providing the synchronization status message as a clock failure notification.

[0127] although Fig. 9 An example block diagram of process 900 is shown, but in some implementations, Fig. 9 Process 900 may include more blocks, fewer blocks, different blocks, or differently arranged blocks than shown. Additionally or alternatively, two or more blocks of process 900 may be performed in parallel.

[0128] Fig.10 is a flow chart of an example process 1000 associated with clock failure detection and correction between synchronized network devices. In some implementations, Fig.10 One or more process blocks of may be performed by a first network device (eg, network device 510-1). In some implementations, Fig.10 One or more process blocks of may be performed by another device or group of devices separate from or including the first network device, such as one or more other network devices (e.g., network device 510-2, network device 510-N, etc.). Additionally or alternatively, Fig.10 One or more process blocks may be executed by one or more components of device 600 (e.g., processor 620, memory 630, storage component 640, input component 650, output component 660, communication interface 670, etc.), one or more components of device 700 (e.g., input component 710, switching component 720, output component 730, controller 740, etc.), etc.

[0129] like Fig.10As shown, process 1000 may include receiving a clock quality indication associated with a clock of a second network device, where the clock of the second network device is a reference clock for a network including the first network device and the second network device (block 1010). For example, the first network device may receive a clock quality indication associated with a clock of the second network device, as described above. In some implementations, the clock of the second network device is a reference clock for a network including the first network device and the second network device.

[0130] like Fig.10 As further shown, process 1000 may include determining that a quality metric of the clock does not meet a threshold based on a clock signal of the second network device (block 1020). For example, the first network device may determine that a quality metric of the clock does not meet a threshold based on a clock signal of the second network device, as described above.

[0131] like Fig.10 As further shown, process 1000 may include providing a clock failure notification to the second network device to cause the second network device to downgrade the clock quality indication (block 1030). For example, the first network device may provide a clock failure notification to the second network device to cause the second network device to downgrade the clock quality indication, as described above.

[0132] Process 1000 may include other implementations, such as any single implementation or any combination of implementations described below and / or in conjunction with one or more other processes described elsewhere herein.

[0133] In a first implementation, the clock quality indication is received via an Ethernet synchronization message channel of the network and the clock signal is received via a physical communication layer of the network.

[0134] In a second implementation, alone or in combination with the first implementation, process 1000 includes: analyzing a clock signal via a phase locked loop of the first network device to determine a quality metric; comparing the quality metric to a threshold; and determining that the quality metric does not satisfy the threshold.

[0135] In a third implementation, alone or in combination with one or more of the first and second implementations, process 1000 includes: selecting a new reference clock for a first network device; and providing a clock quality indication associated with the new reference clock to one or more other network devices.

[0136] In a fourth implementation, alone or in combination with one or more of the first to third implementations, the network is a synchronous Ethernet network.

[0137] In a fifth implementation, alone or in combination with one or more of the first to fourth implementations, process 1000 includes: determining a configuration of a second network device; providing a clock failure notification as a fault code based on the configuration of the second network device in one of: an unused field of a first type of synchronization status message associated with a clock quality indication, or a field of a second type of synchronization status message different from the first type of synchronization status message.

[0138] although Fig.10 An example block diagram of process 1000 is shown, but in some implementations, Fig.10 Process 1000 may include more blocks, fewer blocks, different blocks, or differently arranged blocks than shown. Additionally or alternatively, two or more blocks of process 1000 may be performed in parallel.

[0139] The foregoing disclosure provides illustration and description, but is not intended to be exhaustive or to limit the implementations to the precise forms disclosed. Modifications and variations may be made in light of the above disclosure or may be acquired from practice of the implementations.

[0140] As used herein, the term "component" is intended to be broadly interpreted as hardware, firmware, or a combination of hardware and software.

[0141] As used herein, a service or content may include a set of packets. A packet may refer to a communication structure for transmitting information, such as a protocol data unit (PDU), a service data unit (SDU), a network packet, a datagram, a segment, a message, a block, a frame (e.g., an Ethernet frame), a portion of any of the above, and / or another type of formatted or unformatted data unit capable of being transmitted via a network.

[0142] Some implementations are described herein in conjunction with thresholds. As used herein, depending on the context, satisfying a threshold may refer to being greater than a threshold, more than a threshold, above a threshold, greater than or equal to a threshold, less than a threshold, a value less than a threshold, below a threshold, less than or equal to a threshold, equal to a threshold, etc.

[0143] Obviously, the system and / or method described herein can be implemented in different forms of hardware, firmware and / or a combination of hardware and software. The actual dedicated control hardware or software code used to implement these systems and / or methods does not limit the implementation. Therefore, the operation and behavior of the system and / or method are described herein without reference to specific software codes. It should be understood that the system and / or method can be implemented using software and hardware based on the description herein.

[0144] Even though particular combinations of features are recited in the claims and / or disclosed in the specification, these combinations are not intended to limit the disclosure of the various implementations. In fact, many of these features may be combined in ways not specifically recited in the claims and / or disclosed in the specification. Although each dependent claim listed below may only directly depend on one claim, the disclosure of the various implementations includes each dependent claim in combination with every other claim in the claim set.

[0145] Unless explicitly stated, any element, behavior or instruction used in this article should not be interpreted as being key or necessary. In addition, as used in this article, the article "a (a)" and "an (an)" are intended to include one or more projects, and can be used interchangeably with "one or more". In addition, as used in this article, the article "the (the)" is intended to include one or more projects quoted in conjunction with the article "the (the)", and can be used interchangeably with "one or more". In addition, as used in this article, the term "set" is intended to include one or more projects (for example, related projects, unrelated projects, combinations of related and unrelated projects, etc.), and can be used interchangeably with "one or more". In the case of only intending a project, phrases "only one item" or similar language are used. In addition, as used in this article, the term "has (has)", "have (have)", "having (having)" etc. are intended to be open terms. In addition, unless explicitly stated otherwise, the phrase "based on" is intended to represent "based at least in part". Additionally, as used herein, the term "or" when used in series is intended to be inclusive and may be used interchangeably with "and / or" unless expressly stated otherwise (eg, if used in conjunction with "either" or "only one of").

Claims

1. A method comprising: receiving, by the first network device, from a second network device, a clock quality indication associated with a clock of the second network device, wherein the clock of the second network device is a reference clock for a network including the first network device and the second network device; Determining, by the first network device based on a clock signal of the second network device, that a quality metric of the clock does not meet a threshold; providing, by the first network device, a clock failure notification to the second network device to cause the second network device to downgrade the clock quality indication transmitted by the second network device; A new reference clock is selected, by the first network device, for the first network device based on receiving the degraded clock quality indication from the second network device.

2. The method of claim 1 , wherein the clock quality indication is received via an Ethernet communication layer of the network, and The clock signal is received via a physical communication layer of the network.

3. The method of claim 1 , wherein the new reference clock is associated with a third network device of the network including the first network device and the second network device, and The new reference clock is used to synchronize the first network device and the third network device. 4 . The method of claim 3 , wherein the first network device is located downstream from the second network device and the third network device within the topology of the network. 5 . The method of claim 1 , wherein the clock quality indication associated with the clock of the second network device has a higher priority than a clock quality indication associated with the new reference clock.

6. The method of claim 1 , wherein providing the clock failure notification comprises: inserting a fault code in an unused field of a synchronization status message associated with the type of synchronization status message indicated by the clock quality, wherein the first network device and the second network device are configured to detect the fault code; as well as The synchronization status message is provided as the clock failure notification.

7. The method of claim 1, wherein the network comprises a synchronous Ethernet network, and The clock quality indication, the clock failure notification and the new clock quality indication are synchronization status messages transmitted via an Ethernet synchronization message channel of the synchronous Ethernet network.

8. A first network device, comprising: one or more memories; as well as One or more processors for: Measures the quality metrics of clock signals, wherein the clock signal is associated with a clock of the second network device, and wherein the clock of the second network device is a reference clock for the first network device and the second network device; determining, based on the clock signal, that the quality metric does not satisfy a threshold; providing a clock failure notification to the second network device based on the threshold not being met to cause the second network device to downgrade a clock quality indication transmitted by the second network device; as well as Actions associated with establishing a new reference clock for the first network device are performed.

9. The first network device of claim 8, wherein the clock quality indication and the clock signal are received from the second network device.

10. The first network device according to claim 8, wherein the first network device and the second network device are routers of a synchronous Ethernet network.

11. The first network device of claim 8, wherein the clock quality indication is received via an Ethernet communication layer of the network, and The clock signal is received via a physical communication layer of the network.

12. The first network device of claim 8, wherein the one or more processors are configured to: receiving the degraded clock quality indication from the second network device, selecting the new reference clock based on different clock quality indicators associated with the new reference clock; and The different clock quality indication is forwarded to one or more other network devices to cause the one or more other network devices to use the new reference clock.

13. The first network device of claim 12, wherein the new reference clock is associated with a third network device of the network, and The new reference clock is configured to synchronize the first network device and the third network device.

14. The first network device of claim 8, wherein the one or more processors, when providing the clock failure notification, are configured to: inserting a fault code within a field of a synchronization status message of the first type, wherein the clock quality indication is associated with a synchronization status message of a second type different from the first type, wherein the first network device and the second network device are network devices of different types; and The synchronization status message is provided as the clock failure notification.

15. A system comprising: The first network device is configured as: receiving a clock quality indication associated with a clock of a second network device, wherein the clock of the second network device is a reference clock for a network including the first network device and the second network device; determining, based on a clock signal of the second network device, that a quality metric of the clock does not meet a threshold; as well as A clock failure notification is provided to the second network device to cause the second network device to downgrade the clock quality indication.

16. The system of claim 15, wherein the clock quality indication is received via an Ethernet synchronization message channel of the network, and The clock signal is received via a physical communication layer of the network.

17. The system of claim 15, wherein the first network device, upon determining that the quality metric of the clock does not satisfy the threshold, is further configured to: analyzing the clock signal via a phase locked loop of the first network device to determine the quality metric; comparing the quality metric to the threshold; and It is determined that the quality metric does not satisfy the threshold.

18. The system according to claim 15, wherein the first network device is further configured to: selecting a new reference clock for the first network device; and A clock quality indication associated with the new reference clock is provided to one or more other network devices.

19. The system of claim 15, wherein the network is a synchronous Ethernet network.

20. The system of claim 15, wherein the first network device, when providing the clock failure notification, is further configured to: determining a configuration of the second network device; and providing the clock failure notification as a failure code in one of the following based on the configuration of the second network device: an unused field of a synchronization status message of the first type associated with the clock quality indication, or Fields of a second type of synchronization status message different from the first type of synchronization status message.

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