Chip and Chip Heat Dissipation Device
By opening a liquid storage channel on the back of the substrate, the heat dissipation medium is directly in contact with the chip, the problem of low chip heat dissipation efficiency in the prior art is solved, and an efficient chip heat dissipation effect is achieved.
Patent Information
- Application Number
- CN202111244112.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2021-10-25
- Publication Date
- 2025-07-22
- Estimated Expiration
- 2041-10-25
AI Technical Summary
The existing chip heat dissipation methods are low in efficiency and cannot meet the heat dissipation needs of high-power chips.
A liquid storage channel is opened on the back of the substrate, and a heat dissipation medium is used to directly contact the chip for heat dissipation.
It improves the heat dissipation efficiency of the chip and can effectively reduce the temperature of the chip.
Smart Images

Figure CN113764368B_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the technical field of chip packaging, and particularly relates to a chip and a chip heat dissipation device. Background Art
[0002] With the rapid development of science and technology, chips show a development trend of high integration, complexity and high frequency. However, the increasing heat generation of chips has become a key factor hindering the improvement of chip performance and reliability.
[0003] The existing chip heat dissipation method usually loads a heat sink on the surface of the chip to dissipate heat from the chip. However, this heat dissipation efficiency is low. When the power consumption density of the chip reaches a certain level, this heat dissipation method cannot meet the heat dissipation requirements of high-power chips. Summary of the Invention
[0004] To solve the above problems, the chip and the chip heat dissipation device provided by the present invention can directly contact the heat dissipation medium with the chip by providing a liquid storage channel on the back surface of the substrate, thereby improving the heat dissipation efficiency of the chip.
[0005] In a first aspect, the present invention provides a chip, including: a substrate and a device layer;
[0006] The device layer is located above the substrate, and the device layer is used for loading devices;
[0007] A liquid storage channel is provided on the back surface of the substrate;
[0008] The liquid storage channel is used for loading a heat dissipation medium to cool the chip.
[0009] Optionally, the ratio of the depth of the liquid storage channel to the thickness of the substrate is 0.25 - 0.5:1.
[0010] Optionally, a conduction channel communicating with the liquid storage channel is further provided on the back surface of the substrate.
[0011] Optionally, the shape of the liquid storage channel is at least one of a cylindrical shape, a prismatic shape, and a cuboid shape.
[0012] In a second aspect, the present invention provides a chip heat dissipation device, including: a heat dissipation cover and the chip as described in any one of the above;
[0013] A storage groove is provided on the bottom surface of the heat dissipation cover, and the chip is located in the storage groove;
[0014] A delivery hole for introducing and discharging a heat dissipation medium is provided on the surface of the heat dissipation cover, and the delivery hole communicates with the liquid storage channel.
[0015] Optionally, a conduction groove is provided on the upper surface of the storage groove;
[0016] The conveying hole communicates with the conducting groove, and the conducting groove communicates with the liquid storage channel.
[0017] Optionally, the depth of the conducting groove is 0.3 mm to 1 mm, and the distance from the upper surface of the heat dissipation cover to the upper surface of the storage groove is 3 mm to 5 mm.
[0018] Optionally, the upper surface of the storage groove abuts against the back surface of the substrate.
[0019] Optionally, the bottom of the heat dissipation cover is hermetically connected to the chip.
[0020] Optionally, the conveying hole includes: a liquid inlet hole and a liquid outlet hole;
[0021] The chip heat dissipation device further includes: a conveying pipeline;
[0022] The conveying pipeline communicates with the liquid inlet hole and the liquid outlet hole respectively;
[0023] The conveying pipeline communicating with the liquid inlet hole is used to introduce a heat dissipation medium into the liquid storage channel;
[0024] The conveying pipeline communicating with the liquid outlet hole is used to export the heat dissipation medium in the liquid storage channel from the heat dissipation cover.
[0025] The chip and the chip heat dissipation device provided by the embodiment of the present invention can make the heat dissipation medium flow through the back surface of the substrate by providing a liquid storage channel on the back surface of the substrate, so that the heat dissipation medium is in direct contact with the chip, thereby improving the heat dissipation efficiency of the chip. Description of the Drawings
[0026] Figure 1 It is a schematic cross-sectional view of a chip according to an embodiment of the present application;
[0027] Figures 2 to 4 They are all schematic structural diagrams of a chip flip-chip soldered on a mounting plate according to an embodiment of the present application;
[0028] Figure 5 It is a schematic structural diagram of a chip flip-chip soldered on a mounting plate according to an embodiment of the present application;
[0029] Figure 6 It is a cross-sectional view of a heat dissipation cover according to an embodiment of the present application;
[0030] Figure 7 It is a bottom view of a heat dissipation cover according to an embodiment of the present application;
[0031] Figure 8 It is a cross-sectional view of a chip heat dissipation device according to an embodiment of the present application;
[0032] Figure 9The top view of the chip heat dissipation device according to an embodiment of the present application.
[0033] Reference numerals
[0034] 1. Chip; 11. Substrate; 12. Physical layer; 13. Device layer; 14. Liquid storage channel; 15. Conducting channel; 2. Mounting plate; 3. Heat dissipation cover; 31. Delivery hole; 311. Liquid inlet hole; 312. Liquid outlet hole; 32. Conducting groove; 33. Storage groove; 4. Delivery pipeline; 5. Quick-release joint. Detailed implementation manners
[0035] To make the objectives, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention. Apparently, the described embodiments are only some of the embodiments of the present invention, rather than all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of the present invention.
[0036] It should be noted that in the present invention, relational terms such as first and second are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any actual relationship or sequence between these entities or operations. Moreover, the term "comprising", "including" or any other variant thereof is intended to cover a non-exclusive inclusion, such that a process, method, article or device including a series of elements not only includes those elements, but also includes other elements not expressly listed, or further includes elements inherent to such process, method, article or device.
[0037] Embodiment 1
[0038] This embodiment provides a chip 1, see Figure 1 , the chip 1 includes: a substrate 11, a physical layer 12 and a device layer 13.
[0039] Both the physical layer 12 and the device layer 13 are located above the substrate 11, and the device layer 13 is used to load devices; the physical layer 12 is located above the device layer 13, and the physical layer 12 is used for wiring between devices. Among them, the thickness of the substrate 11 is 7 to 10 times the total thickness of the physical layer 12 and the device layer 13, but not limited thereto. This embodiment does not limit the relative thickness of the substrate 11 to the total thickness of the physical layer 12 and the device layer 13.
[0040] The back of the substrate 11 is provided with a plurality of spaced-apart liquid storage channels 14; the liquid storage channels 14 are used to load heat dissipation media to cool the chip 1. The liquid storage channels 14 are located in the concentrated heat dissipation area on the back of the substrate 11, and the concentrated heat dissipation area is the area where the main power-consuming devices on the chip 1 are distributed; each liquid storage channel 14 is an independent spatial body, and the ratio of the depth of the liquid storage channel 14 to the thickness of the substrate 11 is 0.25 to 0.5:1. Among them, the depth of the liquid storage channel 14 is 0.3 mm to 0.5 mm. The area of the concentrated heat dissipation area is 1 / 2 to 2 / 3 of the area of the back of the substrate 11, and the geometric center of the concentrated heat dissipation area coincides with the geometric center of the back of the substrate 11 in the horizontal plane. In this embodiment, the spacing between adjacent liquid storage channels 14 is not specifically limited.
[0041] Optionally, the ratio of the depth of the liquid storage channel 14 to the thickness of the substrate 11 is 1:3, and the depth of the liquid storage channel 14 is 0.4 mm; the area of the concentrated heat dissipation region is 0.6 times the area of the back side of the substrate 11. By limiting the position and depth of the liquid storage channel 14, more heat dissipation medium can be transported to the back side of the substrate 11 to dissipate heat for the chip 1 while ensuring the overall strength of the chip 1.
[0042] Furthermore, the liquid storage channel 14 is formed in the form of a through silicon via or by using a technique such as chemical etching, which is not limited in this embodiment. Figure 2 , Figure 3 and Figure 4 The shape of the liquid storage channel 14 is at least one of a cylindrical shape, an elliptical cylindrical shape, a prism shape, a circular ring shape, a rectangular parallelepiped shape, a spiral shape, and an irregular shape. In this embodiment, the shape of the liquid storage channel 14 is cylindrical, and the cylindrical liquid storage channels 14 are arranged in a rectangular form at equal intervals on the back side of the substrate 11 to form a concentrated heat dissipation area.
[0043] The chip 1 provided in this embodiment has a liquid storage channel 14 on the back side of the substrate 11 , so that the heat dissipation medium can flow through the back side of the substrate 11 and directly contact the chip 1 , thereby improving the heat dissipation efficiency of the chip 1 .
[0044] Embodiment 2
[0045] Combination Figure 5 This embodiment provides a chip 1, which is different from the chip 1 in the first embodiment in that a conducting channel 15 connecting all the liquid storage channels 14 is further provided on the back of the substrate 11. The conducting channel 15 facilitates the rapid flow of the heat dissipation medium through the liquid storage channels 14, thereby further improving the heat dissipation efficiency of the heat dissipation medium on the chip 1.
[0046] Embodiment 3
[0047] This embodiment provides a chip heat dissipation device, which combines Figure 6 , Figure 7 and Figure 8 . The chip heat dissipation device includes: a mounting plate 2, a heat dissipation cover 3, and the chip 1 described in any of the above embodiments.
[0048] Among them, the chip 1 is fixedly arranged on the upper surface of the mounting plate 2 by means of flip-chip bonding through the physical layer 12; the heat dissipation cover 3 is located above the mounting plate 2 and is fixedly connected to the mounting plate 2; a storage groove 33 is opened on the bottom surface of the heat dissipation cover 3, and a delivery hole 31 for introducing and discharging the heat dissipation medium is opened on the side surface and / or the upper surface of the heat dissipation cover 3; the chip 1 is located in the storage groove 33, and the delivery hole 31 is communicated with the liquid storage channel 14; the upper surface of the storage groove 33 abuts against the back surface of the substrate 11; the bottom of the heat dissipation cover 3 is hermetically connected to the chip 1 by means of indium soldering.
[0049] The delivery hole 31 can not only realize the transmission of the heat dissipation medium, but also serve as an escape hole for the exhaust gas generated by the flux between the heat dissipation cover 3 and the chip 1 during soldering, thereby ensuring the stability between the chip 1 and the heat dissipation cover 3.
[0050] In this example, the mounting plate 2 is a substrate; the delivery hole 31 is located on the upper surface of the heat dissipation cover 3. The delivery hole 31 includes: a liquid inlet hole 311 and a liquid outlet hole 312. The liquid inlet hole 311 is used to introduce the heat dissipation medium into the liquid storage channel 14, and the liquid outlet hole 312 is used to discharge the heat dissipation medium in the liquid storage channel 14 out of the heat dissipation cover 3.
[0051] Furthermore, a conduction groove 32 is opened on the upper surface of the storage groove 33. The delivery hole 31 is communicated with the conduction groove 32, and the conduction groove 32 is communicated with the liquid storage channel 14. In this way, in the case where the conduction channel 15 is not opened on the substrate 11, the heat dissipation medium can enter the conduction groove 32 through the liquid inlet hole 311, and the conduction groove 32 guides the heat dissipation medium into the liquid storage channel 14 to dissipate heat from the chip 1, and the heat dissipation medium after absorbing heat flows out of the heat dissipation cover 3 through the conduction groove 32 from the liquid outlet hole 312; in the case where the conduction channel 15 is opened on the substrate 11, the heat dissipation medium can enter the conduction groove 32 through the liquid inlet hole 311, and the conduction groove 32 and the conduction channel 15 together form a conduction channel to guide the heat dissipation medium into the liquid storage channel 14 to dissipate heat from the chip 1, and the heat dissipation medium after absorbing heat flows out of the heat dissipation cover 3 through the conduction channel from the liquid outlet hole 312.
[0052] In this embodiment, the opening of the conduction channel 15 coincides with the opening of the conduction groove 32. By providing the conduction groove 32, the flow rate of the heat dissipation medium between the heat dissipation cover 3 and the chip 1 can be increased, thereby ensuring the heat dissipation effect of the heat dissipation medium on the chip 1.
[0053] Further, the conduction grooves 32 are arranged at intervals in a criss-cross pattern on the upper surface of the storage groove 33, and the distance between adjacent conduction grooves 32 is 0.8 mm to 1.2 mm; the depth of the conduction grooves 32 is 0.3 mm to 1 mm, and the distance from the upper surface of the heat dissipation cover 3 to the upper surface of the storage groove 33 is 3 mm to 5 mm, but not limited thereto. In this embodiment, the depth of the conduction grooves 32 is 0.6 mm, and the distance from the upper surface of the heat dissipation cover 3 to the upper surface of the storage groove 33 is 4 mm.
[0054] Embodiment 4
[0055] This embodiment provides a chip heat dissipation device, in combination with Figure 9 , the difference between this chip heat dissipation device and the chip heat dissipation device in Embodiment 3 is that: the mounting plate 2 is a main board, and the bottom end of the heat dissipation cover 3 is fixedly connected to the main board. The chip 1 can be selectively connected to the main board through a substrate according to its own structure, which is not limited in this embodiment.
[0056] Further, the chip heat dissipation device further includes: a delivery pipe 4. Among them, the delivery pipe 4 communicated with the liquid inlet hole 311 is used to introduce a heat dissipation medium into the liquid storage channel 14; the delivery pipe 4 communicated with the liquid outlet hole 312 is used to export the heat dissipation medium in the liquid storage channel 14 from the heat dissipation cover 3. In this embodiment, the heat dissipation medium is a coolant.
[0057] The number of the chips 1 is multiple, such as two or four, etc. In this embodiment, the number of the chips 1 is four. The delivery pipes 4 connected to the four chips 1 can be respectively connected to an external heat dissipation medium circulation system, or the four chips 1 can be connected in series to the external heat dissipation medium circulation system, or the four chips 1 can be connected in series in pairs to the external heat dissipation medium circulation system, etc. The specific connection mode of the chip 1 to the external heat dissipation medium circulation system can be determined according to the layout of the chip 1 on the main board. Among them, a quick-release joint 5 is provided on the pipe connected to the external heat dissipation medium circulation system, so as to facilitate the replacement and maintenance of the main board. A stop valve is provided on each quick-release joint 5 to close the corresponding stop valve when the quick-release joint 5 is opened, so as to avoid the outflow of the heat dissipation medium in the pipe.
[0058] In this embodiment, the four chips 1 are connected to the external heat dissipation medium circulation system in a series connection manner, so that the heat dissipation medium circulation system sequentially introduces the low-temperature heat dissipation medium into the conduction channels 15 of the four chips 1, and exports the heat dissipation medium that has absorbed heat from the heat dissipation cover 3 and transports it to the heat dissipation medium circulation system to cool the heat dissipation medium, and then introduces the cooled heat dissipation medium into the conduction channels 15 of the four chips 1 again. In this way, the cycle can continuously perform efficient heat dissipation treatment on the chips 1. In this embodiment, the temperature of the low-temperature heat dissipation medium is 40°C to 50°C.
[0059] As described above, the above is only a specific embodiment of the present invention, but the protection scope of the present invention is not limited thereto. Any changes or substitutions that can be easily thought of by those skilled in the art within the technical scope disclosed by the present invention should be covered by the protection scope of the present invention. Therefore, the protection scope of the present invention should be subject to the protection scope of the claims.
Claims
1. A chip heat dissipation device, characterized in that, Comprising: A heat dissipation cover and a chip; The chip includes: a substrate and a device layer; The device layer is located above the substrate, and the device layer is used to load devices; A liquid storage channel is formed on the back surface of the substrate; The liquid storage channel is used to load a heat dissipation medium to cool the chip; A storage groove is formed on the bottom surface of the heat dissipation cover, the chip is located in the storage groove, and the upper surface of the storage groove abuts against the back surface of the substrate; A delivery hole for introducing and discharging the heat dissipation medium is formed on the surface of the heat dissipation cover, the delivery hole is communicated with the liquid storage channel, and the bottom end of the heat dissipation cover is hermetically connected to the chip through a soldering flux; the delivery hole is also used to discharge the waste gas generated in the heat dissipation cover when the heat dissipation cover is welded to the chip through the soldering flux.
2. The chip heat dissipation device according to claim 1, wherein, The ratio of the depth of the liquid storage channel to the thickness of the substrate is 0.25 to 0.5:
1.
3. The chip heat dissipation device according to claim 1, characterized in that, A conduction channel communicating with the liquid storage channel is further formed on the back surface of the substrate.
4. The chip heat dissipation device according to claim 1, characterized in that, The shape of the liquid storage channel is at least one of a cylindrical shape, a prismatic shape, and a cuboid shape.
5. The chip heat dissipation device according to claim 1, characterized in that, A conduction groove is formed on the upper surface of the storage groove; The delivery hole is communicated with the conduction groove, and the conduction groove is communicated with the liquid storage channel.
6. The chip heat dissipation device according to claim 5, characterized in that, The depth of the conduction groove is 0.3 mm to 1 mm, and the distance from the upper surface of the heat dissipation cover to the upper surface of the storage groove is 3 mm to 5 mm.
7. The chip heat dissipation device according to claim 1, characterized in that The delivery hole includes: a liquid inlet hole and a liquid outlet hole; The chip heat dissipation device further includes: a delivery pipeline; The delivery pipeline is respectively communicated with the liquid inlet hole and the liquid outlet hole; The delivery pipeline communicated with the liquid inlet hole is used to introduce the heat dissipation medium into the liquid storage channel; The delivery pipeline communicated with the liquid outlet hole is used to export the heat dissipation medium in the liquid storage channel out of the heat dissipation cover.
Citation Information
Patent Citations
Cooling Devices, Packaged Semiconductor Devices, and Methods of Packaging Semiconductor Devices
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Chip and chip heat dissipation device
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Semiconductor device and manufacturing method thereof
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