A correction method and system for multi-channel data synchronization

Abstract

The present invention discloses a correction method and system for multi-channel data synchronization, which belongs to the field of communication technology, and includes: step S1, respectively sending a first pseudo-random binary sequence; step S2, the delay unit of each data channel delays the first pseudo-random sequence according to a preset delay strategy, and samples the first pseudo-random sequence under the control of a clock signal to obtain an optimal sampling point; step S3, simultaneously sending a second sequence; step S4, obtaining the phase difference between all data channels, and correcting according to the phase difference. The beneficial effect of the present invention is that the alignment of data and clock during multi-channel data transmission is achieved through a three-step method, the first step is to send the same pseudo-random binary sequence to find the optimal sampling point; the second step is to send a random sequence at the same time to find the phase difference of all data channels; the third step is to send the pseudo-random binary sequence again to verify the correction results of the first two steps.

Description

Technical Field

[0001] The present invention relates to the field of communication technology, and in particular to a correction method and system for multi-channel data synchronization. Background Art

[0002] For multi-channel serial data transceiver systems, multi-channel data alignment is a key factor in determining system performance. The current mainstream multi-channel data alignment method in the industry basically follows this approach: the transmitter sends special characters, and the receiver calculates the delay between each channel based on the received special characters. The designer then inserts delay registers into the original solution based on the calculated delay information to achieve data alignment. Finally, after the delay registers are inserted, the transmitter begins sending normal data.

[0003] While this approach can ultimately achieve the effect of multi-channel data alignment, after calculating the delay between channels, the receiving end must stop the entire system's transmission and reception, then redesign and insert the delay register. This results in an overly cumbersome alignment task. If the transmission channel environment changes, the calculation of the delay between channels and the insertion of the delay register must be repeated. Furthermore, after inserting the delay register, the transmitting end begins sending normal data, and there is no guarantee that the receiving end's data will be strictly aligned. These potential issues directly affect the performance indicators of the receiving end of the multi-channel data transceiver system. Therefore, to address these issues, it is urgent to design a multi-channel data synchronization correction method and system to meet practical needs. Summary of the Invention

[0004] The object of the present invention is to provide a method and system for calibrating multi-channel data synchronization.

[0005] The technical problem solved by the present invention can be achieved by adopting the following technical solutions:

[0006] The present invention provides a correction method for multi-channel data synchronization, comprising:

[0007] Step S1, the transmitting end sends a first pseudo-random binary sequence through each data channel;

[0008] In step S2, a delay unit of each data channel performs delay processing on the first pseudo-random binary sequence on each data channel by different delay amounts according to a preset delay strategy, and samples the delayed first pseudo-random binary sequence under the control of a clock signal to obtain an optimal sampling point corresponding to each data channel;

[0009] Step S3, the transmitting end simultaneously transmits a second sequence through each of the data channels;

[0010] In step S4, the receiving end samples the second sequence of each data channel according to the optimal sampling point of each data channel to obtain the phase difference between all the data channels, and performs correction according to the phase difference.

[0011] Preferably, after step S4, the method further includes:

[0012] Step S5, providing a third pseudo-random sequence, wherein the third pseudo-random sequence includes a plurality of subsequences;

[0013] Step S6, dividing all the subsequences into a plurality of subsequence groups in order;

[0014] Step S7: the transmitting end sequentially assigns each subsequence in the subsequence group to each data channel and transmits the subsequences simultaneously, wherein the subsequences in each subsequence group correspond to each data channel one by one.

[0015] Step S8, the receiving end deduces a subsequence of the next subsequence group that can be received, predicted by the corresponding data channel, based on the subsequence received by each data channel;

[0016] Step S9: comparing the predicted subsequence of the next subsequence group with the actually received subsequence. If the deduced subsequence of the next subsequence group is consistent with the actually received subsequence, the process ends.

[0017] Preferably, in step S9, if the deduced subsequence of the next subsequence group is inconsistent with the actually received subsequence, the process returns to step S1.

[0018] Preferably, the preset delay strategy includes:

[0019] Step A1, the delay unit delays the first pseudo-random binary sequence transmitted on each of the data channels according to different delay amounts;

[0020] Step A2: detecting the sampled second pseudo-random sequence by a detection unit corresponding to each of the data channels, and taking a point after the first pseudo-random sequence stabilizes at a rising edge of the clock signal as a corresponding sampling point;

[0021] In step A3, the delay unit adjusts the delay amount according to a preset step value, and then executes steps A1-A2, and determines the optimal sampling point from all the obtained sampling points.

[0022] Preferably, the delay amount is in the range of [0, one symbol period].

[0023] Preferably, it also includes:

[0024] The differential signal transmitted in each of the data channels is converted into a single-ended signal by a conversion unit;

[0025] The delay unit performs delay processing on the converted single-ended signal;

[0026] Under the control of the clock signal, the single-ended signal after the delay processing on the data channel is sampled through a trigger.

[0027] The present invention further provides a multi-channel data synchronization correction system for implementing the multi-channel data correction method as described above, comprising:

[0028] A first sending unit is configured to send a first pseudo-random binary sequence through each data channel at the sending end;

[0029] a sampling point confirmation unit connected to the first sending unit, and configured to have a delay unit for each of the data channels perform delay processing on the first pseudo-random binary sequence on each of the data channels by different delay amounts according to a preset delay strategy, and simultaneously sample the delayed first pseudo-random binary sequence under the control of a clock signal to obtain an optimal sampling point corresponding to each of the data channels;

[0030] a second sending unit, connected to the sampling point confirmation unit, configured for the sending end to simultaneously send a second sequence through each of the data channels;

[0031] A correction unit is connected to the second sending unit and is used for the receiving end to sample the second sequence of each data channel according to the optimal sampling point of each data channel to obtain a phase difference between all the data channels and perform correction according to the phase difference.

[0032] Preferably, the system further comprises: a third sending unit connected to the correction unit, wherein the third sending unit comprises:

[0033] a division module, configured to provide a third pseudo-random sequence, the third pseudo-random sequence including a plurality of subsequences, and sequentially divide all the subsequences into a plurality of subsequence groups;

[0034] a synchronous sending module, connected to the dividing module, configured for the sending end to sequentially assign each subsequence in the subsequence group to each data channel and send them simultaneously, wherein the subsequence in each subsequence group corresponds to each data channel on a one-to-one basis;

[0035] a deduction module, connected to the synchronous sending module, configured for the receiving end to deduce, based on the subsequence received by each data channel, a subsequence of the next subsequence group that can be received, predicted by the corresponding data channel;

[0036] A verification module, connected to the deduction module, is configured to compare the predicted subsequence of the next subsequence group with the actually received subsequence, and confirm that the correction is successful when the deduced subsequence of the next subsequence group is consistent with the actually received subsequence.

[0037] Preferably, if the deduced subsequence of the next subsequence group is inconsistent with the actually received subsequence, indicating that the verification has failed, the verification module calls the first sending unit to start recalibration.

[0038] Preferably, it also includes:

[0039] a conversion unit, configured to convert a differential signal transmitted in each of the data channels into a single-ended signal;

[0040] a delay unit, respectively provided corresponding to each of the data channels, and connected to the conversion unit, for performing delay processing on the single-ended signal converted by each of the data channels;

[0041] A trigger is connected to the delay unit and is used to sample the single-ended signal after delay processing on the data channel under the control of the clock signal.

[0042] The beneficial effects of the technical solution of the present invention are:

[0043] The present invention uses a three-step method to achieve data and clock alignment during concurrent transmission of multi-channel data. In the first step, a pseudo-random binary sequence is sent to find the optimal sampling point corresponding to each data channel; in the second step, each data channel simultaneously sends a random sequence to find the phase difference between all data channels; and in the third step, the pseudo-random binary sequence is sent again to verify the signals in the data channels after the optimal sampling points and phase differences in the first and second steps are corrected. BRIEF DESCRIPTION OF THE DRAWINGS

[0044] Figure 1 This is a flow chart of a multi-channel data synchronization correction method in the present invention;

[0045] Figure 2 This is a flow chart of a specific embodiment after step S4 in the present invention;

[0046] Figure 3 This is a flowchart of a specific embodiment of the preset delay strategy in the present invention;

[0047] Figure 4This is a structural block diagram of a specific embodiment of a multi-channel data synchronization correction system in the present invention;

[0048] Figure 5 It is a structural block diagram of a specific embodiment of the third sending unit in the present invention. DETAILED DESCRIPTION

[0049] The following will clearly and completely describe the technical solutions in the embodiments of the present invention in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making any creative efforts shall fall within the scope of protection of the present invention.

[0050] It should be noted that, in the absence of conflict, the embodiments of the present invention and the features therein may be combined with each other.

[0051] The present invention will be further described below with reference to the accompanying drawings and specific embodiments, but they are not intended to limit the present invention.

[0052] The present invention provides a multi-channel data synchronization correction method, which belongs to the field of communication technology. Figure 1 Shown, including:

[0053] Step S1, the transmitting end sends a first pseudo-random binary sequence through each data channel;

[0054] In step S2, a delay unit in each data channel performs delay processing on the first pseudo-random binary sequence on each data channel by different delay amounts according to a preset delay strategy, and simultaneously samples the delayed first pseudo-random binary sequence under the control of a clock signal to obtain an optimal sampling point corresponding to each data channel;

[0055] Step S3, the transmitting end simultaneously transmits a second sequence through each data channel;

[0056] In step S4, the receiving end samples the second sequence of each data channel according to the optimal sampling point of each data channel to obtain the phase difference between all data channels, and performs correction according to the phase difference.

[0057] Specifically, in this embodiment, data is transmitted between the transmitting end and the receiving end through one or more data channels, and each data channel simultaneously transmits data and clock through a differential line pair. In this embodiment, there are three data channels, and data is transmitted to the receiving end through the three data channels respectively. The data signal and clock signal in each data channel are transmitted simultaneously, and the three clock signals sample the three data signals.

[0058] In this embodiment, a delay cell is added after each data channel. The delay amount in the delay cell is adjustable, and the delay amount ranges from 0 to 1ns. For example, the delay amount can be 0, 10ps, 20ps, 30ps, 40ps...1ns.

[0059] Low-voltage differential signaling (LVDS) is used for differential transmission between the transmitter and receiver. The differential signal is then converted into a single-ended signal. The single-ended signal passes through a delay cell and enters the memory redis or a DFF flip-flop. The clock end of the DFF flip-flop samples the data output by the delay cell under the action of a clock signal.

[0060] The present invention provides a correction method for multi-channel data synchronization, which generally includes three steps. The first step, namely, including steps S1-S2, sends a pseudo-random binary sequence to find the optimal sampling point corresponding to each data channel; the second step, namely, including steps S3-S4, each data channel simultaneously sends a random second sequence. The random sequence can be hexadecimal, such as 8080, or can also be binary. For example, in this embodiment, three data channels simultaneously send the random sequence: 1000 0000 10000000. When receiving data, when a 1-bit deviation occurs in the data, it can be clearly observed that 1 and 0 are not aligned. The phase difference between all data channels is found, and correction is then performed based on the obtained phase difference; the third step, namely, including steps S5-S9, sends the pseudo-random binary sequence again to verify the optimal sampling point and the signal in the data channel after the phase difference correction in the first and second steps. The above three-step method is used to achieve alignment of data and clock during concurrent transmission of multi-channel data.

[0061] Furthermore, after the phase difference of each data channel is obtained, the phase difference is corrected by controlling the beat of each data channel to obtain data from the corresponding buffer register.

[0062] As a preferred embodiment, Figure 2 As shown, after step S4, the following steps are further included:

[0063] Step S5, providing a third pseudo-random sequence, where the third pseudo-random sequence includes a plurality of subsequences;

[0064] Step S6, dividing all subsequences into multiple subsequence groups in order;

[0065] Step S7: The transmitting end sequentially assigns each subsequence in the subsequence group to each data channel and transmits them simultaneously, with each subsequence in each subsequence group corresponding to each data channel one by one.

[0066] Step S8: The receiving end deduces the subsequence of the next subsequence group that can be received by the corresponding data channel based on the subsequence received by each data channel;

[0067] Step S9: compare the predicted subsequence of the next subsequence group with the actually received subsequence. If the predicted subsequence of the next subsequence group is consistent with the actually received subsequence, the process ends.

[0068] As a preferred embodiment, Figure 2 As shown, in step S9, if the subsequence of the deduced next subsequence group is inconsistent with the actually received subsequence, the process returns to step S1.

[0069] Specifically, in this embodiment, although the first and third steps both send a pseudo-random binary sequence PRBS, the same pseudo-random binary sequence PRBS is sent in the first step, and in the third step, a complete pseudo-random binary sequence PRBS is divided into several parts and sent separately by each data channel. For example, a complete pseudo-random binary sequence PRBS includes {A0, A1, A2, A3, A4, A5, A6...An}, where A0, A1, A2...An is a subsequence, and a complete pseudo-random binary sequence PRBS is divided into multiple subsequence groups, that is, A0, A1, A2 are the first subsequence group; A3, A4, A5 are the second subsequence group; Column grouping; three subsequences in this order form a subsequence group; in the first subsequence group, A0 is assigned to the first data channel, A1 is assigned to the second data channel, and A2 is assigned to the third data channel, and they are sent simultaneously; in the second subsequence group, A3 is assigned to the first data channel, A4 is assigned to the second data channel, and A5 is assigned to the third data channel, and they are sent simultaneously; according to this method, a complete pseudo-random binary sequence PRBS is cyclically assigned to the data channels in sequence and sent simultaneously to verify whether the sampling and phase difference correction in the first two steps are completed. If the verification is successful, it indicates that the correction in the first and second steps is successful. Otherwise, steps S1-S4 are repeated and re-calibrated.

[0070] Furthermore, the present invention performs verification by sending a pseudo-random binary sequence PRBS. The receiving end first stores the received data for one beat (parallel data), performs PRBS encoding on the stored data, and compares the encoded data with the latest received data. If they are consistent, it means that the PRBS verification is correct. Each data channel is provided with a detection unit, which is used to perform PRBS verification based on the received pseudo-random binary sequence.

[0071] As a preferred embodiment, Figure 3 As shown, the preset delay strategies include:

[0072] Step A1: The delay unit delays the first pseudo-random binary sequence transmitted on each data channel according to different delay amounts;

[0073] Step A2: Detecting the sampled first pseudo-random sequence through a detection unit corresponding to each data channel, and using the point where the first pseudo-random sequence stabilizes at the rising edge of the clock signal as the corresponding sampling point;

[0074] In step A3, the delay unit adjusts the delay amount according to a preset step value, then executes steps A1-A2, and determines the best sampling point from all the obtained sampling points.

[0075] As a preferred embodiment, the delay amount ranges from [0, one symbol period];

[0076] The default step value is 10ps.

[0077] Specifically, a symbol period corresponding to 100M data is 1ns, that is, the delay range is 0 to 1ns, and the preset step value is 10ps, that is, the delay can be 0, 10ps, 20ps, 30ps, 40ps...1ns.

[0078] As a preferred embodiment, it also includes:

[0079] The differential signal transmitted in each data channel is converted into a single-ended signal by a conversion unit;

[0080] The delay unit performs delay processing on the converted single-ended signal;

[0081] Under the control of a clock signal, a trigger is used to sample the delayed single-ended signal on the data channel.

[0082] The present invention also provides a multi-channel data synchronization correction system for implementing the multi-channel data synchronization correction method as described above. Figure 4 Shown, including:

[0083] The first sending unit 1 is configured to send a first pseudo-random binary sequence through each data channel;

[0084] a sampling point confirmation unit 2 connected to the first sending unit 1, and configured to include a delay unit for each data channel, which delays the first pseudo-random binary sequence on each data channel by different delay amounts according to a preset delay strategy, and samples the delayed first pseudo-random binary sequence under the control of a clock signal to obtain an optimal sampling point corresponding to each data channel;

[0085] The second sending unit 3 is connected to the sampling point confirmation unit 2 and is used for the sending end to send a second sequence simultaneously through each data channel;

[0086] The correction unit 4 is connected to the second sending unit 3 and is used for sampling the second sequence of each data channel according to the optimal sampling point of each data channel at the receiving end to obtain the phase difference between all data channels and perform correction according to the phase difference.

[0087] As a preferred embodiment, Figure 5 As shown, it also includes: a third sending unit 5 connected to the correction unit 4, and the third sending unit 5 includes:

[0088] a division module 51, configured to provide a third pseudo-random sequence, the third pseudo-random sequence including a plurality of sub-sequences, and sequentially divide all the sub-sequences into a plurality of sub-sequence groups;

[0089] The synchronous transmission module 52 is connected to the division module 51 and is used for the transmitter to sequentially assign each subsequence in the subsequence group to each data channel and transmit them simultaneously. The subsequences in each subsequence group correspond to each data channel one by one.

[0090] The deduction module 53 is connected to the synchronous transmission module 52 and is used for the receiving end to deduce the subsequence of the next subsequence group that can be received by the corresponding data channel based on the subsequence received by each data channel;

[0091] The verification module 54 is connected to the deduction module 53 and is used to compare the predicted subsequence of the next subsequence group with the actually received subsequence, and confirm that the correction is successful when the deduced subsequence of the next subsequence group is consistent with the actually received subsequence.

[0092] As a preferred embodiment, if the deduced subsequence of the next subsequence group is inconsistent with the actually received subsequence, it indicates that the verification has failed, and the verification module calls the first sending unit to start recalibration.

[0093] As a preferred embodiment, it also includes:

[0094] a conversion unit (not shown in the figure), configured to convert the differential signal transmitted in each data channel into a single-ended signal;

[0095] A delay unit (not shown in the figure) is respectively provided for each data channel and connected to the conversion unit for performing delay processing on the single-ended signal after conversion of each data channel;

[0096] A trigger (not shown in the figure) is connected to the delay unit and is used to sample the single-ended signal after delay processing on the data channel under the control of the clock signal.

[0097] The beneficial effect of the technical solution of the present invention is that: the alignment of data and clock during concurrent transmission of multi-channel data is achieved through a three-step method. In the first step, a pseudo-random binary sequence is sent to find the optimal sampling point corresponding to each data channel; in the second step, each data channel simultaneously sends a random sequence to find the phase difference between all data channels; in the third step, the pseudo-random binary sequence is sent again to verify the signals in the data channels after the optimal sampling points and phase differences in the first and second steps are corrected.

[0098] The above description is only a preferred embodiment of the present invention and does not limit the implementation mode and protection scope of the present invention. For those skilled in the art, it should be aware that all solutions obtained by equivalent substitutions and obvious changes made using the description and illustrations of the present invention should be included in the protection scope of the present invention.

Claims

1. A correction method for multi-channel data synchronization, characterized in that: include: Step S1, the transmitting end sends a first pseudo-random binary sequence through each data channel; Step S2, a delay unit of each data channel performs delay processing of different delay amounts on the first pseudo-random binary sequence on each data channel according to a preset delay strategy, and samples the delayed first pseudo-random binary sequence under the control of a clock signal to obtain an optimal sampling point corresponding to each data channel; Step S3, the transmitting end simultaneously transmits a second sequence through each of the data channels; Step S4, the receiving end samples the second sequence of each data channel according to the optimal sampling point of each data channel to obtain the phase difference between all the data channels, and performs correction according to the phase difference; The preset delay strategy includes: Step A1, the delay unit delays the first pseudo-random binary sequence transmitted on each of the data channels according to different delay amounts; Step A2, detecting the sampled first pseudo-random sequence through a detection unit corresponding to each of the data channels, and taking the point after the first pseudo-random sequence stabilizes at the rising edge of the clock signal as the corresponding sampling point; Step A3: the delay unit adjusts the delay amount according to a preset step value, then executes steps A1-A2, and determines the best sampling point from all the obtained sampling points.

2. A correction method for multi-channel data synchronization according to claim 1, characterized in that: After step S4, the method further includes: Step S5, providing a third pseudo-random sequence, wherein the third pseudo-random sequence includes a plurality of sub-sequences; Step S6, dividing all the subsequences into a plurality of subsequence groups in order; Step S7, the transmitting end sequentially allocates each of the subsequences in the subsequence group to each of the data channels and transmits them simultaneously, and each of the subsequences in the subsequence group corresponds to each of the data channels one by one; Step S8, the receiving end deduce, according to the subsequences received by each of the data channels, a subsequence of the next subsequence group that can be received predicted by the corresponding data channel; Step S9, comparing the predicted subsequence of the next subsequence group with the actually received subsequence, if the deduced subsequence of the next subsequence group is consistent with the actually received subsequence, the process ends.

3. A correction method for multi-channel data synchronization according to claim 2, characterized in that: In the step S9, if the deduced subsequence of the next subsequence group is inconsistent with the actually received subsequence, the process returns to the step S1.

4. The method for calibrating multi-channel data synchronization according to claim 1, characterized in that: The delay amount ranges from [0 to one symbol period].

5. The method for calibrating multi-channel data synchronization according to claim 1, characterized in that: Also includes: The differential signal transmitted in each of the data channels is converted into a single-ended signal by a conversion unit; The delay unit performs delay processing on the converted single-ended signal; Under the control of the clock signal, the single-ended signal after delay processing on the data channel is sampled through a trigger.

6. A multi-channel data synchronization correction system, characterized in that: A correction method for implementing multi-channel data synchronization as claimed in any one of claims 1 to 5, comprising: A first sending unit, configured to send a first pseudo-random binary sequence through each data channel at the sending end; a sampling point confirmation unit connected to the first sending unit, and a delay unit for each of the data channels respectively performing delay processing of the first pseudo-random binary sequence on each of the data channels with different delay amounts according to a preset delay strategy, and sampling the delayed first pseudo-random binary sequence under the control of a clock signal to obtain an optimal sampling point corresponding to each of the data channels; A second sending unit, connected to the sampling point confirmation unit, is used for the sending end to send a second sequence simultaneously through each of the data channels; A correction unit is connected to the second sending unit and is used for the receiving end to sample the second sequence of each data channel according to the optimal sampling point of each data channel to obtain the phase difference between all the data channels and perform correction according to the phase difference.

7. A multi-channel data synchronization correction system according to claim 6, characterized in that: Also includes: a third sending unit, connected to the correction unit, the third sending unit comprising: A division module, used for providing a third pseudo-random sequence, wherein the third pseudo-random sequence includes a plurality of sub-sequences, and dividing all the sub-sequences into a plurality of sub-sequence groups in sequence; a synchronous sending module, connected to the dividing module, and used for the sending end to sequentially assign each of the subsequences in the subsequence grouping to each of the data channels and send them simultaneously, wherein the subsequences in each of the subsequence groupings correspond to each of the data channels one by one; A deduction module, connected to the synchronous sending module, used for the receiving end to deduce the subsequence of the next subsequence group that can be received and predicted by the corresponding data channel according to the subsequence received by each data channel; A verification module is connected to the deduction module and is used to compare the predicted subsequence of the next subsequence group with the actually received subsequence, and confirm that the correction is successful when the deduced subsequence of the next subsequence group is consistent with the actually received subsequence.

8. A multi-channel data synchronization correction system according to claim 7, characterized in that: If the deduced subsequence of the next subsequence group is inconsistent with the actually received subsequence, it indicates that the verification has failed, and the verification module calls the first sending unit to start recalibration.

9. The multi-channel data synchronization correction system according to claim 6, characterized in that: Also includes: A conversion unit, used for converting a differential signal transmitted in each of the data channels into a single-ended signal; A delay unit is respectively provided corresponding to each of the data channels, and the delay unit is connected to the conversion unit, and is used for performing delay processing on the single-ended signal after conversion of each of the data channels; A trigger is connected to the delay unit and is used to sample the single-ended signal after delay processing on the data channel under the control of the clock signal.

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