A neural network data processing method, device, equipment and storage medium

By obtaining the number of data multiplexing times in the neural network model and dividing the data flow, using the computing array to process neural network data, the problem of slow neural network computing speed is solved, hardware performance is improved and power consumption is reduced.

CN113780539BActive Publication Date: 2025-08-12PENG CHENG LAB
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Patent Information

Application Number
CN202110980254.4
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2021-08-25
Publication Date
2025-08-12
Estimated Expiration
2041-08-25

AI Technical Summary

Technical Problem

The prior art processes neural networks at a slower speed and cannot meet the complex computing needs.

Method used

By obtaining the number of multiplexing times of data in the neural network model, dividing the data stream and calculating it based on the division results, the data stream is processed using the calculation array.

Benefits of technology

Improves hardware performance, reduces power consumption, and achieves accelerated operation of neural networks.

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Abstract

The present invention relates to the field of neural network technology, and more specifically to a neural network data processing method, apparatus, device, and storage medium. The present invention first determines the number of times data involved in a neural network model requires repeated calculations, then divides the data stream corresponding to the data involved in the neural network model based on the number of reuses, obtains data division results, and then calculates the data involved in the neural network model based on the division results, thereby accelerating the operation of the neural network.
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Description

Technical Field

[0001] The present invention relates to the field of neural network technology, and in particular to a neural network data processing method, device, equipment and storage medium. Background Art

[0002] Artificial intelligence and machine learning (ML) applications represent the next major market opportunity for embedded processors. However, traditional processor solutions cannot meet the computational demands of neural networks, the workloads that power many applications. Therefore, new architectures are needed to meet this growing demand for intelligence. With the adoption of standard open deep learning frameworks such as Caffe (a convolutional architecture for fast feature embedding) and TensorFlow, as well as readily available open-source networks such as GoogleNet and ResNet, specialized hardware for running various neural network layers is rapidly developing.

[0003] Deep learning (DL) has become a crucial approach to solving complex real-world problems, particularly in practical neural network applications such as image recognition, object detection, language translation, audio synthesis, and autonomous driving. Since most DNN (deep convolutional neural network) operations involve millions or billions of computational operations (MACs), with some common neural networks featuring LeNet-5 (341KMACs), AlexNext (724MMACs), VGG-16 (15.5GMACs), and GoogLeNet (1.43GMACs), inability to differentiate data within neural networks can lead to slower computations.

[0004] In summary, the existing technology processes neural networks slowly.

[0005] Therefore, the existing technology still needs to be improved and enhanced. Summary of the Invention

[0006] To solve the above technical problems, the present invention provides a neural network data processing method, device, equipment and storage medium, which solves the problem of slow processing speed of neural networks in the prior art.

[0007] To achieve the above object, the present invention adopts the following technical solutions:

[0008] In a first aspect, the present invention provides a method for processing neural network data, wherein the method comprises:

[0009] Get the number of reuses corresponding to the model data in the neural network model;

[0010] Obtaining a data stream corresponding to the model data according to the multiplexing number;

[0011] The neural network model is processed according to the data stream.

[0012] In one implementation, obtaining a data stream corresponding to the model data according to the number of multiplexing times includes:

[0013] According to the reuse times, obtaining the weight reuse times corresponding to the neural network model in the reuse times and the intermediate result reuse times corresponding to the neural network model;

[0014] A data stream corresponding to the model data is obtained according to the number of times the weights are reused and the number of times the intermediate results are reused.

[0015] In one implementation, obtaining a data stream corresponding to the model data according to the number of times the weights are reused and the number of times the intermediate results are reused includes:

[0016] Obtaining a convolution kernel in the model data according to the model data;

[0017] According to the weight reuse number, obtaining the weight reuse number corresponding to the convolution kernel in the weight reuse number;

[0018] According to the number of reuses of the intermediate results, obtaining the number of reuses of the output results corresponding to the convolution kernel in the number of reuses of the intermediate results;

[0019] The data stream corresponding to the convolution kernel is obtained according to the number of times the weight corresponding to the convolution kernel is reused and the number of times the output result corresponding to the convolution kernel is reused.

[0020] In one implementation, obtaining the data stream corresponding to the convolution kernel according to the number of weight reuses corresponding to the convolution kernel and the number of output result reuses corresponding to the convolution kernel includes:

[0021] Comparing the number of weight reuses corresponding to the convolution kernel and the number of output result reuses corresponding to the convolution kernel to obtain a comparison result;

[0022] According to the comparison result, a data stream corresponding to the convolution kernel is obtained.

[0023] In one implementation, obtaining the data stream corresponding to the convolution kernel according to the comparison result includes:

[0024] When the number of weight reuses corresponding to the convolution kernel is greater than the first set value, and the number of output result reuses corresponding to the convolution kernel is less than the second set value, a weight-fixed data stream in the data stream corresponding to the convolution kernel is obtained.

[0025] In one implementation, obtaining the data stream corresponding to the convolution kernel according to the comparison result includes:

[0026] When the number of weight reuses corresponding to the convolution kernel is less than or equal to the first set value, and the number of output result reuses corresponding to the convolution kernel is greater than or equal to the second set value, the result expanded data stream in the data stream corresponding to the convolution kernel is obtained.

[0027] In one implementation, processing the neural network model according to the data stream includes:

[0028] A fixed data stream and a result expanded data stream are obtained according to the weight corresponding to the convolution kernel in the data stream to obtain a calculation array corresponding to the convolution kernel in the neural network model;

[0029] The convolution kernel in the neural network model is processed by the computing array.

[0030] In one implementation, processing the convolution kernel in the neural network model by the computing array includes:

[0031] Dividing the computing array according to the attributes of the computing array to obtain a first array and a second array;

[0032] Processing the convolution kernel matched with the weight-fixed data stream through the first array;

[0033] The convolution kernel matched with the result unfolded data stream is processed through the second array.

[0034] In one implementation, the method further includes:

[0035] Obtaining instruction information corresponding to the neural network model;

[0036] Obtaining, based on the instruction information, a phenotype that matches the instruction information, wherein the phenotype is located in an instruction reordering cache unit;

[0037] Saving the instruction information into the phenotype;

[0038] When the instruction information is executed, the instruction information is deleted from the table type.

[0039] In one implementation, the method further includes:

[0040] Moving external data required for processing the neural network model to a static random access memory through direct memory access, wherein the external data is stored in a double rate synchronous dynamic random access memory;

[0041] The external data is transmitted to a computing array for processing the neural network model through the static random access memory.

[0042] In a second aspect, an embodiment of the present invention further provides an apparatus for a neural network data processing method, wherein the apparatus includes the following components:

[0043] A data acquisition module is used to obtain the reuse times corresponding to the model data in the neural network model;

[0044] A data analysis module, configured to obtain a data stream corresponding to the model data according to the number of multiplexing times;

[0045] A data processing module is used to process the neural network model according to the data stream.

[0046] In a third aspect, an embodiment of the present invention further provides a terminal device, wherein the terminal device includes a memory, a processor, and a neural network data processing program stored in the memory and executable on the processor, and when the processor executes the neural network data processing program, the steps of the above-mentioned neural network data processing method are implemented.

[0047] In a fourth aspect, an embodiment of the present invention further provides a computer-readable storage medium, on which a neural network data processing program is stored. When the neural network data processing program is executed by a processor, the steps of the above-mentioned neural network data processing method are implemented.

[0048] Beneficial Effects: The present invention first obtains the number of times the data involved in the neural network model needs to be repeatedly calculated (the number of reuses), then divides the data stream corresponding to the data involved in the neural network model according to the number of reuses, obtains the data division results, and calculates the data involved in the neural network model according to the division results, thereby accelerating the operation of the neural network. Since the present invention divides the data in the neural network model according to the data stream, the data corresponding to the same data stream can be placed in the same hardware partition for processing, thereby solving the problem of data reuse, thereby improving hardware performance and reducing power consumption. BRIEF DESCRIPTION OF THE DRAWINGS

[0049] Figure 1 It is the overall flow chart of the present invention;

[0050] Figure 2 The accelerator architecture of the present invention;

[0051] Figure 3 The instruction system architecture of the present invention;

[0052] Figure 4This is the on-chip cache system architecture of the present invention. DETAILED DESCRIPTION

[0053] The following is a clear and complete description of the technical solutions of the present invention in conjunction with the embodiments and the accompanying drawings. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of the present invention.

[0054] Research has identified artificial intelligence and machine learning (ML) applications as the next major market opportunity for embedded processors. However, traditional processor solutions cannot meet the computational demands of neural networks, which power many applications. Therefore, new architectures are needed to meet the growing demand for intelligence. With the adoption of standard open deep learning frameworks such as Caffe (a convolutional architecture for fast feature embedding) and TensorFlow, as well as readily available open-source networks such as GoogleNet and ResNet, specialized hardware for running various neural network layers has rapidly developed. Deep learning (DL) has become a crucial approach for solving complex real-world problems, particularly in practical neural network applications such as image recognition, object detection, language translation, audio synthesis, and autonomous driving. Most DNN (deep convolutional neural network) operations involve millions or billions of computational operations (MACs), with examples such as LeNet-5 (341KMACs), AlexNext (724MMACs), VGG-16 (15.5GMACs), and GoogLeNet (1.43GMACs). Failure to differentiate data within neural networks can lead to slower computation speeds.

[0055] To address the above-mentioned technical problems, the present invention provides a neural network data processing method, apparatus, device, and storage medium, which address the slow processing speed of neural networks in existing technologies. In specific implementation, the present invention first obtains the number of reuses of the data involved in the neural network model, then divides the data stream corresponding to the data involved in the neural network model according to the reuse number, obtains the data division results, and then performs calculations on the data involved in the neural network model based on the division results, thereby accelerating the operation of the neural network.

[0056] For example, the range of reuse times for data types A, B, and C in the neural network model is s1 to s2, and the range of reuse times for data types D, E, and F is s3 to s4. Therefore, the data streams corresponding to data of data type A, data of data type B, and data of data type C are the same data stream, and the data streams corresponding to data of data type D, data of data type E, and data of data type F are another data stream. In this way, the data in the neural network model is divided into two types according to the data stream, and the two types of data are processed separately, thereby accelerating the processing speed of the entire neural network.

[0057] Exemplary Methods

[0058] A neural network data processing method of this embodiment can be applied to a terminal device. In this embodiment, Figure 1 As shown in , the neural network data processing method specifically includes the following steps:

[0059] S100, obtaining the number of reuses corresponding to the model data in the neural network model.

[0060] In this embodiment, the number of reuses refers to the number of times the neural network model is reused. The convolution layer is mainly used to perform convolution operations on the data input into the neural network model. The convolution operation involves weights and the intermediate results output by each convolution layer. The number of reuses in this embodiment refers to the number of times the weights are reused and the number of times the intermediate results are reused. This embodiment relies on the following to perform operations on the neural network model: Figure 2 The neural network accelerator is a hardware platform shown in FIG. , and the neural network accelerator includes the following Figure 3 The instruction system shown in the figure, the instruction system of the neural network accelerator of this embodiment adopts the DAE (Decoupled-access / execute) computing architecture. The instruction delivery process in the instruction system is sequential dispatch, out-of-order emission, and sequential write-back. Among them, sequential dispatch refers to the process of dispatching instructions to the waiting queues of different computing units after decoding; out-of-order emission refers to the process of dispatching instructions from the waiting queues of computing units to the computing units for execution after resolving data dependencies; sequential write-back refers to the process of sending the results obtained in the order in which the instructions enter to the CPU in the same order. The instruction system also contains an instruction reorder buffer (ROB) unit. After decoding, the instructions will be dispatched to different independent parallel queues according to the differences in the instructions, such as the data load queue, store queue, and execute queue. The queue can contain multiple instructions, and the waiting instructions can be dispatched to the computing units for execution after resolving data dependencies.

[0061] Whether the accelerator receives an instruction to calculate the number of reuses corresponding to the model data in the neural network model or other subsequent instructions, it will allocate an entry matching the instruction in the instruction reorder buffer (ROB). After each instruction is executed, the instruction in the entry will be removed. Whenever an instruction is dispatched, the source operand index and destination register index of the instruction are compared with the various entries in the ROB to determine whether the instruction should be dispatched and to determine the relevance of RAW and WAW.

[0062] S200: Obtain a data stream corresponding to the model data according to the multiplexing times.

[0063] The number of reuses in this embodiment includes the number of reuses of the weights of the convolutional layer in step S100 and the number of reuses of the intermediate results output by each convolutional layer. The corresponding data streams are determined based on the number of reuses. The data streams in this embodiment include the weight stationary data stream (WS data stream) and the output stationary data stream (OS data stream). Step S200 includes the following steps S201 and S202:

[0064] S201, according to the reuse times, obtain the weight reuse times corresponding to the neural network model in the reuse times and the intermediate result reuse times corresponding to the neural network model.

[0065] The number of times weights are reused is the number of times all weights involved in the neural network model are reused, and the number of times intermediate results are reused is the result output by each convolution kernel in the neural network model.

[0066] S202 : Obtain a data stream corresponding to the model data according to the weight reuse times and the intermediate result reuse times.

[0067] In this embodiment, operations on convolution kernels with the same number of weight reuses are mapped to the same data stream (WS data stream), and operations on convolution kernels with the same number of intermediate results reused are mapped to another data stream (OS data stream). Step S202 further includes the following steps S2021, S2022, S2023, and S2024:

[0068] S2021: Obtain a convolution kernel in the model data based on the model data.

[0069] The present invention can divide the data expansion direction involved in other layers in the neural network model, and can also divide the data expansion direction involved in the convolution kernel in the neural network model, so as to operate the neural network model according to the division results. However, since the computational complexity involved in the convolution kernel in the neural network model accounts for the vast majority of the computational complexity of the neural network model, this embodiment only divides the data flow according to the data expansion direction involved in the convolution kernel.

[0070] S2022: Obtain, based on the weight reuse times, a weight reuse times corresponding to the convolution kernel in the weight reuse times.

[0071] The weight corresponding to the convolution kernel is the internal data involved in the convolution kernel. When performing convolution calculation, the weight is shared, that is, the weight is reused.

[0072] S2023: Obtain, based on the intermediate result reuse times, the output result reuse times corresponding to the convolution kernel in the intermediate result reuse times.

[0073] The neural network model needs to use the output of its convolution kernel to perform other operations, so there is reuse of the results.

[0074] S2024: Based on the number of times the weights corresponding to the convolution kernel are reused and the number of times the output result corresponding to the convolution kernel is reused, a data stream corresponding to the convolution kernel is obtained. The specific process of step S2024 is as follows:

[0075] When the number of weight reuses corresponding to the convolution kernel is greater than the first set value, and the number of output result reuses corresponding to the convolution kernel is less than the second set value, a weight-fixed data stream in the data stream corresponding to the convolution kernel is obtained.

[0076] When the number of weight reuses corresponding to the convolution kernel is less than or equal to the first set value, and the number of output result reuses corresponding to the convolution kernel is greater than or equal to the second set value, the result expanded data stream in the data stream corresponding to the convolution kernel is obtained.

[0077] Some convolution kernels have their weights reused, while others have their output results reused. The data stream for each convolution kernel should be selected based on its emphasis in the above two directions.

[0078] In this embodiment, not only can the corresponding data stream be obtained based on the number of multiplexing times, but the data stream corresponding to each layer of the network can also be obtained based on the loop boundary parameters of the neural network model, where the loop boundary parameters include weights and intermediate results.

[0079] In this embodiment, the convolution kernel output is stored in a buffer (partsum). The OS data flow is expanded in the output direction, maximizing output reuse. This reduces partsum hardware resources and minimizes the energy consumption of reading and writing partssum, thereby reducing the power consumption of the partssum buffer. The WS data flow primarily reuses model data multiple times, reducing the energy consumption of reading model data and maximizing its reuse.

[0080] For example, obtain each convolution kernel in the neural network model, and divide each convolution kernel according to the number of weight reuse and output result reuse in each convolution kernel. For example, convolution kernels a and b both focus on weight reuse, and convolution kernels c and d focus on output result reuse. Then the operations of convolution kernels a and b are divided into WS data streams, and the operations of convolution kernels c and d are divided into OS data streams.

[0081] S300, processing the neural network model according to the data stream, including: fixing the data stream and the result expanding the data stream according to the weights corresponding to the convolution kernel in the data stream to obtain a calculation array corresponding to the convolution kernel in the neural network model; processing the convolution kernel in the neural network model through the calculation array.

[0082] After the convolution kernel is divided according to the data stream, the convolution kernel operation needs to be moved to the PE array for corresponding operation. This embodiment is achieved by Figure 4 The on-chip cache system shown offloads convolution kernel operations to the PE array. The on-chip cache system consists of three 16-bank memory banks, two of which store input and output feature data (using a ping-pong architecture) and one for weight data. Each bank is a simple dual-port SRAM connected to the first column of the PE array to provide weight and feature data.

[0083] In this embodiment, the computing array (PE) is divided into a first array and a second array. The first array is only used to process the convolution kernel corresponding to the OS data flow, and the second array is only used to process the convolution kernel corresponding to the WS data flow.

[0084] When computing data in the convolution kernel, this embodiment requires moving the external data required for the computation to the PE array. This data movement can be achieved through DMA. The direct memory access (DMA) system primarily transfers weights and network eigenvalue data between off-chip DDR and on-chip SRAM. This primarily involves converting between the TileLink bus and SRAM interface protocols, as well as converting data formats required by the PE array units to meet the needs of matrix, convolution, and vector computations.

[0085] In summary, the present invention first obtains the number of times the data involved in the neural network model needs to be repeatedly calculated (the number of reuses), and then divides the data stream corresponding to the data involved in the neural network model according to the number of reuses, obtains the data division result, and calculates the data involved in the neural network model according to the division result, thereby realizing accelerated operation of the neural network. Since the present invention divides the data in the neural network model according to the data stream, the data corresponding to the same data stream can be placed in the same hardware partition for processing, thereby solving the problem of data reuse, and further improving hardware performance and reducing power consumption. Compared with the instruction control format of the traditional peripheral bus interface, it has better acceleration performance and software optimization. At the same time, the use of this storage architecture design scheme can greatly increase the bandwidth of the data to meet the system throughput requirements. According to the requirements of the data scale of different layers of the neural network model, different types of instructions are adopted to achieve the remapping of the data stream of the neural network to different hardware to meet the needs of system performance, power consumption, etc.

[0086] Exemplary devices

[0087] This embodiment also provides a device for a neural network data processing method, the device comprising the following components:

[0088] A data acquisition module is used to obtain the reuse times corresponding to the model data in the neural network model;

[0089] A data analysis module, configured to obtain a data stream corresponding to the model data according to the number of multiplexing times;

[0090] A data processing module is used to process the neural network model according to the data stream.

[0091] Based on the above embodiments, the present invention also provides a terminal device, which includes a memory, a processor, and a neural network data processing program stored in the memory and runnable on the processor. When the processor executes the neural network data processing program, the steps of the above-mentioned neural network data processing method are implemented.

[0092] Those skilled in the art will appreciate that all or part of the processes in the above-described embodiments can be implemented by instructing the relevant hardware through a computer program. The computer program can be stored in a non-volatile computer-readable storage medium. When executed, the computer program can include the processes of the above-described embodiments. Among them, any reference to memory, storage, database or other media used in the embodiments provided by the present invention can include non-volatile and / or volatile memory. Non-volatile memory can include read-only memory (ROM), programmable ROM (PROM), electrically programmable ROM (EPROM), electrically erasable programmable ROM (EEPROM) or flash memory. Volatile memory can include random access memory (RAM) or external cache memory. By way of illustration and not limitation, RAM is available in various forms, such as static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), double data rate SDRAM (DDRSDRAM), enhanced SDRAM (ESDRAM), synchronous link DRAM (SLDRAM), RAMbus direct RAM (RDRAM), direct RAM bus dynamic RAM (DRDRAM), and RAMbus dynamic RAM (RDRAM).

[0093] In summary, the present invention discloses a neural network data processing method, device, equipment and storage medium, the method comprising: the present invention first obtains the number of times the data involved in the neural network model needs to be repeatedly calculated (number of reuses), and then divides the data stream corresponding to the data involved in the neural network model according to the number of reuses to obtain the data division results, and calculates the data involved in the neural network model according to the division results, so as to accelerate the operation of the neural network.

[0094] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some of the technical features therein. However, these modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the various embodiments of the present invention.

Claims

1. A neural network data processing method, characterized in that: The method comprises: Obtaining the number of reuses corresponding to the model data in the neural network model, the accelerator receives an instruction to calculate the number of reuses corresponding to the model data in the neural network model, and allocates a table entry matching the instruction in the instruction reordering cache unit; Obtaining a data stream corresponding to the model data according to the multiplexing number; Processing the neural network model according to the data stream; The obtaining of a data stream corresponding to the model data according to the number of multiplexing times includes: According to the reuse times, obtaining the weight reuse times corresponding to the neural network model in the reuse times and the intermediate result reuse times corresponding to the neural network model; Obtaining a convolution kernel in the model data according to the model data; According to the weight reuse number, obtaining the weight reuse number corresponding to the convolution kernel in the weight reuse number; According to the number of reuses of the intermediate results, obtaining the number of reuses of the output results corresponding to the convolution kernel in the number of reuses of the intermediate results; Comparing the number of weight reuses corresponding to the convolution kernel and the number of output result reuses corresponding to the convolution kernel to obtain a comparison result; When the number of weight reuses corresponding to the convolution kernel is greater than a first set value, and the number of output result reuses corresponding to the convolution kernel is less than a second set value, a weighted fixed data stream in the data stream corresponding to the convolution kernel is obtained; When the number of weight reuses corresponding to the convolution kernel is less than or equal to a first set value, and the number of output result reuses corresponding to the convolution kernel is greater than or equal to a second set value, a result expanded data stream in the data stream corresponding to the convolution kernel is obtained; The processing of the neural network model according to the data stream includes: The weighted fixed data stream and the result expanded data stream corresponding to the convolution kernel in the data stream are used to obtain a calculation array corresponding to the convolution kernel in the neural network model. When calculating the convolution kernel, the external data required for the calculation is moved into the array, and the calculation of the convolution kernel is moved into the array for corresponding calculation; Dividing the computing array according to the attributes of the computing array to obtain a first array and a second array; Processing the convolution kernel matched with the weighted fixed data stream through the first array, wherein the first array is only used to process the convolution kernel corresponding to the weighted fixed data stream; The convolution kernel matching the result expanded data stream is processed through the second array, and the second array is only used to process the convolution kernel corresponding to the result expanded data stream.

2. The neural network data processing method according to claim 1, wherein: The method further comprises: Obtaining instruction information corresponding to the neural network model; Obtaining, based on the instruction information, a phenotype that matches the instruction information, wherein the phenotype is located in an instruction reordering cache unit; Saving the instruction information into the phenotype; When the instruction information is executed, the instruction information is deleted from the table type.

3. The neural network data processing method according to claim 1, wherein: The method further comprises: Moving external data required for processing the neural network model to a static random access memory through direct memory access, wherein the external data is stored in a double rate synchronous dynamic random access memory; The external data is transmitted to a computing array for processing the neural network model through the static random access memory.

4. A device for a neural network data processing method, characterized in that: The device comprises the following components: A data acquisition module is used to obtain the number of reuses corresponding to the model data in the neural network model. The accelerator receives an instruction to calculate the number of reuses corresponding to the model data in the neural network model and allocates a table entry matching the instruction in the instruction reordering cache unit; A data analysis module, configured to obtain a data stream corresponding to the model data according to the number of multiplexing times; A data processing module, configured to process the neural network model according to the data stream; The obtaining of a data stream corresponding to the model data according to the number of multiplexing times includes: According to the reuse times, obtaining the weight reuse times corresponding to the neural network model in the reuse times and the intermediate result reuse times corresponding to the neural network model; Obtaining a convolution kernel in the model data according to the model data; According to the weight reuse number, obtaining the weight reuse number corresponding to the convolution kernel in the weight reuse number; According to the number of reuses of the intermediate results, obtaining the number of reuses of the output results corresponding to the convolution kernel in the number of reuses of the intermediate results; Comparing the number of weight reuses corresponding to the convolution kernel and the number of output result reuses corresponding to the convolution kernel to obtain a comparison result; When the number of weight reuses corresponding to the convolution kernel is greater than a first set value, and the number of output result reuses corresponding to the convolution kernel is less than a second set value, a weighted fixed data stream in the data stream corresponding to the convolution kernel is obtained; When the number of weight reuses corresponding to the convolution kernel is less than or equal to a first set value, and the number of output result reuses corresponding to the convolution kernel is greater than or equal to a second set value, a result expanded data stream in the data stream corresponding to the convolution kernel is obtained; The processing of the neural network model according to the data stream includes: The weighted fixed data stream and the result expanded data stream corresponding to the convolution kernel in the data stream are used to obtain a calculation array corresponding to the convolution kernel in the neural network model. When calculating the convolution kernel, the external data required for the calculation is moved into the array, and the calculation of the convolution kernel is moved into the array for corresponding calculation; Dividing the computing array according to the attributes of the computing array to obtain a first array and a second array; Processing the convolution kernel matched with the weighted fixed data stream through the first array, wherein the first array is only used to process the convolution kernel corresponding to the weighted fixed data stream; The convolution kernel matching the result expanded data stream is processed through the second array, and the second array is only used to process the convolution kernel corresponding to the result expanded data stream.

5. A terminal device, characterized in that: The terminal device includes a memory, a processor, and a neural network data processing program stored in the memory and executable on the processor. When the processor executes the neural network data processing program, the steps of the neural network data processing method according to any one of claims 1 to 3 are implemented.

6. A computer-readable storage medium, characterized in that The computer-readable storage medium stores a neural network data processing program, and when the neural network data processing program is executed by the processor, the steps of the neural network data processing method according to any one of claims 1 to 3 are implemented.

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