A press-fit power semiconductor device and its temperature distribution measurement system

Abstract

The present invention relates to a crimped power semiconductor device and a temperature distribution measurement system thereof. The crimped power semiconductor device connects the gate of each semiconductor chip to the interface terminal of the PCB board, so as to measure the junction temperature of each semiconductor chip in the crimped power semiconductor device, thereby improving the accuracy of the temperature distribution measurement. The temperature distribution measurement system of the crimped power semiconductor device uses a timing drive circuit to periodically open and close the crimped power semiconductor device to be tested, so as to simulate the heating of the crimped power semiconductor device under different working conditions. And by coordinating with the timing of the measurement branch switch, the timing accurate measurement of the junction temperature distribution of each semiconductor chip can be achieved, breaking through the limitation that the existing measurement method can only obtain the average junction temperature of each semiconductor chip.

Description

Technical Field

[0001] The invention relates to the technical field of semiconductor devices and temperature measurement thereof, in particular to a compression-type power semiconductor device and a temperature distribution measurement system thereof. Background Art

[0002] With the development of flexible DC transmission technology, Insulated Gate Bipolar Transistor (IGBT) devices, as key devices in converter valves and circuit breakers, have received more and more attention. In recent years, IGBT devices in the form of crimped packages have emerged. Compared with traditional welded IGBT modules, they have the advantages of high power density, easy series connection and short circuit failure, and have been gradually applied to high-voltage and high-power transmission occasions.

[0003] For multi-chip press-fit IGBT devices, the interaction of internal physical fields causes differences in the junction temperature of each semiconductor chip, which in turn affects the performance and reliability of the device. Therefore, accurate measurement of the junction temperature of each semiconductor chip has become one of the most concerned issues in the application of press-fit IGBT devices.

[0004] Due to the particularity of the crimping packaging form, the infrared temperature measurement method and contact temperature measurement method widely used in the welding packaging form are difficult to apply to the temperature measurement of crimping devices. At present, the temperature measurement method widely used in crimping IGBT devices is the thermistor electrical parameter method. Its principle is to first obtain the relationship between the saturation voltage drop and the junction temperature of the device under low current, and then convert the saturation voltage drop of the device under low current to obtain the junction temperature of the device. For single-chip devices, the thermistor electrical parameter method can obtain the junction temperature of the chip to meet the measurement requirements, but for multi-chip devices, the thermistor electrical parameter method can only obtain the average junction temperature of all chips, and cannot accurately obtain the distribution of the junction temperature of each semiconductor chip. Summary of the invention

[0005] The purpose of the present invention is to provide a press-fit power semiconductor device and a temperature distribution measurement system thereof to solve the problem in the prior art that the junction temperature distribution of each semiconductor chip cannot be accurately obtained, and the system has the characteristics of simple structure and accurate measurement.

[0006] To achieve the above object, the present invention provides the following solutions:

[0007] A press-fit power semiconductor device, comprising: a plurality of sub-modules, a plurality of bosses and a PCB board; the sub-modules are arranged on the bosses in a one-to-one correspondence; the PCB board is provided with a plurality of through holes, and the bosses are arranged in the through holes; the PCB board is provided with a plurality of interface terminals;

[0008] The sub-module comprises: an upper molybdenum sheet, a semiconductor chip and a lower molybdenum sheet;

[0009] The semiconductor chip is arranged between the upper molybdenum sheet and the lower molybdenum sheet; the gate of the semiconductor chip is connected to the interface terminal on the PCB board in a one-to-one correspondence;

[0010] The PCB board is used to drive each of the sub-modules; the upper molybdenum sheet and the lower molybdenum sheet form a stress buffer zone.

[0011] Preferably, the press-fit power semiconductor device further comprises: a collector plate and an emitter plate;

[0012] The collector plate and the emitter plate are used to connect to an external circuit; and the collector plate, the upper molybdenum sheet, the semiconductor chip, the lower molybdenum sheet and the emitter plate form a current loop.

[0013] Preferably, the sub-module further comprises: sub-module frames whose number is the same as the number of the sub-modules; the sub-module frames are sleeved on the sub-modules; and the sub-module frames are used to fix the sub-modules.

[0014] Preferably, the sub-module further comprises: a silver gasket; the silver gasket is arranged between the lower molybdenum sheet and the boss; the silver gasket is used to compensate for the height tolerance of the components in each of the sub-modules.

[0015] Preferably, the crimp-type power semiconductor device further comprises: external leads; the number of the external leads is the same as the number of interface terminals on the PCB board, and the external leads are connected to the interface terminals in a one-to-one correspondence.

[0016] A temperature distribution measurement system for a press-fit power semiconductor device, used for measuring the temperature distribution of the press-fit power semiconductor device; the temperature distribution measurement system comprises: a first current source, a test branch switch, a second current source, a timing drive circuit and a probe;

[0017] The first current source, the test branch switch and the press-fit power semiconductor device to be tested are sequentially connected in series to form a heating path; the first current source is used to provide a heating current; the test branch switch is used to control the opening and closing of the heating path;

[0018] The second current source and the probe are both connected in parallel with the press-fit power semiconductor device to be tested; the second current source is used to provide a measurement current; the probe is used to measure the saturation voltage drop of the press-fit power semiconductor device to be tested;

[0019] The timing drive circuit is connected to the interface terminal on the PCB board in the press-fit power semiconductor device to be tested through external leads; the timing drive circuit is used to control the conduction and disconnection of each semiconductor chip in the press-fit power semiconductor device to be tested.

[0020] Preferably, the probe comprises a voltage probe;

[0021] The voltage probe is connected in parallel with the press-fit power semiconductor device to be tested; the voltage probe is used to measure the saturation voltage drop of the press-fit power semiconductor device to be tested.

[0022] According to the specific embodiments provided by the present invention, the present invention discloses the following technical effects:

[0023] The press-fit power semiconductor device provided by the present invention connects the gate of each semiconductor chip to the interface terminal of the PCB board respectively, so as to measure the junction temperature of each semiconductor chip in the press-fit power semiconductor device, thereby improving the accuracy of temperature distribution measurement.

[0024] In addition, the temperature distribution measurement system of the press-fit power semiconductor device provided by the present invention uses a timing drive circuit to periodically switch the press-fit power semiconductor device to be tested, so as to simulate the heating of the press-fit power semiconductor device under different working conditions. And by coordinating with the timing of the measurement branch switch, the timing accurate measurement of the junction temperature distribution of each semiconductor chip can be achieved, breaking through the limitation that the existing measurement method can only obtain the average junction temperature of each semiconductor chip. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative labor.

[0026] Figure 1 A schematic structural diagram of a press-fit power semiconductor device provided by the present invention;

[0027] Figure 2 Schematic diagram of connection between gate electrodes of semiconductor chips and interface terminals on a PCB board in an embodiment of the present invention;

[0028] Figure 3 A circuit diagram of a temperature distribution measurement system for a press-fit power semiconductor device provided by the present invention;

[0029] Figure 4 A schematic diagram of the timing of applying gate voltages to each semiconductor chip during the calibration process of an embodiment of the present invention;

[0030] Figure 5 A schematic diagram of a conversion process for obtaining calibration curves of each semiconductor chip in an embodiment of the present invention;

[0031] Figure 6 This is a timing diagram of the temperature measurement process drive control in an embodiment of the present invention;

[0032] Figure 7 Schematic diagram of the conversion process for obtaining the temperature distribution of each semiconductor chip in an embodiment of the present invention.

[0033] Description of symbols in the accompanying drawings:

[0034] 1 collector plate, 2 upper molybdenum sheet, 3 semiconductor chip, 3-1 gate of semiconductor chip, 4 lower molybdenum sheet, 5 silver gasket, 6 boss, 7 sub-module frame, 8 PCB board, 8-1 interface terminal, 9 emitter plate, 10 electrode flange, 11 ceramic tube shell, 12 external lead, 21 first current source, 22 test branch switch, 23 device under test, 24 second current source, 25 probe. DETAILED DESCRIPTION

[0035] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0036] The purpose of the present invention is to provide a press-fit power semiconductor device and a temperature distribution measurement system thereof to solve the problem in the prior art that the junction temperature distribution of each semiconductor chip cannot be accurately obtained, and the system has the characteristics of simple structure and accurate measurement.

[0037] In order to make the above-mentioned objects, features and advantages of the present invention more obvious and easy to understand, the present invention is further described in detail below with reference to the accompanying drawings and specific embodiments.

[0038] Figure 1 The schematic diagram of the structure of the compression-type power semiconductor device provided by the present invention is as follows: Figure 1 As shown, a press-fit power semiconductor device comprises: a collector plate 1, a plurality of sub-modules ( Figure 1 Specific numbers are not shown in the figure), boss 6, PCB board 8, ceramic tube shell 11 and external lead 12.

[0039] The sub-modules are arranged on the boss 6 in a one-to-one correspondence; a plurality of through holes are arranged on the PCB board, and the bosses are arranged in the through holes; a plurality of interface terminals 8-1 are arranged on the PCB board 8; the boss 6 is used to support the sub-modules and position each sub-module.

[0040] The sub-module comprises: an upper molybdenum sheet 2 , a semiconductor chip 3 , a lower molybdenum sheet 4 , a silver gasket 5 and a sub-module frame 7 .

[0041] The semiconductor chip 3 is disposed between the upper molybdenum sheet 2 and the lower molybdenum sheet 4; the gate 3-1 of the semiconductor chip 3 is connected to the interface terminal 8-1 on the PCB board 8 in a one-to-one correspondence; the specific connection relationship is as follows Figure 2 shown.

[0042] The collector plate 1 and the emitter plate 9 are used to connect to an external circuit;

[0043] The PCB board 8 is used to drive each of the sub-modules; the upper molybdenum sheet 2 and the lower molybdenum sheet 4 form a stress buffer zone, which can make the stress distribution of the semiconductor chip 3 more uniform and play a protective role.

[0044] The silver gasket 5 is disposed between the lower molybdenum sheet 4 and the boss 6 ; the silver gasket 5 is used to compensate for the height tolerance of the components in each of the sub-modules.

[0045] The sub-module frame 7 is sleeved on the sub-module; the sub-module frame 7 is used to fix the sub-module.

[0046] The number of the external leads 12 is the same as the number of the interface terminals 8-1 on the PCB board 8, and the external leads 12 are connected to the interface terminals 8-1 in a one-to-one correspondence. The PCB board 8 and the leads 12 are used to provide gate drive signals. In order to cooperate with the temperature distribution timing measurement method, compared with the PCB board in the existing commercial device, each drive circuit in the PCB board 8 used in the present invention is controlled separately.

[0047] In addition, in order to protect the device from external pollution, the compression-type power semiconductor device may further include an electrode flange 10 and a ceramic tube shell 11 to provide a sealed environment for the device.

[0048] The present invention also provides a corresponding temperature distribution measurement system for a press-fit power semiconductor device, which is used to measure the temperature distribution of the press-fit power semiconductor device. In the process of measuring the temperature of the press-fit power semiconductor device, the collector plate 1 and the emitter plate 9 are connected to an external circuit, and the collector plate 1, the upper molybdenum sheet 2, the semiconductor chip 3, the lower molybdenum sheet 4, the silver gasket 5, the boss 6 and the emitter plate 9 form a current and heat flow path. The gate of the semiconductor chip 3 is connected to an external drive circuit through a PCB board 8 and a lead 12, and then through Figure 1 The external lead 12 is led out to the outside of the device and connected to the driving circuit to realize the individual control of the gate of each parallel semiconductor chip and cooperate with the timing control of the driving signal, breaking through the limitation of the existing measurement method that controls the gates of each parallel semiconductor chip together and can only obtain the average junction temperature of the device.

[0049] Figure 3 The schematic diagram of the structure of the temperature distribution measurement system of the press-fit power semiconductor device provided by the present invention is as follows: Figure 3 As shown, the temperature distribution measurement system includes: a first current source 21 (current source I heating ), the test branch switch 22, the second current source 24 (current source I sense )、Timing drive circuit( Figure 3 Not shown) and probe 25 (probe V).

[0050] The first current source 21, the test branch switch 22 and the crimped power semiconductor device to be tested (device to be tested 23) are connected in series in sequence to form a heating path; the first current source 21 is used to provide a heating current; the test branch switch 22 is used to control the opening and closing of the heating path.

[0051] The second current source 24 and the probe 25 are both connected in parallel with the press-fit power semiconductor device to be tested; the second current source 24 is used to provide a measuring current; and the probe 25 is used to measure a saturation voltage drop of the press-fit power semiconductor device to be tested.

[0052] The timing drive circuit is connected to the interface terminal 8-1 on the PCB board 8 in the press-fit power semiconductor device to be tested through the external lead 12; the timing drive circuit is used to control the conduction and shutdown of each semiconductor chip 3 in the press-fit power semiconductor device to be tested.

[0053] The probe 25 may include a voltage probe.

[0054] The voltage probe is connected in parallel with the press-fit power semiconductor device to be tested; the voltage probe is used to measure the saturation voltage drop of the press-fit power semiconductor device to be tested.

[0055] Furthermore, the first connection end of the voltage probe is connected to the collector plate 1 of the press-fit power semiconductor device to be tested, and the second connection end is connected to the emitter plate 9 of the press-fit power semiconductor device to be tested.

[0056] Specifically, the gate signals g1, g2, ..., g n pass Figure 2 The PCB board 8 is connected to the external drive circuit. Figure 1 The device collector plate 1 and the emitter plate 9 are connected to each other, and are used to record the voltage drop across the two ends of the press-fit power semiconductor device to be tested in real time. sense Provides a small DC current (usually tens of mA) for measuring the saturation voltage drop V ce , which is sufficient to make V ce Exceeding its saturation value and having a good linear relationship with the junction temperature of the chip, it can also avoid the self-heating effect under high current. heating The branch switch S1 is used to control the opening and closing of the branch to generate the heating current, so as to realize the heating of the press-fit power semiconductor device to be tested under different working conditions. Compared with the prior art in which the gates of all semiconductor chips are controlled together, the gates of each semiconductor chip in this measurement process are individually controlled by the aforementioned PCB board 8 through an external drive circuit, so that the junction temperature of each semiconductor chip can be measured sequentially.

[0057] The steps of measuring the temperature distribution of the above-mentioned press-fit power semiconductor device using the temperature distribution measurement system provided by the present invention are divided into two steps. The first step is to calibrate the electrical parameters V ce Relationship with junction temperature Tj; The second step is to periodically measure the junction temperature of each semiconductor chip in the device under test DUT based on the calibration curve.

[0058] Step 1: Measure the electrical parameters V of each semiconductor chip ce and junction temperature T j The relationship between

[0059] 11) During calibration Figure 3 The test branch switch S1 is disconnected and the current I is measured sense The voltage flows through the device under test (DUT), and the device under test (DUT) and the corresponding measuring fixture are placed in a constant temperature box. The constant temperature box is raised to a specified temperature (set manually as needed), and then during the cooling process, the saturation voltage drop V at both ends of the device is recorded in real time through the probe V. ce value and the temperature T of the device under test DUT j During the cooling process, the gates g1, g2, ..., g of each semiconductor chip are controlled by an external drive circuit. n The circuit is turned on and off in sequence and cycles periodically to make the measured current Isense It flows through all semiconductor chips in sequence, so that all parallel chips can be calibrated at once while maintaining the original packaging structure. The driving signal timing is as follows: Figure 4 shown.

[0060] 12) The recorded saturation voltage drop V across the DUT ce Value and temperature T j The relationship is converted into the saturation voltage drop V of each semiconductor chip ce Value and temperature T j to obtain the calibration curve.

[0061] The above conversion process is as follows Figure 5 As shown, according to the V measured at different times in step 11), ce and T j Data can be used to obtain the saturation voltage drop V at both ends of the device under test DUT at different times. ce and T j The point-by-point correspondence (V ce , T j ). Further, combined with Figure 4 The conduction conditions of each semiconductor chip at different times can be respectively calculated by converting the corresponding time (V ce , T j ) are connected into a line to generate a calibration curve for each semiconductor chip.

[0062] Step 2: Based on the calibration curve, the junction temperature of each semiconductor chip in the device under test DUT is periodically measured to obtain the junction temperature distribution of each semiconductor chip in the device under test DUT.

[0063] 21) During the temperature measurement process, Figure 3 In the circuit, the test branch switch S1 is Figure 6 In part (a), the current source I heating When the test branch switch S1 is turned off, the temperature of the device under test DUT decreases, and the temperature of each semiconductor chip in the device under test DUT is as follows: Figure 6 As shown in part (b) of the figure. During the cooling process of the device under test (DUT) at different cycles, the current source I sense pass Figure 6 Part (b) to Figure 6 In part (f), the timing control of the driving signal flows through each semiconductor chip in turn. At the same time, the saturation voltage drop V at both ends of the device under test DUT is recorded in real time through the voltage probe. ce The numerical value of .

[0064] 22) According to the calibration curve of each semiconductor chip obtained in step 1, the saturation voltage drop V ce Converted to the junction temperature of each semiconductor chip. The conversion process is as follows Figure 7 First, according to Figure 6 (b) Partially Figure 6 The driving signal control timing in part (f) can determine the number of semiconductor chips that are turned on during each cycle of cooling. ce -T j The calibration curve can be used to calculate the saturation voltage drop V at both ends of the device under test DUT. ce Finally, since the device under test DUT has reached a steady state during the periodic heating process, the junction temperature distribution of each semiconductor chip in the device under test DUT is the same in each cycle. Therefore, the junction temperature distribution of each semiconductor chip in the same cycle can be equivalently obtained through the above process.

[0065] In summary, compared with the existing temperature-sensitive electrical parameter method that can only obtain the average junction temperature of the device to be tested, the temperature distribution measurement system provided by the present invention can obtain the junction temperature of different semiconductor chips in different cycles by individually controlling the gate of each semiconductor chip, and then obtain the junction temperature distribution of each semiconductor chip in the same cycle, providing a reliability reference for the design of press-fit power semiconductor devices.

[0066] The device under test (DUT) used in the above measurement process is the compression-type power semiconductor device provided by the present invention, but is not limited thereto.

[0067] Compared with the closest prior art, the technical solution provided by this new application also has the following advantages:

[0068] 1. The existing junction temperature measurement technology of crimped IGBT devices adopts the thermistor electrical parameter method, which can only measure the average junction temperature of each semiconductor chip, but cannot obtain the junction temperature distribution between each semiconductor chip. The technical solution provided by the present invention can obtain the junction temperature distribution of each semiconductor chip under different working conditions by designing the gate drive circuit to be controlled separately and coordinating with the timing of the measurement branch switch.

[0069] 2. The technical solution provided by the present invention only optimizes the design of the gate drive circuit, with few modified parts, flexible replacement, and convenient for scientific research. In addition, it can be easily integrated into the device to evaluate the aging of each semiconductor chip inside the device in an offline state.

[0070] 3. The technical solution provided by the present invention can also realize the rapid calibration of the relationship between the electrical parameters and junction temperature of multiple semiconductor chips through the individual control of the gate of each semiconductor chip, and further facilitate the measurement of the junction temperature distribution of each semiconductor chip.

[0071] The various embodiments in this specification are described in a progressive manner, and each embodiment focuses on the differences from other embodiments. The same or similar parts between the various embodiments can be referenced to each other.

[0072] The principles and implementation methods of the present invention are described in this article using specific examples. The description of the above embodiments is only used to help understand the method and core idea of ​​the present invention. At the same time, for those skilled in the art, according to the idea of ​​the present invention, there will be changes in the specific implementation methods and application scope. In summary, the content of this specification should not be understood as limiting the present invention.

Claims

1. A temperature distribution measurement system for a press-fit power semiconductor device, characterized in that: Used to measure the temperature distribution of a press-fit power semiconductor device; the temperature distribution measurement system comprises: a first current source, a test branch switch, a second current source, a timing drive circuit and a probe; The first current source, the test branch switch and the press-fit power semiconductor device to be tested are sequentially connected in series to form a heating path; the first current source is used to provide a heating current; the test branch switch is used to control the opening and closing of the heating path; The second current source and the probe are both connected in parallel with the press-fit power semiconductor device to be tested; the second current source is used to provide a measurement current; the probe is used to measure the saturation voltage drop of the press-fit power semiconductor device to be tested; The press-fit power semiconductor device comprises: a plurality of sub-modules, a plurality of bosses and a PCB board; the sub-modules are arranged on the bosses in a one-to-one correspondence; the PCB board is provided with a plurality of through holes, and the bosses are arranged in the through holes; the PCB board is provided with a plurality of interface terminals; The sub-module comprises: an upper molybdenum sheet, a semiconductor chip and a lower molybdenum sheet; The semiconductor chip is arranged between the upper molybdenum sheet and the lower molybdenum sheet; the gate of the semiconductor chip is connected to the interface terminal on the PCB board in a one-to-one correspondence; The PCB board is used to drive each of the sub-modules; the upper molybdenum sheet and the lower molybdenum sheet form a stress buffer zone; The timing drive circuit is connected to the interface terminal on the PCB board of the press-fit power semiconductor device to be tested through an external lead; the timing drive circuit is used to control the conduction and shutdown of each semiconductor chip in the press-fit power semiconductor device to be tested; During the cooling process of the press-fit power semiconductor device to be tested in different cycles, the current of the current source controlled by the timing of the driving signal flows through each semiconductor chip in turn. At the same time, the value of the saturation voltage drop across the two ends of the press-fit power semiconductor device to be tested is recorded in real time by the voltage probe.

2. The temperature distribution measurement system for a press-fit power semiconductor device according to claim 1, characterized in that: The press-fit type power semiconductor device further comprises: a collector plate and an emitter plate; The collector plate and the emitter plate are used to connect to an external circuit; and the collector plate, the upper molybdenum sheet, the semiconductor chip, the lower molybdenum sheet and the emitter plate form a current loop.

3. The temperature distribution measurement system of a press-contact type power semiconductor device according to claim 1, characterized in that: The sub-module further comprises: sub-module frames of the same number as the sub-modules; the sub-module frames are sleeved on the sub-modules; and the sub-module frames are used to fix the sub-modules.

4. The temperature distribution measurement system of a press-contact type power semiconductor device according to claim 1, characterized in that: The sub-module also includes: a silver gasket; the silver gasket is arranged between the lower molybdenum sheet and the boss; the silver gasket is used to compensate for the height tolerance of the components in each of the sub-modules.

5. The temperature distribution measurement system of a press-contact type power semiconductor device according to claim 1, characterized in that: The press-fit power semiconductor device further comprises: external leads; the number of the external leads is the same as the number of the interface terminals on the PCB board, and the external leads are connected to the interface terminals in a one-to-one correspondence.

6. The temperature distribution measurement system of the pressure-contact type power semiconductor device according to claim 1, characterized in that: The probe comprises a voltage probe; The voltage probe is connected in parallel with the press-fit power semiconductor device to be tested; the voltage probe is used to measure the saturation voltage drop of the press-fit power semiconductor device to be tested.

Images