Display device

Abstract

A display device includes a display panel including pixels; a data driver supplying a data signal to the plurality of pixels; a driving voltage source supplying a first driving voltage to the data driver; a power source supplying a first input driving voltage to the driving voltage source; and a timing controller providing a control signal to the data driver, the driving voltage source, and the power source, and providing brightness information and frame rate per second information of the display panel to the driving voltage source. The driving voltage source includes an input driving voltage adjuster adjusting the first input driving voltage to a second input driving voltage based on the brightness information and the frame rate per second information.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims priority from Korean Patent Application No. 10-2020-0063574, filed on May 27, 2020, in the Korean Intellectual Property Office, which is incorporated by reference. Technical Field

[0003] The technical field generally relates to display devices. Background Art

[0004] The display device can display an image according to an input signal. Examples of the display device include a liquid crystal display device and an organic light emitting display device.

[0005] A display device typically includes a display panel, a scan driver, and a data driver. The display panel includes scan lines, data lines, and pixels. The scan driver sequentially supplies scan signals to the pixels via the scan lines. The data driver supplies data signals to the pixels via the data lines. Each pixel emits light with a brightness corresponding to the received data signal.

[0006] The data driver and the scan driver receive a driving voltage for providing a data signal and a scan signal. When the driving voltage is high, power consumption of the display device may be high. Summary of the Invention

[0007] Embodiments may relate to a driving voltage source capable of minimizing power consumption and / or a display device including the same.

[0008] Embodiments may relate to a display device including the following elements: a display panel including a plurality of pixels; a data driver that supplies data signals to the plurality of pixels; a driving voltage source that supplies a first driving voltage to the data driver; a power supply that supplies a first input driving voltage to the driving voltage source; and a timing controller that provides a plurality of control signals for respectively controlling the data driver, the driving voltage source, and the power supply and provides brightness information and frame rate per second information of the display panel to the driving voltage source.

[0009] The driving voltage source may include an input driving voltage corrector that corrects the first input driving voltage to a second input driving voltage that is a difference voltage between the first input driving voltage and an offset voltage, and the offset voltage may be determined based on brightness information and frame rate per second information of the display panel.

[0010] As the brightness value and / or the frame rate per second of the display panel increases, the offset voltage may have a decreasing voltage level.

[0011] The input driving voltage corrector may include: a brightness controller that outputs a brightness value of the display panel based on brightness information of the display panel; an offset calculator that calculates an offset voltage based on the brightness value and a frame rate per second; and a subtractor that subtracts the offset voltage from the first input driving voltage.

[0012] The input driving voltage corrector may further include an interface unit for communicating with the power source, and the interface unit is any one of an inter-integrated circuit and a single wiring.

[0013] The offset calculator may include a first lookup table, and the first lookup table may include a plurality of first offset voltages including offset voltages that determine a voltage margin of the second input driving voltage according to a relationship between a brightness value and a frame rate per second.

[0014] The plurality of first offset voltages may have voltage levels that decrease as the frame rate increases when the luminance value is constant, and may have voltage levels that decrease as the luminance value increases when the frame rate is constant.

[0015] The timing controller may further provide image pattern information of the display panel to the driving voltage source.

[0016] The image pattern information may include image information about a zebra pattern (1 row H bars) in which white and black are alternately displayed for each pixel row of the display panel, a blue pattern in which the entire display panel is displayed in blue, and a white pattern in which the entire display panel is displayed in white.

[0017] The input driving voltage corrector may further include an image pattern analyzer outputting an image pattern current value consumed in the display panel based on image pattern information of the display panel.

[0018] The offset calculator may further include a plurality of second lookup tables, and the plurality of second lookup tables may include a plurality of second offset voltages including offset voltages that determine a voltage tolerance of the second input driving voltage according to a relationship between a brightness value and a frame rate per second for each image pattern current value.

[0019] The plurality of second offset voltages may have voltage levels that decrease as the frame rate increases when the luminance value is constant, and may have voltage levels that decrease as the luminance value increases when the frame rate is constant.

[0020] The plurality of second lookup tables may include a second lookup table for a zebra pattern, a second lookup table for a blue pattern, and a second lookup table for a white pattern. When the luminance value and the frame rate per second of the display panel are the same, the magnitude of the second offset voltage included in the second lookup table for the zebra pattern may be smaller than the magnitude of the second offset voltage included in the second lookup table for the blue pattern, and the magnitude of the second offset voltage included in the second lookup table for the blue pattern may be smaller than the magnitude of the second offset voltage included in the second lookup table for the white pattern.

[0021] The driving voltage source may further include a plurality of regulators that receive the second input driving voltage and generate the first driving voltage by dividing the second input driving voltage.

[0022] The plurality of regulators may be low dropout regulators.

[0023] The first driving voltage may include a first gamma voltage as a highest gamma voltage and a second gamma voltage as a lowest gamma voltage.

[0024] The data driver may include a gamma block that receives the first gamma voltage and the second gamma voltage and generates a plurality of gamma voltages by dividing the first gamma voltage and the second gamma voltage.

[0025] The display device may further include a scan driver that supplies a scan signal to the plurality of pixels.

[0026] The driving voltage source may supply the second driving voltage to the scan driver. The plurality of regulators may generate the second driving voltage by dividing the second input driving voltage.

[0027] The second driving voltage may include a high DC voltage and a low DC voltage used when the pixel is turned on / off.

[0028] The power supply may further include a boost DC-DC converter receiving the external power voltage and boosting the external power voltage to a first input driving voltage having a level higher than that of the external power voltage.

[0029] Embodiments may relate to a display device. The display device may include a display panel, a data driver, a driving voltage source, a power supply, and a timing controller. The display panel may include pixels. The data driver may be electrically connected to the pixels and may supply data signals to the pixels. The driving voltage source may be electrically connected to the data driver and may supply a first driving voltage to the data driver. The power supply may be electrically connected to the driving voltage source and may supply a first input driving voltage to the driving voltage source. The timing controller may provide control signals for controlling the data driver, the driving voltage source, and the power supply, respectively, and may provide brightness information and frame rate information of the display panel to the driving voltage source. The driving voltage source may include an input driving voltage regulator. The input driving voltage regulator may be electrically connected to the timing controller, may determine an offset voltage based on the brightness information and frame rate information of the display panel, and may use the first input driving voltage and the offset voltage to generate a second input driving voltage.

[0030] The input driving voltage regulator may reduce a voltage level of the offset voltage when at least one of a brightness value of the display panel and a frame rate per second of the display panel increases.

[0031] The input drive voltage regulator may include the following elements: a brightness controller that can output a brightness value of the display panel based on brightness information of the display panel; an offset determiner that can determine an offset voltage based on the brightness value of the display panel and a frame rate per second of the display panel; and a subtractor that can subtract the offset voltage from the first input drive voltage to generate an adjusted voltage value, which is used to generate a second input drive voltage.

[0032] The input driving voltage regulator may further include an interface unit electrically connected to the power supply to communicate with the power supply. The interface unit may include at least one of an internal integrated circuit and a single wiring.

[0033] The offset determiner may include a first lookup table. The first lookup table may include a first set of values ​​for the offset voltage corresponding to possible values ​​of the brightness value of the display panel and corresponding to possible values ​​of the frames per second rate of the display panel.

[0034] According to the first lookup table, for the same possible value of the brightness value, a first first group of values ​​of the offset voltage can correspond to a first possible value of the frame rate per second, and a second first group of values ​​of the offset voltage that is lower than the first first group of values ​​of the offset voltage can correspond to a second possible value of the frame rate per second that is higher than the first possible value of the frame rate per second.

[0035] According to the first lookup table, for the same possible value of the frame rate per second, the third first group of values ​​of the offset voltage can correspond to the first possible value of the brightness value, and the fourth first group of values ​​of the offset voltage that is lower than the third first group of values ​​of the offset voltage can correspond to the second possible value of the brightness value that is higher than the first possible value of the brightness value.

[0036] The timing controller may further provide image pattern information of the display panel to the driving voltage source.

[0037] When the pixel rows of the display panel can alternately display white and black, the image pattern information indicates a zebra pattern. When all available pixels of the display panel can display blue, the image pattern information indicates a blue pattern. When all available pixels of the display panel can display white, the image pattern information indicates a white pattern.

[0038] The input driving voltage regulator may include an image pattern analyzer that may output an image pattern current value of current consumed in the display panel based on image pattern information of the display panel.

[0039] When the image pattern information indicates a first image pattern, the offset determiner may determine the offset voltage using a first lookup table. The offset determiner may include a second lookup table, and when the image pattern information indicates a second image pattern, the offset determiner may determine the offset voltage using the second lookup table. The first image pattern and the second image pattern may be different two of a zebra pattern, a blue pattern, and a white pattern. The second lookup table may include a second set of values ​​for the offset voltage corresponding to possible values ​​of the luminance value and corresponding to possible values ​​of the frame rate per second.

[0040] According to the second lookup table, for the same possible value of the brightness value, the first second group of values ​​of the offset voltage can correspond to the first possible value of the frame rate per second, and the second second group of values ​​of the offset voltage lower than the first second group of values ​​of the offset voltage can correspond to the second possible value of the frame rate per second higher than the first possible value of the frame rate per second.

[0041] According to the second lookup table, for the same possible value of the frame rate per second, the third second group of values ​​of the offset voltage can correspond to the first possible value of the brightness value, and the fourth second group of values ​​of the offset voltage that is lower than the third second group of values ​​of the offset voltage can correspond to the second possible value of the brightness value that is higher than the first possible value of the brightness value.

[0042] The first image pattern may be a zebra pattern or a blue pattern. The second image pattern may be a blue pattern or a white pattern. The first and second first groups of values ​​of the offset voltage may be lower than the first and second second groups of values ​​of the offset voltage, respectively. The third and fourth first groups of values ​​of the offset voltage may be lower than the third and fourth second groups of values ​​of the offset voltage, respectively.

[0043] The driving voltage source may further include a regulator that may receive the second input driving voltage and may generate the first driving voltage by dividing the second input driving voltage.

[0044] The regulator may be a low dropout regulator.

[0045] The first driving voltage may include a first gamma voltage that is a highest gamma voltage for the display panel, and may include a second gamma voltage that is a lowest gamma voltage for the display panel.

[0046] The data driver may include a gamma block that may receive the first gamma voltage and the second gamma voltage and may generate the gamma voltage by dividing the first gamma voltage and the second gamma voltage.

[0047] The display device may further include a scan driver that supplies a scan signal to the pixels.

[0048] The regulator may generate a second driving voltage by dividing the second input driving voltage, and may provide the second driving voltage to the scan driver.

[0049] The second driving voltage may include a high DC voltage and a low DC voltage that may be used when the pixel is turned on or off.

[0050] The power supply may include a boost DC-DC converter that may receive an external power voltage and may boost the external power voltage to a first input driving voltage having a level higher than that of the external power voltage. BRIEF DESCRIPTION OF THE DRAWINGS

[0051] Figure 1 is a schematic block diagram illustrating a display device according to an embodiment.

[0052] Figure 2 is a diagram showing the embodiment of the present invention. Figure 1 Schematic circuit diagram of a pixel in the display device shown in .

[0053] Figure 3 is a schematic block diagram illustrating a driving voltage source according to an embodiment.

[0054] Figure 4 is a schematic block diagram illustrating an input driving voltage corrector according to an embodiment.

[0055] Figure 5 is a diagram illustrating a lookup table of an input driving voltage offset calculator according to an embodiment.

[0056] Figure 6A 、 Figure 6B and Figure 6Cis a diagram illustrating the operation of the display device according to the embodiment.

[0057] Figure 7 is a schematic block diagram illustrating an input driving voltage corrector according to an embodiment.

[0058] Figure 8A is a diagram illustrating a lookup table of an input driving voltage offset calculator according to an embodiment.

[0059] Figure 8B is a diagram illustrating a lookup table of an input driving voltage offset calculator according to an embodiment.

[0060] Figure 9 is a diagram illustrating the operation of the display device according to the embodiment. DETAILED DESCRIPTION

[0061] Example embodiments are described with reference to the accompanying drawings. In the accompanying drawings, the same reference numerals may be assigned to the same elements, and related descriptions may not be repeated.

[0062] Although the terms "first", "second", etc. can be used to describe various elements, these elements should not be limited by these terms. These terms can be used to distinguish one element from another element. Therefore, the first element can be referred to as the second element without departing from the teachings of one or more embodiments. Describing an element as a "first" element may not require or imply the presence of a second element or other elements. The terms "first", "second", etc. can be used to distinguish elements of different categories or groups. For simplicity, the terms "first", "second", etc. can respectively represent "first type (or first group)", "second type (or second group)", etc.

[0063] The term "connect" may mean "electrically connected" or "not electrically connected through an intermediate transistor". The term "drive" may mean "operate" or "control". The term "correct" may mean "adjust". The term "correct" may mean "adjust". The term "corrector" may mean "regulator". The term "corresponding to" may mean "including" or "is". The term "calculate" may mean "determine". The term "voltage" may mean "voltage group" or "group of voltages". The signals, voltages, information, etc. illustrated in the drawings may be transmitted through electrical connections.

[0064] Figure 1 is a schematic block diagram illustrating a display device according to an embodiment of the present disclosure. Figure 2 is a diagram showing the embodiment of the present invention. Figure 1 Schematic circuit diagram of a pixel in the display device shown in . Figure 3 is a schematic block diagram illustrating a driving voltage source according to an embodiment.

[0065] refer to Figure 1 , the display device 1000 may include a power supply 100 , a driving voltage source 200 , a display panel 300 , a scan driver 400 , a data driver 500 , and a timing controller 600 .

[0066] The power supply 100 may include a step-up DC-DC converter (not shown) that receives an external power voltage VBAT. Based on a power control signal PCS, the power supply 100 and / or the step-up DC-DC converter converts the external power voltage VBAT into an input drive voltage VLIN having a level higher than that of the external power voltage VBAT. For example, the external power voltage VBAT may be in a range of approximately 2.5V to 4.9V, and the input drive voltage VLIN may be approximately 7.8V. The input drive voltage VLIN may be the highest voltage output from the power supply 100. According to an embodiment, the external power voltage VBAT may be supplied from a battery (not shown) included in the display device 1000.

[0067] The driving voltage source 200 (or driving power supply 200) can receive the input driving voltage VLIN from the power supply 100, and can provide the third driving voltage V3, the second driving voltage V2 and the first driving voltage V1 to the display panel 300, the scan driver 400 and the data driver 500 respectively by dividing the input driving voltage VLIN.

[0068] The driving voltage source 200 may include a plurality of regulators 220 (see FIG. 2 ) for regulating the input driving voltage VLIN into driving voltages V1, V2, and V3. Figure 3 ).

[0069] refer to Figure 1 、 Figure 2 and Figure 3 , the first driving voltage V1 may include and / or correspond to the first gamma voltage VREG1 and the second gamma voltage VREG2 required to drive the data driver 500; the second driving voltage V2 may include and / or correspond to the high DC voltage VGH and the low DC voltage VGL which are the minimum required voltages required to drive the scan driver 400; and the third driving voltage V3 may include and / or correspond to the first power voltage VDD and the second power voltage VSS required for the operation of the pixels PX included in the display panel 300, etc.

[0070] The driving voltage source 200 may further include an input driving voltage corrector 210 (see Figure 3 The input driving voltage corrector 210 may provide the power supply 100 with a driving voltage correction signal VLIN_C that allows the input driving voltage VLIN to be corrected based on the driving information DRI received from the timing controller 600 .

[0071] The display panel 300 may include a plurality of scan lines SL1 to SLn and a plurality of data lines DL1 to DLm. The display panel 300 may include a plurality of pixels PX (n and m are integers greater than 1) connected to the scan lines SL1 to SLn and the data lines DL1 to DLm. Each of the pixels PX may include a driving transistor and a plurality of switching transistors.

[0072] Pixels PX may include pixels (or sub-pixels) that emit light of different colors. For example, a first pixel may emit light of a first color (e.g., red), a second pixel may emit light of a second color (e.g., green), and a third pixel may emit light of a third color (e.g., blue).

[0073] In response to a scan signal (or gate signal) supplied through a scan line (eg, the i-th scan line SLi), the pixel PX may emit light having brightness corresponding to a data signal supplied through a data line (eg, the j-th data line DLj).

[0074] Power voltages VDD and VSS may be supplied to the display panel 300. The power voltages VDD and VSS are voltages required for the operation of the pixel PX, and the first power voltage VDD may have a voltage level higher than that of the second power voltage VSS. The power voltages VDD and VSS may be supplied to the display panel 300 from the driving voltage source 200.

[0075] The scan driver 400 may sequentially supply scan signals to the pixels PX through the scan lines SL1 to SLn based on the scan control signal SCS. The scan driver 400 may receive the scan control signal SCS and at least one clock signal, etc., from the timing controller 600.

[0076] A scan signal supplied to one scan line in one frame period may be / include at least one pulse.

[0077] The scan signal may be a gate-on voltage that turns on a transistor included in the pixel PX. For example, when the transistor included in the pixel PX is implemented with a P-channel metal oxide semiconductor (PMOS) transistor, the gate-on voltage may be set to a logic low level (or a low DC voltage VGL). When the transistor included in the pixel PX is implemented with an N-channel metal oxide semiconductor (NMOS) transistor, the gate-on voltage may be set to a logic high level (or a high DC voltage VGH). The high DC voltage VGH and / or the low DC voltage VGL may be supplied from the driving voltage source 200 to the scan driver 400.

[0078] The scan driver 400 may include stages independently connected to each other to sequentially output scan signals to the scan lines SL1 to SLn.

[0079] The data driver 500 may receive a data control signal DCS and second image data DATA2 from the timing controller 600. The data driver 500 may supply data signals (or data voltages) to the pixels PX via the data lines DL1 to DLm based on the data control signal DCS and the second image data DATA2. The data driver 500 may supply data signals corresponding to the grayscale of the image to one or more of the data lines DL1 to DLm. The data signals may be supplied to the corresponding pixels PX in synchronization with the scan signals.

[0080] The timing controller 600 may generate a data control signal DCS and a scan control signal SCS corresponding to a synchronization signal (supplied from an external component / device). The data control signal DCS may be supplied to the data driver 500 , and the scan control signal SCS may be supplied to the scan driver 400 .

[0081] The timing controller 600 may supply the compensated second image data DATA2 to the data driver 500 based on the first image data DATA1. The first image data DATA1 and the compensated second image data DATA2 may include grayscale information within a grayscale range set in the display device 1000.

[0082] The timing controller 600 may provide the driving information DRI to the driving voltage source 200. Figure 4 and / or Figure 7 , the driving information DRI may include brightness information DRI_DB of the display panel 300 , frame rate per second information DRI_FR of the display panel 300 , and / or image pattern information DRI_IP of the display panel 300 .

[0083] Figure 2 The diagram is included in Figure 1 A schematic circuit diagram of a pixel PX in a display device 1000 is shown in FIG.

[0084] refer to Figure 1 and Figure 2 , the pixel PX may include a light emitting device LD, a first transistor T1 (driving transistor), a second transistor T2 and a storage capacitor Cst.

[0085] The anode electrode of the light-emitting device LD can be connected to the second electrode of the first transistor T1, and the cathode electrode of the light-emitting device LD can be connected to the second power voltage VSS. The light-emitting device LD can emit light with a brightness corresponding to the amount of current supplied from the first transistor T1. The light-emitting device LD can be configured as an organic light-emitting device or an inorganic light-emitting device, such as a micro light-emitting diode (LED) or a quantum dot LED. The light-emitting device LD can be a light-emitting device that is complexly configured using organic and inorganic materials.

[0086] A first electrode of the first transistor T1 may be connected to a first power voltage VDD, and a second electrode of the first transistor T1 may be connected to an anode electrode of the light emitting device LD. A gate electrode of the first transistor T1 may be connected to a first node N1. The first transistor T1 may control the amount of current flowing through the light emitting device LD in response to the voltage of the first node N1.

[0087] A first electrode of the second transistor T2 may be connected to the data line DLj, and a second electrode of the second transistor T2 may be connected to the first node N1. A gate electrode of the second transistor T2 may be connected to the scan line SLi. The second transistor T2 may be turned on when a scan signal S[n] is supplied to the scan line SLi to transmit the data signal Vdata from the data line DLj to the first node N1.

[0088] The storage capacitor Cst may be connected between the first node N1 and the anode electrode of the light emitting device LD. The storage capacitor Cst may store the voltage of the first node N1.

[0089] Despite Figure 2 , the first transistor T1 and the second transistor T2 are implemented by N-type transistors, but this is only exemplary and the present disclosure is not limited thereto. For example, the first transistor T1 and the second transistor T2 may be implemented by P-type transistors. Figure 2 The circuit structure of the pixel PX shown in FIG may be merely illustrative, and the pixel PX is not limited thereto. For example, the pixel PX may further include a circuit element for measuring the light emission characteristics of the light emitting device LD and / or the threshold voltage of the first transistor T1 (e.g., a sensing transistor connected to the anode electrode of the light emitting device LD and a separate sensing line).

[0090] Figure 3 is a schematic block diagram illustrating a driving voltage source according to an embodiment.

[0091] refer to Figure 1 and Figure 3 , the driving voltage source 200 may include an input driving voltage corrector 210 (or input driving voltage regulator 210 ) and a regulator 220 .

[0092] The input driving voltage corrector 210 may receive the first input driving voltage VLIN1 from the power supply 100. The input driving voltage corrector 210 may receive driving information DRI and a driving voltage control signal CCS from the timing controller 600.

[0093] The input driving voltage corrector 210 may provide a driving voltage correction signal VLIN_C for correcting the first input driving voltage VLIN1 to the second input driving voltage VLIN2 to the power supply 100 based on the driving information DRI. For example, when the brightness and the number of frames per second (i.e., the frame rate) of the display panel 300 change, the input driving voltage corrector 210 may provide the driving voltage correction signal VLIN_C to the power supply 100.

[0094] The regulator 220 may receive a second input driving voltage VLIN2 from the power supply 100. The regulator 220 may regulate the second input driving voltage VLIN2 to provide driving voltages corresponding to the scan driver 400, the data driver 500, etc. The regulator 220 may be a low dropout (LDO) regulator.

[0095] Some of the adjusters 220 may generate a first gamma voltage VREG1 (or a highest gamma voltage) and a second gamma voltage VREG2 (or a lowest gamma voltage) for generating gamma voltages based on the second input driving voltage VLIN2 and may provide the first gamma voltage VREG1 and the second gamma voltage VREG2 to the gamma block 510 in the data driver 500.

[0096] Although not shown in the drawings, the gamma block 510 may include a plurality of resistors connected in series to generate a plurality of gamma voltages by dividing the first gamma voltage VREG1 and the second gamma voltage VREG2 through resistors. The number of the plurality of gamma voltages may depend on the configuration of the resistor string (R string).

[0097] Some of the regulators 220 may generate a high DC voltage VGH and a low DC voltage VGL for driving the scan driver 400 based on the second input driving voltage VLIN2. The high DC voltage VGH and the low DC voltage VGL may be applied to one or more level shifters included in the scan driver 400.

[0098] Although not shown in the drawings, some of the regulators 220 may generate the first power voltage VDD and the second power voltage VSS provided to the display panel 300 .

[0099] The second input driving voltage VLIN2 may correspond to a voltage for driving the output buffers 520 included in the data driver 500. Although not shown in the drawings, the second input driving voltage VLIN2 may be applied to the output buffers 520 of the data driver 500, respectively. Each of the output buffers 520 may be / include an operational amplifier (OP-AMP).

[0100] Figure 4is a schematic block diagram illustrating an input drive voltage corrector / regulator according to an embodiment. Figure 5 is a diagram illustrating a lookup table of an input driving voltage offset calculator according to an embodiment.

[0101] refer to Figure 4 , the input driving voltage corrector 210 may include a brightness controller 211 , an offset calculator 212 , a subtractor 213 , and an interface unit 214 .

[0102] The input driving voltage corrector 210 may receive driving information DRI (see Figure 1 The driving information DRI may include brightness information DRI_DB of the display panel 300 and frame rate information DRI_FR of the display panel 300, etc.

[0103] The brightness controller 211 may receive the brightness information DRI_DB from the timing controller 600 and output a brightness value DBV of the display panel 300 .

[0104] The offset calculator 212 may receive the brightness value DBV of the display panel 300 from the brightness controller 211 and may receive frame rate information DRI_FR (e.g., a frame rate value) of the display panel 300 from the timing controller 600. The offset calculator 212 may calculate / determine an offset voltage VLIN1_offset using the brightness value DBV and the frame rate value. The offset calculator 212 may include a lookup table.

[0105] refer to Figure 4 and Figure 5 The lookup table may include a plurality of offset voltages VLIN1_offset for determining a voltage margin of the second input drive voltage VLIN2 based on a relationship between a brightness value DBV and a frame rate value of the display panel 300. The voltage margin may be defined as a voltage difference between the high DC voltage VGH and the first input drive voltage VLIN1. For example, when the high DC voltage VGH is approximately 7.2V and the first input drive voltage VLIN1 is approximately 7.8V, the voltage margin may be approximately 0.6V.

[0106] For the highest brightness value DBV and the highest frame rate per second, the voltage tolerance (eg, 0.6V) may be required to be substantially equal to the predetermined reference voltage tolerance (eg, 0.6V). Figure 5According to the lookup table shown in FIG, the offset voltage VLIN1_offset is 0V (i.e., 0.6V minus 0.6V). For the lowest brightness value DBV and the lowest frame rate per second, a voltage tolerance (e.g., 0.3V) is required to be lower than a reference voltage tolerance (e.g., 0.6V); according to the lookup table, the offset voltage VLIN1_offset can be increased to 0.3V (i.e., 0.6V minus 0.3V). As the brightness value DBV and the frame rate per second of the display panel 300 increase, the display device is driven with a reduced offset voltage VLIN1_offset. As the brightness value DBV and the frame rate per second of the display panel 300 decrease, the display device is driven with an increased offset voltage VLIN1_offset.

[0107] Table 1 shows the current range (indicating power consumption) of the display panel 300 according to the brightness and frame rate per second. Referring to Table 1, as the brightness and frame rate per second of the display panel 300 increase, the current range (and power consumption) of the display panel 300 increases due to the increase in power consumption of the data driver 500. Therefore, as the brightness and frame rate per second of the display panel 300 increase, the first input driving voltage VLIN1 requires a large voltage margin.

[0108] Table 1

[0109]

[0110] Figure 5 The lookup table shown in FIG. 3 is exemplary. The lookup table may be established by measuring the power consumption of the display panel 300 according to the brightness and the frame rate per second of the display panel 300.

[0111] Return Reference Figure 4 The subtractor 213 may receive the offset voltage VLIN1_offset from the offset calculator 212 and may receive the first input driving voltage VLIN1 from the power supply 100. The subtractor 213 may generate a corrected / adjusted voltage value VLIN1_C by subtracting the offset voltage VLIN1_offset from the first input driving voltage VLIN1.

[0112] The interface unit 214 may receive the corrected / adjusted voltage value VLIN1_C from the subtractor 213 and may provide the corrected / adjusted voltage value VLIN1_C to the power supply 100. ... 2 C) The interface transmits the corrected / adjusted voltage value VLIN1_C to the power supply 100. The interface unit 214 may transmit the corrected / adjusted voltage value VLIN1_C to the power supply 100 through a single wire (SWIRE).

[0113] The power supply 100 may output a second input drive voltage VLIN2 using the corrected / adjusted voltage value VLIN1_C. The second input drive voltage VLIN2 may be a function of the corrected / adjusted voltage value VLIN1_C. The second input drive voltage VLIN2 may be equal to the corrected / adjusted voltage value VLIN1_C, i.e., VLIN2 = VLIN1_C = VLIN1 - VLIN1_offset.

[0114] Figure 6A 、 Figure 6B and Figure 6C is a diagram illustrating a method according to an embodiment Figure 3 The operation of the driving voltage source 200 is shown in FIG. The frame rate per second may be determined by the pulse period of the vertical synchronization signal VSYNC.

[0115] refer to Figure 5 and Figure 6A , when the brightness increases at the same frame rate per second, the offset voltage VLIN1_offset decreases. For example, when the frame rate per second is maintained at 60 Hz, when the brightness increases to 100 nits, 650 nits, and 1200 nits, the offset voltage VLIN1_offset can be reduced to 0.3 V, 0.2 V, and 0.1 V. In other words, when the brightness increases to 100 nits, 650 nits, and 1200 nits, the second input drive voltage VLIN2 can be increased to 7.5 V, 7.6 V, and 7.7 V. This is because a large voltage margin is required when the brightness of the display panel 300 increases (and the power consumption of the data driver 500 increases).

[0116] refer to Figure 5 and Figure 6B , when the frame rate per second increases at the same brightness level, the offset voltage VLIN1_offset decreases. For example, when the brightness is maintained at 650 nits, when the frame rate per second increases to 60 Hz, 90 Hz, and 120 Hz, the offset voltage VLIN1_offset can be reduced to 0.2 V, 0.1 V, and 0.05 V. In other words, when the frame rate per second increases to 60 Hz, 90 Hz, and 120 Hz, the second input drive voltage VLIN2 can be increased to 7.6 V, 7.7 V, and 7.75 V. This is because a larger voltage margin is required (and the power consumption of the data driver 500 increases) when the frame rate per second increases.

[0117] refer to Figure 5 and Figure 6C, when the brightness and / or the frame rate per second increases, the offset voltage VLIN1_offset decreases. For example, when the frame rate per second is maintained at 60 Hz and the brightness changes from 100 nits to 650 nits, the offset voltage VLIN1_offset can be reduced from 0.3 V to 0.2 V, and the second input drive voltage VLIN2 can be increased from 7.5 V to 7.6 V. When the frame rate per second is changed from 60 Hz to 120 Hz and the brightness is maintained at 650 nits, the offset voltage VLIN1_offset can be reduced from 0.2 V to 0.05 V, and the second input drive voltage VLIN2 can be increased from 7.6 V to 7.75 V. This is because a large voltage margin is required (and the power consumption of the data driver 500 increases) when the brightness of the display panel 300 increases and / or the frame rate per second of the display panel 300 increases.

[0118] When the level of the input driving voltage VLIN is not fixed but can be changed according to the brightness and frame rate per second of the display panel 300, the power consumption of the driving voltage source 200 can be reduced. The reduced power consumption of the driving voltage source 200 can be calculated by multiplying the offset voltage VLIN1_offset by the current of the driving voltage source 200. Table 2 shows the value of the offset voltage VLIN1_offset according to the brightness and frame rate per second, the current range of the driving voltage source 200, and the amount of reduced power consumption of the driving voltage source 200.

[0119] Table 2

[0120]

[0121] Figure 7 is a schematic block diagram illustrating an input drive voltage corrector / regulator according to another embodiment. Figure 8A and Figure 8B Each of is a diagram illustrating a lookup table of an input driving voltage offset calculator according to an embodiment.

[0122] refer to Figure 7 , input drive voltage corrector 210_1 and Figure 4 The input driving voltage corrector 210 shown in FIG. 1 is different in that the input driving voltage corrector 210_1 further includes an image pattern analyzer 215 .

[0123] exist Figure 7 In the embodiment, the brightness controller 211, the subtractor 213 and the interface unit 214 are connected with Figure 4 are substantially the same or similar to those shown in .

[0124] The input driving voltage corrector 210_1 may receive driving information DRI (see Figure 1). The driving information DRI may include brightness information DRI_DB, frame rate information DRI_FR, image pattern information DRI_IP, and the like.

[0125] The image pattern analyzer 215 may receive the image pattern information DRI_IP from the timing controller 600 and may output an image pattern current value I of the current consumed in the display panel 300 for each image pattern. ip .

[0126] The load current in the input driving voltage VLIN / VLIN1 / VLIN2′ includes components of static current and dynamic current. The dynamic current is a current frequently used in the data driver 500 and may vary according to the pattern of an image displayed on the display panel 300.

[0127] Table 3 shows the load current value in the input drive voltage VLIN of different image patterns when the frame rate per second is 60 Hz and the brightness is 1200 nits. The pixel structure of the display panel 300 can be a PENTILE (TM) pixel structure. The image pattern can include a zebra pattern (1 row H stripes), a blue pattern and a white pattern. In the zebra pattern, the white pixel rows and black pixel rows of the display panel 300 are alternately displayed. In the blue pattern, all (available) pixels of the display panel 300 display blue. In the white pattern, all (available) pixels of the display panel 300 display white.

[0128] Referring to Table 3, the load currents for the zebra pattern, blue pattern, and white pattern are 60 mA, 40 mA, and 22 mA, respectively, and the load current in the input drive voltage VLIN decreases in the order of the zebra pattern, blue pattern, and white pattern. The load current in the input drive voltage VLIN can increase as the frequency of pixel on / off increases. Therefore, the load current can be minimized for the white pattern in which all sub-pixels remain on, can be greater than the load current for the blue pattern in which the red sub-pixels are turned off, and can be maximized for the zebra pattern in which rows of white pixels and rows of black pixels are alternately displayed.

[0129] Table 3

[0130] Image pattern zebra pattern blue pattern White pattern Load current [mA] 60 40 22

[0131] The offset calculator / determinator 212 may receive the brightness value DBV of the display panel 300 from the brightness controller 211, may receive the frame rate information DRI_FR (i.e., the frame rate value per second) of the display panel 300 from the timing controller 600, and may receive the image pattern current value I from the image pattern analyzer 216. ipThe offset calculator 212 may use the brightness value DBV of the display panel 300, the frame rate value per second, and the image pattern current value I ip To calculate an offset voltage VLIN1_offset'.

[0132] The offset calculator 212 may include a plurality of lookup tables.

[0133] refer to Figure 5 、 Figure 8A and Figure 8B A lookup table may be established for each image pattern. For example, when the display panel 300 includes three image patterns (eg, a zebra pattern, a blue pattern, and a white pattern), the number of the lookup tables may be three. Figure 8A is the lookup table for the blue pattern, and Figure 8B is the lookup table for the white pattern. Figure 5 The above-described lookup table shown in is a lookup table for a zebra pattern.

[0134] The lookup table may include a plurality of offset voltages VLIN1_offset′ for determining a voltage margin of the second input driving voltage VLIN2 for each image pattern according to a relationship between the brightness value DBV and the frame rate per second of the display panel 300. Although the lookup tables for the zebra pattern, the blue pattern, and the white pattern are illustrated, more or fewer lookup tables may be established for various image patterns.

[0135] When the frame rate is 60 Hz per second and the brightness is 100 nits, the offset voltages VLIN1_offset' for the zebra pattern, blue pattern, and white pattern are 0.3 V, 0.325 V, and 0.35 V, respectively. That is, the offset voltage VLIN1_offset' increases in the order of the zebra pattern, blue pattern, and white pattern. This configuration can reduce the power consumption of the driving voltage source 200 by increasing the voltage margin for the zebra pattern with the largest load current and reducing the voltage margin for the white pattern with the smallest load current.

[0136] Table 4 shows the load current values ​​and reduced power consumption when the same offset voltage is applied to the image patterns. Table 5 shows the load current values ​​and reduced power consumption when different offset voltages are applied to the image patterns. For example, when the frame rate is 60 Hz per second and the brightness is 1200 nits, when an offset voltage VLIN1_offset' of 0.1 V is applied to all image patterns, the power consumption of the zebra pattern, blue pattern, and white pattern is reduced by 6 mW, 4 mW, and 2.2 mW, respectively.

[0137] When different offset voltages are applied to the image patterns, for example, when an offset voltage VLIN1_offset′ of 0.1V is applied to the zebra pattern, when an offset voltage VLIN1_offset′ of 0.2V is applied to the blue pattern, and when an offset voltage VLIN1_offset′ of 0.215V is applied to the white pattern, the reduced power consumption of the zebra pattern, the blue pattern, and the white pattern are 6 mW, 8 mW, and 4.95 mW, respectively.

[0138] As can be understood from Table 4 and Table 5, when different offset voltages are applied to image patterns, the reduced power consumption of the driving voltage source 200 may be further reduced than when the same offset voltage is applied to all image patterns.

[0139] Table 4

[0140]

[0141] Table 5

[0142] Image pattern zebra pattern blue pattern White pattern Load current [mA] 60 40 22 Offset voltage [V] 0.1 0.2 0.215 Reduced power consumption [mW] 6 8 4.95

[0143] The subtractor 213 may receive the offset voltage VLIN1_offset' from the offset calculator 212 and may receive the first input driving voltage VLIN1 from the power supply 100. The subtractor 213 may generate a corrected / adjusted voltage value VLIN1_C' by subtracting the offset voltage VLIN1_offset' from the first input driving voltage VLIN1.

[0144] The interface unit 214 may receive the corrected / adjusted voltage value VLIN1_C′ from the subtractor 213 and may provide the corrected / adjusted voltage value VLIN1_C′ to the power supply 100 .

[0145] The power supply 100 may output a second input drive voltage VLIN2' using the corrected / adjusted voltage value VLIN1_C'. The second input drive voltage VLIN2' may be a function of the corrected / adjusted voltage value VLIN1_C'. The second input drive voltage VLIN2' may be equal to the corrected / adjusted voltage value VLIN1_C', i.e., VLIN2'=VLIN1_C'=VLIN1-VLIN1_offset'. The adjuster 220 may adjust the second input drive voltage VLIN2' to generate drive voltages suitable for the display panel 300, the scan driver 400, the data driver 500, and the like.

[0146] Figure 91 is a diagram illustrating the operation of a display device according to an embodiment. When the frame rate per second, brightness, and image pattern all change, the offset voltage VLIN1_offset' also changes according to the frame rate per second, brightness, and image pattern. The lookup table for each image pattern may include multiple offset voltages VLIN1_offset'.

[0147] refer to Figure 5 、 Figure 8A 、 Figure 8B and Figure 9 , when the image pattern changes under the same frame rate per second and the same brightness conditions, the offset voltage VLIN1_offset' changes according to the image pattern. For example, when the image pattern changes from a zebra pattern to a white pattern while maintaining a frame rate of 60 Hz and a brightness of 650 nits, the offset voltage VLIN1_offset' can change from 0.2V to 0.25V. In other words, when the image pattern changes from a zebra pattern to a white pattern, the second input drive voltage VLIN2' can change from 7.6V to 7.55V. That is, under the same frame rate per second and the same brightness, the voltage tolerance increases for the zebra pattern (with a large load current), and decreases for the white pattern (with a relatively small load current). Accordingly, the power consumption of the driving voltage source 200 can be further reduced. Similarly, the voltage tolerance can be adjusted for other changes in conditions to minimize the power consumption of the driving voltage source 200.

[0148] According to the embodiment, the driving voltage source and / or the display device can minimize power consumption by changing the driving voltage according to increase / decrease of the load current of the display panel.

[0149] Example embodiments have been described. Features described in conjunction with specific embodiments may be used alone or in combination with other embodiments. Various changes may be made to the example embodiments without departing from the scope set forth in the appended claims.

Claims

1. A display device, comprising: a display panel, including pixels; a data driver electrically connected to the pixels and supplying data signals to the pixels; a driving voltage source electrically connected to the data driver and supplying a first driving voltage to the data driver; a power supply electrically connected to the driving voltage source and supplying a first input driving voltage to the driving voltage source; as well as a timing controller providing control signals for controlling the data driver, the driving voltage source, and the power supply, respectively, and providing brightness information and frame rate information of the display panel to the driving voltage source, wherein the driving voltage source includes an input driving voltage regulator, the input driving voltage regulator being electrically connected to the timing controller, determining an offset voltage based on the brightness information and the frame rate per second information of the display panel, and using the first input driving voltage and the offset voltage to generate a second input driving voltage, wherein the first input drive voltage is the highest voltage output from the power supply, and The driving voltage source divides the second input driving voltage to generate a first power voltage and a second power voltage required for the operation of the pixel, and supplies the first power voltage and the second power voltage to the display panel.

2. The display device according to claim 1, wherein The input driving voltage regulator reduces a voltage level of the offset voltage when at least one of a brightness value of the display panel and a frame rate per second of the display panel increases.

3. The display device according to claim 2, wherein: The input drive voltage regulator comprises: a brightness controller, configured to output the brightness value of the display panel based on the brightness information of the display panel; an offset determiner that determines the offset voltage based on the brightness value of the display panel and the frame rate per second of the display panel; and A subtractor subtracts the offset voltage from the first input drive voltage to generate an adjusted voltage value, wherein the adjusted voltage value is used to generate the second input drive voltage.

4. The display device according to claim 3, wherein The offset determiner includes a first lookup table, and wherein the first lookup table includes a first set of values ​​for the offset voltage corresponding to possible values ​​of the brightness value of the display panel and corresponding to possible values ​​of the frames per second rate of the display panel.

5. The display device according to claim 4, wherein according to the first lookup table, for a same possible value of the brightness value, a first first group of values ​​of the offset voltage corresponds to a first possible value of the frames per second rate, and a second first group of values ​​of the offset voltage lower than the first first group of values ​​of the offset voltage corresponds to a second possible value of the frames per second rate higher than the first possible value of the frames per second rate, and According to the first lookup table, for the same possible value of the frame rate per second, the third first group of values ​​of the offset voltage corresponds to the first possible value of the brightness value, and the fourth first group of values ​​of the offset voltage that is lower than the third first group of values ​​of the offset voltage corresponds to the second possible value of the brightness value that is higher than the first possible value of the brightness value. The display device according to claim 4 , wherein: The timing controller further provides image pattern information of the display panel to the driving voltage source.

7. The display device according to claim 6, wherein when the pixel rows of the display panel alternately display white and black, the image pattern information indicates a zebra pattern, wherein when all available pixels of the display panel display blue, the image pattern information indicates a blue pattern; and When all the available pixels of the display panel display white, the image pattern information indicates a white pattern.

8. The display device according to claim 7, wherein: The input drive voltage regulator further comprises: An image pattern analyzer outputs an image pattern current value of current consumed in the display panel based on the image pattern information of the display panel.

9. The display device according to claim 8, wherein when the image pattern information indicates a first image pattern, the offset determiner determines the offset voltage using the first lookup table, wherein the offset determiner further includes a second lookup table, and when the image pattern information indicates a second image pattern, the offset determiner determines the offset voltage using the second lookup table, wherein the first image pattern and the second image pattern are different two of the zebra pattern, the blue pattern, and the white pattern, and Wherein the second lookup table includes a second set of values ​​for the offset voltage corresponding to the possible values ​​for the brightness value and corresponding to the possible values ​​for the frames per second rate.

10. The display device according to claim 9, wherein according to the second lookup table, for the same possible value of the brightness value, a first second set of values ​​of the offset voltage corresponds to a first possible value of the frames per second rate, and a second second set of values ​​of the offset voltage that is lower than the first second set of values ​​of the offset voltage corresponds to a second possible value of the frames per second rate that is higher than the first possible value of the frames per second rate, and According to the second lookup table, for the same possible value of the frame rate per second, the third second group of values ​​of the offset voltage corresponds to the first possible value of the brightness value, and the fourth second group of values ​​of the offset voltage that is lower than the third second group of values ​​of the offset voltage corresponds to the second possible value of the brightness value that is higher than the first possible value of the brightness value.

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