Nanorod light-emitting device, manufacturing method thereof, and display device

Abstract

Provided are a nanorod light-emitting device, a method for manufacturing the same, and a display device including the nanorod light-emitting device. The nanorod light-emitting device includes: a first semiconductor layer doped with first conductive type impurities, an emission layer disposed above the first semiconductor layer, a second semiconductor layer disposed above the emission layer and doped with second conductive type impurities electrically opposite to the first conductive type impurities, a conductive layer disposed between a central portion of a lower surface of the emission layer and the first semiconductor layer and a central portion of an upper surface of the emission layer and at least one of the second semiconductor layer, and a current blocking layer surrounding the side walls of the conductive layer.

Description

Technical Field

[0001] The exemplary embodiments of the present disclosure relate to a nanorod light emitting device and a method for manufacturing the same, and more particularly, to a nanorod light emitting device having a concentrated current channel structure that prevents current from flowing to the surface of the nanorod and allows current to flow to the central portion of the nanorod and a method for manufacturing the same. In addition, the exemplary embodiments of the present disclosure relate to a display device including the nanorod light emitting device. Background Art

[0002] Compared with other light sources, light emitting diodes (LEDs) are known as the next generation light sources with long life, low power consumption, short response time, and environmental friendliness. Due to these advantages, industrial demand for LEDs has increased. LEDs are applied and used in various products such as lighting devices, backlights of display devices, etc.

[0003] Recently, micro- or nano-sized LEDs including II-VI or III-V compound semiconductors have been developed. In addition, micro-LED displays have been developed, which include display pixels in which such small LEDs are used as light-emitting elements. However, when the size of the LED is reduced to micro- or nano-sized, the light-emitting efficiency of the LED is reduced due to surface defects. Summary of the invention

[0004] One or more example embodiments provide a nanorod light-emitting device and a method for manufacturing the same, and more particularly, provide a nanorod light-emitting device having a concentrated current channel structure that prevents current from flowing to the surface of the nanorod and allows current to flow to the central portion of the nanorod and a method for manufacturing the nanorod light-emitting device.

[0005] One or more example embodiments also provide a display device including the nanorod light emitting device.

[0006] Additional aspects will be set forth in part in the description which follows and, in part, will be obvious from the description, or may be learned by practice of example embodiments of the disclosure.

[0007] According to one aspect of an example embodiment, a nanorod light-emitting device is provided, comprising: a first semiconductor layer doped with a first conductive type impurity; an emission layer disposed above the first semiconductor layer; a second semiconductor layer, disposed above the emission layer and doped with a second conductive type impurity having an electrical property opposite to that of the first conductive type impurity; a conductive layer, disposed between a central portion of a lower surface of the emission layer and the first semiconductor layer and a central portion of an upper surface of the emission layer and at least one of the second semiconductor layer; and a current blocking layer surrounding a side wall of the conductive layer.

[0008] The first semiconductor layer may be a single layer including a semiconductor material having a single composition.

[0009] The second semiconductor layer may be a single layer including a semiconductor material having the same single composition as that of the semiconductor material of the first semiconductor layer.

[0010] The current blocking layer may include an oxide material.

[0011] The conductive layer may include: a first conductive layer disposed between a central portion of a lower surface of the emission layer and the first semiconductor layer; and a second conductive layer disposed between a central portion of an upper surface of the emission layer and the second semiconductor layer.

[0012] The current blocking layer may include: a first current blocking layer surrounding a sidewall of the first conductive layer between a lower surface of the emission layer and the first semiconductor layer; and a second current blocking layer surrounding a sidewall of the second conductive layer between an upper surface of the emission layer and the second semiconductor layer.

[0013] The emission layer may include a first quantum well structure and a second quantum well structure, wherein the conductive layer further includes a third conductive layer, which is arranged in a central part between the first quantum well structure and the second quantum well structure, and wherein the current blocking layer further includes a third current blocking layer, which surrounds the side wall of the third conductive layer and is arranged between the first quantum well structure and the second quantum well structure.

[0014] A diameter of the first semiconductor layer, a diameter of the current blocking layer, a diameter of the emission layer, and a diameter of the second semiconductor layer may be equal to each other.

[0015] The outer diameter of the current blocking layer may be in the range from 0.05 μm to 2 μm.

[0016] The diameter of the conductive layer may be greater than or equal to 0.01 μm, and may be smaller than an outer diameter of the current blocking layer.

[0017] The height of the nanorod light emitting device can range from 1 μm to 20 μm.

[0018] The thickness of the current blocking layer may be equal to the thickness of the conductive layer.

[0019] The thickness of the current blocking layer may be in the range from 5 nm to 200 nm.

[0020] The conductive layer may include Al x Ga 1-x As, wherein x satisfies x ≥ 0.85, the current blocking layer comprises AlO x , and the first semiconductor layer and the second semiconductor layer both include AlGaInP.

[0021] The nanorod light emitting device may further include a passivation film surrounding side surfaces of the first semiconductor layer, the current blocking layer, the emission layer, and the second semiconductor layer.

[0022] The passivation film may include a selected from AlO x , HfO x 、TiO x 、SiN x 、SiO x and Al x Ga 1-x At least one material among As, wherein x satisfies x ≥ 0.9.

[0023] The passivation film may include a material in an epitaxial relationship with the emissive layer to form a heterojunction at an interface between the passivation film and the emissive layer.

[0024] The current blocking layer, the emission layer, and the second semiconductor layer may have the same first diameter, and the first semiconductor layer may have a second diameter greater than the first diameter.

[0025] The nanorod light emitting device may further include a passivation film surrounding side surfaces of the current blocking layer and the emission layer.

[0026] According to another aspect of the example embodiment, a display device is provided, comprising: a plurality of pixel electrodes; a common electrode corresponding to the plurality of pixel electrodes; and a plurality of nanorod light emitting devices connected between each pixel electrode and the common electrode, wherein each nanorod light emitting device comprises a first semiconductor layer doped with a first conductive type impurity, an emission layer disposed above the first semiconductor layer, a second semiconductor layer disposed above the emission layer and doped with a second conductive type impurity electrically opposite to the first conductive type impurity, a conductive layer disposed between a central portion of a lower surface of the emission layer and the first semiconductor layer or between a central portion of an upper surface of the emission layer and at least one of the second semiconductor layer, and a current blocking layer surrounding the side walls of the conductive layer.

[0027] According to another aspect of the example embodiment, a method for manufacturing a nanorod light-emitting device is provided, the method comprising: forming a sacrificial layer on a semiconductor substrate; forming a first semiconductor layer doped with a first conductive type impurity on the sacrificial layer; forming an emission layer above the first semiconductor layer; forming a second semiconductor layer doped with a second conductive type impurity having an electrical property opposite to the first conductive type impurity above the emission layer; forming a conductive layer on the first semiconductor layer between the formation of the first semiconductor layer and the formation of the emission layer, and / or forming a conductive layer on the emission layer between the formation of the emission layer and the formation of the second semiconductor layer; forming a plurality of nanorod light-emitting devices by partially etching the first semiconductor layer, the emission layer, the second semiconductor layer and the conductive layer; and forming a current blocking layer surrounding the sidewalls of the remaining conductive layer by oxidizing the sidewalls of the conductive layer through an oxidation process.

[0028] The first semiconductor layer may include a semiconductor material having a single composition, and the second semiconductor layer may include a semiconductor material having the same single composition as that of the semiconductor material of the first semiconductor layer.

[0029] A diameter of the first semiconductor layer, a diameter of the current blocking layer, a diameter of the emission layer, and a diameter of the second semiconductor layer may be equal to each other.

[0030] The outer diameter of the current blocking layer may be in the range from 0.05 μm to 2 μm.

[0031] The diameter of the remaining conductive layer may be greater than or equal to 0.01 μm and may be smaller than the outer diameter of the current blocking layer.

[0032] The height of the nanorod light emitting device can range from 1 μm to 20 μm.

[0033] The thickness of the current blocking layer may be in the range from 5 nm to 200 nm.

[0034] The conductive layer may include Al x Ga 1-x As, wherein x satisfies x ≥ 0.85, the current blocking layer may include AlO x , the first semiconductor layer and the second semiconductor layer may both include AlGaInP.

[0035] The method may further include forming a passivation film around side surfaces of the first semiconductor layer, the current blocking layer, the emission layer, and the second semiconductor layer.

[0036] The passivation film may include a selected from AlO x , HfO x 、TiO x 、SiN x 、SiO x and Al x Ga1-x At least one material among As, wherein x satisfies x ≥ 0.9.

[0037] The passivation film may include a material in an epitaxial relationship with the emissive layer to form a heterojunction in an interface between the passivation film and the emissive layer.

[0038] By removing the sacrificial layer, the plurality of nanorod light emitting devices can be separated from each other.

[0039] According to another aspect of the example embodiment, a nanorod light emitting device is provided, the nanorod light emitting device comprising: a first semiconductor layer doped with a first conductive type impurity; an emission layer disposed above the first semiconductor layer; a second semiconductor layer disposed above the emission layer and doped with a second conductive type impurity electrically opposite to the first conductive type impurity; a first conductive layer disposed between a central portion of a lower surface of the emission layer and the first semiconductor layer; a first current blocking layer surrounding a side wall of the first conductive layer; a second conductive layer disposed between a central portion of an upper surface of the emission layer and the second semiconductor layer; a second current blocking layer surrounding a side wall of the second conductive layer, wherein both the first conductive layer and the second conductive layer comprise Al x Ga 1-x As, wherein x satisfies x≥0.85, the first current blocking layer and the second current blocking layer both include AlO x , and the first semiconductor layer and the second semiconductor layer both include AlGaInP.

[0040] The nanorod light emitting device may further include a passivation film surrounding side surfaces of the current blocking layer and the emission layer. BRIEF DESCRIPTION OF THE DRAWINGS

[0041] The above and / or other aspects, features and advantages of example embodiments of the present disclosure will become more apparent from the following description in conjunction with the accompanying drawings, in which:

[0042] Figure 1 is a cross-sectional view showing a schematic configuration of a nanorod light emitting device according to an example embodiment;

[0043] FIG. 2A to FIG. 2E is a cross-sectional view schematically illustrating a method of manufacturing a nanorod light emitting device according to an example embodiment;

[0044] Figure 3 It is shown that the use FIG. 2A to FIG. 2E A cross-sectional view of a schematic structure of a nanorod light-emitting device manufactured by the method shown in FIG.

[0045] Figure 4 is a cross-sectional view showing a schematic configuration of a nanorod light emitting device according to another example embodiment.

[0046] Figure 5is a cross-sectional view showing a schematic configuration of a nanorod light emitting device according to another example embodiment;

[0047] Figure 6 is a cross-sectional view showing a schematic configuration of a nanorod light emitting device according to another example embodiment;

[0048] Figure 7 is a conceptual diagram showing a schematic configuration of a display device including a nanorod light emitting device according to an example embodiment;

[0049] Fig. 8A , Figure 8B and Figure 8C The method of arranging a plurality of nanorod light-emitting devices between a pixel electrode and a common electrode to manufacture a Figure 7 The process of the display device shown in FIG.

[0050] Fig. 9 is a cross-sectional view showing a schematic configuration of a nanorod light emitting device according to another example embodiment; and

[0051] Fig.10 , Fig.11 , Fig.12 , Fig.13 , Fig.14 , Fig.15 and Fig.16 Examples of various display devices including nanorod light emitting devices according to example embodiments are shown. DETAILED DESCRIPTION

[0052] Now will refer in detail to the example implementation shown in the accompanying drawings, wherein the same reference numerals always represent the same elements. In this regard, the example implementation can have different forms and should not be construed as being limited to the description set forth herein. Therefore, the example implementation is described below only by reference to the accompanying drawings to illustrate various aspects. As used herein, the term "and / or" includes any and all combinations of one or more associated listed items. Such as "at least one of ... ", when after a column of elements, modify the entire column of elements without modifying the individual elements in the column. For example, the statement "at least one of a, b, and c" should be understood to include only a, only b, only c, both a and b, both a and c, both b and c, or all a, b, and c.

[0053] Hereinafter, a nanorod light emitting device having a concentrated current channel structure and a method for manufacturing the same will be described in detail with reference to the accompanying drawings. In the accompanying drawings, the same reference numerals always refer to the same elements, and the size of the elements may be exaggerated for clarity. The embodiments described below are merely examples, and various modifications may be made thereto.

[0054] When an element is referred to as being "on" another element, it may be directly on the other element in contact with the other element, or may be on the other element without being in contact with the other element. As used herein, the singular form is intended to include the plural form as well, unless the context clearly indicates otherwise. When it is mentioned that a part "includes" or "comprising" certain elements, unless otherwise specified, the part may further include other elements.

[0055] The terms "the" or "said" and other similar illustrative terms may correspond to both singular and plural forms. The order in which the various steps included in the method do not mean that the steps should be performed in this order; rather, the steps may be performed in any suitable order unless otherwise explicitly stated.

[0056] The term "unit" or "module" means a unit for processing at least one function or operation and may be implemented as hardware or software or a combination thereof.

[0057] The line connections or connecting members between the elements shown in the drawings exemplarily represent functional connections and / or physical or circuit connections, and in actual applications, they may be replaced or embodied as various additional functional connections, physical connections or circuit connections.

[0058] All examples or terms indicating examples used herein are only used to describe the technical concept, and the scope of the present disclosure is not limited by such examples or terms indicating examples unless the scope is limited by the claims.

[0059] Figure 1 is a cross-sectional view showing a schematic configuration of a nanorod light emitting device according to an example embodiment. Figure 1 The nanorod light-emitting device 100 may include a first semiconductor layer 103, an emission layer 105 arranged above the first semiconductor layer 103, a second semiconductor layer 107 arranged above the emission layer 105, a first current channel layer 104 arranged between the first semiconductor layer 103 and the emission layer 105, and a second current channel layer 106 arranged between the emission layer 105 and the second semiconductor layer 107.

[0060] The first semiconductor layer 103 may be arranged above the substrate 101, and the buffer layer or sacrificial layer 102 may be further arranged between the substrate 101 and the first semiconductor layer 103. For example, the sacrificial layer 102 may be arranged on the substrate 101, and the first semiconductor layer 103 may be arranged on the sacrificial layer 102. The substrate 101 may include a II-VI group or a III-V group compound semiconductor material. For example, the substrate 101 may include gallium arsenide (GaAs). The nanorod light emitting device 100 may be used in a state including the substrate 101 and the sacrificial layer 102, or may be used in a state where the substrate 101 and the sacrificial layer 102 are removed after the nanorod light emitting device 100 is manufactured.

[0061] The first semiconductor layer 103 and the second semiconductor layer 107 may include a II-VI or III-V compound semiconductor material. The first semiconductor layer 103 and the second semiconductor layer 107 provide electrons and holes to the emission layer 105. To this end, the first semiconductor layer 103 may be doped to an n-type or a p-type, and the second semiconductor layer 107 may be doped to a conductivity type electrically opposite to that of the first semiconductor layer 103. For example, the first semiconductor layer 103 may be doped to an n-type and the second semiconductor layer 107 may be doped to a p-type, or the first semiconductor layer 103 may be doped to a p-type and the second semiconductor layer 107 may be doped to an n-type. When the first semiconductor layer 103 or the second semiconductor layer 107 is doped to an n-type, for example, silicon (Si) may be used as a dopant, and when the first semiconductor layer 103 or the second semiconductor layer 107 is doped to a p-type, for example, zinc (Zn) may be used as a dopant. The first semiconductor layer 103 or the second semiconductor layer 107 doped to an n-type may provide electrons to the emission layer 105 , and the second semiconductor layer 107 or the first semiconductor layer 103 doped to a p-type may provide holes to the emission layer 105 .

[0062] The substrate 101 and the sacrificial layer 102 may be doped to the same conductivity type as the first semiconductor layer 103 disposed thereon. For example, when the first semiconductor layer 103 is doped to n-type, the substrate 101 and the sacrificial layer 102 may include n-GaAs. The substrate 101 may be doped at a concentration lower than that of the sacrificial layer 102, and the sacrificial layer 102 may be doped at a concentration higher than that of the substrate 101. A contact layer for ohmic contact may be further disposed between the first semiconductor layer 103 and the sacrificial layer 102. The contact layer disposed between the first semiconductor layer 103 and the sacrificial layer 102 may be doped to the same conductivity type as that of the first semiconductor layer 103, and may be doped at a concentration higher than that of the first semiconductor layer 103 and the sacrificial layer 102.

[0063] The emission layer 105 has a structure in which quantum wells are arranged between walls. Electrons and holes provided from the first semiconductor layer 103 and the second semiconductor layer 107 can be recombined in the quantum wells in the emission layer 105, thereby generating light. The wavelength of the light generated in the emission layer 105 can be determined according to the band gap of the material included in the quantum well in the emission layer 105. The emission layer 105 may have only one quantum well, but may also have a multi-quantum well (MQW) structure in which multiple quantum wells and multiple walls are alternately arranged. The thickness of the emission layer 105 or the number of quantum wells in the emission layer 105 can be appropriately selected in consideration of the driving voltage and luminous efficiency of the nanorod light-emitting device 100. For example, the thickness of the emission layer 105 can be selected to be at most twice the outer diameter D1 of the nanorod light-emitting device 100.

[0064] In addition, the nanorod light emitting device 100 may further include a contact layer 108 disposed on the second semiconductor layer 107 to provide an ohmic contact. The contact layer 108 may be doped to the same conductivity type as the second semiconductor layer 107. For example, when the second semiconductor layer 107 is doped to a p-type, the contact layer 108 may be doped to a p-type. The contact layer 108 may include, for example, indium gallium phosphide (GaInP) and GaAs.

[0065] The nanorod light emitting device 100 according to the example embodiment may have the shape of a nanorod having a very small nano-scale or micron-scale size. For example, the nanorod light emitting device 100 may have an outer diameter D1 from about 0.05 μm to about 2 μm. The nanorod light emitting device 100 having a nanorod shape may have a substantially uniform outer diameter along the longitudinal direction. For example, the first semiconductor layer 103, the emission layer 105, the second semiconductor layer 107, and the contact layer 108 may have substantially the same outer diameter. In addition, when the length between the lower surface of the first semiconductor layer 103 and the upper surface of the second semiconductor layer 107 or the length between the lower surface of the first semiconductor layer 103 and the upper surface of the contact layer 108 is referred to as the height H of the nanorod light emitting device 100, the height H of the nanorod light emitting device 100 may be in the range of from about 1 μm to about 20 μm. In addition, the nanorod light emitting device 100 may have, for example, an aspect ratio of at least 5. Typically, the outer diameter D1 of the nanorod light emitting device 100 may be selected to be about 600 nm, and the height H of the nanorod light emitting device 100 may be selected to be about 5 μm. In this case, the aspect ratio of the nanorod light emitting device 100 may be slightly greater than 8.

[0066] However, when the nanorod light-emitting device 100 having a relatively large aspect ratio is manufactured in a small size, the surface area to volume ratio increases, and thus the surface defects of the emission layer 105 may increase. For example, due to dangling bonds, surface defects may occur in the outer surface of the emission layer 105, wherein the dangling bonds increase as the surface area to volume ratio increases, thereby increasing the surface defects. Such surface defects interrupt the flow of current, resulting in degradation of the light emission efficiency of the emission layer 105.

[0067] The first current channel layer 104 and the second current channel layer 106, which are respectively arranged on the lower surface and the upper surface of the emission layer 105, concentrate the current to the central portion of the emission layer 105 (where almost no surface defects occur), thereby improving the light emission efficiency of the emission layer 105. To this end, the first current channel layer 104 may include a first current blocking layer 104a and a first conductive layer 104b, wherein the first current blocking layer 104a is arranged between the edge of the lower surface of the emission layer 105 and the edge of the upper surface of the first semiconductor layer 103, and the first conductive layer 104b is arranged between the central portion of the lower surface of the emission layer 105 and the central portion of the upper surface of the first semiconductor layer 103. Therefore, the first current blocking layer 104a may have a ring shape surrounding the side wall of the first conductive layer 104b in the same layer as the first conductive layer 104b. In addition, the second current channel layer 106 may include a second current blocking layer 106a and a second conductive layer 106b, the second current blocking layer 106a being arranged between the edge of the upper surface of the emission layer 105 and the edge of the lower surface of the second semiconductor layer 107, and the second conductive layer 106b being arranged between the central portion of the upper surface of the emission layer 105 and the central portion of the lower surface of the second semiconductor layer 107. The second current blocking layer 106a may have a ring shape surrounding the sidewall of the second conductive layer 106b in the same layer as the second conductive layer 106b. In addition, the thickness t of the first current blocking layer 104a may be the same as the thickness of the first conductive layer 104b, and the thickness of the second current blocking layer 106a may be the same as the thickness of the second conductive layer 106b. For example, the thickness of the first current blocking layer 104a and the second current blocking layer 106a may be in the range of about 5nm to about 200nm.

[0068] The outer diameters of the first current blocking layer 104a and the second current blocking layer 106a may have the same range as the outer diameter D1 of the nanorod light emitting device 100, for example, from about 0.05 μm to about 2 μm. Therefore, the first semiconductor layer 103, the first current blocking layer 104a, the emission layer 105, the second current blocking layer 106a, and the second semiconductor layer 107 may have the same diameter. The diameter D2 of the first conductive layer 104b and the second conductive layer 106b may be at least about 0.01 μm, and may be smaller than the outer diameters of the first current blocking layer 104a and the second current blocking layer 106a.

[0069] In this structure, the first current blocking layer 104a and the second current blocking layer 106a can prevent or reduce the current from flowing to the vicinity of the surface of the emission layer 105 where the surface defects exist, and the current is supplied only to the central portion of the emission layer 105 through the first conductive layer 104b and the second conductive layer 106b, where almost no surface defects occur in the central portion of the emission layer 105. Therefore, the nanorod light emitting device 100 can have high light emitting efficiency while having a small size and a large aspect ratio.

[0070] exist Figure 1 , the first current channel layer 104 and the second current channel layer 106 are shown as being arranged on both the lower surface and the upper surface of the emission layer 105, but the embodiment is not limited thereto. For example, the nanorod light emitting device 100 may include only one of the first current channel layer 104 arranged on the lower surface of the emission layer 105 and the second current channel layer 106 arranged on the upper surface of the emission layer 105.

[0071] FIG. 2A to FIG. 2E is a cross-sectional view schematically illustrating a method of manufacturing a nanorod light emitting device 100 according to an example embodiment.

[0072] Reference Figure 2A , a sacrificial layer 102, a first semiconductor layer 103, a first conductive layer 104b, an emission layer 105, a second conductive layer 106b, and a second semiconductor layer 107 are sequentially grown on a substrate 101. The sacrificial layer 102 is arranged over a wide area of ​​the upper surface of the substrate 101, the first semiconductor layer 103 is grown on the entire upper surface of the sacrificial layer 102, and the first conductive layer 104b is grown on the entire upper surface of the first semiconductor layer 103. In addition, each of the emission layer 105, the second conductive layer 106b, and the second semiconductor layer 107 may be grown to be arranged on the entire upper surface of the layer therebelow. A contact layer 108 may be further formed on the upper surface of the second semiconductor layer 107.

[0073] The substrate 101 and the sacrificial layer 102 may include, for example, n-GaAs. When the nanorod light emitting device 100 is a light emitting device for generating red light, the first semiconductor layer 103 may include, for example, n-aluminum gallium indium phosphide (AlGaInP), and the second semiconductor layer 107 may include p-AlGaInP. Therefore, the first semiconductor layer 103 may be a single layer including a semiconductor material of a single component, and the second semiconductor layer 107 may also be a single layer including the same semiconductor material as the first semiconductor layer 103, and the first semiconductor layer 103 and the second semiconductor layer 107 are doped to opposite types to each other. For example, the first semiconductor layer 103 may be doped with Si to be n-type, and the second semiconductor layer 107 may be doped with Zn to be p-type. In addition, when the contact layer 108 is further formed, the contact layer 108 may include, for example, p-GaInP or p-GaAs, or both p-GaInP and p-GaAs.

[0074] In the case where the emission layer 105 is configured to generate red light, the emission layer 105 may include, for example, AlGaInP. The AlGaInP of the emission layer 105 may not be doped. The emission layer 105 includes a wall and a quantum well, for which the aluminum (Al) content in the AlGaInP may vary. For example, the Al content of the wall in the AlGaInP may be higher than that of the quantum well. In addition, when compared with the first semiconductor layer 103 and the second semiconductor layer 107, the Al content is the highest in the first semiconductor layer 103 and the second semiconductor layer 107, the Al content is the second highest in the wall of the emission layer 105, and the Al content is the lowest in the quantum well of the emission layer 105. Therefore, in the conduction band, the energy level of the first semiconductor layer 103 and the second semiconductor layer 107 is the highest, the energy level of the wall of the emission layer 105 is the second highest, and the energy level of the quantum well of the emission layer 105 is the lowest.

[0075] After the second semiconductor layer 107 is formed, the hard mask 120 is formed on the second semiconductor layer 107 at regular intervals. When the contact layer 108 is formed on the second semiconductor layer 107, the hard mask 120 having a plurality of openings arranged at regular intervals may be formed on the contact layer 108. For example, the hard mask 120 may be formed by patterning the material of the hard mask 120 using a photolithography method after the material of the hard mask 120 is arranged on the entire upper surface of the second semiconductor layer 107 or the contact layer 108 so that the hard mask 120 has a plurality of openings arranged at regular intervals. The hard mask 120 may be formed, for example, of silicon oxide (SiO 2 ) single layer or SiO 2 When viewed from above the hard mask 120 , the hard mask 120 may have a plurality of two-dimensionally arranged openings.

[0076] Reference Figure 2B, the area not covered by the hard mask 120 can be etched and removed using a dry etching method. For example, the second semiconductor layer 107, the second conductive layer 106b, the emission layer 105, the first conductive layer 104b, and the first semiconductor layer 103 under the opening of the hard mask 120 can be removed by being etched in sequence until the sacrificial layer 102 is exposed. Figure 2B As shown, a plurality of nanorods including a first semiconductor layer 103 , a first conductive layer 104 b , an emission layer 105 , a second conductive layer 106 b , and a second semiconductor layer 107 may be formed on the sacrificial layer 102 .

[0077] Next, refer to Figure 2C , edge portions of the first conductive layer 104b and the second conductive layer 106b may be oxidized, thereby forming a first current blocking layer 104a surrounding the sidewall of the remaining first conductive layer 104b (hereinafter also referred to as the first conductive layer 104b) and a second current blocking layer 106a surrounding the sidewall of the remaining second conductive layer 106b (hereinafter also referred to as the second conductive layer 106b). To this end, the first conductive layer 104b and the second conductive layer 106b may include a semiconductor material that is easily oxidized and has a crystal structure similar to that of the first semiconductor layer 103 and the second semiconductor layer 107 and the emission layer 105. For example, the first conductive layer 104b and the second conductive layer 106b may include a semiconductor material containing Al x Ga 1-x As material and is not doped. x Ga 1-x When As is used as the material of the first conductive layer 104b and the second conductive layer 106b, the light output of the nanorod light emitting device 100 increases, and as the Al content increases, the Al x Ga 1-x As is more easily oxidized. In addition, as the thickness of the first conductive layer 104b and the second conductive layer 106b decreases, the oxidation rate decreases. Therefore, the thickness of the first conductive layer 104b and the second conductive layer 106b and Al x Ga 1-x The x value of As may be appropriately adjusted. For example, the thickness of the first conductive layer 104b and the second conductive layer 106b may be in the range from about 5 nm to about 200 nm, and the x value may be selected such that x≥0.85.

[0078] The oxidation process of the first conductive layer 104b and the second conductive layer 106b can be performed by 2 ) atmosphere while raising the temperature to at least about 400°C. As a result, Al x Ga 1-xAl in As is oxidized from the outermost walls of the first conductive layer 104b and the second conductive layer 106b, thereby forming the first current blocking layer 104a and the second current blocking layer 106a. Therefore, the first current blocking layer 104a and the second current blocking layer 106a may include an oxide material formed by oxidizing the edge portions of the first conductive layer 104b and the second conductive layer 106b. For example, the first current blocking layer 104a and the second current blocking layer 106a may include aluminum oxide (AlO) as an oxide of Al. x ). In addition, the first current blocking layer 104a and the second current blocking layer 106a may partially include components such as Al, gallium (Ga), arsenic (As), etc. that remain without being oxidized. x Having high resistance, the first current blocking layer 104 a and the second current blocking layer 106 a can prevent or reduce current from flowing to the outer sidewall of the emission layer 105 .

[0079] exist Figure 2C In the process shown, when the hard mask 120 remaining on the second semiconductor layer 107 or the contact layer 108 is removed, the Figure 1 The nanorod light emitting device 100 is shown. FIG. 2A to FIG. 2C The process shown can form multiple nanorod light-emitting devices 100 at the same time.

[0080] In order to further improve the performance of the nanorod light emitting device 100, the following steps may be performed: Figure 2D Refer to the passivation process shown. Figure 2D , the passivation film 110 may be formed to a uniform thickness along the surfaces of the plurality of nanorod light emitting devices 100 and the sacrificial layer 102. As a result, the sidewalls of the first semiconductor layer 103, the first current blocking layer 104a, the emission layer 105, the second current blocking layer 106a, and the second semiconductor layer 107 of each nanorod light emitting device 100 are surrounded by the passivation film 110. The passivation film 110 may be formed using, for example, metal organic chemical vapor deposition (MOCVD), atomic layer deposition (ALD), or the like.

[0081] The passivation film 110 may include, for example, a material having high resistance and a large band gap, such as AlO x 、HfO x ), titanium oxide (TiO x ), silicon nitride (SiN x ), silicon oxide (SiO x ) etc. In addition, the passivation film 110 may also include a material that can be self-oxidized. For example, the passivation film 110 may include Al x Ga 1-x As (x ≥ 0.9). x Ga1-x As the value of x in As increases, Al x Ga 1-x As can be more easily oxidized. Therefore, by automatically oxidizing Al by selecting a larger value of at least 0.9 as the value of x x Ga 1-x As can form the passivation film 110 without a specific process. x Ga 1-x After the oxidation of As, the passivation film 110 mainly includes AlO x Component.

[0082] In particular, when the passivation film 110 is formed by growing crystals of a material having a crystal structure similar to that of the emission layer 105, the passivation film 110 may have an epitaxial relationship with the emission layer 105. For example, a heterojunction is formed in the interface between the passivation film 110 and the emission layer 105. As a result, since dangling bonds are removed from the outer surface of the emission layer 105, surface defects occurring in the outer surface of the emission layer 105 may be reduced or prevented. Therefore, the emission layer 105 may be recovered from the surface defects, so that the luminous efficiency of the nanorod light emitting device 100 may be further improved. For example, by growing AlO by MOCVD or ALD, the luminous efficiency of the nanorod light emitting device 100 may be further improved. x , HfO x 、TiO x 、Al x Ga 1-x The passivation film 110 formed of As (x≧0.9) or the like may have an epitaxial relationship with the emission layer 105 .

[0083] Reference Figure 2E , the material of the passivation film 110 remaining on the sacrificial layer 102 and the hard mask 120 remaining on the second semiconductor layer 107 or the contact layer 108 may be removed. As a result, the plurality of nanorod light emitting devices 100 may be simultaneously formed on the substrate 101 and the sacrificial layer 102. Thereafter, the plurality of nanorod light emitting devices 100 may be individually separated by removing the sacrificial layer 102. The substrate 101 and the sacrificial layer 102 may be cut in a vertical direction so that each nanorod light emitting device 100 may be used in a state where the substrate 101 and the sacrificial layer 102 are attached to each nanorod light emitting device 100. By cutting the substrate 101 and the sacrificial layer 102 in a vertical direction so that at least two nanorod light emitting devices 100 remain, at least two nanorod light emitting devices 100 may be used together.

[0084] Figure 3 It is shown that the use FIG. 2A to FIG. 2E The schematic cross-sectional view of a nanorod light-emitting device 100 manufactured by the method shown in FIG. Figure 3, the nanorod light emitting device 100 may include a first semiconductor layer 103, a first current channel layer 104 arranged on the first semiconductor layer 103, an emission layer 105 arranged on the first current channel layer 104, a second current channel layer 106 arranged on the emission layer 105, a second semiconductor layer 107 arranged on the second current channel layer 106, and a passivation film 110 surrounding the side surfaces of the above layers. In addition, the first current channel layer 104 may include a first current blocking layer 104a and a first conductive layer 104b, and the second current channel layer 106 may include a second current blocking layer 106a and a second conductive layer 106b. In addition, a contact layer for ohmic contact may be further arranged on the lower surface of the first semiconductor layer 103 and the upper surface of the second semiconductor layer 107 as needed. As described above, the first semiconductor layer 103, the first current channel layer 104, the emission layer 105, the second current channel layer 106, and the second semiconductor layer 107 may have the same diameter and form a nanorod shape together.

[0085] although Figure 3 The passivation film 110 is shown to surround all side walls of the first semiconductor layer 103, the first current channel layer 104, the emission layer 105, the second current channel layer 106, and the second semiconductor layer 107, but the embodiment is not limited thereto. Figure 4 is a cross-sectional view showing a schematic configuration of a nanorod light emitting device 100a according to another exemplary embodiment. Figure 4 , the passivation film 110 may be formed to surround only the emission layer 105 or only a portion of the sidewall of the nanorod light emitting device 100 a including at least the emission layer 105 .

[0086] In addition, although the nanorod light emitting devices 100 and 100a have been described as including the first current channel layer 104 and the second current channel layer 106 disposed on the lower surface and the upper surface of the emission layer 105, respectively, the number and position of the current channel layers are not limited thereto. Figure 5 and Figure 6 is a cross-sectional view illustrating a schematic configuration of a nanorod light emitting device according to other example embodiments.

[0087] Reference Figure 5 , the nanorod light emitting device 100b may further include a third current channel layer 111 in the emission layer 105. The emission layer 105 may include a first quantum well structure 105a between the first current channel layer 104 and the third current channel layer 111 and a second quantum well structure 105b between the third current channel layer 111 and the second current channel layer 106. The second quantum well structure 105b is arranged above the first quantum well structure 105a along the thickness direction of the nanorod light emitting device 100b.

[0088] The third current channel layer 111 may include: a third current blocking layer 111a, arranged on the edge between the first quantum well structure 105a and the second quantum well structure 105b; and a third conductive layer 111b, arranged in the central part between the first quantum well structure 105a and the second quantum well structure 105b. The third current blocking layer 111a may have a ring shape and be arranged to surround the sidewall of the third conductive layer 111b in the emission layer 105. The first conductive layer 104b, the second conductive layer 106b and the third conductive layer 111b may have the same diameter. As a result, the current can be uniformly concentrated to the central part of the emission layer 105 in the entire region of the emission layer 105.

[0089] In addition, refer to Figure 6 , the nanorod light emitting device 100c may further include a third current channel layer 111 and a fourth current channel layer 112 in the emission layer 105. The emission layer 105 may include a first quantum well structure 105a between the first current channel layer 104 and the third current channel layer 111, a second quantum well structure 105b between the third current channel layer 111 and the fourth current channel layer 112, and a third quantum well structure 105c between the fourth current channel layer 112 and the second current channel layer 106. The first quantum well structure 105a, the second quantum well structure 105b, and the third quantum well structure 105c may be sequentially arranged along the thickness direction of the nanorod light emitting device 100c.

[0090] The third current channel layer 111 may include: a third current blocking layer 111a, arranged on the edge between the first quantum well structure 105a and the second quantum well structure 105b; and a third conductive layer 111b, arranged in the central portion between the first quantum well structure 105a and the second quantum well structure 105b. The fourth current channel layer 112 may include: a fourth current blocking layer 112a, arranged on the edge between the second quantum well structure 105b and the third quantum well structure 105c; and a fourth conductive layer 112b, arranged in the central portion between the second quantum well structure 105b and the third quantum well structure 105c. The third current blocking layer 111a may be arranged to surround the sidewall of the third conductive layer 111b, and the fourth current blocking layer 112a may have a ring shape and be arranged to surround the sidewall of the fourth conductive layer 112b. The first conductive layer 104b, the second conductive layer 106b, the third conductive layer 111b, and the fourth conductive layer 112b may have the same diameter.

[0091] As the number of quantum wells in the emission layer 105 increases, further current channel layers may be added in this manner. For example, as the number of quantum wells in the emission layer 105 increases, a plurality of MQW structures and a plurality of current channel layers may be alternately arranged in the emission layer 105. In this case, a single MQW structure between two current channel layers may include, for example, one to about 10 quantum wells.

[0092] The nanorod light emitting device 100 can be used in various applications. In particular, the nanorod light emitting device 100 can be used as a light emitting element of a pixel of a next generation display device. For example, Figure 7 is a conceptual diagram showing a schematic configuration of a display device using a nanorod light emitting device 100 according to an exemplary embodiment. Figure 7 The display device 200 may include a plurality of first pixel electrodes 202B, a first common electrode 203B corresponding to the plurality of first pixel electrodes 202B, a plurality of second pixel electrodes 202G, a second common electrode 203G corresponding to the plurality of second pixel electrodes 202G, a plurality of third pixel electrodes 202R, and a third common electrode 203R corresponding to the plurality of third pixel electrodes 202R. The display device 200 may also include a plurality of nanorod light emitting devices 100B connected between each first pixel electrode 202B and the first common electrode 203B, a plurality of second nanorod light emitting devices 100G connected between each second pixel electrode 202G and the second common electrode 203G, and a plurality of third nanorod light emitting devices 100R connected between each third pixel electrode 202R and the third common electrode 203R.

[0093] For example, the first nanorod light emitting device 100B can be configured to emit blue light, the second nanorod light emitting device 100G can be configured to emit green light, and the third nanorod light emitting device 100R can be configured to emit red light. In addition, a single first pixel electrode 202B can form a single blue sub-pixel together with the first common electrode 203B, a single second pixel electrode 202G can form a single green sub-pixel together with the second common electrode 203G, and a single third pixel electrode 202R can form a single red sub-pixel together with the third common electrode 203R.

[0094] FIG. 8A to FIG. 8C The method of arranging the plurality of first nanorod light emitting devices 100B between the first pixel electrode 202B and the first common electrode 203B to manufacture a Figure 7 The process of display device 200 is shown.

[0095] Reference Fig. 8A, a first pixel electrode 202B, a first common electrode 203B, a second pixel electrode 202G, a second common electrode 203G, a third pixel electrode 202R, and a third common electrode 203R are formed on a substrate 201. A driving circuit may be further arranged on or in the substrate 201, and the driving circuit is connected to the first pixel electrode 202B, the first common electrode 203B, the second pixel electrode 202G, the second common electrode 203G, the third pixel electrode 202R, and the third common electrode 203R to control the light emitting operation of the first nanorod light emitting device 100B, the second nanorod light emitting device 100G, and the third nanorod light emitting device 100R. Thereafter, a solution 10 containing the plurality of first nanorod light emitting devices 100B may be dispersed in an area between the first pixel electrode 202B and the first common electrode 203B. The solution 10 may be dispersed using an inkjet printing method, but the embodiment is not limited thereto.

[0096] Reference Figure 8B , an electric field is applied between the first pixel electrode 202B and the first common electrode 203B. As a result, due to the electric field, the plurality of first nanorod light-emitting devices 100B can be self-aligned between the first pixel electrode 202B and the first common electrode 203B. Here, the order of performing the dispersion of the solution 10 and the application of the electric field can be changed. For example, in a state where the electric field is applied between the first pixel electrode 202B and the first common electrode 203B, the solution 10 containing the plurality of first nanorod light-emitting devices 100B can be dispersed in the region between the first pixel electrode 202B and the first common electrode 203B.

[0097] When the plurality of first nanorod light-emitting devices 100B are self-aligned, a first contact electrode 205 may be formed on the first pixel electrode 202B to electrically and / or physically stably connect the first nanorod light-emitting devices 100B, and a second contact electrode 206 may be formed on the first common electrode 203B to electrically and / or physically stably connect the first nanorod light-emitting devices 100B. Figure 8C shown.

[0098] FIG. 8A to FIG. 8C The illustrated process may also be applied to a process of disposing the second nanorod light emitting device 100G between the second pixel electrode 202G and the second common electrode 203G and a process of disposing the third nanorod light emitting device 100R between the third pixel electrode 202R and the third common electrode 203R.

[0099] Fig. 9 is a cross-sectional view showing a schematic configuration of a nanorod light emitting device according to another exemplary embodiment. Fig. 9, a nanorod light emitting device 100d according to another example embodiment may include a substrate 101, a sacrificial layer 102, a first semiconductor layer 103', a first current channel layer 104, an emission layer 105, a second current channel layer 106, a second semiconductor layer 107, a contact layer 108, and a passivation film 110. The first current channel layer 104 may include a first current blocking layer 104a and a first conductive layer 104b, and the second current channel layer 106 may include a second current blocking layer 106a and a second conductive layer 106b.

[0100] exist Fig. 9 In the nanorod light-emitting device 100d shown, the width or diameter of the substrate 101, the sacrificial layer 102 and the first semiconductor layer 103' is greater than the width or diameter of the other layers. For example, during the manufacturing process, the width or diameter of the first current channel layer 104, the emission layer 105, the second current channel layer 106, the second semiconductor layer 107 and the contact layer 108 is smaller than the width or diameter of the substrate 101, the sacrificial layer 102 and the first semiconductor layer 103'. For example, the contact layer 108, the second semiconductor layer 107, the second current channel layer 106, the emission layer 105 and the first current channel layer 104 can be partially etched and removed to expose a portion of the upper surface of the first semiconductor layer 103'. The first electrode 122 can be further arranged on the exposed upper surface of the first semiconductor layer 103', and the second electrode 121 can be further arranged on the upper surface of the contact layer 108.

[0101] like Fig. 9 As shown, the first sidewalls of the substrate 101, the sacrificial layer 102, the first semiconductor layer 103', the first current channel layer 104, the emitter layer 105, the second current channel layer 106, the second semiconductor layer 107 and the contact layer 108 may be flush with each other in the vertical direction. In addition, the second sidewalls of the substrate 101, the sacrificial layer 102 and the first semiconductor layer 103' (which are opposite to the first sidewalls) may protrude horizontally beyond the second sidewalls of the first current channel layer 104, the emitter layer 105, the second current channel layer 106, the second semiconductor layer 107 and the contact layer 108.

[0102] In this case, the passivation film 110 may be arranged to surround the first sidewalls of the first semiconductor layer 103', the first current channel layer 104, the emission layer 105, the second current channel layer 106, the second semiconductor layer 107, and the contact layer 108 and surround the second sidewalls of the first current channel layer 104, the emission layer 105, the second current channel layer 106, the second semiconductor layer 107, and the contact layer 108. However, the embodiment is not limited thereto. For example, the passivation film 110 may be arranged to surround only a partial region including at least the emission layer 105, such as Figure 4 shown.

[0103] Figure 1 , Figure 3 , Figure 4 , Figure 5 and Figure 6 The nanorod light emitting devices 100, 100a, 100b and 100c shown in FIG. 1 may be arranged to be provided on a substrate and may be connected to two electrodes that are flush with each other and arranged on the substrate, such as Figure 7 As shown. In contrast, Fig. 9 The nanorod light emitting device 100d shown in FIG. 1 can be arranged so that it stands upright on the substrate. To this end, Fig. 9 The width or diameter of the substrate 101, the sacrificial layer 102, and the first semiconductor layer 103' of the nanorod light emitting device 100d shown in FIG. 1 may be, for example, about 30 μm or more.

[0104] The nanorod light emitting device according to the above exemplary embodiments can be applied without limitation to display devices having various sizes and used for various purposes. For example, Figures 10 to 16 1 shows examples of various display devices to which the nanorod light emitting device according to the example embodiment can be applied. The nanorod light emitting device can be applied to Fig.10 The display panel of the mobile phone or smart phone 300 shown in FIG. Fig.11 The display panel of the tablet computer or smart tablet computer 400 shown in FIG. In addition, the nanorod light emitting device according to the example embodiment can be applied to Fig.12 The display panel of the laptop computer 500 shown in FIG. Fig.13 The display panel of the TV or smart TV 600 shown in FIG. Fig.14 and Fig.15 As shown, the nanorod light emitting device can be applied to a small display panel used in a head mounted display (HMD) 700, a glasses type display or a goggle type display 800. In addition, the nanorod light emitting device can be applied to Fig.16 Large display panels, large electronic display boards, movie theater screens, etc. are used in the sign 900 shown.

[0105] Although the nanorod light-emitting device having a centralized current channel structure and the method for manufacturing the same have been described with reference to the example embodiments shown in the accompanying drawings, it should be understood that various other modifications and equivalent embodiments may be made by those skilled in the art. Therefore, the example embodiments disclosed herein should be considered to be illustrative rather than restrictive. The scope of the rights should be defined by the claims rather than the above description, and all differences falling within the same scope as the claims should be interpreted as being included within the scope of the rights.

[0106] It should be understood that the example embodiments described herein should be considered in a descriptive sense only and not for limiting purposes. The description of features or aspects in each example embodiment should generally be considered applicable to other similar features or aspects in other embodiments. Although example embodiments have been described with reference to the accompanying drawings, it will be understood by those of ordinary skill in the art that various changes in form and details may be made without departing from the spirit and scope defined by the claims.

[0107] This application claims the priority of Korean Patent Application No. 10-2020-0074444 filed on June 18, 2020 in the Korean Intellectual Property Office, the disclosure of which is incorporated herein by reference in its entirety.

Claims

1. A nanorod light-emitting device, comprising: A first semiconductor layer doped with first conductivity type impurities; An emission layer, disposed above the first semiconductor layer; A second semiconductor layer, disposed above the emitter layer and doped with second conductive type impurities having opposite electrical properties to the first conductive type impurities; a conductive layer disposed between at least one of: a central portion of a lower surface of the emitting layer and a central portion of an upper surface of the first semiconductor layer; and a central portion of an upper surface of the emitter layer and a central portion of a lower surface of the second semiconductor layer; as well as a current blocking layer surrounding the sidewalls of the conductive layer, The current blocking layer is directly disposed between at least one of: an edge of the lower surface of the emission layer and an edge of the upper surface of the first semiconductor layer; and an edge of the upper surface of the emission layer and an edge of the lower surface of the second semiconductor layer. 2 . The nanorod light-emitting device according to claim 1 , wherein the first semiconductor layer is a single layer including a semiconductor material having a single composition. 3 . The nanorod light-emitting device according to claim 2 , wherein the second semiconductor layer is a single layer including a semiconductor material having the same single composition as the semiconductor material of the first semiconductor layer. The nanorod light emitting device according to claim 1 , wherein the current blocking layer comprises an oxide material.

5. The nanorod light emitting device according to claim 1, wherein the conductive layer comprises: a first conductive layer disposed between the central portion of the lower surface of the emitting layer and the first semiconductor layer; and A second conductive layer is disposed between the central portion of the upper surface of the emission layer and the second semiconductor layer.

6. The nanorod light emitting device according to claim 5, wherein: The current blocking layer comprises: a first current blocking layer surrounding a sidewall of the first conductive layer between the lower surface of the emission layer and the first semiconductor layer; and A second current blocking layer surrounds a side wall of the second conductive layer between the upper surface of the emission layer and the second semiconductor layer.

7. The nanorod light emitting device according to claim 6, wherein the emission layer comprises a first quantum well structure and a second quantum well structure, in, The conductive layer further includes a third conductive layer disposed in a central portion between the first quantum well structure and the second quantum well structure, The current blocking layer further includes a third current blocking layer surrounding a sidewall of the third conductive layer and provided between the first quantum well structure and the second quantum well structure. 8 . The nanorod light emitting device according to claim 1 , wherein a diameter of the first semiconductor layer, a diameter of the current blocking layer, a diameter of the emission layer, and a diameter of the second semiconductor layer are equal to one another. 9 . The nanorod light emitting device according to claim 1 , wherein an outer diameter of the current blocking layer is in the range from 0.05 μm to 2 μm. 10 . The nanorod light emitting device according to claim 9 , wherein a diameter of the conductive layer is greater than or equal to 0.01 μm and smaller than the outer diameter of the current blocking layer. 11 . The nanorod light emitting device according to claim 1 , wherein a height of the nanorod light emitting device is in the range from 1 μm to 20 μm. 12 . The nanorod light-emitting device according to claim 1 , wherein the thickness of the current blocking layer is equal to the thickness of the conductive layer. 13 . The nanorod light emitting device according to claim 12 , wherein the thickness of the current blocking layer is in the range from 5 nm to 200 nm.

14. The nanorod light emitting device according to claim 1, wherein the conductive layer comprises Al x Ga 1-x As, wherein x satisfies x≥0.85, the current blocking layer comprises AlO x , and the first semiconductor layer and the second semiconductor layer both include AlGaInP. 15 . The nanorod light emitting device according to claim 1 , further comprising a passivation film surrounding side surfaces of the current blocking layer and the emission layer.

16. The nanorod light emitting device according to claim 15, wherein the passivation film comprises a material selected from AlO x , HfO x 、TiO x 、SiN x 、SiO x and Al x Ga 1-x At least one material among As, wherein x satisfies x ≥ 0.

9.

17. The nanorod light emitting device of claim 15, wherein the passivation film comprises a material in an epitaxial relationship with the emissive layer to form a heterojunction at an interface between the passivation film and the emissive layer. 18 . The nanorod light emitting device of claim 1 , wherein the current blocking layer, the emission layer, and the second semiconductor layer have the same first diameter, and the first semiconductor layer has a second diameter greater than the first diameter.

19. A display device comprising: a plurality of pixel electrodes; a common electrode corresponding to the plurality of pixel electrodes; as well as A plurality of nanorod light emitting devices according to any one of claims 1 to 18 are connected between each pixel electrode and the common electrode.

20. A method for manufacturing a nanorod light-emitting device, the method comprising: forming a sacrificial layer on a semiconductor substrate; forming a first semiconductor layer doped with first conductivity type impurities on the sacrificial layer; forming an emission layer above the first semiconductor layer; forming a second semiconductor layer doped with second conductive type impurities having opposite electrical properties to the first conductive type impurities above the emitter layer; forming a conductive layer on the first semiconductor layer between forming the first semiconductor layer and forming the emission layer, and / or forming a conductive layer on the emission layer between forming the emission layer and forming the second semiconductor layer; forming a plurality of nanorod light emitting devices by partially etching the first semiconductor layer, the emission layer, the second semiconductor layer and the conductive layer; as well as By oxidizing the side wall of the conductive layer through an oxidation process, a current blocking layer is formed around the side wall of the remaining conductive layer, so that the conductive layer is arranged between at least one of a central part of the lower surface of the emission layer and a central part of the upper surface of the first semiconductor layer and between a central part of the upper surface of the emission layer and a central part of the lower surface of the second semiconductor layer, and the current blocking layer is directly arranged between at least one of an edge of the lower surface of the emission layer and an edge of the upper surface of the first semiconductor layer and between an edge of the upper surface of the emission layer and an edge of the lower surface of the second semiconductor layer.

21. The method of claim 20, wherein the first semiconductor layer comprises a semiconductor material having a single composition, and The second semiconductor layer includes a semiconductor material having the same single component as the semiconductor material of the first semiconductor layer. 22 . The method of claim 20 , wherein a diameter of the first semiconductor layer, a diameter of the current blocking layer, a diameter of the emission layer, and a diameter of the second semiconductor layer are equal to one another.

23. The method of claim 20, wherein an outer diameter of the current blocking layer ranges from 0.05 μm to 2 μm. 24 . The method of claim 23 , wherein a diameter of the remaining conductive layer is greater than or equal to 0.01 μm and smaller than the outer diameter of the current blocking layer.

25. The method of claim 20, wherein the height of the nanorod light emitting device is in the range from 1 μm to 20 μm.

26. The method of claim 20, wherein a thickness of the current blocking layer is in a range from 5 nm to 200 nm.

27. The method of claim 20, wherein the conductive layer comprises Al x Ga 1-x As, wherein x satisfies x≥0.85, the current blocking layer comprises AlO x , and the first semiconductor layer and the second semiconductor layer both include AlGaInP. 28 . The method of claim 20 , further comprising forming a passivation film surrounding side surfaces of the current blocking layer and the emission layer.

29. The method according to claim 28, wherein the passivation film comprises a material selected from AlO x , HfO x 、TiO x 、SiN x 、SiO x and Al x Ga 1-x At least one material among As, wherein x satisfies x ≥ 0.

9.

30. The method of claim 28, wherein the passivation film comprises a material in an epitaxial relationship with the emissive layer to form a heterojunction in an interface between the passivation film and the emissive layer.

31. The method of claim 28, wherein the plurality of nanorod light emitting devices are separated from each other by removing the sacrificial layer.

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