Packet capture method, device, hardware accelerator and medium based on hardware accelerator

Abstract

The present invention provides a packet capture method, device, hardware accelerator and medium based on a hardware accelerator, the method is applied to the hardware accelerator, the hardware accelerator communicates with a network device through a port of the hardware accelerator, the method comprises: obtaining test configuration information, the test configuration information comprises a target port; according to the test configuration information, when a data packet from the network device is received through the target port, the data packet received on the target port is captured, and debugging information of the data packet is recorded. Because the data packets sent and received by the network device will all pass through the hardware accelerator, when the hardware accelerator is used to capture the packets, there will be no log loss, and the timestamp is unified.

Description

Technical Field

[0001] The present invention relates to the field of communication technology, and in particular to a packet capture method, device, hardware accelerator and medium based on a hardware accelerator. Background Art

[0002] With the advent of the 5G era, the requirements for network bandwidth are getting higher and higher. In the rate test of the 5G era, due to the high-speed scenario and the fact that the entire data path on the integrated circuit is very long in both software and hardware, packet loss is inevitable. However, debugging the packet loss problem is difficult. It is impossible to locate whether the packet loss occurs at the sending end or the receiving end, and it is even more impossible to locate which module in the path has a problem.

[0003] Currently, packet capture is mainly performed on the application processor (AP) side or the communication processor (CP) side, and the received network data packets are cached locally on the AP or CP. However, this has the following disadvantages: log loss may occur. On the one hand, due to the lack of logs, multiple retests are required, and the problem may not even be reproduced. On the other hand, packet capture will seriously affect the operating rate of the AP or CP side.

[0004] To this end, the present invention proposes a packet capture method, device, hardware accelerator and medium based on a hardware accelerator to improve the above-mentioned problem. Summary of the invention

[0005] The embodiment of the present invention provides a packet capture method, device, hardware accelerator and medium based on a hardware accelerator, and the method is used to avoid log loss.

[0006] In a first aspect, the present invention provides a packet capture method based on a hardware accelerator, the method is applied to a hardware accelerator, the hardware accelerator communicates with a network device through a port of the hardware accelerator, the method comprising: obtaining test configuration information, the test configuration information comprising a target port; according to the test configuration information, when a data packet from the network device is received through the target port, capturing the data packet received on the target port and recording debugging information of the data packet.

[0007] The packet capture method provided by the present invention has the beneficial effect that, because all data packets received and sent by the network device will pass through the hardware accelerator, when the packet is captured by the hardware accelerator, there will be no log loss, and the timestamp is unified. This is conducive to reproducing the fault scene, and on the other hand, it can also solve the problem that the operation efficiency of the AP or CP is affected by packet capture on the AP or CP side.

[0008] Optionally, the test configuration information also includes a target length of a data packet to be captured; and capturing the data packet received on the target port includes: capturing the data packet of the target length received on the target port. The beneficial effect is that: by including the target length of the data packet to be captured in the test configuration information, and capturing the data packet of the target length received on the target port, the test capture can be completed according to actual test requirements, and unnecessary data packets and debugging information can be effectively filtered out.

[0009] Optionally, the method further includes: copying the data packet and the debugging information of the data packet to an application processor AP or a memory. The beneficial effect is that by copying the data packet and the debugging information of the data packet to an application processor (AP) or a memory, it is convenient for other network devices to obtain the debugging information from the memory, so as to analyze whether the data packets received and sent locally are lost.

[0010] Optionally, before obtaining the test configuration information, it also includes: receiving a test configuration instruction from a tester; configuring the target port and the target length of the data packet to be captured in the debugging general queue according to the test configuration instruction; and obtaining the test configuration information includes: obtaining the test configuration information from the debugging general queue. Its beneficial effect is that by receiving the test configuration instruction set in advance by the tester, the target port and the target length of the data packet to be captured are configured, so that the data packet received on the target port can be captured, and the debugging general queue can be a first-in-first-out queue, so that the data packets can be captured in chronological order without being disrupted.

[0011] Optionally, the debugging information of the data packet includes at least one of a source identifier of the data packet, a timestamp of the data packet, and a length of the data packet. The beneficial effect is that the source of the data packet is determined by the source identifier of the data packet; and the timestamp is unified.

[0012] Optionally, the network device is a network device supporting a cellular network, a network device supporting USB, a network device supporting wireless fidelity WiFi, or a network device supporting Ethernet. The beneficial effect is that the hardware accelerator can be connected to a variety of network devices in actual applications, so the application scope of the present invention can be one or more of a cellular network device, a USB network device, a wireless fidelity (WiFi) network device, or an Ethernet network device.

[0013] In a second aspect, the present invention provides a packet capture device based on a hardware accelerator, the device comprising modules / units for executing any possible design method of the first aspect above. These modules / units can be implemented by hardware, or by executing corresponding software implementations by hardware.

[0014] In a third aspect, an embodiment of the present application provides a hardware accelerator, including a processor and a memory. The memory is used to store one or more computer programs; when the one or more computer programs stored in the memory are executed by the processor, the electronic device can implement any possible design method of the first aspect.

[0015] In a fourth aspect, the present invention provides a computer-readable storage medium, in which a computer program is stored. When the computer program is executed by a processor, the method as described in any one of the above embodiments is implemented.

[0016] In a fifth aspect, an embodiment of the present application further provides a computer program product, which, when executed on an electronic device, enables the electronic device to execute any possible design method of any of the above aspects.

[0017] For the beneficial effects of the second to fifth aspects, reference may be made to the description of the first aspect. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] Figure 1 A schematic diagram of a connection between a hardware accelerator and a network device provided in an embodiment of the present application;

[0019] Figure 2 A flowchart of a packet capture method based on a hardware accelerator provided in an embodiment of the present application;

[0020] Figure 3 A schematic diagram of a packet capture device based on a hardware accelerator provided in an embodiment of the present application;

[0021] Figure 4 A schematic diagram of an electronic device provided in an embodiment of the present application. DETAILED DESCRIPTION

[0022] The technical solutions in the embodiments of the present application are described below in conjunction with the drawings in the embodiments of the present application. Among them, in the description of the embodiments of the present application, the terms used in the following embodiments are only for the purpose of describing specific embodiments, and are not intended to be used as limitations on the present application. As used in the specification and the appended claims of the present application, the singular expressions "a", "the", "above", "the" and "this" are intended to also include expressions such as "one or more", unless there is a clear indication to the contrary in the context. It should also be understood that in the following embodiments of the present application, "at least one", "one or more" refer to one or more (including two). The term "and / or" is used to describe the association relationship of associated objects, indicating that three relationships can exist; for example, A and / or B can represent: A exists alone, A and B exist at the same time, and B exists alone, where A and B can be singular or plural. The character " / " generally indicates that the associated objects before and after are in a "or" relationship.

[0023] References to "one embodiment" or "some embodiments" etc. described in this specification mean that one or more embodiments of the present application include specific features, structures or characteristics described in conjunction with the embodiment. Thus, the statements "in one embodiment", "in some embodiments", "in some other embodiments", "in some other embodiments", etc. that appear in different places in this specification do not necessarily refer to the same embodiment, but mean "one or more but not all embodiments", unless otherwise specifically emphasized in other ways. The terms "including", "comprising", "having" and their variations all mean "including but not limited to", unless otherwise specifically emphasized in other ways. The term "connection" includes direct connection and indirect connection, unless otherwise specified. "First" and "second" are used for descriptive purposes only and cannot be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated.

[0024] In the embodiments of the present application, the words "exemplarily" or "for example" are used to indicate examples, illustrations or explanations. Any embodiment or design described as "exemplarily" or "for example" in the embodiments of the present application should not be interpreted as being more preferred or more advantageous than other embodiments or designs. Specifically, the use of words such as "exemplarily" or "for example" is intended to present related concepts in a specific way.

[0025] The embodiment of the present application provides an architecture diagram of a hardware accelerator connecting multiple network devices, such as Figure 1As described, the hardware accelerator communicates with the network device through the port of the hardware accelerator. The port of the hardware accelerator 101 is connected to multiple network devices. Considering that data transmission currently mainly relies on cellular networks, USB, wireless fidelity WiFi and Ethernet, the network devices that support packet capture include but are not limited to: network devices 102 that support cellular networks, network devices 103 that support USB, network devices 104 that support wireless fidelity WiFi, or network devices 105 that support Ethernet. Exemplarily, the hardware accelerator can be a hardware accelerator for Internet Protocol (IP) data packets, referred to as IPA.

[0026] based on Figure 1 The architecture diagram provided, the present invention provides a packet capture method based on a hardware accelerator, the method is applied to a hardware accelerator, such as Figure 2 As shown, the method comprises the following steps:

[0027] S201, obtaining test configuration information.

[0028] In this step, the test configuration information includes a target port, which may be one or more. Optionally, the test configuration information may also include a target length of the data packet to be captured. The target port and length may be manually configured by the tester.

[0029] S202, according to the test configuration information, when receiving a data packet from the network device through the target port, capturing the data packet received on the target port.

[0030] In this step, because all data packets sent and received by the network device will pass through the hardware accelerator, there will be no log loss when the hardware accelerator is used to capture packets, and the timestamps are unified.

[0031] S203, record debugging information of the data packet.

[0032] In this step, by recording the debugging information of the data packet, it is helpful to reproduce the fault site, and on the other hand, it can also solve the problem that the operation efficiency of the AP or CP is affected by capturing packets on the AP or CP side.

[0033] In some possible embodiments, the test configuration information also includes the target length of the data packet to be captured; and the data packet received on the target port is captured, including: the data packet of the target length is captured on the target port. Because the data packet is composed of two parts, the header and the data. The first part of the header is a fixed length, the length of the data can be set according to the actual situation, and the information content contained in the same data packet of different lengths is also different. Therefore, by including the target length of the data packet to be captured in the test configuration information, and capturing the data packet of the target length received on the target port, the test capture can be completed according to the actual test requirements, and unnecessary data packets and debugging information can be effectively filtered out.

[0034] In some other possible embodiments, the method further includes: copying the data packet and the debugging information of the data packet to the application processor AP or the memory. Because by copying the data packet and the debugging information of the data packet to the application processor AP or the memory, it is convenient for other network devices to obtain the debugging information from the memory, so as to analyze whether the data packets received and sent locally are lost.

[0035] In some possible embodiments, before obtaining the test configuration information, it also includes: receiving the test configuration instruction of the tester; according to the test configuration instruction, configuring the target port and the target length of the data packet to be captured into the debug common fifo; the hardware accelerator is responsible for reading and maintaining the debug common fifo, thereby obtaining the test configuration information from the debug common fifo. Optionally, for the scenario where the debug common fifo cannot be written, the message that cannot be written is discarded, and the number of discarded messages is counted and recorded in the register. In addition, the packet capture method provided by the present invention also supports pause (pause) and reset (resume) functions, and the pause function refers to allowing the test to be paused at any time during the packet capture process, and then modifying the length of the data packet to be captured, that is, allowing the memory descriptor in the queue to be updated at the same time. In this way, the tester configures the test configuration information through the software, and then the hardware accelerator configures the target port and the target length of the data packet to be captured by receiving the test configuration instructions set in advance by the tester, so as to facilitate the capture of the data packets received on the target port, and the debugging general queue can be a first-in-first-out queue, so that the data packets can be captured in chronological order without being disrupted.

[0036] In some further possible embodiments, the debugging information of the data packet includes at least one of a source identifier of the data packet, a timestamp of the data packet, and a length of the data packet. Determining the source of the data packet by the source identifier of the data packet helps to distinguish the source of the data packet. Exemplarily, the accuracy of the timestamp of each message is 1us, which is very helpful for locating the time point of the problem later.

[0037] In some embodiments of the present invention, the present application embodiment provides a packet capture device 300 based on a hardware accelerator, such as Figure 3 As shown, the device is applied to a hardware accelerator, and the hardware accelerator communicates with a network device through a port of the hardware accelerator, and includes: an acquisition unit 301, a packet capture unit 302 and a debugging unit 303.

[0038] The acquisition unit 301 is used to acquire test configuration information, where the test configuration information includes a target port.

[0039] The packet capturing unit 302 is configured to capture the data packets received on the target port when receiving the data packets from the network device through the target port according to the test configuration information.

[0040] The debugging unit 303 is used to record debugging information of the data packet.

[0041] Optionally, the device further comprises a data moving unit 304, configured to copy the data packet and the debugging information of the data packet to an application processor AP or a memory.

[0042] All relevant contents of each step involved in the above method embodiment can be referred to the functional description of the corresponding unit module, and will not be repeated here.

[0043] In some other embodiments of the present application, the present application embodiment discloses an electronic device 400, such as Figure 4 As shown, the electronic device 400 may include: one or more processors 401; a memory 402; a display 403; one or more applications (not shown); and one or more computer programs 404, and the above components may be connected via one or more communication buses 405. The one or more computer programs 404 are stored in the above memory 402 and are configured to be executed by the one or more processors 401, and the one or more computer programs 404 include instructions, which may be used to execute the various steps in the above embodiments.

[0044] Through the description of the above implementation methods, technicians in the relevant field can clearly understand that for the convenience and simplicity of description, only the division of the above functional modules is used as an example. In actual applications, the above functions can be assigned to different functional modules as needed, that is, the internal structure of the device is divided into different functional modules to complete all or part of the functions described above. The specific working process of the system, device and unit described above can refer to the corresponding process in the aforementioned method embodiment, and will not be repeated here.

[0045] Each functional unit in each embodiment of the present application can be integrated into a processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit. The above integrated unit can be implemented in the form of hardware or in the form of software functional units.

[0046] If the integrated unit is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the embodiment of the present application is essentially or the part that contributes to the prior art or all or part of the technical solution can be embodied in the form of a software product, and the computer software product is stored in a storage medium, including a number of instructions to enable a computer device (which can be a personal computer, a server, or a network device, etc.) or a processor to perform all or part of the steps of the method of each embodiment of the present application. The aforementioned storage medium includes: various media that can store program codes, such as flash memory, mobile hard disk, read-only memory, random access memory, disk or optical disk.

[0047] The above is only a specific implementation of the embodiment of the present application, but the protection scope of the embodiment of the present application is not limited thereto, and any changes or replacements within the technical scope disclosed in the embodiment of the present application should be included in the protection scope of the embodiment of the present application. Therefore, the protection scope of the embodiment of the present application should be based on the protection scope of the claim.

Claims

1. A packet capture method based on a hardware accelerator, the method is applied to a hardware accelerator, the hardware accelerator communicates with a network device through a port of the hardware accelerator, characterized in that: The data packets received and sent by the network device pass through the hardware accelerator, and the method is used to capture the data packets received and sent by the network device, and the method includes: Acquire test configuration information, wherein the test configuration information includes a target port; According to the test configuration information, when a data packet is received from the network device through the target port, the data packet received on the target port is captured and debugging information of the data packet is recorded.

2. The method according to claim 1, characterized in that The test configuration information also includes a target length of the data packet to be captured; Capturing the data packets received on the target port includes: Capture the data packets of the target length received on the target port.

3. The method according to claim 1 or 2, characterized in that: The method further comprises: The data packet and the debugging information of the data packet are copied to an application processor AP or a memory.

4. The method according to claim 1 or 2, characterized in that: Before obtaining the test configuration information, the method further includes: Receive test configuration instructions from testers; According to the test configuration instruction, configure the target port and the target length of the data packet to be captured into the debugging general queue; The obtaining of test configuration information includes: The test configuration information is obtained from the debugging general queue.

5. The method according to claim 1 or 2, characterized in that: The debugging information of the data packet includes at least one of a source identifier of the data packet, a timestamp of the data packet, and a length of the data packet.

6. The method according to claim 1, characterized in that The network device is a network device supporting a cellular network, a network device supporting USB, a network device supporting Wireless Fidelity WiFi, or a network device supporting Ethernet.

7. A packet capture device based on a hardware accelerator, the device is applied to a hardware accelerator, the hardware accelerator communicates with a network device through a port of the hardware accelerator, characterized in that: The data packets received and sent by the network device pass through the hardware accelerator, and the device is used to capture the data packets received and sent by the network device, and the device includes: an acquisition unit, a capture unit and a recording unit; The acquisition unit is used to acquire test configuration information, wherein the test configuration information includes a target port; The packet capture unit is used to capture the data packets received on the target port when receiving the data packets from the network device through the target port according to the test configuration information; The recording unit is used to record the debugging information of the data packet.

8. The device according to claim 7, characterized in that The packet capture unit is used for: Capturing the data packets received on the target port includes: Capture the data packets of the target length received on the target port.

9. The device according to claim 7, characterized in that The device further includes a data moving unit, configured to copy the data packet and the debugging information of the data packet to an application processor AP or a memory.

10. The device according to claim 7 or 8, characterized in that In the acquisition unit, it is used to: Receive test configuration instructions from testers; According to the test configuration instruction, configure the target port and the target length of the data packet to be captured into the debugging general queue; The obtaining of test configuration information includes: The test configuration information is obtained from the debugging general queue.

11. The device according to claim 7 or 8, characterized in that The debugging information of the data packet includes at least one of a source identifier of the data packet, a timestamp of the data packet, and a length of the data packet.

12. The device according to claim 7, characterized in that The network device is a network device supporting a cellular network, a network device supporting USB, a network device supporting Wireless Fidelity WiFi, or a network device supporting Ethernet.

13. A hardware accelerator, characterized in that: The method comprises a memory and a processor, wherein the memory stores a computer program executable on the processor, and when the computer program is executed by the processor, the processor implements the method according to any one of claims 1 to 6.

14. A computer-readable storage medium, wherein a computer program is stored in the computer-readable storage medium, characterized in that: When the computer program is executed by a processor, the method according to any one of claims 1 to 6 is implemented.

Images