Solid-state imaging element and method for manufacturing the same

Abstract

This solid-state imaging element is provided with: a photodiode; a semiconductor substrate including a floating diffusion; a capacitor having a PD-side electrode arranged on a surface opposite to the light incident surface of the photodiode, and an anti-PD-side electrode facing the PD-side electrode via a dielectric film; an amplifier transistor; and an FD-side wiring electrode for connecting the floating diffusion and the amplifier transistor. At least a portion of the PD-side electrode and the FD-side wiring electrode are formed in the semiconductor substrate in a shape extending along the thickness direction of the semiconductor substrate. One end of a first contact hole, in which at least a portion of the PD-side electrode is formed, and one end of a second contact hole, in which the FD-side wiring electrode is formed, are located on the surface of the semiconductor substrate opposite to the photodiode side.

Description

Technical Field

[0001] The technology according to the present disclosure (the present technology) relates to, for example, a back-illuminated solid-state imaging element and a method of manufacturing the solid-state imaging element. Background Art

[0002] In a configuration where a capacitor is provided on a back-illuminated solid-state imaging element, for example, a capacitor having an MIS (metal-insulator-silicon) structure is formed below the photodiode relative to incident light. However, with a configuration including a capacitor having an MIS structure, as the area of ​​the photodiode decreases due to the miniaturization of solid-state imaging elements, the area available for arranging the capacitor also decreases. In this case, it becomes difficult to secure the required area for the capacitor to achieve the desired capacitance.

[0003] In these circumstances, for example, the technology disclosed in Patent Document 1 has been developed. This technology stacks a first semiconductor substrate, on which photodiodes and other components are formed, and a second semiconductor substrate, on which pixel transistors are formed. In this configuration, trench capacitors are provided on the second semiconductor substrate. The technology disclosed in Patent Document 1 does not result in a reduction in area, thus ensuring sufficient area for the capacitors.

[0004] Reference List

[0005] Patent Literature

[0006] Patent Document 1: JP 2015-50463 A Summary of the Invention

[0007] Technical issues

[0008] However, according to the technology disclosed in Patent Document 1, a solid-state imaging element is manufactured by forming trench capacitors on a second semiconductor substrate and then laminating the first and second semiconductor substrates. This requires a large number of dedicated steps to form the trench capacitors, thus increasing the number of steps required for manufacturing.

[0009] The present technology has been developed in view of the above-mentioned problems. An object of the present technology is to provide a solid-state imaging element capable of reducing the number of steps required for manufacturing, and a method for manufacturing the solid-state imaging element.

[0010] Solutions to technical problems

[0011] A solid-state imaging element according to one aspect of the present technology includes a semiconductor substrate, a capacitor, an amplifier transistor, and an FD-side wiring electrode. The semiconductor substrate includes a photodiode and a floating diffusion. The photodiode is configured to photoelectrically convert incident light, and signal charge accumulated in the photodiode is transferred to the floating diffusion. The capacitor includes a PD-side electrode disposed on the surface of the photodiode opposite to the surface on which light is incident, and an anti-PD-side electrode facing the PD-side electrode with a dielectric film sandwiched between the PD-side electrode and the anti-PD-side electrode. The amplifier transistor reads the signal charge transferred as an electrical signal to the floating diffusion and amplifies the signal charge. The FD-side wiring electrode connects the floating diffusion and the amplifier transistor. Furthermore, at least a portion of the PD-side electrode and the FD-side wiring electrode are formed in the semiconductor substrate in a shape extending along the thickness direction of the semiconductor substrate. Furthermore, one end of a first contact hole, in which at least a portion of the PD-side electrode is formed, and one end of a second contact hole, in which the FD-side wiring electrode is formed, are both located on the surface of the semiconductor substrate opposite to the photodiode.

[0012] According to one aspect of the present technology, a method for manufacturing a solid-state imaging element includes forming a photodiode and a floating diffusion on a semiconductor substrate. The photodiode is configured to photoelectrically convert incident light, and signal charge accumulated in the photodiode is transferred to the floating diffusion. The method also includes forming a capacitor, the capacitor comprising a PD-side electrode arranged on a surface of the photodiode opposite to the surface on which the light is incident, and an anti-PD-side electrode facing the PD-side electrode with a dielectric film interposed therebetween. The method also includes forming an amplifier transistor that reads and amplifies the signal charge transferred as an electrical signal to the floating diffusion. Furthermore, the capacitor formation step includes simultaneously forming a first contact hole and a second contact hole in the semiconductor substrate, the first contact hole forming at least a portion of the PD-side electrode, and the second contact hole forming an FD-side wiring electrode connecting the floating diffusion and the amplifier transistor, the first and second contact holes being formed to extend in the thickness direction of the semiconductor substrate; and simultaneously forming the FD-side wiring electrode and the PD-side electrode.

[0013] According to one aspect of the present technology, a method for manufacturing a solid-state imaging element includes forming a photodiode and a floating diffusion on a semiconductor substrate. The photodiode is configured to photoelectrically convert incident light, and signal charge accumulated in the photodiode is transferred to the floating diffusion. The method also includes forming a capacitor, the capacitor comprising a PD-side electrode provided on a surface of the photodiode opposite to the surface on which the light is incident, and an anti-PD-side electrode facing the PD-side electrode with a dielectric film interposed therebetween. The method also includes forming an amplifier transistor that reads the signal charge transferred as an electrical signal to the floating diffusion and amplifies the signal charge. Furthermore, the capacitor formation step includes simultaneously forming a first contact hole and a second contact hole in the semiconductor substrate. The first contact hole includes forming at least a portion of the PD-side electrode, and the second contact hole includes forming an FD-side wiring electrode connecting the floating diffusion and the amplifier transistor. The first and second contact holes are formed to extend along the thickness direction of the semiconductor substrate.

[0014] A method for manufacturing a solid-state imaging element according to one aspect of the present technology includes the steps of forming a photodiode and a floating diffusion on a semiconductor substrate, the photodiode being configured to photoelectrically convert incident light, and signal charge accumulated in the photodiode being transferred to the floating diffusion. The method also includes the step of forming a capacitor, the capacitor including a PD-side electrode arranged on the surface of the photodiode opposite to the surface on which the light is incident, and an anti-PD-side electrode facing the PD-side electrode via a dielectric film, the dielectric film being sandwiched between the PD-side electrode and the anti-PD-side electrode. In addition, the method includes the step of forming an amplifier transistor that reads the signal charge transferred as an electrical signal to the floating diffusion and amplifies the signal charge. Furthermore, the method includes the steps of simultaneously forming a PD-side electrode in a first contact hole and an FD-side wiring electrode in a second contact hole, at least a portion of the PD-side electrode being formed inside the first contact hole, and the FD-side wiring electrode connecting the floating diffusion and the amplifier transistor and formed inside the second contact hole. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] Figure 1 It is a plan view showing the configuration of a first semiconductor substrate included in the solid-state imaging element according to the first embodiment.

[0016] Figure 2 It is a plan view showing the configuration of a second semiconductor substrate included in the solid-state imaging element according to the first embodiment.

[0017] Figure 3 is a circuit diagram showing an equivalent circuit of the solid-state imaging element according to the first embodiment.

[0018] Figure 4 For the Figure 2 Cross-sectional view taken along line IV-IV.

[0019] Figure 5 2 is a cross-sectional view illustrating a method for manufacturing a solid-state imaging element according to the first embodiment.

[0020] Figure 6 2 is a cross-sectional view illustrating a method for manufacturing a solid-state imaging element according to the first embodiment.

[0021] Figure 7 2 is a cross-sectional view illustrating a method for manufacturing a solid-state imaging element according to the first embodiment.

[0022] Figure 8 2 is a cross-sectional view illustrating a method for manufacturing a solid-state imaging element according to the first embodiment.

[0023] Figure 9 2 is a cross-sectional view illustrating a method for manufacturing a solid-state imaging element according to the first embodiment.

[0024] Figure 10 2 is a cross-sectional view illustrating a method for manufacturing a solid-state imaging element according to the first embodiment.

[0025] Figure 11 is a cross-sectional view showing the configuration of a semiconductor device according to a second embodiment.

[0026] Figure 12 is a cross-sectional view showing the configuration of a semiconductor device according to a third embodiment.

[0027] Figure 13 is a cross-sectional view showing the configuration of a semiconductor device according to a fourth embodiment.

[0028] Figure 14 is a cross-sectional view showing the configuration of a semiconductor device according to a fifth embodiment.

[0029] Figure 15 2 is a cross-sectional view illustrating a method for manufacturing a solid-state imaging element according to the fifth embodiment.

[0030] Figure 16 2 is a cross-sectional view illustrating a method for manufacturing a solid-state imaging element according to the fifth embodiment.

[0031] Figure 17 2 is a cross-sectional view illustrating a method for manufacturing a solid-state imaging element according to the fifth embodiment.

[0032] Figure 182 is a cross-sectional view illustrating a method for manufacturing a solid-state imaging element according to the fifth embodiment.

[0033] Figure 19 2 is a cross-sectional view illustrating a method for manufacturing a solid-state imaging element according to the fifth embodiment.

[0034] Figure 20 2 is a cross-sectional view illustrating a method for manufacturing a solid-state imaging element according to the fifth embodiment.

[0035] Figure 21 2 is a cross-sectional view illustrating a method for manufacturing a solid-state imaging element according to the fifth embodiment.

[0036] Figure 22 2 is a cross-sectional view illustrating a method for manufacturing a solid-state imaging element according to the fifth embodiment.

[0037] Figure 23 is a cross-sectional view showing the configuration of a solid-state image pickup element according to a sixth embodiment.

[0038] Figure 24 2 is a cross-sectional view illustrating a method for manufacturing a solid-state imaging element according to the sixth embodiment.

[0039] Figure 25 is a cross-sectional view showing the configuration of a solid-state image pickup element according to a seventh embodiment.

[0040] Figure 26 2 is a cross-sectional view illustrating a method for manufacturing a solid-state imaging element according to the seventh embodiment.

[0041] Figure 27 It is a cross-sectional view showing an example of an image pickup device in the first application example of the present technology.

[0042] Figure 28 2 is a cross-sectional view illustrating an example of an electronic arrangement in a second application example of the present technology.

[0043] Figure 29 is a block diagram showing an example of a schematic configuration of a vehicle control system.

[0044] Figure 30 A diagram to assist in explaining an example of the installation positions of the vehicle exterior information detection unit and the imaging unit.

[0045] Figure 31 A diagram showing an example of a schematic configuration of an endoscopic surgery system.

[0046] Figure 32 is a block diagram illustrating an example of the functional configuration of a camera head and a camera control unit (CCU). DETAILED DESCRIPTION

[0047] The following will describe embodiments of the present technology with reference to the accompanying drawings. In the description of the drawings, the same or similar parts are given the same or similar figure marks, and repeated explanations are omitted. The various drawings are schematic diagrams and may include places that are different from the actual ones. The embodiments described below all present devices and methods for embodying the technical ideas of the present technology by way of example. Therefore, the technical ideas of the present technology are not limited to the devices and methods presented in the embodiments described below by way of example. The technical ideas of the present technology can be modified in various ways within the technical scope described in the claims.

[0048] (First embodiment)

[0049] <Overall Structure of Solid-State Image Sensor>

[0050] For example, the solid-state imaging element according to the first embodiment is a back-illuminated solid-state imaging element.

[0051] like Figures 1 to 4 As shown, the solid-state imaging element has a semiconductor substrate including a first semiconductor substrate 101 and a second semiconductor substrate 102 .

[0052] The first semiconductor substrate 101 is a substrate provided with a pixel circuit including a photodiode 110 and a floating diffusion 111 .

[0053] The second semiconductor substrate 102 is stacked on the surface of the first semiconductor substrate 101 on the side opposite to the photodiode 110 side ( Figure 4 Note that Figure 2 The second semiconductor substrate 102NP of an adjacent pixel is shown.

[0054] The fifth electrode 163 is formed on a surface of the second semiconductor substrate 102 on the side opposite to the surface facing the first semiconductor substrate 101 ( Figure 4 on the upper surface of the ).

[0055] For example, the fifth electrode 163 is formed using a polysilicon film, and the fifth electrode 163 constitutes a wiring forming an equivalent circuit of the solid-state imaging element.

[0056] The photodiode 110 photoelectrically converts incident light, and generates and accumulates charges corresponding to the amount of photoelectrically converted light.

[0057] One end of the photodiode 110 is grounded, and the other end of the photodiode 110 is connected to a source electrode of the transfer transistor 112 .

[0058] The floating diffusion 111 is formed at a point (connection point) where the drain electrode of the transfer transistor 112 , the source electrode of the switch transistor 115 , and the gate electrode of the amplification transistor 114 are connected.

[0059] Furthermore, the floating diffusion 111 accumulates the charge transferred from the photodiode 110 via the transfer transistor 112 and converts the charge into a voltage. In other words, the signal charge accumulated in the photodiode 110 is transferred to the floating diffusion 111 .

[0060] The transfer transistor 112 is provided between the photodiode 110 and the floating diffusion 111. A drain electrode of the transfer transistor 112 is connected to a source electrode of the switching transistor 115 and a gate electrode of the amplifying transistor 114.

[0061] Furthermore, the transfer transistor 112 turns on or off the transfer of charges from the photodiode 110 to the floating diffusion 111 in accordance with a drive signal supplied to a gate electrode from a timing control unit (not shown).

[0062] The switch transistor 115 is provided between the floating diffusion 111 and the reset transistor 113 . A drain electrode of the switch transistor 115 is connected to a source electrode of the reset transistor 113 and the capacitor 120 .

[0063] Furthermore, the switching transistor 115 turns on or off the transfer of charges from the capacitor 120 to the floating diffusion 111 in accordance with a switching signal supplied to a gate electrode from a switching control unit (not shown).

[0064] The capacitor 120 has a PD-side electrode 130 , a dielectric film 140 , and a counter PD-side electrode 150 .

[0065] The PD-side electrode 130 is an electrode arranged on a surface of the photodiode 110 on the opposite side to the surface from which light enters.

[0066] The counter PD-side electrode 150 is an electrode facing the PD-side electrode 130 via the dielectric film 140 , and the dielectric film 140 is sandwiched between the counter PD-side electrode 150 and the PD-side electrode 130 .

[0067] Furthermore, the capacitor 120 includes a first capacitor portion 121 and a second capacitor portion 122 .

[0068] The first capacitor portion 121 is a capacitor formed in a first capacitor region pre-defined in the first semiconductor substrate 101 .

[0069] The first capacitor region is defined at a position different from that of the floating diffusion 111 in the first semiconductor substrate 101 .

[0070] The first capacitor portion 121 has a first electrode 131 , a first dielectric film 141 , and a second electrode 151 .

[0071] The first electrode 131 is an electrode disposed on a surface of the photodiode 110 on the opposite side from the surface on which light is incident in the first capacitor region. The first electrode 131 and the floating diffusion 111 are provided separately from each other.

[0072] In addition, the first electrode 131 is formed by using phosphorus or arsenic ion implanted in the first capacitor region.

[0073] The first dielectric film 141 is stacked on the first electrode 131 .

[0074] In addition, the first dielectric film 141 is formed by using a silicon oxide film.

[0075] The second electrode 151 is stacked on the first dielectric film 141 .

[0076] In addition, the second electrode 151 is formed by using a polysilicon film.

[0077] The second capacitor portion 122 is a capacitor provided on a surface of the first capacitor portion 121 on the side opposite to the photodiode 110 side.

[0078] The second capacitor portion 122 has a third electrode 132 , a second dielectric film 142 , and a fourth electrode 152 .

[0079] The third electrode 132 is included in the PD-side electrode 130 and has one end connected to the second electrode 151 ( Figure 4 Columnar electrode at the lower part).

[0080] The third electrode 132 is formed using a high melting point metal such as tungsten, titanium nitride, cobalt, or ruthenium. Note that the high melting point metal is, for example, a metal having a melting point higher than that of iron.

[0081] In addition, the third electrode 132 is disposed in the first contact hole 160 .

[0082] The first contact hole 160 is a void portion formed in the semiconductor substrate (the first semiconductor substrate 101 and the second semiconductor substrate 102 ) and shaped to extend in the thickness direction of the semiconductor substrate.

[0083] Therefore, the third electrode 132 included in the PD side electrode 130 is disposed within the first contact hole 160. Specifically, at least a portion of the PD side electrode 130 is formed inside the first contact hole 160. In addition, the PD side electrode 130 is formed in the semiconductor substrate in a shape extending in the thickness direction of the semiconductor substrate.

[0084] In addition, a portion of the third electrode 132 included in the PD-side electrode 130 is formed inside the first semiconductor substrate 101 , and the remaining portion of the third electrode 132 is formed inside the second semiconductor substrate 102 .

[0085] In addition, a portion of the first contact hole 160 is formed inside the first semiconductor substrate 101 , and the remaining portion of the first contact hole 160 is formed inside the second semiconductor substrate 102 .

[0086] The second dielectric film 142 is included in the dielectric film 140 and covers a portion of the third electrode 132 (a side surface and an upper surface of the third electrode 132 ) except for a connection portion between the third electrode 132 and the second electrode 151 .

[0087] Therefore, a portion of the second dielectric film 142 is formed inside the first semiconductor substrate 101 , and the remaining portion of the second dielectric film 142 is formed inside the second semiconductor substrate 102 .

[0088] In addition, the second dielectric film 142 is formed by using a ferroelectric film.

[0089] Examples of the ferroelectric films that can be used include a stacked film of an oxide film and a nitride film, a stacked film of an oxide film and a tantalum pentoxide film, a stacked film of a nitride film and a tantalum pentoxide film, a stacked film of an oxide film, a nitride film and a tantalum pentoxide film, hafnium and hafnium alloy materials, BST and PZT, etc.

[0090] The fourth electrode 152 is an electrode included in the counter PD-side electrode 150 and faces the third electrode 132 via the second dielectric film 142 , which is sandwiched between the fourth electrode 152 and the third electrode 132 .

[0091] Furthermore, similarly to the third electrode 132 , the fourth electrode 152 is formed by using a high melting point metal such as tungsten, titanium nitride, cobalt, and ruthenium.

[0092] Furthermore, the solid-state imaging element includes an FD-side wiring electrode 161 connecting the floating diffusion 111 and the amplifier transistor 114 .

[0093] The FD-side wiring electrode 161 is provided in the second contact hole 162 .

[0094] Furthermore, similarly to the third electrode 132 , the FD side wiring electrode 161 is formed by using a high melting point metal such as tungsten, titanium nitride, cobalt, and ruthenium.

[0095] The second contact hole 162 is a void portion formed in the semiconductor substrate (the first semiconductor substrate 101 and the second semiconductor substrate 102 ) and shaped to extend in the thickness direction of the semiconductor substrate.

[0096] Therefore, a portion of the FD side wiring electrode 161 is formed inside the first semiconductor substrate 101, and the remaining portion of the FD side wiring electrode 161 is formed inside the second semiconductor substrate 102. In addition, the FD side wiring electrode 161 is formed in the semiconductor substrate in a shape extending in the thickness direction of the semiconductor substrate.

[0097] Furthermore, one end of the first contact hole 160 and one end of the second contact hole 162 (both Figure 4 The upper opening ends in the photodiode 110 are both located on the surface of the semiconductor substrate (the first semiconductor substrate 101 and the second semiconductor substrate 102) on the opposite side to the photodiode 110.

[0098] A source electrode of the reset transistor 113 is connected to the switching transistor 115 , and a drain electrode of the reset transistor 113 is connected to the power supply wiring VDD.

[0099] Furthermore, the reset transistor 113 turns on or off the discharge of the charge accumulated in the floating diffusion 111 according to a drive signal supplied to the gate electrode from the timing control unit.

[0100] The gate electrode of the amplifier transistor 114 is connected to the floating diffusion 111 , and the source electrode of the amplifier transistor 114 is connected to the power supply wiring VDD. The drain electrode of the amplifier transistor 114 is connected to the source electrode of the selection transistor 116 .

[0101] Furthermore, the amplifier transistor 114 reads the potential of the floating diffusion 111 reset by the reset transistor 113 as a reset level. Furthermore, the amplifier transistor 114 amplifies a voltage corresponding to the signal charge transferred by the transfer transistor 112 and accumulated in the floating diffusion 111. In other words, the amplifier transistor 114 reads the signal charge transferred to the floating diffusion 111 as an electric signal and amplifies the signal charge.

[0102] The voltage (voltage signal) amplified by the amplification transistor 114 is output to the vertical signal line VL through the selection transistor 116 .

[0103] The floating diffusion 111 and the amplifier transistor 114 are connected to each other here via the FD-side wiring electrode 161 .

[0104] For example, the drain electrode of the selection transistor 116 is connected to one end of the vertical signal line VL, and the source electrode of the selection transistor 116 is connected to the drain electrode of the amplification transistor 114 .

[0105] Furthermore, the selection transistor 116 turns on or off the output of the voltage signal from the amplification transistor 114 to the vertical signal line VL according to the drive signal SEL supplied to the gate electrode from the timing control unit.

[0106] In this manner, the selection transistor 116 enters a conductive state when a selection control signal is supplied to the gate electrode, and selects a unit pixel in synchronization with vertical scanning performed by a vertical scanning circuit (not shown). Note that the selection transistor 116 may be configured to be connected between the source electrode of the amplifier transistor 114 and the source line.

[0107] The vertical signal line VL (vertical signal line) is a wiring that outputs the electric signal amplified by the amplifier transistor 114. The drain electrode of the selection transistor 116 is connected to one end of the vertical signal line VL. An A / D converter not shown is connected to the other end of the vertical signal line VL.

[0108] <Solid-state imaging device manufacturing method>

[0109] Reference below Figures 1 to 4 as well as Figures 5 to 10 A method for manufacturing the solid-state imaging element of this embodiment will be described.

[0110] According to the solid-state imaging element manufacturing method, first, a photodiode 110, a floating diffusion portion 111, and a transfer transistor 112 are manufactured on a first semiconductor substrate 101 formed of silicon. Figure 5 Specifically, the solid-state imaging element manufacturing method includes the steps of forming a photodiode 110 and a floating diffusion 111 on a semiconductor substrate.

[0111] Furthermore, phosphorus or arsenic ions are implanted into the capacitor region, which is a region previously defined in the first semiconductor substrate 101, using an ion implantation method. This process forms an N+ region 131a, which later becomes the first electrode 131. The N+ region 131a becomes the first electrode 131 after a heat treatment performed as a post-processing step.

[0112] Subsequently, a gate oxide film of the transfer transistor 112 is formed. In addition, a silicon oxide film is formed on the upper surface ( Figure 5 A first dielectric film 141 is formed on the upper surface of the N+ region 131a.

[0113] Thereafter, a gate electrode of the transfer transistor 112 is formed. In addition, a polysilicon film formed by thermal CVD is formed on the surface ( ) on the side opposite to the surface facing the N+ region 131a of the first dielectric film 141. Figure 5 A second electrode 151 is formed on the upper surface of the first dielectric film 141. Further, the interlayer insulating film 103 is formed by using a silicon oxide film manufactured by plasma CVD.

[0114] Then, if Figure 6As shown, the second semiconductor substrate 102 formed of an epitaxial film is stacked on the surface of the interlayer insulating film 103 opposite to the surface facing the first semiconductor substrate 101 ( Figure 6 on the upper surface of the ).

[0115] Thereafter, phosphorus or arsenic is ion-implanted using an ion implantation method to form a source-drain region 114a of the amplifier transistor 114 in a pixel transistor region defined at a position different from that of the capacitor region. Subsequently, a plasma etching method is performed from the surface ( 114b ) of the second semiconductor substrate 102 on the side opposite to the surface facing the interlayer insulating film 103. Figure 6 A hole is opened (on the upper surface of the pores) to form a second contact hole 162 connected to the floating diffusion 111. In addition, a first contact hole 160 connected to the second electrode 151 is formed by opening.

[0116] Furthermore, a high melting point metal is formed inside the second contact hole 162 and inside the first contact hole 160 by sputtering to simultaneously form the FD-side wiring electrode 161 and the third electrode 132 .

[0117] Then, if Figure 7 As shown, on the surface of the second semiconductor substrate 102 opposite to the surface facing the interlayer insulating film 103 ( Figure 7 A film of a resist 164 having an opening at a portion corresponding to the capacitor region is formed on the upper surface of the film 103. Furthermore, a portion corresponding to the capacitor region included in the interlayer insulating film 103 is removed by plasma etching to expose the third electrode 132. The resist 164 is then removed.

[0118] Then, if Figure 8 As shown, the second dielectric film 142 is formed using a ferroelectric film formed at a position covering a portion of the third electrode 132 except for a connection portion between the third electrode 132 and the second electrode 151 using plasma CVD.

[0119] Afterwards, if Figure 9 As shown, the fourth electrode 152 is formed by sputtering a high melting point metal at a position facing the third electrode, and the second dielectric film 142 is sandwiched between the fourth electrode 152 and the third electrode, thereby forming the second capacitor portion 122. As described above, the solid-state imaging element manufacturing method includes the step of forming the capacitor 120 including the PD-side electrode 130, the dielectric film 140, and the anti-PD-side electrode 150.

[0120] Furthermore, according to the solid-state imaging device manufacturing method, the step of forming the capacitor includes the step of simultaneously forming the first contact hole 160 and the second contact hole 162 in the semiconductor substrate in a shape extending in the thickness direction of the semiconductor substrate. Furthermore, according to the solid-state imaging device manufacturing method, the step of forming the capacitor includes the step of simultaneously forming the FD-side wiring electrode 161 and the PD-side electrode 130.

[0121] Then, if Figure 10 As shown, a polysilicon film is formed by thermal CVD on the surface of the second semiconductor substrate 102 opposite to the surface facing the interlayer insulating film 103 to form the fifth electrode 163 that constitutes wiring in the pixel transistor region and the capacitor region. Accordingly, the solid-state imaging device manufacturing method includes the step of forming the amplifier transistor 114.

[0122] According to the configuration of the first embodiment, at least a portion of the PD-side electrode 130 and the FD-side wiring electrode 161 are formed in the same semiconductor substrate, extending in the thickness direction of the semiconductor substrate. This allows the FD-side wiring electrode 161 and the third electrode 132 included in the PD-side electrode 130 to be formed simultaneously. Consequently, the solid-state imaging element provided by the present invention can reduce the number of manufacturing steps required.

[0123] Furthermore, according to the configuration of the first embodiment, capacitor 120 has a stacked structure of first capacitor portion 121 and second capacitor portion 122. Therefore, even in a configuration with a smaller area for forming capacitor 120 due to the miniaturization of solid-state imaging elements, the required capacitance of capacitor 120 can be easily obtained.

[0124] Furthermore, according to the configuration of the first embodiment, the dynamic range of the solid-state image pickup element can be expanded. This is achieved for the following reasons.

[0125] When the gate of switching transistor 115 is off, the floating diffusion 111 is disconnected from capacitor 120, resulting in a decrease in capacitance. Furthermore, floating diffusion 111 has a low capacitance. In this case, due to the small amount of electrons, the potential is significantly reduced, resulting in a highly sensitive signal being output. However, when there are a large number of signal electrons, electrons overflow from floating diffusion 111. In this case, it is difficult to obtain a suitable signal corresponding to the amount of light entering photodiode 110. On the other hand, when the gate of switching transistor 115 is on, the floating diffusion 111 is connected to capacitor 120, resulting in an increase in capacitance. As the capacitance increases, a larger number of electrons can be received. However, sensitivity decreases.

[0126] As described above, by switching the gate of the switching transistor 115, it is possible to achieve image synthesis by combining an image formed by reading charge in the high-sensitivity operation mode with an image formed by reading charge in the low-sensitivity operation mode. In this way, the dynamic range of the solid-state imaging element can be expanded.

[0127] Furthermore, according to the configuration of the first embodiment, the step of forming the capacitor includes the step of simultaneously forming the first contact hole 160 and the second contact hole 162 in the semiconductor substrate in a shape extending in the thickness direction of the semiconductor substrate. Furthermore, according to the solid-state imaging element manufacturing method, the step of forming the capacitor includes the step of simultaneously forming the FD-side wiring electrode 161 and the PD-side electrode 130. In this way, the solid-state imaging element manufacturing method provided by the present invention can reduce the number of steps required to manufacture a solid-state imaging element.

[0128] (Modification of the First Embodiment)

[0129] According to the first embodiment, both the third electrode 132 and the fourth electrode 152 are formed using a high melting point metal. However, the configuration is not limited thereto. For example, only the third electrode 132 or the fourth electrode 152 may be formed using a high melting point metal.

[0130] According to the configuration of the first embodiment, the capacitor forming step includes the steps of simultaneously forming the first contact hole 160 and the second contact hole 162, and simultaneously forming the FD-side wiring electrode 161 and the PD-side electrode 130. However, the capacitor forming step is not limited to this. Specifically, the capacitor forming step may only include the steps of simultaneously forming the first contact hole 160 and the second contact hole 162. Similarly, the capacitor forming step may only include the steps of simultaneously forming the FD-side wiring electrode 161 and the PD-side electrode 130.

[0131] (Second embodiment)

[0132] The solid-state image pickup element according to the second embodiment is different from that of the first embodiment in that Figure 11 The configuration of the capacitor 120 and the configuration of the equivalent circuit are shown in FIG. In the following description, explanations of parts identical to corresponding parts in the first embodiment are omitted in some cases.

[0133] The capacitor 120 includes a first capacitor portion 121 and a second capacitor portion 122 .

[0134] The first capacitor portion 121 is a capacitor formed in a first capacitor region pre-defined in the first semiconductor substrate 101 .

[0135] A first capacitor region is defined in the first semiconductor substrate 101 at a location including the floating diffusion 111 .

[0136] The first capacitor portion 121 has a first electrode 131 , a first dielectric film 141 , and a second electrode 151 .

[0137] The first dielectric film 141 is formed in a portion included in the first electrode 131 and overlapping with the second electrode 151. In other words, from the stacking direction ( Figure 11 When viewed in the vertical direction (upper and lower directions), the first electrode 131 has a portion that does not overlap with the first dielectric film 141 and the second electrode 151. Therefore, a portion of the first electrode 131 includes the floating diffusion 111.

[0138] In addition, according to the second embodiment, the equivalent circuit does not include the switching transistor 115. Therefore, although not shown in the figure, the floating diffusion 111 is formed at the connection point of the drain electrode of the transfer transistor 112, the source electrode of the reset transistor 113, the capacitor 120, and the gate electrode of the amplification transistor 114.

[0139] According to the configuration of the second embodiment, similar to the first embodiment, the FD side wiring electrode 161 and the third electrode 132 can be formed simultaneously. Therefore, the present embodiment provides a solid-state imaging element capable of reducing the number of steps required for manufacturing.

[0140] In addition, according to the configuration of the second embodiment, the switching transistor 115 is removed. Therefore, the solid-state imaging element provided by this embodiment can achieve a simplified structure.

[0141] (Third embodiment)

[0142] like Figure 12 As shown, the solid-state imaging element according to the third embodiment is different from that of the first embodiment in the configuration of the first semiconductor substrate 101 and the configuration of the capacitor 120. In the following description, explanations of the same parts as the corresponding parts in the first embodiment are omitted in some cases.

[0143] The first semiconductor substrate 101 includes a surface ( Figure 12 The loading electrode 170 is on the upper surface of the ).

[0144] For example, the charging electrode 170 is formed by using a polysilicon film, for example.

[0145] The capacitor 120 has a PD-side electrode 130 , a dielectric film 140 , and a counter-PD-side electrode 150 .

[0146] The PD-side electrode 130 includes a third electrode 132 .

[0147] The third electrode 132 is a terminal ( Figure 12A columnar electrode (lower end) connected to the loading electrode 170.

[0148] The dielectric film 140 includes a second dielectric film 142 .

[0149] The second dielectric film 142 covers a portion of the third electrode 132 except for a connection portion between the third electrode 132 and the loading electrode 170 .

[0150] The counter PD-side electrode 150 includes a fourth electrode 152 .

[0151] The fourth electrode 152 is an electrode facing the third electrode 132 via the second dielectric film 142 , and the second dielectric film 142 is sandwiched between the fourth electrode 152 and the third electrode 132 .

[0152] According to the configuration of the third embodiment, similar to the first embodiment, the FD side wiring electrode 161 and the third electrode 132 can be formed simultaneously. Therefore, the present embodiment provides a solid-state imaging element capable of reducing the number of steps required for manufacturing.

[0153] Furthermore, according to the configuration of the third embodiment, the number of electrodes included in capacitor 120 is smaller than that in each of the first and second embodiments. Therefore, the solid-state imaging element provided by this embodiment can achieve a simplified structure. Furthermore, the solid-state imaging element provided by this embodiment can reduce the number of steps required for manufacturing.

[0154] (Fourth embodiment)

[0155] like Figure 13 As shown, the solid-state imaging element of the fourth embodiment is different from that of the first embodiment in that the semiconductor substrate does not include a second semiconductor substrate but includes only a first semiconductor substrate 101. In the following description, explanations of parts identical to corresponding parts in the first embodiment are omitted in some cases.

[0156] Therefore, in the fourth embodiment, the entirety of the third electrode 132 included in the PD-side electrode 130 is formed in the first semiconductor substrate 101. Furthermore, the entirety of the second dielectric film 142 included in the dielectric film 140 is formed in the first semiconductor substrate 101. Furthermore, the entirety of the FD-side wiring electrode 161 is formed in the first semiconductor substrate 101.

[0157] In addition, according to the fourth embodiment, the fifth electrode 163 is provided on the surface of the first semiconductor substrate 101 on the side opposite to the photodiode 110 side ( Figure 13 on the upper surface of the ).

[0158] According to the configuration of the fourth embodiment, similar to the first embodiment, the FD side wiring electrode 161 and the third electrode 132 can be formed simultaneously. Therefore, the present embodiment provides a solid-state imaging element capable of reducing the number of steps required for manufacturing.

[0159] In addition, according to the configuration of the fourth embodiment, the semiconductor substrate includes only the first semiconductor substrate 101 , and therefore, the solid-state imaging element provided by this embodiment allows for more configuration variations.

[0160] (Fifth embodiment)

[0161] like Figure 14 As shown, the solid-state imaging element of the fifth embodiment is different from that of the first embodiment in the configuration of the capacitor 120 and the configuration of the second semiconductor substrate 102. In the following description, explanation of the same parts as the corresponding parts in the first embodiment is omitted in some cases.

[0162] The capacitor 120 includes a first capacitor portion 121 and a second capacitor portion 122 .

[0163] The first capacitor portion 121 is a capacitor formed in a first capacitor region pre-defined in the first semiconductor substrate 101 .

[0164] The first capacitor region is defined at a position different from that of the floating diffusion 111 in the first semiconductor substrate 101 .

[0165] The first capacitor portion 121 has a first electrode 131 , a first dielectric film 141 , and a second electrode 151 .

[0166] The first electrode 131 is an electrode provided on a surface of the photodiode 110 on the opposite side from the surface on which light is incident in the first capacitor region. The first electrode 131 and the floating diffusion 111 are provided separately from each other.

[0167] The first dielectric film 141 is stacked on the first electrode 131 .

[0168] The second electrode 151 is stacked on the first dielectric film 141 .

[0169] The second capacitor portion 122 is a capacitor provided on a surface of the first capacitor portion 121 on the side opposite to the photodiode 110 side.

[0170] The second capacitor portion 122 has a third electrode 132 , a second dielectric film 142 , and a fourth electrode 152 .

[0171] The third electrode 132 is included in the PD-side electrode 130 and has one end ( Figure 14 A columnar electrode (lower middle part) connected to the second electrode 151.

[0172] In addition, the side surface of the lower portion of the third electrode 132 is in contact with an inter-capacitor insulating film 180 described below.

[0173] The second dielectric film 142 is included in the dielectric film 140 and covers the other end ( Figure 14 a predetermined portion of the upper end of the middle portion.

[0174] The fourth electrode 152 is an electrode included in the counter PD side electrode 150 and faces the third electrode 132 via the second dielectric film 142 , which is sandwiched between the fourth electrode 152 and the third electrode 132 .

[0175] The second semiconductor substrate 102 includes an inter-capacitor insulating film 180 , a first side-wall insulating film 181 , and a second side-wall insulating film 182 .

[0176] The inter-capacitor insulating film 180 is provided between the second electrode 151 and the second dielectric film 142 .

[0177] In addition, the inter-capacitor insulating film 180 is formed by using a material different from that of the second dielectric film 142 .

[0178] For example, an oxide film or a nitride film can be used as a material for forming the inter-capacitor insulating film 180. Alternatively, the inter-capacitor insulating film 180 can be formed using, for example, a single-layer oxide film or a nitride film.

[0179] In the fifth embodiment, a case is described as an example in which the inter-capacitor insulating film 180 is formed using a single-layer oxide film, assuming that the second dielectric film 142 is formed using a material other than an oxide film.

[0180] Furthermore, a portion included in the third electrode 132 and containing one end of the third electrode 132 is inserted into the inter-capacitor insulating film 180 .

[0181] Therefore, the predetermined portion included in the third electrode 132 and covered with the second dielectric film 142 is a portion of the third electrode 132 other than the above-described portion (the portion inserted into the inter-capacitor insulating film 180 ).

[0182] The first side-wall insulating film 181 is provided on the side surface of the second electrode 151 and is formed by using the same material as the inter-capacitor insulating film 180 .

[0183] Therefore, in the fifth embodiment, the case where the first side wall insulating film 181 is formed by using a single-layer oxide film is described as an example.

[0184] Note that the first side wall insulating film 181 can be formed using a nitride film. In this case, for example, the first side wall insulating film 181 is formed using a single-layer nitride film.

[0185] The second side-wall insulating film 182 is provided on the side surface of the transfer transistor 112 and is formed by using the same material as the inter-capacitor insulating film 180 .

[0186] Therefore, in the fifth embodiment, the case where the second side wall insulating film 182 is formed by using a single-layer oxide film is described as an example.

[0187] Note that the second side wall insulating film 182 can be formed using a nitride film. In this case, for example, the second side wall insulating film 182 is formed using a single-layer nitride film.

[0188] <Solid-state imaging device manufacturing method>

[0189] The following combination Figure 14 and Figures 15 to 22 A method for manufacturing the solid-state imaging element according to the fifth embodiment will be described.

[0190] According to the solid-state imaging element manufacturing method, such as Figure 15 As shown, first, a photodiode 110 , a floating diffusion 111 , and a transfer transistor 112 are manufactured on a first semiconductor substrate 101 formed using silicon.

[0191] Furthermore, an N+ region is formed by ion-implanting phosphorus or arsenic in a capacitor region, which is a region previously defined in the first semiconductor substrate 101, using an ion implantation method.

[0192] Subsequently, a gate oxide film is formed of the transfer transistor 112. Furthermore, a first dielectric film 141 stacked on the N+ region is formed on the upper surface of the N+ region by using a silicon oxide film formed by plasma CVD.

[0193] Thereafter, a gate electrode of the transfer transistor 112 is formed. In addition, a polysilicon film formed by thermal CVD is formed on the surface ( Figure 15 A second electrode 151 is formed on the upper surface of the first dielectric film 141.

[0194] In addition, if Figure 16 As shown, an insulating film 183 is deposited in the transfer transistor 112 and the capacitor region. The insulating film 183 will later become the inter-capacitor insulating film 180, the first sidewall insulating film 181, and the second sidewall insulating film 182. Thereafter, a resist 164 is formed in the capacitor region of the insulating film 183.

[0195] Subsequently, the insulating forming film 183 is etched to form a Figure 17 The inter-capacitor insulating film 180, the first side-wall insulating film 181, and the second side-wall insulating film 182 are shown. In this case, the inter-capacitor insulating film 180 is deposited on the second electrode 151 with the resist 164 formed on the capacitor region.

[0196] As described above, the solid-state imaging element manufacturing method includes the step of forming the inter-capacitor insulating film 180 between the second electrode 151 and the second dielectric film 142 .

[0197] In addition, in the step of forming the inter-capacitor insulating film 180 , the inter-capacitor insulating film 180 is formed using a material different from that of the second dielectric film 142 .

[0198] Furthermore, the solid-state imaging element manufacturing method includes the step of forming the first side-wall insulating film 181 on the side surface of the second electrode 151 .

[0199] In addition, in the step of forming the first side-wall insulating film 181 , the first side-wall insulating film 181 is formed using the same material as that of the inter-capacitor insulating film 180 .

[0200] In addition, in the step of forming the first side-wall insulating film 181, the first side-wall insulating film 181 is formed using an oxide film or a nitride film.

[0201] Furthermore, the solid-state imaging element manufacturing method includes the step of forming a second side-wall insulating film 182 on the side surface of the transfer transistor 112 .

[0202] In addition, in the step of forming the second side-wall insulating film 182 , the second side-wall insulating film 182 is formed using the same material as that of the inter-capacitor insulating film 180 .

[0203] In addition, in the step of forming the second side-wall insulating film 182, the second side-wall insulating film 182 is formed using an oxide film or a nitride film.

[0204] Then, if Figure 18 As shown, the interlayer insulating film 103 is formed by using a silicon oxide film produced by plasma CVD.

[0205] In addition, on the surface of the interlayer insulating film 103 opposite to the surface facing the first semiconductor substrate 101 ( Figure 18 A second semiconductor substrate 102 formed using an epitaxial film is stacked on the upper surface of the semiconductor substrate 102.

[0206] Thereafter, phosphorus or arsenic is ion-implanted using an ion implantation method to form a source-drain region 114a of the amplifier transistor 114 in a pixel transistor region defined at a position different from that of the capacitor region. Subsequently, the surface ( 114a ) of the second semiconductor substrate 102 opposite to the surface facing the interlayer insulating film 103 is formed by plasma etching. Figure 18 A hole is opened (on the upper surface of the hole) to form a second contact hole 162 connected to the floating diffusion 111. In addition, a hole is opened to form a first contact hole 160 that penetrates the interlayer insulating film 103 and the inter-capacitor insulating film 180 and is connected to the second electrode 151.

[0207] Furthermore, a high melting point metal is formed inside the second contact hole 162 and inside the first contact hole 160 by sputtering to simultaneously form the FD-side wiring electrode 161 and the third electrode 132 .

[0208] In addition, in the step of forming the third electrode 132, on the capacitor insulating film 180 formed in the step of forming the capacitor insulating film 180, the third electrode 132 is formed in a state in which a portion of one end of the third electrode 132 included in and containing the third electrode 132 is inserted into the capacitor insulating film 180.

[0209] Then, if Figure 19 As shown, a film of a resist 164 having an opening in a portion corresponding to the capacitor region is formed on the surface of the second semiconductor substrate 102 on the side opposite to the surface facing the interlayer insulating film 103 ( Figure 19 Furthermore, a portion included in the interlayer insulating film 103 and corresponding to the capacitor region is removed by plasma etching to expose the third electrode 132. Then, the resist 164 is removed.

[0210] At this time, the selective etching conditions are set so that the etching rate of the intercapacitor insulating film 180 is lower than the etching rate of the interlayer insulating film 103. In this way, the interlayer insulating film 103 formed on the capacitor region is etched while etching of the intercapacitor insulating film 180 is reduced.

[0211] Then, if Figure 20 As shown, the second dielectric film 142 is formed by plasma CVD using a ferroelectric film formed at a position covering a portion including the portion included in the third electrode 132 and not inserted into the inter-capacitor insulating film 180 .

[0212] Specifically, according to the solid-state imaging element manufacturing method, the step of forming the second capacitor portion 122 includes forming the second dielectric film 142 that covers a predetermined portion included in the third electrode 132 and including the other end of the third electrode. In addition, in the step of forming the second dielectric film 142, the portion of the third electrode 132 other than a portion is covered with the second dielectric film 142 as the predetermined portion.

[0213] Afterwards, if Figure 21 As shown, the fourth electrode 152 is formed by sputtering using a high melting point metal at a position facing the third electrode, and the second dielectric film 142 is sandwiched between the fourth electrode 152 and the third electrode to form the second capacitor portion 122 .

[0214] Then, if Figure 22 As shown, a polysilicon film is formed by thermal CVD on the surface of the second semiconductor substrate 102 opposite to the surface facing the interlayer insulating film 103 to form a fifth electrode 163 constituting wiring in the pixel transistor region and the capacitor region.

[0215] According to the fifth embodiment, one end and the lower portion of the third electrode 132 are in contact with the inter-capacitor insulating film 180. Therefore, as Figure 19 As shown, when the third electrode 132 is exposed after a portion of the interlayer insulating film 103 is removed, the contact area between the third electrode 132 and the inter-capacitor insulating film 180 can be increased compared to the areas of the respective configurations of the first to fourth embodiments. In this way, the collapse of the third electrode 132 can be reduced compared to the configurations of the first to fourth embodiments.

[0216] Specifically, when third electrode 132 (conductive plug) is exposed during the step of forming second capacitor unit 122, the contact area is reduced in the configurations of the first to fourth embodiments, where only the bottom of third electrode 132 is in contact with the second electrode. In this case, third electrode 132 collapses due to the penetration of the cleaning solution used to remove interlayer insulating film 103 in the capacitor region. On the other hand, when third electrode 132 has a low cylindrical shape to reduce its height and prevent it from collapsing, the area of ​​second capacitor unit 122 is reduced. Consequently, achieving the desired capacitance becomes difficult.

[0217] This embodiment enables the third electrode 132 to have a high cylindrical shape instead of a low cylindrical shape. Therefore, this embodiment provides a solid-state imaging element capable of increasing capacitance while preventing the area of ​​the second capacitor portion 122 from being reduced.

[0218] Furthermore, according to the configuration of the fifth embodiment, in the step of forming the third electrode 132, on the inter-capacitor insulating film 180 formed in the step of forming the inter-capacitor insulating film 180, the third electrode 132 is formed in a state where a portion included in the third electrode 132 and including one end is inserted into the inter-capacitor insulating film 180. The solid-state imaging element manufacturing method provided by this embodiment can achieve an increase in capacitance while preventing a reduction in the area of ​​the second capacitor portion 122.

[0219] (Sixth embodiment)

[0220] The solid-state imaging element according to the sixth embodiment is different from that of the fifth embodiment in the configuration of the inter-capacitor insulating film 180. In the following description, explanation of the same parts as the corresponding parts in the fifth embodiment is omitted in some cases.

[0221] Specifically, if Figure 23 As shown, on the surface of the inter-capacitor insulating film 180 facing the second dielectric film 142 side ( Figure 23 A plurality of openings 180a are formed in the upper surface of the substrate.

[0222] Each of the plurality of openings 180a is formed in a shape in which: Figure 23 The opening area observed in the up-down direction in the middle is smaller than the cross-sectional area of ​​a predetermined portion included in the third electrode 132 and covered by the second dielectric film 142 observed in the length direction of the third electrode 132.

[0223] Therefore, when viewed in the length direction of the third electrode 132 , the cross-sectional area of ​​the portion included in the third electrode 132 and disposed inside each opening 180 a is smaller than the cross-sectional area of ​​the portion included in the third electrode 132 and covered by the second dielectric film 142 .

[0224] <Solid-state imaging device manufacturing method>

[0225] The following combination Figure 24 and Figure 23 The method for manufacturing a solid-state imaging element according to the sixth embodiment will be described. It should be noted that steps similar to the corresponding steps in the method for manufacturing a solid-state imaging element according to the fifth embodiment will not be described in detail.

[0226] like Figure 24As shown, in the method for manufacturing a solid-state imaging element, in the step of forming the inter-capacitor insulating film 180, a plurality of openings 180a are formed in a surface of the inter-capacitor insulating film 180 that is opposite to the second dielectric film 142. At this time, each of the plurality of openings 180a is formed into a shape in which the opening area as viewed in the longitudinal direction of the third electrode 132 is smaller than the cross-sectional area of ​​a predetermined portion of the third electrode 132 as viewed in the longitudinal direction of the third electrode 132.

[0227] According to the configuration of the sixth embodiment, as Figure 23 As shown in FIG. 1 , in the exposed state of the third electrode 132 after removing a portion of the interlayer insulating film 103, the contact area between the third electrode 132 and the inter-capacitor insulating film 180 can be larger than that in the fifth embodiment. In this way, the solid-state imaging element provided in this embodiment can achieve a reduction in the collapse of the third electrode 132 compared to the configuration of the fifth embodiment.

[0228] Furthermore, according to the configuration of the sixth embodiment, in the step of forming the inter-capacitor insulating film 180, the opening 180a is formed in the surface included in the inter-capacitor insulating film 180 and opposite to the second dielectric film 142. In this manner, the solid-state imaging element manufacturing method provided by this embodiment can achieve reduction in the collapse of the third electrode 132, compared to the configuration of the fifth embodiment.

[0229] (Seventh embodiment)

[0230] The solid-state image pickup element of the seventh embodiment is different from that of the fifth embodiment in the structure of the second semiconductor substrate. In the following description, the explanation of the same parts as the corresponding parts in the fifth embodiment is omitted in some cases.

[0231] Specifically, if Figure 25 As shown, an integrated insulating film 184 having the functions of the inter-capacitor insulating film 180 , the first side-wall insulating film 181 , and the second side-wall insulating film 182 is formed in a region where the second semiconductor substrate 102 will be formed later.

[0232] <Solid-state imaging device manufacturing method>

[0233] The following combination Figure 26 and Figure 25 The method for manufacturing a solid-state imaging element according to the seventh embodiment will be described. It should be noted that steps similar to the corresponding steps in the method for manufacturing a solid-state imaging element according to the fifth embodiment will not be described in detail.

[0234] like Figure 26 As shown in the solid-state imaging element manufacturing method, an insulating film 183 that will later become an integrated insulating film 184 is deposited on the transfer transistor 112 and the capacitor region. Figure 25 As shown, the third electrode 132 is formed, and the insulating film 183 is made to function as the integrated insulating film 184.

[0235] According to the seventh embodiment, unlike the configuration of the fifth embodiment, the step of etching the insulating film 183 to form the inter-capacitor insulating film 180, the first side-wall insulating film 181, and the second side-wall insulating film 182 can be omitted. Therefore, the solid-state imaging element provided by this embodiment can achieve simplified manufacturing steps.

[0236] Furthermore, according to the configuration of the seventh embodiment, unlike the fifth embodiment, the step of etching the insulating film 183 to form the inter-capacitor insulating film 180, the first side-wall insulating film 181, and the second side-wall insulating film 182 can be omitted. Therefore, the method for manufacturing a solid-state imaging element provided in this embodiment can simplify the manufacturing steps.

[0237] (First application example)

[0238] For example, the solid-state imaging element of the present technology may have Figure 27 The structure shown.

[0239] Figure 27 The solid-state imaging element 1 shown in FIG is a CMOS image sensor. Furthermore, the solid-state imaging element 1 has a pixel region 4 as an imaging region on a semiconductor substrate 100. Furthermore, peripheral circuit units (5, 6, 7, 8, 9) including, for example, a vertical drive circuit 5, a column selection circuit 6, a horizontal drive circuit 7, an output circuit 8, and a control circuit 9 are provided in a peripheral region of the pixel region 4.

[0240] For example, the pixel region 4 includes a plurality of unit pixels 3 (each corresponding to a photodiode 110) arranged two-dimensionally in a matrix. For example, a pixel drive line VD (specifically, a row select line and a reset control line) is wired for each pixel row of the unit pixels 3, and a vertical signal line VL is wired for each pixel column. The pixel drive line VD transmits a drive signal for reading a signal from the pixel. One end of the pixel drive line VD is connected to the output terminal of the corresponding row of the vertical drive circuit 5.

[0241] The vertical drive circuit 5 includes a shift register, an address decoder, etc. For example, the vertical drive circuit 5 drives each unit pixel 3 in the pixel area 4 in a row unit. The signal output from each unit pixel 3 in the pixel row selectively scanned by the vertical drive circuit 5 is provided to the column selection circuit 6 via the corresponding vertical signal line VL.

[0242] The column selection circuit 6 includes an amplifier, a horizontal selection switch, and the like provided for each vertical signal line VL.

[0243] The horizontal drive circuit 7 includes a shift register, an address decoder, and the like. The horizontal drive circuit 7 sequentially drives the horizontal selection switches of the column selection circuit 6 while scanning. Through the selective scanning performed by the horizontal drive circuit 7, the signals of the respective pixels transmitted via the respective vertical signal lines VL are sequentially output to the horizontal signal lines VH and transmitted to the outside of the semiconductor substrate 100 via the horizontal signal lines VH.

[0244] The circuit section including the vertical drive circuit 5, column selection circuit 6, horizontal drive circuit 7 and horizontal signal line VH may be formed on the semiconductor substrate 100 or provided on an external control IC. Alternatively, these circuit sections may be formed on another substrate connected by a cable or the like.

[0245] The control circuit 9 receives a clock supplied from outside the semiconductor substrate 100, data for an operation mode command, and the like, and outputs data such as internal information related to the solid-state imaging element 1. Furthermore, the control circuit 9 includes a timing generator that generates various timing signals, and controls the driving of peripheral circuits such as the vertical drive circuit 5, the column selection circuit 6, and the horizontal drive circuit 7 based on the various timing signals generated by the timing generator.

[0246] (Second application example)

[0247] The solid-state imaging element of this technology can be applied to any type of electronic equipment with an imaging function, such as camera systems such as digital cameras and video cameras, and cellular phones with an imaging function. For example, Figure 28 A schematic configuration of an electronic device 2 (camera) as a second application example is shown.

[0248] For example, the electronic device 2 is a camera capable of capturing still images or moving images, and includes a solid-state imaging element 1, an optical system (optical lens) 201, a shutter device 202, a driving unit 204 that drives the solid-state imaging element 1 and the shutter device 202, and a signal processing unit 203.

[0249] The optical system 201 guides image light (incident light) from a subject to the pixel area 4 of the solid-state image pickup element 1. Note that the optical system 201 may include a plurality of optical lenses.

[0250] The shutter device 202 controls a light irradiation period and a light shielding period with respect to the solid-state image pickup element 1 .

[0251] The driving unit 204 controls the transfer operation of the solid-state imaging element 1 and the shutter operation of the shutter device 202 .

[0252] The signal processing unit 203 performs various types of signal processing on the signal output from the solid-state image pickup element 1. The image signal that has been subjected to the signal processing is stored in a storage medium such as a memory, or is output to a monitor or the like.

[0253] (Third application example)

[0254] The technology according to the present disclosure (the present technology) can be applied to various types of products. For example, the technology according to the present disclosure can be implemented as a device to be installed on any mobile object such as an automobile, an electric car, a hybrid car, a motorcycle, a bicycle, a personal mobile object, an airplane, a drone, a boat, and a robot.

[0255] Figure 29 : is a block diagram showing an example of a schematic configuration of a vehicle control system as an example of a moving body control system to which the technology according to the embodiment of the present disclosure can be applied.

[0256] The vehicle control system 12000 includes a plurality of electronic control units interconnected via a communication network 12001. Figure 29 In the illustrated example, the vehicle control system 12000 includes a drive system control unit 12010, a body system control unit 12020, an exterior information detection unit 12030, an interior information detection unit 12040, and an integrated control unit 12050. Furthermore, a microcomputer 12051, a sound / image output unit 12052, and an in-vehicle network interface (I / F) 12053 are illustrated as a functional configuration of the integrated control unit 12050.

[0257] Drive system control unit 12010 controls the operation of devices related to the vehicle's drive system according to various programs. For example, drive system control unit 12010 functions as a control device for a drive force generating device, such as an internal combustion engine or a drive motor, that generates the vehicle's drive force; a drive force transmission mechanism for transmitting the drive force to the wheels; a steering mechanism for adjusting the vehicle's steering angle; and a braking device for generating the vehicle's braking force.

[0258] The body system control unit 12020 controls the operation of various devices installed on the vehicle body according to various programs. For example, the body system control unit 12020 functions as a control device for a keyless entry system, a smart key system, power windows, or various lights (such as headlights, backup lights, brake lights, turn signals, or fog lights). In this case, radio waves transmitted from a mobile device that replaces the key or signals from various switches can be input to the body system control unit 12020. The body system control unit 12020 receives these input radio waves or signals and controls the vehicle's door locks, power windows, lights, etc.

[0259] The vehicle exterior information detection unit 12030 detects information about the exterior of the vehicle including the vehicle control system 12000. For example, the vehicle exterior information detection unit 12030 is connected to the camera unit 12031. The vehicle exterior information detection unit 12030 causes the camera unit 12031 to capture images of the vehicle exterior and receives the captured images. Based on the received images, the vehicle exterior information detection unit 12030 can detect objects such as people, vehicles, obstacles, signs, and text on the road surface, or detect their distances.

[0260] The imaging unit 12031 is an optical sensor that receives light and outputs an electrical signal corresponding to the amount of light received. The imaging unit 12031 can output the electrical signal as an image or as information related to the measured distance. The light received by the imaging unit 12031 can be visible light or invisible light such as infrared light.

[0261] The in-vehicle information detection unit 12040 detects information related to the vehicle interior. For example, the in-vehicle information detection unit 12040 is connected to a driver status detection unit 12041 that detects the driver's condition. For example, the driver status detection unit 12041 includes a camera that captures the driver's image. Based on the detection information input from the driver status detection unit 12041, the in-vehicle information detection unit 12040 can calculate the driver's fatigue level or concentration, or determine whether the driver is dozing off.

[0262] The microcomputer 12051 can calculate control target values ​​for the driving force generating device, the steering mechanism, or the braking device based on information about the interior or exterior of the vehicle obtained by the vehicle exterior information detection unit 12030 or the vehicle interior information detection unit 12040, and output control commands to the drive system control unit 12010. For example, the microcomputer 12051 can perform coordinated control to implement advanced driver assistance system (ADAS) functions, including collision avoidance or impact mitigation of the vehicle, following driving based on following distance, cruise control, vehicle collision warning, vehicle lane departure warning, etc.

[0263] In addition, the microcomputer 12051 can perform collaborative control intended for autonomous driving by controlling the driving force generating device, steering mechanism, and braking device based on information about the outside or inside of the vehicle obtained by the outside information detection unit 12030 or the inside information detection unit 12040, so that the vehicle can travel autonomously without relying on the driver's operation.

[0264] Furthermore, the microcomputer 12051 can output a control command to the body system control unit 12020 based on the information about the exterior of the vehicle obtained by the exterior information detection unit 12030. For example, the microcomputer 12051 can control the headlights to change from high beam to low beam based on the position of a preceding vehicle or an oncoming vehicle detected by the exterior information detection unit 12030, thereby performing cooperative control to prevent glare.

[0265] The sound / image output unit 12052 transmits an output signal of at least one of sound and image to an output device capable of visually or auditorily notifying the occupants of the vehicle or the outside of the vehicle of information. Figure 29 In the example of FIG, an audio speaker 12061, a display portion 12062, and an instrument panel 12063 are shown as output devices. The display portion 12062 may include, for example, at least one of an in-vehicle display and a head-up display.

[0266] Figure 30 This is a diagram showing an example of the installation position of the camera unit 12031.

[0267] exist Figure 30 , the camera unit 12031 includes camera units 12101 , 12102 , 12103 , 12104 and 12105 .

[0268] Camera units 12101, 12102, 12103, 12104, and 12105 are located, for example, on the front nose, rearview mirror, rear bumper, and rear door of vehicle 12100, as well as on the upper portion of the windshield inside the vehicle. Camera unit 12101 located on the front nose and camera unit 12105 located on the upper portion of the windshield inside the vehicle primarily capture images of the front portion of vehicle 12100. Camera units 12102 and 12103 located on the rearview mirror primarily capture images of the sides of vehicle 12100. Camera unit 12104 located on the rear bumper or rear door primarily captures images of the rear portion of vehicle 12100. Camera unit 12105 located on the upper portion of the windshield inside the vehicle primarily detects vehicles ahead, pedestrians, obstacles, signals, traffic signs, lanes, and the like.

[0269] By the way, Figure 30 Examples of the imaging ranges of imaging units 12101 to 12104 are shown. Imaging range 12111 represents the imaging range of imaging unit 12101, located at the front nose. Imaging ranges 12112 and 12113 represent the imaging ranges of imaging units 12102 and 12103, respectively, located at the rearview mirrors. Imaging range 12114 represents the imaging range of imaging unit 12104, located at the rear bumper or rear door. For example, a bird's-eye view image of vehicle 12100, viewed from above, can be obtained by superimposing image data captured by imaging units 12101 to 12104.

[0270] At least one of the imaging units 12101 to 12104 may have a function of obtaining distance information. For example, at least one of the imaging units 12101 to 12104 may be a stereo camera composed of a plurality of imaging elements, or may be an imaging element having pixels for phase difference detection.

[0271] For example, microcomputer 12051 can determine the distance to each three-dimensional object within imaging ranges 12111 to 12114 and the change in this distance over time (relative speed to vehicle 12100) based on the distance information obtained from imaging units 12101 to 12104, thereby extracting the nearest three-dimensional object, particularly one located on the travel path of vehicle 12100 and traveling in substantially the same direction as vehicle 12100 at a predetermined speed (e.g., equal to or greater than 0 km / h), as the leading vehicle. Furthermore, microcomputer 12051 can pre-set a desired following distance to the leading vehicle and execute automatic braking control (including follow-up stop control), automatic acceleration control (including follow-up start control), and the like. Thus, it is possible to execute cooperative control intended for autonomous driving, which enables the vehicle to travel autonomously without relying on operations by the driver or the like.

[0272] For example, based on the distance information obtained from the imaging units 12101 to 12104, the microcomputer 12051 can classify three-dimensional object data related to three-dimensional objects into three-dimensional object data for two-wheeled vehicles, standard vehicles, large vehicles, pedestrians, utility poles, and other three-dimensional objects, extract the classified three-dimensional object data, and use the extracted three-dimensional object data for automatic obstacle avoidance. For example, the microcomputer 12051 identifies obstacles around the vehicle 12100 as those that the driver of the vehicle 12100 can visually identify and those that are difficult for the driver of the vehicle 12100 to visually identify. The microcomputer 12051 then determines a collision risk, indicating the risk of collision with each obstacle. If the collision risk is equal to or greater than a set value, indicating a potential collision, the microcomputer 12051 outputs a warning to the driver via the audio speaker 12061 or the display unit 12062, and the drive system control unit 12010 initiates forced deceleration or evasive steering. The microcomputer 12051 thus assists in driving to avoid collisions.

[0273] At least one of the imaging units 12101 to 12104 may be an infrared camera that detects infrared rays. The microcomputer 12051 can identify pedestrians, for example, by determining whether a pedestrian exists in images captured by the imaging units 12101 to 12104. This pedestrian identification is performed, for example, by extracting feature points from images captured by the imaging units 12101 to 12104, which are infrared cameras, and then performing pattern matching on a series of feature points representing the outline of an object to determine whether the object is a pedestrian. When the microcomputer 12051 determines that a pedestrian exists in the images captured by the imaging units 12101 to 12104 and identifies the pedestrian, the audio / video output unit 12052 controls the display unit 12062 to display a square outline for emphasis, superimposed on the identified pedestrian. The audio / video output unit 12052 can also control the display unit 12062 to display an icon representing the pedestrian in a desired location.

[0274] The above description is an example of a vehicle control system to which the technology according to the present disclosure can be applied. The technology according to the present disclosure is applicable to the camera unit 12031 and the like in the above configuration. Specifically, Figures 1 to 4 and Figures 11 to 14 The solid-state imaging element shown in each of is applicable to the imaging portion 12031. By applying the technology according to the present disclosure to the imaging portion 12031, manufacturing efficiency can be improved.

[0275] (Fourth application example)

[0276] The technology according to the present disclosure can be applied to various types of products. For example, the technology according to the present disclosure can be applied to endoscopic surgery systems.

[0277] Figure 31 : is a diagram illustrating an example of a schematic configuration of an endoscopic surgery system to which the technology according to an embodiment of the present disclosure (the present technology) can be applied.

[0278] exist Figure 31 , a state is shown in which a surgeon (physician) 11131 is performing surgery on a patient 11132 on a bed 11133 using an endoscopic surgery system 11000. As shown in the figure, the endoscopic surgery system 11000 includes an endoscope 11100, other surgical tools 11110 such as a pneumoperitoneum tube 11111 and an energy device 11112, a support arm device 11120 for supporting the endoscope 11100, and a cart 11200 on which various devices used for endoscopic surgery are loaded.

[0279] Endoscope 11100 includes a lens barrel 11101 having a predetermined length from its distal end for insertion into a body cavity of a patient 11132, and a camera 11102 connected to the proximal end of lens barrel 11101. In the illustrated example, endoscope 11100 is shown as a rigid endoscope having a rigid lens barrel 11101. However, endoscope 11100 may also be a flexible endoscope having a flexible lens barrel 11101.

[0280] The lens barrel 11101 has an opening at its distal end, in which an objective lens is mounted. A light source device 11203 is connected to the endoscope 11100 so that light generated by the light source device 11203 is introduced into the distal end of the lens barrel 11101 through a light guide extending inside the lens barrel 11101 and illuminates the endoscope toward an observation target in the body cavity of the patient 11132 through the objective lens. Note that the endoscope 11100 may be a forward-looking endoscope, an oblique-looking endoscope, or a side-looking endoscope.

[0281] The optical system and imaging element are arranged within the camera head 11102 so that reflected light (observation light) from the observation target is focused onto the imaging element through the optical system. The imaging element performs photoelectric conversion on the observation light to generate an electrical signal corresponding to the observation light, that is, an image signal corresponding to the observed image. The image signal is transmitted to the CCU 11201 as RAW data.

[0282] The CCU 11201 includes a central processing unit (CPU), a graphics processing unit (GPU), and the like, and integrally controls the operations of the endoscope 11100 and the display device 11202. Furthermore, the CCU 11201 receives an image signal from the camera 11102 and performs various image processing such as development processing (demosaicing processing) on ​​the image signal, for example, to display an image based on the image signal.

[0283] The display device 11202 displays an image based on the image signal image-processed by the CCU 1121 under the control of the CCU 11201 .

[0284] For example, the light source device 11203 includes a light source such as a light emitting diode (LED), and provides the endoscope 11100 with illumination light for imaging the surgical area.

[0285] The input device 11204 is an input interface for the endoscopic surgery system 11000. The user can input various information or instructions to the endoscopic surgery system 11000 through the input device 11204. For example, the user can input instructions to change the imaging conditions of the endoscope 11100 (such as the type of irradiation light, magnification, and focal length).

[0286] The treatment tool control device 11205 controls the activation of the energy device 11112 to perform tasks such as cauterization or cutting of tissue and sealing of blood vessels. The pneumoperitoneum device 11206 delivers gas into the body cavity of the patient 11132 via the pneumoperitoneum tube 11111 to inflate the cavity, thereby ensuring the field of view of the endoscope 11100 and the surgeon's working space. The recorder 11207 is a device capable of recording various surgical information. The printer 11208 is a device capable of printing various surgical information in various formats, such as text, images, or graphics.

[0287] Note that when photographing the surgical site, the light source device 1203 that provides irradiation light to the endoscope 11100 may include a white light source, which includes, for example, an LED, a laser light source, or a combination thereof. In the case where the white light source includes a combination of red, green, and blue (RGB) laser light sources, since the output intensity and output time can be controlled with high precision for each color (each wavelength), the light source device 11203 can perform white balance adjustment of the captured image. In addition, in this case, if the laser beams from the respective RGB laser light sources are irradiated on the observation target in a time-division manner, and the drive of the imaging element of the camera 11102 is controlled in synchronization with the irradiation timing, it is also possible to capture images corresponding to the R, G, and B colors, respectively, in a time-division manner. According to this method, a color image can be obtained even if a color filter is not provided for the imaging element.

[0288] Furthermore, the light source device 11203 can be controlled to change the intensity of light output every predetermined time. By controlling the driving of the imaging element of the camera 11102 in synchronization with the timing of the change in light intensity, images can be acquired and synthesized in a time-division manner, thereby creating an image with a high dynamic range, free of underexposed shadows and overexposed highlights.

[0289] In addition, the light source device 11203 can be configured to provide light of a predetermined wavelength band prepared for special light observation. In special light observation, for example, by utilizing the wavelength dependence of the absorption of light in body tissue, light with a narrower wavelength band than the light (i.e., white light) during ordinary observation is irradiated, and narrowband observation (narrowband imaging) is performed to image predetermined tissues such as blood vessels in the surface layer of the mucosa with high contrast. Alternatively, in special light observation, fluorescence observation can be performed to obtain an image by irradiating fluorescence generated by excitation light. In fluorescence observation, fluorescence from human tissue can be observed by irradiating excitation light onto human tissue (autofluorescence observation), or a fluorescence image can be obtained by locally injecting a reagent such as indocyanine green (ICG) into human tissue and irradiating excitation light corresponding to the fluorescence wavelength of the reagent onto the human tissue. The light source device 11203 can be configured to provide narrowband light and / or excitation light suitable for special light observation as described above.

[0290] Figure 32 It shows Figure 31 A block diagram of an example of the functional configuration of the camera 11102 and the CCU 11201 shown in FIG.

[0291] The camera 11102 includes a lens unit 11401, an imaging unit 11402, a drive unit 11403, a communication unit 11404, and a camera control unit 11405. The CCU 11201 includes a communication unit 11411, an image processing unit 11412, and a control unit 11413. The camera 11102 and the CCU 11201 are connected to each other via a transmission cable 11400 for communication.

[0292] The lens unit 11401 is an optical system provided at a connection position with the lens barrel 11101. Observation light incident from the distal end of the lens barrel 11101 is guided to the camera 11102 and introduced into the lens unit 11401. The lens unit 11401 includes a combination of multiple lenses, including a zoom lens and a focus lens.

[0293] The number of imaging elements included in the imaging unit 11402 can be one (single-board type) or multiple (multi-board type). In the case where the imaging unit 11402 is constructed as a multi-board type, for example, image signals corresponding to R, G, and B, respectively, are generated by the imaging elements, and the image signals can be synthesized to obtain a color image. The imaging unit 11402 can also be constructed to have a pair of imaging elements for acquiring a right-eye image signal and a left-eye image signal for three-dimensional (3D) display. If 3D display is performed, the surgeon 11131 can more accurately grasp the depth of the biological tissue in the surgical area. It should be noted that in the case where the imaging unit 11402 is constructed as a multi-board type, a system of multiple lens units 11401 is provided corresponding to each imaging element.

[0294] In addition, the imaging unit 11402 does not have to be provided on the camera head 11102. For example, the imaging unit 11402 can be provided inside the lens barrel 11101 immediately after the objective lens.

[0295] The drive unit 11403 includes an actuator and moves the zoom lens and focus lens of the lens unit 11401 along the optical axis by a predetermined distance under the control of the camera control unit 11405. Therefore, the magnification and focus of the image captured by the imaging unit 11402 can be appropriately adjusted.

[0296] The communication unit 11404 includes a communication device for transmitting and receiving various information to and from the CCU 11201. The communication unit 11404 transmits the image signal acquired from the imaging unit 11402 to the CCU 11201 as RAW data via the transmission cable 11400.

[0297] In addition, the communication unit 11404 receives a control signal for controlling the driving of the camera 11102 from the CCU 11201, and supplies the control signal to the camera control unit 11405. The control signal includes information related to imaging conditions, for example, information specifying a frame rate of an image to be captured, information specifying an exposure value when capturing an image, and / or information specifying a magnification and focus when capturing an image.

[0298] It should be noted that imaging conditions such as frame rate, exposure value, magnification, or focus may be specified by the user or may be automatically set based on the acquired image signal by the control unit 11413 of the CCU 11201. In the latter case, the endoscope 11100 has built-in automatic exposure (AE) function, automatic focus (AF) function, and automatic white balance (AWB) function.

[0299] The camera control unit 11405 controls the driving of the camera 11102 based on the control signal received from the CCU 11201 through the communication unit 11404 .

[0300] The communication unit 11411 includes a communication device for transmitting and receiving various information to and from the camera 11102. The communication unit 11411 receives an image signal transmitted thereto from the camera 11102 through the transmission cable 11400.

[0301] Furthermore, the communication unit 11411 transmits a control signal for controlling the driving of the camera 11102 to the camera 11102. The image signal and the control signal may be transmitted through electrical communication, optical communication, or the like.

[0302] The image processing unit 11412 performs various image processing on the image signal in the form of RAW data transmitted from the camera 11102 .

[0303] The control unit 11413 performs various controls related to capturing images of the operation area, etc. through the endoscope 11100 and displaying captured images obtained by capturing images of the operation area, etc. For example, the control unit 11413 creates a control signal for controlling the driving of the camera head 11102 .

[0304] Furthermore, based on the image signal processed by the image processing unit 11412, the control unit 11413 controls the display device 11202 to display a captured image depicting the surgical area, etc. This allows the control unit 11413 to use various image recognition technologies to identify various objects within the captured image. For example, the control unit 11413 can detect the shape and color of the edges of objects within the captured image to identify surgical tools such as forceps, specific living areas, bleeding, and fog during the use of the energy device 11112. When the control unit 11413 controls the display device 11202 to display the captured image, it can utilize the recognition results to display various surgical support information superimposed on the image of the surgical area. Displaying and providing this superimposed surgical support information to the surgeon 11131 can reduce the burden on the surgeon 11131, allowing the surgeon 11131 to reliably perform surgery.

[0305] The transmission cable 11400 connecting the camera head 11102 and the CCU 11201 to each other is an electric signal cable for electric signal communication, an optical fiber for optical communication, or a composite cable for both electric and optical communication.

[0306] Here, although in the illustrated example, communication is performed by wired communication using the transmission cable 11400, communication between the camera head 11102 and the CCU 11201 may be performed by wireless communication.

[0307] The above description is an example of an endoscopic surgical system to which the technology of the present disclosure can be applied. For example, the technology of the present disclosure can be applied to the endoscope 11100 and camera 11102 (such as the imaging unit 11402 of camera 11102) in the above-described configuration. By applying the technology of the present disclosure to the endoscope 11100 and imaging unit 11402, manufacturing efficiency can be improved.

[0308] Note that, although an endoscopic surgical system has been described here by way of example, the technology according to the present disclosure can be applied to, for example, a microsurgery system or the like.

[0309] (Other embodiments)

[0310] Although the embodiments of the present technology have been described above, it should not be understood that the present technology is limited to the description and drawings that constitute a part of this disclosure. From this disclosure, various alternative embodiments, examples, and operation techniques will become apparent to those skilled in the art.

[0311] Furthermore, it goes without saying that the present technology includes various embodiments not described herein, such as configurations to which the configurations described in the above embodiments are arbitrarily applied. Therefore, the technical scope of the present technology is limited only by the invention-specific matters associated with the claims and considered to be reasonable based on the above description.

[0312] Furthermore, the semiconductor device of the present disclosure does not need to include all the constituent elements described in the above-mentioned embodiments, etc. Furthermore, conversely, the semiconductor device of the present disclosure may include other constituent elements.

[0313] Note that the beneficial effects described in this specification are merely exemplary and not limiting. In addition, other advantageous effects may be obtained.

[0314] Note that the present technology can adopt the following configurations. (1)

[0316] A solid-state imaging element, comprising:

[0317] a semiconductor substrate including a photodiode and a floating diffusion, the photodiode being configured to photoelectrically convert incident light and signal charge accumulated in the photodiode being transferred to the floating diffusion;

[0318] a capacitor including a PD-side electrode provided on a surface of the photodiode opposite to the surface on which the light is incident, and an anti-PD-side electrode facing the PD-side electrode with a dielectric film interposed therebetween, the PD-side electrode and the anti-PD-side electrode sandwiching the dielectric film;

[0319] an amplifying transistor that reads the signal charge transferred as an electric signal to the floating diffusion and amplifies the signal charge; and

[0320] an FD-side wiring electrode connecting the floating diffusion and the amplifying transistor, wherein:

[0321] At least a portion of the PD side electrode and the FD side wiring electrode are formed in the semiconductor substrate in a shape extending in the thickness direction of the semiconductor substrate, and

[0322] One end of the first contact hole in which at least a portion of the PD side electrode is formed and one end of the second contact hole in which the FD side wiring electrode is formed are both located on the surface of the semiconductor substrate opposite to the photodiode side. (2)

[0324] The solid-state imaging element according to (1), wherein

[0325] The semiconductor substrate comprises:

[0326] a first semiconductor substrate in which a pixel circuit including the photodiode and the floating diffusion is provided, and

[0327] a second semiconductor substrate stacked on a surface of the first semiconductor substrate on a side opposite to the photodiode side, and

[0328] The capacitor comprises:

[0329] a first capacitor portion formed in a first capacitor region pre-defined in the first semiconductor substrate, and

[0330] A second capacitor portion is provided on a surface of the first capacitor portion on a side opposite to the photodiode side. (3)

[0332] The solid-state imaging element according to (2), wherein

[0333] The first capacitor unit includes:

[0334] a first electrode disposed on a surface of the first capacitor region on a side opposite to the photodiode side,

[0335] a first dielectric film stacked on the first electrode, and

[0336] a second electrode stacked on the first dielectric film,

[0337] The second capacitor unit includes:

[0338] a columnar third electrode, the third electrode forming the PD side electrode and formed in the first contact hole, one end of the third electrode being connected to the second electrode,

[0339] a second dielectric film forming the dielectric film and covering a portion of the third electrode except for a connection portion between the third electrode and the second electrode, and

[0340] a fourth electrode, the fourth electrode forming the counter PD side electrode and facing the third electrode via the second dielectric film, the second dielectric film being sandwiched between the third electrode and the fourth electrode,

[0341] The first electrode and the floating diffusion are formed separately from each other. (4)

[0343] The solid-state imaging element according to (3), wherein

[0344] The second electrode is formed by using a polysilicon film. (5)

[0346] The solid-state imaging element according to (3) or (4), wherein

[0347] At least one of the third electrode and the fourth electrode is formed by using a high melting point metal. (6)

[0349] The solid-state imaging element according to any one of (3) to (5), wherein

[0350] The second dielectric film is formed by using a ferroelectric film. (7)

[0352] The solid-state imaging element according to (2), wherein

[0353] The first capacitor unit includes:

[0354] a first electrode provided on a surface of the first capacitor region on a side opposite to the photodiode side;

[0355] a first dielectric film stacked on the first electrode, and

[0356] a second electrode stacked on the first dielectric film,

[0357] The second capacitor unit includes:

[0358] a columnar third electrode, the third electrode forming the PD-side electrode and formed in the first contact hole, one end of the third electrode being connected to the second electrode,

[0359] a second dielectric film forming the dielectric film and covering a portion of the third electrode except for a connection portion between the third electrode and the second electrode, and

[0360] a fourth electrode forming the counter PD side electrode and facing the third electrode via the second dielectric film, the second dielectric film being sandwiched between the third electrode and the fourth electrode, and

[0361] A portion of the first electrode includes the floating diffusion. (8)

[0363] The solid-state imaging element according to (7), wherein

[0364] The second electrode is formed by using a polysilicon film. (9)

[0366] The solid-state imaging element according to (7) or (8), wherein

[0367] At least one of the third electrode and the fourth electrode is formed by using a high melting point metal. (10)

[0369] The solid-state imaging element according to any one of (7) to (9), wherein

[0370] The second dielectric film is formed by using a ferroelectric film. (11)

[0372] The solid-state imaging element according to (1), wherein

[0373] The semiconductor substrate comprises:

[0374] a first semiconductor substrate in which a pixel circuit including the photodiode and the floating diffusion is provided, and

[0375] a second semiconductor substrate stacked on a surface of the first semiconductor substrate on a side opposite to the photodiode side;

[0376] The first semiconductor substrate includes a device electrode stacked on a surface of the photodiode opposite to a surface on which the light is incident, and

[0377] The capacitor comprises:

[0378] a columnar third electrode, the third electrode forming the PD-side electrode and formed in the first contact hole, one end of the third electrode being connected to the loading electrode,

[0379] a second dielectric film forming the dielectric film and covering a portion of the third electrode except for a connection portion between the third electrode and the loading electrode, and

[0380] a fourth electrode forming the counter PD-side electrode and facing the third electrode via the second dielectric film, the second dielectric film being sandwiched between the third electrode and the fourth electrode. (12)

[0382] The solid-state imaging element according to (11), wherein

[0383] At least one of the third electrode and the fourth electrode is formed by using a high melting point metal. (13)

[0385] The solid-state imaging element according to (11) or (12), wherein

[0386] The second dielectric film is formed by using a ferroelectric film. (14)

[0388] The solid-state imaging element according to (1), wherein

[0389] The capacitor comprises:

[0390] a first capacitor portion formed in a first capacitor region predefined in the semiconductor substrate, and

[0391] a second capacitor portion disposed on a surface of the first capacitor portion on a side opposite to the photodiode side,

[0392] The first capacitor unit includes:

[0393] a first electrode disposed on a surface of the first capacitor region on a side opposite to the photodiode side,

[0394] a first dielectric film stacked on the first electrode, and

[0395] a second electrode stacked on the first dielectric film,

[0396] The second capacitor unit includes:

[0397] a columnar third electrode, the third electrode forming the PD-side electrode and formed in the first contact hole, one end of the third electrode being connected to the second electrode,

[0398] a second dielectric film forming the dielectric film and covering a portion of the third electrode except for a connection portion between the third electrode and the second electrode, and

[0399] a fourth electrode forming the counter PD side electrode and facing the third electrode via the second dielectric film, the second dielectric film being sandwiched between the third electrode and the fourth electrode, and

[0400] The first electrode and the floating diffusion are formed separately from each other. (15)

[0402] The solid-state imaging element according to (14), wherein

[0403] The second electrode is formed by using a polysilicon film. (16)

[0405] The solid-state imaging element according to (14) or (15), wherein

[0406] At least one of the third electrode and the fourth electrode is formed by using a high melting point metal. (17)

[0408] The solid-state imaging element according to any one of (14) to (16), wherein

[0409] The second dielectric film is formed by using a ferroelectric film. (18)

[0411] The solid-state imaging element according to (1), wherein

[0412] The capacitor comprises:

[0413] a first capacitor portion, the first capacitor being formed in a first capacitor region predefined in the semiconductor substrate, and

[0414] a second capacitor portion disposed on a surface of the first capacitor portion on a side opposite to the photodiode side,

[0415] The first capacitor unit includes:

[0416] a first electrode disposed on a surface of the first capacitor region on a side opposite to the photodiode side,

[0417] a first dielectric film stacked on the first electrode, and

[0418] a second electrode stacked on the first dielectric film,

[0419] The second capacitor unit includes:

[0420] a columnar third electrode, the third electrode forming the PD-side electrode and formed in the first contact hole, one end of the third electrode being connected to the second electrode,

[0421] a second dielectric film forming the dielectric film and covering a predetermined portion of the third electrode including the other end of the third electrode, and

[0422] a fourth electrode, the fourth electrode forming the counter PD side electrode and facing the third electrode via the second dielectric film, the second dielectric film being sandwiched between the third electrode and the fourth electrode,

[0423] The first electrode and the floating diffusion are formed separately from each other,

[0424] An inter-capacitor insulating film is provided, the inter-capacitor insulating film being formed between the second electrode and the second dielectric film,

[0425] A portion of the third electrode including the one end of the third electrode is inserted into the inter-capacitor insulating film, and

[0426] The predetermined portion covered by the second dielectric film is a portion of the third electrode excluding the portion. (19)

[0428] The solid-state imaging element according to (18), wherein

[0429] The inter-capacitor insulating film is formed by using a material different from a material of the second dielectric film. (20)

[0431] The solid-state imaging element according to (18) or (19), further comprising:

[0432] a first sidewall insulating film, wherein the first sidewall insulating film is formed on a side surface of the second electrode,

[0433] The first sidewall insulating film is formed by using the same material as that of the inter-capacitor insulating film. (twenty one)

[0435] The solid-state imaging element according to (20), wherein

[0436] The first side wall insulating film is formed by using an oxide film or a nitride film. (twenty two)

[0438] The solid-state imaging element according to any one of (18) to (21), further comprising:

[0439] a transfer transistor that turns on or off charge transfer from the photodiode to the floating diffusion; and

[0440] a second sidewall insulating film formed on a side surface of the transfer transistor, wherein

[0441] The second sidewall insulating film is formed by using the same material as that of the inter-capacitor insulating film. (twenty three)

[0443] The solid-state imaging element according to (22), wherein

[0444] The second side wall insulating film is formed by using an oxide film or a nitride film. (twenty four)

[0446] The solid-state imaging element according to any one of (18) to (23), wherein

[0447] An opening is formed in a surface of the inter-capacitor insulating film facing the second dielectric film, and an opening area of ​​the opening viewed in the longitudinal direction of the third electrode is smaller than a cross-sectional area of ​​the predetermined portion of the third electrode viewed in the longitudinal direction. (25)

[0449] A method for manufacturing a solid-state imaging element, comprising:

[0450] forming a photodiode and a floating diffusion on a semiconductor substrate, the photodiode being configured to photoelectrically convert incident light and signal charge accumulated in the photodiode being transferred to the floating diffusion;

[0451] forming a capacitor including a PD-side electrode disposed on a surface of the photodiode opposite to a surface on which the light is incident, and an anti-PD-side electrode facing the PD-side electrode with a dielectric film interposed therebetween; and

[0452] forming an amplifier transistor that reads the signal charge transferred as an electric signal to the floating diffusion and amplifies the signal charge, wherein

[0453] The step of forming the capacitor includes:

[0454] a step of simultaneously forming a first contact hole in which at least a portion of the PD-side electrode is formed and a second contact hole in which an FD-side wiring electrode connecting the floating diffusion and the amplifying transistor is formed in the semiconductor substrate, wherein the first contact hole and the second contact hole are formed in a shape extending in the thickness direction of the semiconductor substrate, and

[0455] A step of simultaneously forming the FD side wiring electrode and the PD side electrode. (26)

[0457] A method for manufacturing a solid-state imaging element, comprising:

[0458] forming a photodiode and a floating diffusion on a semiconductor substrate, the photodiode being configured to photoelectrically convert incident light and signal charge accumulated in the photodiode being transferred to the floating diffusion;

[0459] forming a capacitor including a PD-side electrode disposed on a surface of the photodiode opposite to a surface on which the light is incident, and an anti-PD-side electrode facing the PD-side electrode with a dielectric film interposed therebetween; and

[0460] forming an amplifier transistor that reads the signal charge transferred as an electric signal to the floating diffusion and amplifies the signal charge, wherein

[0461] The step of forming the capacitor includes the step of simultaneously forming a first contact hole and a second contact hole in the semiconductor substrate, wherein at least a portion of the PD side electrode is formed in the first contact hole, and an FD side wiring electrode connecting the floating diffusion portion and the amplifying transistor is formed in the second contact hole, and the first contact hole and the second contact hole are formed into a shape extending along the thickness direction of the semiconductor substrate. (27)

[0463] A method for manufacturing a solid-state imaging element, comprising:

[0464] forming a photodiode and a floating diffusion on a semiconductor substrate, the photodiode being configured to photoelectrically convert incident light and signal charge accumulated in the photodiode being transferred to the floating diffusion;

[0465] forming a capacitor including a PD-side electrode disposed on a surface of the photodiode opposite to a surface on which the light is incident, and an anti-PD-side electrode facing the PD-side electrode with a dielectric film interposed therebetween; and

[0466] forming an amplifier transistor that reads the signal charge transferred as an electric signal to the floating diffusion and amplifies the signal charge, wherein

[0467] The step of forming the capacitor includes the step of simultaneously forming a PD side electrode in a first contact hole and a FD side wiring electrode in a second contact hole, wherein at least a portion of the PD side electrode is formed in the first contact hole, and the FD side wiring electrode connecting the floating diffusion portion and the amplifying transistor is formed inside the second contact hole. (28)

[0469] A method for manufacturing a solid-state imaging element, comprising:

[0470] forming a photodiode and a floating diffusion on a semiconductor substrate, the photodiode being configured to photoelectrically convert incident light and signal charges accumulated in the photodiode being transferred to the floating diffusion; and

[0471] a step of forming a capacitor including a PD-side electrode disposed on a surface of the photodiode opposite to the surface on which the light is incident, and an anti-PD-side electrode facing the PD-side electrode via a dielectric film, the dielectric film being sandwiched between the PD-side electrode and the anti-PD-side electrode; wherein,

[0472] The step of forming the capacitor includes:

[0473] forming a first capacitor portion, the first capacitor portion being formed in a first capacitor region predefined in the semiconductor substrate, and

[0474] forming a second capacitor portion disposed on a surface of the first capacitor portion on a side opposite to the photodiode side,

[0475] The step of forming the first capacitor portion includes:

[0476] forming a first electrode disposed on a surface of the first capacitor region on a side opposite to the photodiode side,

[0477] forming a first dielectric film, the first dielectric film being stacked on the first electrode, and

[0478] forming a second electrode stacked on the first dielectric film,

[0479] The step of forming the second capacitor portion includes:

[0480] forming the PD side electrode in a first contact hole for forming at least a portion of the PD side electrode therein and forming a columnar third electrode, the third electrode forming the PD side electrode and formed in the first contact hole, one end of the third electrode being connected to the second electrode,

[0481] forming a second dielectric film that forms the dielectric film and covers a predetermined portion of the third electrode including the other end of the third electrode, and

[0482] forming a fourth electrode, the fourth electrode forming the counter PD side electrode and facing the third electrode via the second dielectric film, the second dielectric film being sandwiched between the third electrode and the fourth electrode,

[0483] The solid-state imaging device manufacturing method further includes the step of forming an inter-capacitor insulating film between the second electrode and the second dielectric film.

[0484] In the step of forming the third electrode, the third electrode is formed in a state where a portion of the third electrode including the one end of the third electrode is inserted into the inter-capacitor insulating film formed in the step of forming the inter-capacitor insulating film, and

[0485] In the step of forming the second dielectric film, a portion of the third electrode other than the portion of the third electrode serves as the predetermined portion and covers the second dielectric film. (29)

[0487] The method for manufacturing a solid-state imaging element according to (28), wherein:

[0488] In the step of forming the inter-capacitor insulating film, the inter-capacitor insulating film is formed using a material different from a material of the second dielectric film. (30)

[0490] The method for manufacturing a solid-state imaging element according to (28) or (29), further comprising:

[0491] forming a first sidewall insulating film on the side surface of the second electrode, wherein:

[0492] In the step of forming the first side-wall insulating film, the first side-wall insulating film is formed using the same material as that of the inter-capacitor insulating film. (31)

[0494] The method for manufacturing a solid-state imaging element according to (30), wherein:

[0495] In the step of forming the first sidewall insulating film, the first sidewall insulating film is formed using an oxide film or a nitride film. (32)

[0497] The method for manufacturing a solid-state imaging element according to any one of (28) to (31), further comprising:

[0498] forming a transfer transistor that turns on or off charge transfer from the photodiode to the floating diffusion; and

[0499] a step of forming a second sidewall insulating film formed on a side surface of the transfer transistor, wherein

[0500] In the step of forming the second side-wall insulating film, the second side-wall insulating film is formed using the same material as that of the inter-capacitor insulating film. (33)

[0502] The method for manufacturing a solid-state imaging element according to (32), wherein:

[0503] In the step of forming the second sidewall insulating film, the second sidewall insulating film is formed using an oxide film or a nitride film. (34)

[0505] The method for manufacturing a solid-state imaging element according to any one of (28) to (33), wherein:

[0506] In the step of forming the inter-capacitor insulating film, an opening is formed in a surface of the inter-capacitor insulating film on a side facing the second dielectric film, and an opening area of ​​the opening as viewed in the longitudinal direction of the third electrode is smaller than a cross-sectional area of ​​the predetermined portion of the third electrode as viewed in the longitudinal direction.

[0507] List of reference numerals

[0508] 1: Solid-state imaging element

[0509] 2: Electronic devices

[0510] 3: Unit pixel

[0511] 4: Pixel area

[0512] 5: Vertical drive circuit

[0513] 6: Column selection circuit

[0514] 7: Horizontal drive circuit

[0515] 8: Output circuit

[0516] 9: Control circuit

[0517] 100:Semiconductor substrate

[0518] 101: first semiconductor substrate

[0519] 102: Second semiconductor substrate

[0520] 103: Interlayer insulating film

[0521] 110: Photodiode

[0522] 111: floating diffusion unit

[0523] 112: transfer transistor

[0524] 113: Reset transistor

[0525] 114: Amplifier transistor

[0526] 114a: Source-drain region of the amplifier transistor 114

[0527] 115:Switching transistor

[0528] 116: Select transistor

[0529] 120:Capacitor

[0530] 121: First capacitor unit

[0531] 122: Second capacitor unit

[0532] 130: PD side electrode

[0533] 131: first electrode

[0534] 131a: N+ area

[0535] 132: Third electrode

[0536] 140: Dielectric film

[0537] 141: first dielectric film

[0538] 142: Second dielectric film

[0539] 150: Anti-PD side electrode

[0540] 151: second electrode

[0541] 152: Fourth electrode

[0542] 160: first contact hole

[0543] 161: FD side wiring electrode

[0544] 162: second contact hole

[0545] 163: Fifth electrode

[0546] 164: Resist

[0547] 170: Loading electrode

[0548] 180: Insulating film between capacitors

[0549] 180a: Opening

[0550] 181: first sidewall insulating film

[0551] 182: Second sidewall insulating film

[0552] 183: Insulation forming film

[0553] 184: Integrated insulation film

[0554] 201: Optical system (optical lens)

[0555] 202: Shutter device

[0556] 203:Signal processing unit

[0557] 204:Drive unit

[0558] 11000:Endoscopic surgery system

[0559] 11100: Endoscope

[0560] 11101: Lens tube

[0561] 11102:Camera

[0562] 11110:Other surgical tools

[0563] 11111:Pneumoperitoneum tube

[0564] 11112:Energy Equipment

[0565] 11120: Support arm device

[0566] 11131: Surgeon (Physician)

[0567] 11133: Hospital bed

[0568] 11132: Patient

[0569] 11200: cart

[0570] 11201:CCU

[0571] 11202: Display device

[0572] 11203: Light source device

[0573] 11204: Input device

[0574] 11205:Processing tool control device

[0575] 11206:Pneumoperitoneum device

[0576] 11207:Recorder

[0577] 11208:Printer

[0578] 11400: Transmission Cable

[0579] 11401: Lens unit

[0580] 11402: Camera unit

[0581] 11403:Drive unit

[0582] 11404: Communication unit

[0583] 11405: Camera control unit

[0584] 11411:Communication unit

[0585] 11412: Image processing unit

[0586] 11413:Control Unit

[0587] 12000: Vehicle Control System

[0588] 12001: Communication Network

[0589] 12010: Drive system control unit

[0590] 12020:Body system control unit

[0591] 12030: External vehicle information detection unit

[0592] 12031 (12101 to 12105): Camera Department

[0593] 12040:In-vehicle information detection unit

[0594] 12041: Driver status detection unit

[0595] 12050: Integrated control unit

[0596] 12051: Microcomputer

[0597] 12052: Sound / image output unit

[0598] 12053:In-vehicle network (I / F)

[0599] 12061:Audio speakers

[0600] 12062: Display unit

[0601] 12063:Dashboard

[0602] 12100: Vehicle

[0603] 12111 to 12114: Camera range

[0604] VD: Pixel drive line

[0605] VL: Vertical signal line

[0606] VH: horizontal signal line

Claims

1. A solid-state imaging element, comprising: A semiconductor substrate including a photodiode and a floating diffusion portion, wherein the photodiode is configured to perform photoelectric conversion on incident light and signal charge accumulated in the photodiode is transferred to the floating diffusion portion, wherein the semiconductor substrate includes: a first semiconductor substrate in which a pixel circuit including the photodiode and the floating diffusion is provided, and a second semiconductor substrate stacked on a surface of the first semiconductor substrate on a side opposite to the photodiode side; A capacitor, comprising: a first capacitor portion formed in a first capacitor region pre-defined in the first semiconductor substrate, and a second capacitor portion provided on a surface of the first capacitor portion on a side opposite to the photodiode side and provided in the second semiconductor substrate, The first capacitor portion includes a first electrode provided on a surface of the photodiode in the first capacitor region opposite to the surface on which the light is incident, and a second electrode facing the first electrode with a first dielectric film interposed therebetween, the first electrode and the second electrode sandwiching the first dielectric film. The second capacitor unit includes: A columnar third electrode is formed in the first contact hole. One end of the third electrode is connected to the second electrode, a second dielectric film covering the third electrode except for the a portion other than a connection portion between the third electrode and the second electrode, and a fourth electrode, the fourth electrode facing the third electrode via the second dielectric film, the second dielectric film being sandwiched between the third electrode and the fourth electrode; an amplifying transistor that reads the signal charge transferred as an electric signal to the floating diffusion and amplifies the signal charge; and an FD-side wiring electrode connecting the floating diffusion and the amplifying transistor, wherein: At least a portion of the third electrode and the FD-side wiring electrode are formed in the second semiconductor substrate in a shape extending in the thickness direction of the second semiconductor substrate, and One end of the first contact hole in which at least a portion of the third electrode is formed and one end of the second contact hole in which the FD-side wiring electrode is formed are both located on the surface of the second semiconductor substrate opposite to the photodiode side.

2. The solid-state imaging element according to claim 1, wherein The first electrode and the floating diffusion are formed separately from each other.

3. The solid-state imaging element according to claim 2, wherein The second electrode is formed by using a polysilicon film.

4. The solid-state imaging element according to claim 2, wherein At least one of the third electrode and the fourth electrode is formed by using a high melting point metal.

5. The solid-state imaging element according to claim 2, wherein The second dielectric film is formed by using a ferroelectric film.

6. The solid-state imaging element according to claim 1, wherein A portion of the first electrode includes the floating diffusion.

7. The solid-state imaging element according to claim 6, wherein The second electrode is formed by using a polysilicon film.

8. The solid-state imaging element according to claim 6, wherein At least one of the third electrode and the fourth electrode is formed by using a high melting point metal.

9. The solid-state imaging element according to claim 6, wherein The second dielectric film is formed by using a ferroelectric film.

10. The solid-state imaging element according to claim 1, wherein The first semiconductor substrate includes a loading electrode stacked on a surface of the photodiode opposite to the surface on which the light is incident, and One end of the third electrode is connected to the loading electrode, The second dielectric film covers a portion of the third electrode except for a connection portion between the third electrode and the loading electrode.

11. The solid-state imaging element according to claim 10, wherein At least one of the third electrode and the fourth electrode is formed by using a high melting point metal.

12. The solid-state imaging element according to claim 10, wherein The second dielectric film is formed by using a ferroelectric film.

13. The solid-state imaging element according to claim 1, wherein The second dielectric film covers a predetermined portion of the third electrode including the other end of the third electrode, The first electrode and the floating diffusion are formed separately from each other, An inter-capacitor insulating film is provided, the inter-capacitor insulating film being formed between the second electrode and the second dielectric film, A portion of the third electrode including the one end of the third electrode is inserted into the inter-capacitor insulating film, and The predetermined portion covered by the second dielectric film is a portion of the third electrode excluding the portion.

14. The solid-state imaging element according to claim 13, wherein The inter-capacitor insulating film is formed by using a material different from a material of the second dielectric film.

15. The solid-state imaging element according to claim 13, further comprising: a first sidewall insulating film, wherein the first sidewall insulating film is formed on a side surface of the second electrode, The first sidewall insulating film is formed by using the same material as that of the inter-capacitor insulating film.

16. The solid-state imaging element according to claim 15, wherein The first side wall insulating film is formed by using an oxide film or a nitride film.

17. The solid-state imaging element according to claim 13, further comprising: a transfer transistor configured to turn on or off charge transfer from the photodiode to the floating diffusion; as well as a second sidewall insulating film formed on a side surface of the transfer transistor, wherein The second sidewall insulating film is formed by using the same material as that of the inter-capacitor insulating film.

18. The solid-state imaging element according to claim 17, wherein The second side wall insulating film is formed by using an oxide film or a nitride film.

19. The solid-state imaging element according to claim 13, wherein An opening is formed in a surface of the inter-capacitor insulating film facing the second dielectric film, and an opening area of ​​the opening viewed in the longitudinal direction of the third electrode is smaller than a cross-sectional area of ​​the predetermined portion of the third electrode viewed in the longitudinal direction.

20. A method for manufacturing a solid-state imaging element, comprising: The step of forming a photodiode and a floating diffusion portion on a semiconductor substrate, wherein the photodiode is configured to perform photoelectric conversion on incident light and signal charge accumulated in the photodiode is transferred to the floating diffusion portion, wherein the semiconductor substrate includes: a first semiconductor substrate in which a pixel circuit including the photodiode and the floating diffusion is provided, and a second semiconductor substrate stacked on a surface of the first semiconductor substrate on a side opposite to the photodiode side; The step of forming a capacitor, the capacitor comprising: a first capacitor portion formed in a first capacitor region pre-defined in the first semiconductor substrate, and a second capacitor portion provided on a surface of the first capacitor portion on a side opposite to the photodiode side and provided in the second semiconductor substrate, wherein the first capacitor portion includes a first electrode disposed on a surface of the photodiode in the first capacitor region opposite to the surface on which the light is incident, and a second electrode facing the first electrode via a first dielectric film, the first dielectric film being sandwiched between the first electrode and the second electrode, and The second capacitor unit includes: A columnar third electrode is formed in the first contact hole. One end of the third electrode is connected to the second electrode, a second dielectric film covering the third electrode except for the a portion other than a connection portion between the third electrode and the second electrode, and a fourth electrode facing the third electrode via the second dielectric film, the second dielectric film being sandwiched between the third electrode and the fourth electrode; and forming an amplifier transistor that reads the signal charge transferred as an electrical signal to the floating diffusion and amplifies the signal charge, wherein the step of forming the capacitor includes: a step of simultaneously forming the first contact hole and the second contact hole in the second semiconductor substrate, wherein at least a portion of the third electrode is formed in the first contact hole and an FD-side wiring electrode connecting the floating diffusion and the amplifying transistor is formed in the second contact hole, and wherein the first contact hole and the second contact hole are formed in a shape extending in the thickness direction of the second semiconductor substrate, and a step of simultaneously forming the FD-side wiring electrode and the third electrode.

21. A method for manufacturing a solid-state imaging element, comprising: The step of forming a photodiode and a floating diffusion portion on a semiconductor substrate, wherein the photodiode is configured to perform photoelectric conversion on incident light and signal charge accumulated in the photodiode is transferred to the floating diffusion portion, wherein the semiconductor substrate includes: a first semiconductor substrate in which a pixel circuit including the photodiode and the floating diffusion is provided, and a second semiconductor substrate stacked on a surface of the first semiconductor substrate on a side opposite to the photodiode side; The step of forming a capacitor, the capacitor comprising: a first capacitor portion formed in a first capacitor region pre-defined in the first semiconductor substrate, and a second capacitor portion provided on a surface of the first capacitor portion on a side opposite to the photodiode side and provided in the second semiconductor substrate, The first capacitor portion includes a first electrode arranged on a surface of the photodiode on the opposite side to the surface on which the light is incident in the first capacitor region, and a second electrode facing the first electrode via a first dielectric film, the first dielectric film being sandwiched between the first electrode and the second electrode, and The second capacitor unit includes: A columnar third electrode is formed in the first contact hole. One end of the third electrode is connected to the second electrode, a second dielectric film covering the third electrode except for the a portion other than a connection portion between the third electrode and the second electrode, and a fourth electrode facing the third electrode via the second dielectric film, the second dielectric film being sandwiched between the third electrode and the fourth electrode; and forming an amplifier transistor that reads the signal charge transferred as an electric signal to the floating diffusion and amplifies the signal charge, wherein The step of forming the capacitor includes the step of simultaneously forming the first contact hole and the second contact hole in the second semiconductor substrate, the first contact hole having at least a portion of the third electrode formed therein, the second contact hole having an FD-side wiring electrode connecting the floating diffusion portion and the amplifying transistor formed therein, the first contact hole and the second contact hole being formed into a shape extending in the thickness direction of the second semiconductor substrate.

22. A method for manufacturing a solid-state imaging element, comprising: The step of forming a photodiode and a floating diffusion portion on a semiconductor substrate, wherein the photodiode is configured to perform photoelectric conversion on incident light and signal charge accumulated in the photodiode is transferred to the floating diffusion portion, wherein the semiconductor substrate includes: a first semiconductor substrate in which a pixel circuit including the photodiode and the floating diffusion is provided, and a second semiconductor substrate stacked on a surface of the first semiconductor substrate on a side opposite to the photodiode side; The step of forming a capacitor, the capacitor comprising: a first capacitor portion formed in a first capacitor region pre-defined in the first semiconductor substrate, and a second capacitor portion provided on a surface of the first capacitor portion on a side opposite to the photodiode side and provided in the second semiconductor substrate, The first capacitor portion includes a first electrode arranged on a surface of the photodiode on the opposite side to the surface on which the light is incident in the first capacitor region, and a second electrode facing the first electrode via a first dielectric film, the first dielectric film being sandwiched between the first electrode and the second electrode, and The second capacitor unit includes: A columnar third electrode is formed in the first contact hole. One end of the third electrode is connected to the second electrode, a second dielectric film covering the third electrode except for the a portion other than a connection portion between the third electrode and the second electrode, and a fourth electrode facing the third electrode via the second dielectric film, the second dielectric film being sandwiched between the third electrode and the fourth electrode; and forming an amplifier transistor that reads the signal charge transferred as an electric signal to the floating diffusion and amplifies the signal charge, wherein The step of forming the capacitor includes the step of simultaneously forming the third electrode in the first contact hole of the second semiconductor substrate and the step of forming an FD side wiring electrode in the second contact hole of the second semiconductor substrate, wherein at least a portion of the third electrode is formed in the first contact hole, and the FD side wiring electrode connecting the floating diffusion portion and the amplifying transistor is formed inside the second contact hole.

23. A method for manufacturing a solid-state imaging element, comprising: forming a photodiode and a floating diffusion on a semiconductor substrate, the photodiode being configured to perform photoelectric conversion on incident light and transferring signal charge accumulated in the photodiode to the floating diffusion, wherein the semiconductor substrate comprises: a first semiconductor substrate in which a pixel circuit including the photodiode and the floating diffusion is provided, and a second semiconductor substrate stacked on a surface of the first semiconductor substrate on a side opposite to a side of the photodiode; and a step of forming a capacitor including a PD-side electrode disposed on a surface of the photodiode opposite to the surface on which the light is incident, and an anti-PD-side electrode facing the PD-side electrode via a dielectric film, the dielectric film being sandwiched between the PD-side electrode and the anti-PD-side electrode; wherein, The step of forming the capacitor includes: forming a first capacitor portion, the first capacitor portion being formed in a first capacitor region pre-defined in the first semiconductor substrate, and forming a second capacitor portion disposed on a surface of the first capacitor portion on the side opposite to the photodiode side and disposed in the second semiconductor substrate, The step of forming the first capacitor portion includes: forming a first electrode disposed on a surface of the first capacitor region on a side opposite to the photodiode side, forming a first dielectric film, the first dielectric film being stacked on the first electrode, and The step of forming a second electrode, wherein the second electrode is stacked on the first dielectric film, and the step of forming the second capacitor portion includes: forming the PD side electrode in a first contact hole for forming at least a portion of the PD side electrode therein and forming a columnar third electrode, the third electrode forming the PD side electrode and formed in the first contact hole, one end of the third electrode being connected to the second electrode, forming a second dielectric film that forms the dielectric film and covers a predetermined portion of the third electrode including the other end of the third electrode, and forming a fourth electrode, the fourth electrode forming the counter PD side electrode and facing the third electrode via the second dielectric film, the second dielectric film being sandwiched between the third electrode and the fourth electrode, The solid-state imaging device manufacturing method further includes the step of forming an inter-capacitor insulating film between the second electrode and the second dielectric film. In the step of forming the third electrode, the third electrode is formed in a state where a portion of the third electrode including the one end of the third electrode is inserted into the inter-capacitor insulating film formed in the step of forming the inter-capacitor insulating film, and In the step of forming the second dielectric film, a portion of the third electrode other than the portion of the third electrode serves as the predetermined portion and covers the second dielectric film.

24. The method for manufacturing a solid-state imaging element according to claim 23, wherein: In the step of forming the inter-capacitor insulating film, the inter-capacitor insulating film is formed using a material different from a material of the second dielectric film.

25. The method for manufacturing a solid-state imaging element according to claim 23, further comprising: forming a first sidewall insulating film on the side surface of the second electrode, wherein: In the step of forming the first side-wall insulating film, the first side-wall insulating film is formed using the same material as that of the inter-capacitor insulating film.

26. The method for manufacturing a solid-state imaging element according to claim 25, wherein In the step of forming the first sidewall insulating film, the first sidewall insulating film is formed using an oxide film or a nitride film.

27. The method for manufacturing a solid-state imaging element according to claim 23, further comprising: forming a transfer transistor that switches on or off charge transfer from the photodiode to the floating diffusion; as well as a step of forming a second sidewall insulating film formed on a side surface of the transfer transistor, wherein In the step of forming the second side-wall insulating film, the second side-wall insulating film is formed using the same material as that of the inter-capacitor insulating film.

28. The method for manufacturing a solid-state imaging element according to claim 27, wherein: In the step of forming the second sidewall insulating film, the second sidewall insulating film is formed using an oxide film or a nitride film.

29. The method for manufacturing a solid-state imaging element according to claim 23, wherein In the step of forming the inter-capacitor insulating film, an opening is formed in a surface of the inter-capacitor insulating film on a side facing the second dielectric film, and an opening area of ​​the opening observed in the length direction of the third electrode is smaller than a cross-sectional area of ​​the predetermined portion of the third electrode observed in the length direction.

Images