Memory device and operation method for controlling non-volatile memory

Abstract

The present invention provides an operation method and a memory device for controlling a non-volatile memory. The non-volatile memory includes a plurality of partitions. Each partition includes a plurality of storage units. The operation method includes: performing a plurality of programming operations on the plurality of storage units in sequence according to a plurality of increment commands, a partition sequence, and a storage unit sequence; when a read command is received, performing a plurality of read operations according to a partition sequence and a storage unit sequence until the last programmed storage unit is known; and calculating a playback protection monotonic count value associated with the number of increment commands according to the address of the last programmed storage unit.

Description

Technical Field

[0001] The present invention relates to an operation method and a memory device for controlling a non-volatile memory, and in particular to an operation method and a memory device for replaying a protection monotonic counter. Background Art

[0002] Generally, memory devices do not provide any protection against hardware attacks. Therefore, hackers can tamper with the memory device to modify the contents of the memory device. In order to prevent hackers from attacking, the memory device is designed to first authenticate the user of the command sent to the memory device. The method of authentication is to generate a signature for verification between the user and the memory device.

[0003] Replay-Protected Monotonic Counter (RPMC) is one of the encryption protocols. RPMC can be used to strengthen the confidentiality requirements of memory devices, such as in applications such as the Internet of Things (IoT). RPMC provides a dynamic replay-protected monotonic counter value. RPMC can increment the replay-protected monotonic counter value according to the operation of the memory device or the operation of the related device connected to the memory device, and provide the replay-protected monotonic counter value according to external instructions. Therefore, the replay-protected monotonic counter value is randomly incremented. Hackers cannot know the replay-protected monotonic counter value of RPMC. Only the user (because he controls the operation of the counter) and the memory device (because the information is stored in the memory array) know the replay-protected monotonic counter value. In other words, only the user can complete the identity authentication through the replay-protected monotonic counter value to obtain the right to operate the memory device.

[0004] RPMC can be according to the increment command each time to a plurality of storage cells of a internal memory and perform programming operation one by one, and just counts the number of times of programming operation to know the playback protection monotone count value when receiving the read command.It should be noted that RPMC must carry out the read operation to know the quantity of the storage cells programmed because of the increment command one by one to a plurality of storage cells of the internal memory.Wherein, the number of times of read operation can be directly proportional to the quantity of the storage cells programmed because of the increment command roughly.Therefore, when the storage cells that the increment command is programmed are more, the number of times of required read operation is also more, so that RPMC can need the very long time to know the playback protection monotone count value. Summary of the invention

[0005] The invention provides an operation method and a memory device capable of accelerating the acquisition of a playback protection monotonic count value.

[0006] The operation method of the present invention is applicable to controlling a non-volatile memory. The non-volatile memory includes a plurality of partitions. The plurality of partitions have a partition order with respect to each other. The plurality of storage cells of each of the plurality of partitions have the same storage cell order with respect to each other. The operation method includes: performing a plurality of programming operations on the plurality of storage cells of the plurality of partitions in sequence according to a plurality of increment commands, a partition order, and a storage cell order; when a read command is received, performing a plurality of read operations according to the partition order and the storage cell order until the last programmed storage cell is known; and calculating a playback protection monotonic count value associated with the number of increment commands according to the address of the last programmed storage cell.

[0007] The memory device of the present invention is suitable for use as a playback protection monotonic counter. The memory device includes a non-volatile memory and a controller. The non-volatile memory includes multiple partitions. The multiple partitions have a partition order with respect to each other. The multiple storage units of each of the multiple partitions have the same storage unit order with respect to each other. The controller is coupled to the non-volatile memory. The controller is configured to receive multiple increment commands, and perform multiple programming operations on the multiple storage units of the multiple partitions in sequence according to the increment commands, the partition order, and the storage unit order. The controller is also configured to perform multiple read operations according to the partition order and the storage unit order until the last programmed storage unit is known when a read command is received, and calculate the playback protection monotonic counter value according to the address of the last programmed storage unit.

[0008] Based on the above, the present invention performs multiple programming operations on the storage unit in sequence according to multiple increment commands, partition order and storage unit order. The present invention performs multiple read operations according to a read command, partition order and storage unit order to obtain the last programmed storage unit. The present invention will further calculate the playback protection monotonic count value associated with the number of increment commands according to the address of the last programmed storage unit. In this way, the present invention can accelerate the acquisition of the playback protection monotonic count value.

[0009] In order to make the above features and advantages of the present invention more clearly understood, embodiments are given below and described in detail with reference to the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0010] The accompanying drawings are included to provide a further understanding of the present invention and are incorporated in and constitute a part of this specification. The drawings illustrate embodiments of the present invention and together with the description serve to explain the principles of the present invention.

[0011] Figure 1 is a method flow chart of an operation method according to a first embodiment of the present invention;

[0012] Figure 2is a schematic diagram of a memory device according to a first embodiment of the present invention;

[0013] Figure 3 and Figure 4 They are respectively a method flow chart and an example schematic diagram of programming steps of an operating method according to a second embodiment of the present invention;

[0014] Figure 5 and Figure 6 They are respectively a method flow chart and an example schematic diagram of a reading step of an operation method according to a second embodiment of the present invention;

[0015] Figure 7 and Figure 8 They are respectively a method flow chart and an example schematic diagram of programming steps of an operating method according to a third embodiment of the present invention;

[0016] Fig. 9 and Fig.10 They are respectively a method flow chart and an example schematic diagram of a reading step of an operating method according to a third embodiment of the present invention.

[0017] Description of Figure Numbers

[0018] 100: electronic device;

[0019] 110: non-volatile memory;

[0020] 120: controller;

[0021] SG1~SGN: partition;

[0022] b1_1~b1_8, b2_1~b2_8: storage unit;

[0023] RS: replay protection monotonic count value;

[0024] ICMD: increment command;

[0025] RCMD: read command;

[0026] S110-S130, S211-S219, S221-S231, S311-S319, S321-S329: steps;

[0027] (a), (b), (c): Examples of the second embodiment;

[0028] (d), (e), (f): Examples of the third embodiment. DETAILED DESCRIPTION

[0029] Reference will now be made in detail to exemplary embodiments of the present invention, examples of which are illustrated in the accompanying drawings. Whenever possible, the same reference numerals are used in the drawings and the description to refer to the same or like parts.

[0030] Figure 1 is a method flow chart of an operating method according to a first embodiment of the present invention. Figure 2 is a schematic diagram of a memory device according to a first embodiment of the present invention. Figure 1 and Figure 2 , the memory device 100 includes a non-volatile memory 110 and a controller 120. The non-volatile memory 110 includes N partitions SG1~SGN, and each partition SG1~SGN has M storage cells, and M and N are both positive integers greater than 1. That is, each partition SG1~SGN has M bits. Among them, each partition SG1~SGN has a partition order. The M storage cells in each partition SG1~SGN have the same storage cell order. In this embodiment, the partition order and the storage cell order are respectively used for programming orders associated with the increment command ICMD. The partition order and the storage cell order are also respectively used for storage cell reading orders associated with the replay protection monotonic counter (Replay-Protected Monotonic Counter, RPMC). The non-volatile memory 110 can be, for example, a ferroelectric random access memory, a phase change random access memory, a magnetoresistive random access memory, and a resistive random access memory or a combination thereof.

[0031] In the present embodiment, the controller 120 is coupled to the non-volatile memory 110. The controller 120 receives multiple increment commands ICMD in step S110, and performs multiple programming operations on the storage cells of the partitions SG1 to SGN in sequence according to the multiple increment commands ICMD, the partition sequence, and the storage cell sequence. For example, in step S110, when the controller 120 receives the first increment command ICMD, it performs a single programming operation on a single storage cell of the partitions SG1 to SGN according to the partition sequence and the storage cell sequence. Then, when the controller 120 receives the second increment command ICMD, it performs a single programming operation on another storage cell of the partitions SG1 to SGN according to the partition sequence and the storage cell sequence. That is, each time the increment command ICMD is received, the controller 120 performs a programming operation on the non-volatile memory 110 according to the partition sequence and the storage cell sequence. In the present embodiment, the programming operation is an operation of converting the logic value of the storage cell from "1" to "0".

[0032] The controller 120 receives a read command RCMD in step S120, and performs multiple read operations according to the read command RCMD, the partition sequence, and the storage unit sequence until the last programmed storage unit is known. For example, in step S120, when the controller 120 receives the read command RCMD, it performs multiple read operations on the non-volatile memory 110 according to the partition sequence and the storage unit sequence. When the controller 120 knows the last programmed storage unit in the non-volatile memory 110, it stops the read operation.

[0033] In step S130, the controller 120 calculates the playback protection monotonic count value RS associated with the number of increment commands ICMD according to the information of the last programmed memory cell. Specifically, the controller 120 can calculate the number of programmed memory cells (equivalent to the number of increment commands ICMD) according to the address of the last programmed memory cell, and then calculate the playback protection monotonic count value RS associated with the number of increment commands ICMD.

[0034] It is worth mentioning that the controller 120 performs programming operations on the non-volatile memory 110 based on the partition order and the storage unit order. The controller 120 also performs a read operation on the non-volatile memory 110 based on the partition order and the storage unit order until the last programmed storage unit is known, and calculates the playback protection monotonic count value RS based on the information of the last programmed storage unit. Compared with the current RPMC method that must read multiple storage units of the memory one by one, the memory device 100 can obtain the playback protection monotonic count value RS more quickly.

[0035] Figure 3 is a method flow chart of the programming steps of the operation method according to the second embodiment of the present invention. Figures 1 to 3, the programming steps of this embodiment are applicable to step S110 of the first embodiment. In this embodiment, the controller 120 initializes a base value B in step S211. Here, the controller 120, for example, initially sets the base value B to 0 (the present invention is not limited to this). In this embodiment, the base value B is used to accumulate the total number of programmed storage cells in the non-volatile memory 110 when all storage cells in partitions SG1 to SGN in the non-volatile memory 110 have been programmed. Specifically, when all storage cells in partitions SG1 to SGN in the non-volatile memory 110 have been programmed, the controller 120 adds a default value to the base value B and then erases the storage cells in all partitions SG1 to SGN in the non-volatile memory 110. In this embodiment, the default value is, for example, equal to the total number of storage cells in the non-volatile memory 110. For example, if there are 8 partitions SG1-SG8 (i.e., N=8), and each partition has 4,096 bits (i.e., M=4096), the default value may be N*M=32,768. In some embodiments, the default value may be greater than the total number of storage cells in the non-volatile memory 110. In this embodiment, the erase operation is an operation of converting the logic value of a storage cell from "0" to "1".

[0036] In step S212, the controller 120 will initially set the programming partition and the address of the target memory cell to be programmed in the programming partition. Specifically, the controller 120 sets the jth partition as the programming partition, and sets the i-th memory cell of the jth partition as the target memory cell to be programmed. Therefore, the controller 120 will initialize the values ​​of i and j in step S212. For example, the controller 120 sets the 1st partition as the programming partition, and initially sets the 1st memory cell of the programming partition as the target memory cell to be programmed (i.e., setting i=1, j=1). That is, steps S211 and S212 are initialization steps in the programming steps. In this embodiment, 1≦j≦N, 1≦i≦M.

[0037] In step S213, when the controller 120 receives the increment command ICMD, the controller 120 performs a programming operation on the target memory cell in step S214. For example, when the controller 120 receives the increment command ICMD for the first time in step S213, the controller 120 performs a programming operation on the first bit memory cell of the first partition. If the controller 120 does not receive the increment command ICMD in step S213, it maintains step S213 to wait for the increment command ICMD.

[0038] In step S215, the controller 120 determines whether the target memory cell is the last memory cell of the programming partition. If the target memory cell is not the last memory cell of the programming partition, the controller 120 sets the next memory cell as the target memory cell in step S216, and returns to step S213 to wait for the next increment command ICMD. Specifically, in step S216, the controller 120 sets the next memory cell of the programming partition as the target memory cell according to the memory cell sequence, for example, setting i=i+1 (the j value remains unchanged). That is, in this embodiment, the controller 120 increments according to the memory cell sequence to perform programming operations on multiple memory cells of the programming partition based on the loop of steps S213 to S216. In other embodiments, in step S212, the controller 120 may initially set the last bit storage cell of the first partition SG1 as the target storage cell to be programmed (i.e., setting i=M, j=1), and then in step S216, i=i-1 may be set. Therefore, the controller 120 performs programming operations on multiple storage cells of the programming partition based on a loop of steps S213 to S216 in descending order of the storage cells.

[0039] On the other hand, in step S215, if the target memory cell is the last memory cell of the programming partition, it means that the last memory cell of the programming partition has been programmed. At this time, the controller 120 will determine whether the programming partition is the last partition in step S217. If the programming partition is not the last partition, the controller 120 will set the first memory cell of the next partition as the target memory cell in step S218, and return to step S213 to wait for the next increment command ICMD. Specifically, the controller 120 will set the next partition as the programming partition according to the partition order in step S218, and set the first memory cell of the programming partition as the target memory cell according to the memory cell partition, for example, setting j=j+1 and i=1. That is, in this embodiment, when multiple memory cells of the programming partition are programmed, the controller 120 will increment according to the partition order to perform programming operations on multiple memory cells of the next partition based on the loop of steps S213 to S216.

[0040] On the other hand, in step S217, if the programming partition is the last partition, the controller 120 will update the base value B in step S219, perform an erase operation on the memory cells of all partitions SG1 to SGN, and return to step S212 to re-initialize the programming partition and the address of the target memory cell to be programmed in the programming partition. That is, when the memory cells of all partitions SG1 to SGN are programmed, the controller 120 will update the base value B and erase all memory cells, and then restart step S212. In this embodiment, a default value is added to the base value B in step S219. The default value is greater than or equal to the total number of memory cells of all partitions SG1 to SGN. After that, the controller 120 will return to step S212 to initialize the i value and the j value.

[0041] Figure 4 is a schematic diagram of an example of programming steps of an operating method according to a second embodiment of the present invention. Figure 4 In the example, two partitions SG1 and SG2 each include 8 storage cells. Partition SG1 includes storage cells b1_1 to b1_8. Partition SG2 includes storage cells b2_1 to b2_8. Example (a) is the programming result after receiving 5 increment commands ICMD. Example (b) is the programming result after receiving 10 increment commands ICMD. Example (c) is the programming result after receiving 16 increment commands ICMD.

[0042] Please refer to Figures 2 to 4 First, the controller 120 sets the base value B to 0, sets the first partition as the programming partition, and sets the first storage cell b1_1 of the programming partition SG1 as the target storage cell to be programmed (steps S211, S212). When the increment command ICMD is received, the controller 120 performs a programming operation on the target storage cell b1_1 (steps 213, S214). Next, the controller 120 determines that the target storage cell b1_1 is not the last storage cell of the programming partition SG1 (step S215). Therefore, the controller 120 sets the next storage cell b1_2 of the programming partition SG1 as the target storage cell according to the storage cell sequence (step S216), and performs a programming operation on the target storage cell b1_2 when the increment command ICMD is received next time (steps S213, S214), and so on. When receiving the fifth increment command ICMD, the controller 120 performs a programming operation on the fifth memory cell b1_5 of the programming partition SG1 (as shown in example (a)).

[0043] When the 8th increment command ICMD is received, the controller 120 performs a programming operation on the 8th bit storage cell b1_8 of the programming partition SG1 (steps S213, S214). Then, the controller 120 determines that the target storage cell b1_8 is the last bit of the programming partition SG1, and the programming partition SG1 is not the last partition (steps S215, S217). Therefore, the controller 120 sets the next partition SG2 as the programming partition according to the partition order, and sets the 1st bit storage cell b2_1 of the programming partition SG2 as the target storage cell (step S218), and then re-performs a programming operation on the storage cells of the programming partition SG2 based on the loop of steps S213 to S216. Therefore, when the 9th increment command ICMD is received, the controller 120 performs a programming operation on the 1st bit storage cell b2_1 of the programming partition SG2. Next, when the 10th increment command ICMD is received, the controller 120 performs a programming operation on the second bit storage cell b2_2 of the programming partition SG2 (as shown in example (b)), and so on. When the 16th increment command ICMD is received, the controller 120 performs a programming operation on the eighth bit storage cell b2_8 of the programming partition SG2 (as shown in example (c)). At this time, the controller 120 determines that the target storage cell b2_8 is the last bit of the programming partition SG2, and the programming partition SG2 is the last partition (steps S215, S217).

[0044] Next, the controller 120 updates the base value B, performs an erase operation on all the partitions SG1 and SG2 (step S219), and after re-initializing the programming partition and the address of the target memory cell to be programmed in the programming partition (step S212), waits for the next increment command ICMD. Here, for example, the base value B is added with 16, so the updated base value B is equal to 16.

[0045] Figure 5 is a flowchart of the reading step of the operation method according to the second embodiment of the present invention. Figure 1 , Figure 2 and Figure 5, the reading step of this embodiment is applicable to step S120 of the first embodiment, and is executed when the controller 120 receives a read command RCMD. In step S221, the controller 120 will initially set the read partition and the address of the target storage unit to be read in the read partition. Specifically, the controller 120 sets the jth partition as the read partition, and sets the i-th storage unit of the read partition as the target storage unit to be read, so the controller 120 will initialize the values ​​of i and j in step S221. For example, the controller 120 sets the 1st partition as the read partition, and initially sets the 1st storage unit of the read partition as the target storage unit to be read (i.e., set i=1, j=1). The controller 120 then performs a read operation on the target storage unit in step S222, and determines whether the target storage unit is a programmed storage unit in step S223. If the target storage unit is a programmed storage unit, the controller 120 will determine whether the read partition is the last partition in step S224. If the read partition is not the last partition, the controller 120 sets the i-th storage cell of the next partition as the target storage cell in step S225, and returns to step S222 to perform a read operation on the target storage cell. Specifically, the controller 120 sets the next partition as the read partition according to the partition order in step S225, and sets the i-th storage cell of the read partition as the target storage cell, for example, setting j=j+1 (the value of i remains unchanged). That is, if the controller 120 determines in steps S223 and S224 that the target storage cell is a programmed storage cell, and the read partition is not the last partition, the controller 120 sets the i-th storage cell of the next partition as the target storage cell in increments according to the partition order.

[0046] In the loop of steps S222 to S225, the value of i does not change (for example, it is maintained as 1 here). Therefore, the controller 120 reads the i-th storage cell of each partition one by one according to the partition order until an i-th storage cell that is not programmed is found (step S223-No) or the i-th storage cells of all partitions are programmed storage cells (step S224-Yes).

[0047] On the other hand, if the controller 120 determines in step S223 that the target memory cell is not a programmed memory cell, the controller 120 sets the previous partition as a read partition in step S226, sets the next memory cell of the read partition as the target memory cell, and performs a read operation on the target memory cell in step S227. Specifically, the controller 120 sets the previous partition as a read partition according to the partition sequence in step S226, and sets the next memory cell as the target memory cell according to the memory cell sequence, for example, setting j=j-1 and i=i+1. That is, when the controller 120 finds the i-th memory cell that is not programmed in the loop of steps S222 to S225, the controller 120 then performs a read operation on the next memory cell of the previous partition.

[0048] Next, the controller 120 determines whether the target memory cell is a memory cell to be programmed in step S228. If the target memory cell is not a memory cell to be programmed, the controller 120 obtains the last memory cell to be programmed in step S231. That is, at this time, the (i-1)th memory cell of the jth partition is the last memory cell to be programmed.

[0049] If the controller 120 determines in step S228 that the target memory cell is a memory cell to be programmed, the controller 120 determines in step S229 whether the target memory cell is the last memory cell of the read partition. If the target memory cell is the last memory cell of the read partition, the controller 120 also learns the last memory cell to be programmed in step S231. That is, at this time, the i-th memory cell of the j-th partition is the last memory cell to be programmed.

[0050] In addition, if the controller 120 determines in step S229 that the target storage unit is not the last storage unit of the read partition, the controller 120 sets the next storage unit as the target storage unit in step S230. Specifically, in step S230, the controller 120 sets the next storage unit of the read partition as the target storage unit according to the storage unit sequence, for example, setting i=i+1 (the value of j remains unchanged). Then, the controller 120 returns to step S227 to continue to perform the read operation on the target storage unit. In addition, when the controller 120 determines in step S224 that the read partition is the last partition, the controller 120 executes step S230.

[0051] It can be seen that in this embodiment, based on steps S226 to S231, the controller 120 reads multiple storage cells of the previous partition according to the partition order and the storage cell order. Then, the controller 120 obtains the last programmed storage cell according to one of the judgment results of the first reading of the unprogrammed storage cell in this partition and the judgment results that the multiple storage cells in this partition are all programmed.

[0052] Figure 6 FIG. 1 is a schematic diagram showing an example of a reading step of an operation method according to a second embodiment of the present invention. Figure 6 In the example of Figure 4 Take the reading operation of the programming results of examples (a) to (c) as an example.

[0053] Please refer to Figure 1-2 and Figures 4 to 6When reading the programming result of example (a), first, the controller 120 sets the first partition SG1 as the read partition, sets the first bit storage cell b1_1 of the read partition SG1 as the target storage cell to be read, and performs a read operation on the target storage cell b1_1 (steps S221, S222). The controller 120 then determines that the target storage cell b1_1 is the storage cell to be programmed, and the read partition SG1 is not the last partition (steps S223, S224). Therefore, the controller 120 sets the next partition SG2 as the read partition according to the partition order, sets the first bit storage cell b2_1 of the read partition SG2 as the target storage cell, and continues to perform a read operation on the target storage cell b2_1 (steps 225, S222). The controller 120 then determines that the target memory cell b2_1 is not a memory cell to be programmed (step S223), so the controller 120 sets the previous partition SG1 as the read partition according to the partition order, sets the next memory cell b1_2 of the read partition SG1 as the target memory cell, and continues to perform the read operation on the target memory cell b1_2 (steps S226, S227). The controller 120 then determines that the target memory cell b1_2 is a memory cell to be programmed, and the target memory cell b1_2 is not the last memory cell of the read partition SG1 (steps S228, S229). Therefore, the controller 120 sets the next memory cell b1_3 of the read partition SG1 as the target memory cell according to the memory cell order, and continues to perform the read operation on the target memory cell b1_3 (steps S230, S227), and so on. When the controller 120 reads the target memory cell b1_6, it determines that the target memory cell b1_6 is not a memory cell to be programmed (steps S227, S228), and thus it is known that the memory cell b1_5 of the previous bit of the read partition SG1 is the last memory cell to be programmed (step S231). In example (a), the controller 120 can know that the memory cell b1_5 is the last memory cell to be programmed after 7 read operations.

[0054] When reading the programming result of example (b), first, the controller 120 sets the first partition SG1 as the read partition, sets the first bit memory cell b1_1 of the read partition SG1 as the target memory cell to be read, and performs a read operation on the target memory cell b1_1 (steps S221, S222). The controller 120 then determines that the target memory cell b1_1 is a memory cell to be programmed, and the read partition SG1 is not the last partition (steps S223, S224), so the controller 120 sets the next partition SG2 as the read partition according to the partition order, sets the first bit memory cell b2_1 of the read partition SG2 as the target memory cell, and continues to perform a read operation on the target memory cell b2_1 (steps 225, S222). The controller 120 then determines that the target memory cell b2_1 is a memory cell to be programmed, and the read partition SG2 is the last partition (steps S223, S224). Therefore, the controller 120 sets the next memory cell b2_2 of the read partition SG2 as the target memory cell according to the memory cell sequence, and continues to perform a read operation on the target memory cell b2_2 (steps S230, S227). The controller 120 then determines that the target memory cell b2_2 is a programmed memory cell, and the target memory cell b2_2 is not the last memory cell of the second partition (steps S228, S229). Therefore, the controller 120 sets the next memory cell b2_3 of the read partition SG2 as the target memory cell according to the memory cell sequence, and continues to perform a read operation on the target memory cell b2_3 (steps S230, S227). The controller 120 then determines that the target memory cell b2_3 is not a programmed memory cell, and thus learns that the previous memory cell b2_2 is the last programmed memory cell (steps S228, S231). In example (b), the controller 120 may know that the memory cell b2_2 is the last programmed memory cell after four read operations.

[0055] When reading the programming result of example (c), first, the controller 120 sets the first partition SG1 as the read partition, sets the first bit memory cell b1_1 of the read partition SG1 as the target memory cell to be read, and performs a read operation on the target memory cell b1_1 (steps S221, S222). The controller 120 then determines that the target memory cell b1_1 is a memory cell to be programmed, and the read partition SG1 is not the last partition (steps S223, S224), so the controller 120 sets the next partition SG2 as the read partition according to the partition order, sets the first bit memory cell b2_1 of the read partition SG2 as the target memory cell, and continues to perform a read operation on the target memory cell b2_1 (steps 225, S222). The controller 120 then determines that the target memory cell b2_1 is a memory cell to be programmed, and the read partition SG2 is the last partition (steps S223, S224). Therefore, the controller 120 sets the next memory cell b2_2 of the read partition SG2 as the target memory cell according to the memory cell sequence, and continues to perform the read operation on the target memory cell b2_2 (steps S230, S227). The controller 120 then determines that the target memory cell b2_2 is a programmed memory cell, and the target memory cell b2_2 is not the last memory cell of the second partition (steps S228, S229). Therefore, the controller 120 sets the next memory cell b2_3 of the read partition SG2 as the target memory cell according to the memory cell sequence, and continues to perform the read operation on the target memory cell b2_3 (steps S230, S227), and so on. When the controller 120 reads the target memory cell b2_8, it determines that the target memory cell b2_8 is the memory cell to be programmed (steps S227, S228). The controller 120 then determines that the target memory cell b2_8 is the last memory cell of the read partition SG2, and thus it is known that the target memory cell b2_8 is the last memory cell to be programmed (step S231). In example (c), the controller 120 can know that the memory cell b2_8 is the last memory cell to be programmed after 9 read operations.

[0056] Please refer again Figure 1-2 and Figures 4 to 6 When the last programmed memory cell is known, the controller 120 will Figure 1In step S130, the playback protection monotonic count value RS associated with the number of increment commands ICMD is calculated based on the base value B and the address of the last programmed storage unit. For example, taking example (b) of the second embodiment as an example, the last programmed storage unit is storage unit b2_2. Based on storage unit b2_2, it can be known that all storage units b1_1 to b1_8 of the first partition SG1 and storage units b2_1 to b2_2 of the second partition SG2 in this example are programmed. Since the number of increment commands ICMD will be equal to the sum of the number of bits of all programmed storage units (that is, 10) and the base value (that is, 0), the playback protection monotonic count value RS will be equal to the number of increment commands ICMD. Therefore, the playback protection monotonic count value RS is equal to 10.

[0057] Figure 7 is a method flow chart of the programming steps of the operation method according to the third embodiment of the present invention. Figure 1 , Figure 2 and Figure 7 The programming steps of this embodiment are applicable to step S110 of the first embodiment. Steps S311 to S314 of this embodiment can refer to the relevant description of steps S211 to S214 of the second embodiment, and will not be repeated here.

[0058] Continuing with step S314, in step S315, the controller 120 determines whether the programming partition is the last partition. If the programming partition is not the last partition, the controller 120 sets the next partition as the read partition in step 316, sets the i-th storage cell of the read partition as the target storage cell, and returns to step S313 to wait for the next increment command ICMD. Specifically, in step S316, the controller 120 sets the next partition as the programming partition according to the partition order, and sets the i-th storage cell of the programming partition as the target storage cell, for example, setting j=j+1 (the value of i remains unchanged). That is, in this embodiment, the controller S120 performs programming operations on the i-th storage cells of all partitions based on the loop of steps S313 to S316 according to the partition order.

[0059] On the other hand, in step S315, if the programming partition is the last partition, it means that the i-th storage cell of all partitions has been programmed. At this time, the controller 120 will determine whether the target storage cell is the last storage cell of the programming partition in step S317. If the target storage cell is not the last storage cell, the controller 120 will set the next storage cell of the first partition as the target storage cell in step S318, and return to step S313 to wait for the next increment command ICMD. Specifically, the controller 120 will set the first partition as the programming partition according to the partition order in step S318, and set the next storage cell as the target storage cell according to the storage cell order, for example, setting j=1 and i=i+1. That is, in this embodiment, when the i-th storage cell of all partitions SG1~SGN is programmed, the controller 120 will then perform the programming operation on the next storage cell of all partitions based on the loop of steps S313~S316.

[0060] On the other hand, in step S317, if the target memory cell is the last memory cell of the programming partition, the controller 120 will update the base value B in step S319 and perform an erase operation on the memory cells of all partitions SG1 to SGN. The step S319 of this embodiment can refer to the relevant description of the step S219 of the second embodiment, so it will not be repeated.

[0061] Figure 8 is a schematic diagram of an example of programming steps of an operating method according to a third embodiment of the present invention. Figure 8 In the example, two partitions SG1 and SG2 each include 8 storage cells. Partition SG1 includes storage cells b1_1 to b1_8. Partition SG2 includes storage cells b2_1 to b2_8. Example (d) is the programming result after receiving 7 increment commands ICMD. Example (e) is the programming result after receiving 10 increment commands ICMD.

[0062] Please refer to Figure 2 , Figure 7 and Figure 8First, the controller 120 sets the base value B to 0, sets the first partition as the programming partition, and sets the first bit storage cell b1_1 of the programming partition SG1 as the target storage cell to be programmed (steps S311, S312). When the increment command ICMD is received, the controller 120 performs a programming operation on the target storage cell b1_1 (steps S313, S314). Then, the controller 120 determines that the programming partition SG1 is not the last partition (step S315). Therefore, the controller 120 sets the next partition SG2 as the programming partition according to the partition order, sets the first bit storage cell b2_1 of the programming partition SG2 as the target storage cell (step S316), and performs a programming operation on the target storage cell b2_1 when the increment command ICMD is received next time (steps S313, S314). Then, the controller 120 determines that the read partition SG2 is the last partition, and determines that the target storage cell is not the last bit storage cell (steps S315, S317). Therefore, the controller 120 sets the first partition as the programming partition and sets the next memory cell b1_2 of the programming partition as the target memory cell (step S318). When the increment command ICMD is received again, the controller 120 performs a programming operation on the target memory cell b1_2 (steps S313, S314), and so on. When the seventh increment command ICMD is received, the controller 120 performs a programming operation on the fourth memory cell b1_4 of the first partition SG1 (steps S313, S314, at this time, the memory cells b2_2, b1_3, and b2_3 have also been programmed, as shown in example (d)). When the tenth increment command ICMD is received, the controller 120 performs a programming operation on the fifth memory cell b2_5 of the second partition SG2 (steps S313, S314, at this time, the memory cells b2_4 and b1_5 have also been programmed, as shown in example (e)). When receiving the 16th increment command ICMD, the controller 120 performs a programming operation on the 8th memory cell b2_8 of the second partition SG2 (steps S313 and S314, at which time the memory cells b1_6, b2_6, b1_7, b2_7, and b1_8 have also been programmed, as shown in example (f)).

[0063] Fig. 9 is a method flow chart of the reading steps of the operation method according to the third embodiment of the present invention. Figure 1 , Figure 2 and Fig. 9, the reading step of this embodiment is applicable to step S120 of the first embodiment, and is executed when the controller 120 receives a read command RCMD. In step S321, the controller 120 will initially set the read partition and the address of the target storage unit to be read in the read partition. Specifically, the controller 120 sets the jth partition as the read partition, and sets the i-th storage unit of the read partition as the target storage unit to be read, so the controller 120 will initialize the values ​​of i and j in step S321. For example, the controller 120 sets the last partition as the read partition, and initially sets the 1st storage unit of the read partition as the target storage unit to be read (i.e., set i=1, j=N). The controller 120 then performs a read operation on the target storage unit in step S322, and determines whether the target storage unit is a programmed storage unit in step S323. If the target storage unit is a programmed storage unit, the controller 120 will determine whether the target storage unit is the last storage unit of the read partition in step S324. If the target memory cell is not the last memory cell of the read partition, the controller will set the next memory cell as the target memory cell in step S325, and return to step S322 to perform a read operation on the target memory cell. Specifically, the controller 120 will set the next memory cell of the read partition as the target memory cell according to the memory cell sequence in step S325, for example, setting i=i+1 (the value of j remains unchanged).

[0064] If the controller 120 determines in step S323 that the target memory cell is not a programmed memory cell, the controller 120 sets the i-th memory cell of the previous partition as the target memory cell in step S327, and performs a read operation on the target memory cell in step S328. Specifically, the controller 120 sets the previous partition as the read partition according to the partition order in step S326, and sets the i-th memory cell of the read partition as the target memory cell, for example, setting j=j-1 (i value remains unchanged). That is, if the controller 120 finds an i-th memory cell that is not programmed in the loop of steps S322 to S325, the controller 120 performs a read operation on the i-th memory cell of the previous partition.

[0065] Next, the controller 120 determines whether the target memory cell is a memory cell to be programmed in step S328. If the target memory cell is a memory cell to be programmed, the controller 120 learns the last programmed memory cell in step S330. That is, at this time, the i-th memory cell of the j-th partition is the last programmed memory cell.

[0066] However, when the controller 120 determines in step S328 that the target memory cell is not a memory cell to be programmed, the controller 120 determines in step S329 whether the read partition is the first partition. If the read partition is not the first partition, the controller 120 returns to step S326 and sets the previous partition as the read partition, sets the i-th memory cell of the read partition as the target memory cell, and performs a read operation on the target memory cell in step S327.

[0067] On the other hand, if the controller 120 determines in step S329 that the read partition is the first partition, the controller 120 will also learn the last programmed memory cell in step S330. That is, since it is determined in steps S326 to S329 that the i-th memory cell of all partitions has not been programmed, it can be known from the reading results of steps S321 to S325 that the i-1th memory cell of the last partition is the last programmed memory cell.

[0068] In addition, in step S324, if the controller 120 determines that the target memory cell is the last memory cell, it means that all memory cells in all partitions have been programmed, and therefore the last programmed memory cell is also known in step S330. That is, the last memory cell in the last partition is the last programmed memory cell.

[0069] It can be seen that in this embodiment, the controller 120 will first read the storage cells in the last partition (i.e., the Nth partition SGN) one by one according to the storage cell sequence in steps S322 to S325. Then, when the controller 120 reads the i-th storage cell that has not been programmed for the first time in the last partition, the controller 120 will read the i-th storage cell of each partition one by one according to the partition sequence in descending order in steps S326 to S329. Next, the controller 120 will know the last programmed storage cell based on the judgment result of reading the i-th storage cell that has been programmed for the first time (step S328-yes), the judgment result that the i-th storage cells of all partitions have not been programmed (step S329-yes), and the judgment result that the storage cells of all partitions have been programmed (step S324-yes).

[0070] Fig.10 FIG. 1 is a schematic diagram showing an example of a reading step of an operation method according to a third embodiment of the present invention. Fig.10 In the example of Figure 8 Take the reading operation of the programming results of examples (d) to (f) as an example.

[0071] Please refer to Figure 1-2 and Figure 8 to Figure 10. When reading the programming result of example (d), first, the controller 120 sets the last partition SG2 as the read partition, sets the 1st bit storage cell b2_1 of the read partition SG2 as the target storage cell to be read, and performs a read operation on the target storage cell b2_1 (steps S321, S322). The controller 120 then determines that the target storage cell b2_1 is the storage cell to be programmed, and the target storage cell b2_1 is not the last bit storage cell of the last partition (steps S323, S324). Therefore, the controller 120 sets the next bit storage cell b2_2 of the read partition SG2 as the target storage cell according to the storage cell sequence, and continues to perform a read operation on the target storage cell b2_2 (steps S325, S322), and so on. When the 4th bit storage cell b2_4 of the last partition SG2 is read, the controller 120 determines that the target storage cell b2_4 is not the storage cell to be programmed (steps S322, S323). The controller 120 then sets the 4th memory cell b1_4 of the previous partition SG1 as the target memory cell, and continues to perform a read operation on the target memory cell b1_4 (steps S326, S327). The controller 120 then determines that the target memory cell b1_4 is a programmed memory cell, and thus learns that the target memory cell b1_4 is the last programmed memory cell (steps S328, S330). In example (d), the controller 120 learns that the memory cell b1_4 is the last programmed memory cell after five read operations.

[0072] When reading the programming result of example (e), first, the controller 120 sets the last partition SG2 as the read partition, sets the first bit memory cell b2_1 of the read partition SG2 as the target memory cell to be read, and performs a read operation on the target memory cell b2_1 (steps S321, S322). The controller 120 then determines that the target memory cell b2_1 is the memory cell to be programmed, and the target memory cell b2_1 is not the last bit memory cell of the last partition (steps S323, S324). Therefore, the controller 120 sets the next bit memory cell b2_2 of the read partition SG2 as the target memory cell according to the memory cell sequence, and continues to perform a read operation on the target memory cell b2_2 (steps S325, S322), and so on. When the sixth bit memory cell b2_6 of the last partition SG2 is read, the controller 120 determines that the target memory cell b2_6 is not the memory cell to be programmed (steps S322, S323). The controller 120 then sets the previous partition SG1 as the read partition, sets the 6th memory cell b1_6 of the read partition SG1 as the target memory cell, and continues to perform a read operation on the target memory cell b1_6 (steps S326, S327). The controller 120 then determines that the target memory cell b1_6 is not a programmed memory cell, and the partition SG1 at this time is the first partition (steps S328, S329), so it is known that the memory cell b2_5 is the last programmed memory cell (step S330). In example (e), the controller 120 can know that the memory cell b2_5 is the last programmed memory cell after 7 read operations.

[0073] When reading the programming result of example (f), first, the controller 120 sets the last partition SG2 as the read partition, sets the first bit memory cell b2_1 of the read partition SG2 as the target memory cell to be read, and performs a read operation on the target memory cell b2_1 (steps S321, S322). The controller 120 then determines that the target memory cell b2_1 is the memory cell to be programmed, and the target memory cell b2_1 is not the last bit memory cell of the last partition (steps S323, S324). Therefore, the controller 120 sets the next bit memory cell b2_2 of the read partition SG2 as the target memory cell according to the memory cell sequence, and continues to perform a read operation on the target memory cell b2_2 (steps S325, S322), and so on. When the 8th memory cell b2_8 of the last partition SG2 is read (step S322), the controller 120 determines that the target memory cell b2_8 is the memory cell to be programmed, and the target memory cell b2_8 is the last memory cell of the last partition (steps S323, S324), and thus it is known that the target memory cell b2_8 is the last memory cell to be programmed (step S330). In example (f), the controller 120 can know that the memory cell b2_8 is the last memory cell to be programmed after 8 read operations.

[0074] Please go back Figure 1 and Figure 2 In the embodiment, when the last programmed memory cell is known, the controller 120 will Figure 1 In step S130, the playback protection monotonic count value RS associated with the number of increment commands ICMD is calculated based on the base value B and the address of the last programmed memory cell. In one embodiment, the playback protection monotonic count value RS is equal to the sum of the number of programmed memory cells in all sub-regions SG1 to SGN and the base value B. For example, in example (e) of the third embodiment, the last programmed memory cell is the 5th memory cell b2_5 of the 2nd sub-region SG2. According to Figure 7 According to the programming method, the controller 120 can know that the number of programmed memory cells in all the partitions SG1-SG2 is equal to 10. Since the base value is 0 in this example, the playback protection monotonic count value RS is equal to 10.

[0075] Next, the comparison of the reading times of the control example, the second embodiment and the third embodiment of the present invention is summarized in Table 1. The control example has 16 storage cells as well as the second embodiment and the third embodiment of the present invention. The control example is an example in which the storage cells are not planned as multiple partitions when the non-volatile memory receives programming commands and read commands. Therefore, the control example simply performs programming operations on the storage cells according to the order of the storage cells, and performs reading operations on the storage cells according to the order of the storage cells. In order to obtain the replay protection monotonic count value, the number of read operations required by the control example will be greater than or equal to the number of increment instructions.

[0076] Table 1:

[0077]

[0078] From the results in Table 1, it can be seen that when the non-volatile memory is divided into multiple partitions and programming and reading operations are performed, the second embodiment and the third embodiment can obtain the playback protection monotonic count value through fewer read operations. If the non-volatile memory space is larger and the number of partitions is greater, the second embodiment and the third embodiment can accelerate the acquisition of the playback protection monotonic count value. Advantages will be more obvious.

[0079] In summary, the present invention performs multiple programming operations on storage cells of multiple partitions according to the partition order and the storage cell order. The present invention also performs multiple reading operations according to the partition order and the storage cell order to obtain the last programmed storage cell. In addition, the present invention further calculates the playback protection monotonic count value associated with the number of increment commands according to the information of the last programmed storage cell. In this way, the present invention can accelerate the acquisition of the playback protection monotonic count value.

[0080] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or replace some or all of the technical features therein with equivalents. However, these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. An operating method, suitable for controlling a non-volatile memory, characterized in that: The non-volatile memory includes a plurality of partitions, wherein the plurality of partitions have a partition order, wherein the plurality of storage units of each of the plurality of partitions have the same storage unit order, wherein the operation method includes: The controller of the non-volatile memory sequentially performs multiple programming operations on the multiple storage cells of the multiple partitions according to multiple increment commands, the partition sequence and the storage cell sequence, wherein when a single increment command is received, a single programming operation is performed on a single storage cell of the multiple partitions according to the partition sequence and the storage cell sequence; When a read command is received, performing multiple read operations according to the read command, the partition sequence, and the storage unit sequence until the last programmed storage unit is known; and Calculating the number of programmed storage cells according to the address of the last programmed storage cell, calculating the number of the increment command according to the number of programmed storage cells, and calculating the playback protection monotonic count value according to the number of the increment command, The step of sequentially performing the programming operation multiple times on the multiple storage cells of the multiple partitions comprises: performing the programming operation on a plurality of memory cells of a first partition of the plurality of partitions according to the memory cell sequence; Performing the programming operation on the first memory cell of each of the plurality of partitions according to the partition order; After programming the first storage unit of each of the plurality of partitions is completed, performing the programming operation on the second storage unit of each of the plurality of partitions according to the partition sequence and the storage unit sequence; When all the plurality of storage cells of the first partition are programmed, a second partition of the plurality of partitions is selected according to the partition order; performing the programming operation on a plurality of memory cells of the second partition according to the memory cell sequence; and When the plurality of storage cells of the plurality of partitions are all programmed, a base value is set, and an erasing operation is performed on the plurality of partitions, wherein the base value is used to accumulate the total number of storage cells of the plurality of storage cells of all the plurality of partitions in the non-volatile memory when the plurality of storage cells of all the plurality of partitions in the non-volatile memory are all programmed, The step of calculating the playback protection monotonic count value according to the number of increment commands includes: The replay protection monotonic count value is calculated according to the base value and the sum of the number of increment commands.

2. The operating method according to claim 1, characterized in that: The step of performing multiple read operations according to the read command, the partition order, and the storage unit order until the last programmed storage unit is known comprises: One of the plurality of partitions is selected as a read partition one by one according to the partition order, and a first memory cell of the read partition is read to determine whether the read partition has a programmed first memory cell; and When it is determined that the read partition of the plurality of partitions has a programmed first bit memory cell and the read partition is not the last partition, a next partition is used as the read partition according to the partition sequence to read the first bit memory cell of the read partition.

3. The operating method according to claim 2, characterized in that: The step of performing the reading operation multiple times according to the read command, the partition order and the storage unit order until the last programmed storage unit is known also includes: When it is determined that the first bit storage unit in the read partition is not programmed, taking the previous partition as the read partition according to the partition sequence, and reading multiple storage units in the read partition one by one starting from the second bit storage unit in the read partition according to the storage unit sequence; and The last programmed memory cell is obtained according to one of a determination result that an unprogrammed memory cell is read for the first time in the read partition and a determination result that a plurality of memory cells in the read partition are all programmed.

4. The operating method according to claim 1, characterized in that: The step of performing multiple read operations according to the read command, the partition order, and the storage unit order until the last programmed storage unit is known comprises: Using the last partition of the plurality of partitions as a read partition; Reading a plurality of storage cells of the read partition one by one starting from a first storage cell of the read partition according to the storage cell sequence to determine whether the plurality of storage cells of the read partition are programmed; and When it is determined that the i-th storage cell of the read partition is not programmed, the previous partition is used as the read partition according to the partition order, and the i-th storage cell of the read partition is read to determine whether the i-th storage cell of the read partition is programmed, where i is a positive integer greater than 0.

5. The operating method according to claim 4, characterized in that: The step of performing the reading operation multiple times according to the read command, the partition order and the storage unit order until the last programmed storage unit is known also includes: The last programmed memory cell is known according to one of the following conditions: Determining that the storage unit being read is the last storage unit of the last partition, determining that the memory cell being read is a programmed memory cell of a partition other than the last partition, and It is determined that the read partition is the first partition of the multiple partitions.

6. A memory device, suitable for replaying a monotonic counter, characterized in that: The memory device comprises: A non-volatile memory comprising a plurality of partitions, wherein the plurality of partitions have a partition order relative to each other, wherein a plurality of storage units of each of the plurality of partitions have a same storage unit order relative to each other; and A controller, coupled to the non-volatile memory, is configured to: receiving multiple increment commands, and sequentially performing multiple programming operations on the multiple storage cells of the multiple partitions according to the increment commands, the partition order, and the storage cell order, wherein when a single increment command is received, performing a single programming operation on a single storage cell of the multiple partitions according to the partition order and the storage cell order, When a read command is received, multiple read operations are performed according to the read command, the partition sequence, and the storage unit sequence until the last programmed storage unit is known, and Calculating the number of programmed storage cells according to the address of the last programmed storage cell, calculating the number of times corresponding to the increment command according to the number of programmed storage cells, and calculating the playback protection monotonic count value according to the number of increment commands, The controller is further configured to set a base value and perform an erase operation on the plurality of partitions when the plurality of storage cells of the plurality of partitions are all programmed. wherein the base value is used to accumulate the total number of storage cells of the plurality of storage cells in all the plurality of partitions in the nonvolatile memory when the plurality of storage cells in all the plurality of partitions have been programmed, The controller is further configured to calculate the replay protection monotonic count value of the number of the increment command according to the base value and the sum. The controller performs the programming operation on the multiple storage cells of the first partition of the multiple partitions according to the storage cell sequence, performs the programming operation on the first storage cell of each of the multiple partitions according to the partition sequence, and after programming the first storage cell of each of the multiple partitions, performs the programming operation on the second storage cell of each of the multiple partitions according to the partition sequence and the storage cell sequence, after programming the multiple storage cells of the first partition, selects the second partition of the multiple partitions according to the partition sequence, and performs the programming operation on the multiple storage cells of the second partition according to the storage cell sequence.

7. The memory device according to claim 6, wherein: The controller is also configured to: One of the plurality of partitions is selected as a read partition one by one according to the partition order, and a first memory cell of the read partition is read to determine whether the read partition has a programmed first memory cell, and When it is determined that the read partition of the plurality of partitions has a programmed first bit memory cell and the read partition is not the last partition, a next partition is used as the read partition according to the partition sequence to read the first bit memory cell of the read partition.

8. The memory device according to claim 7, wherein: The controller is also configured to: When it is determined that the first bit storage unit in the read partition is not programmed, the previous partition is used as the read partition according to the partition sequence, and multiple storage units in the read partition are read one by one starting from the second bit storage unit in the read partition according to the storage unit sequence, and The last programmed memory cell is obtained according to one of a determination result that an unprogrammed memory cell is read for the first time in the read partition and a determination result that a plurality of memory cells in the read partition are all programmed.

9. The memory device according to claim 6, wherein: The controller is also configured to: The last partition of the plurality of partitions is used as a read partition, Reading a plurality of storage cells of the read partition one by one starting from a first storage cell of the read partition according to the storage cell sequence to determine whether the plurality of storage cells of the read partition are programmed, and When it is determined that the i-th storage cell of the read partition is not programmed, the previous partition is used as the read partition according to the partition order, and the i-th storage cell of the read partition is read to determine whether the i-th storage cell of the read partition is programmed, where i is a positive integer greater than 0.

10. The memory device according to claim 9, wherein: The controller is further configured to know the last programmed memory cell according to one of the following conditions: Determining that the storage unit being read is the last storage unit of the last partition, determining that the memory cell being read is a programmed memory cell of a partition other than the last partition, and It is determined that the read partition is the first partition of the multiple partitions.

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