Simulation methods, apparatus, and systems for analyzing chip aging

Abstract

This invention provides a simulation method, apparatus, and system for analyzing chip aging, belonging to the field of chip aging analysis. The method includes: acquiring the thermal network table and a first electrical grid table for each device on the chip; determining the operating temperature of the device during operation based on the thermal network table; acquiring the electrical parameters of the device at the operating temperature based on the first electrical grid table; obtaining the performance parameters of the device after aging through simulation based on the electrical parameters at the operating temperature; and obtaining the performance changes of the chip after aging through simulation based on the performance parameters of each device after aging. By simulating the electrical parameters of each device after aging at the operating temperature based on the thermal network table and the first electrical grid table, and then simulating the performance parameters of the chip after aging based on the electrical parameters after aging, the method fully considers the individual temperatures of different devices during chip aging simulation, making the aging simulation results more accurate.

Description

Technical Field

[0001] This invention relates to the field of chip aging analysis, and more specifically to a simulation method for analyzing chip aging, a simulation device for analyzing chip aging, and a simulation system for analyzing chip aging. Background Technology

[0002] As semiconductor technology continues to advance, device sizes are shrinking and voltages are decreasing. With increasing usage time, devices gradually age, especially metal-oxide-semiconductor (MOS) semiconductors, where aging becomes increasingly severe. Device aging leads to performance degradation, making timing convergence of circuits increasingly difficult.

[0003] To ensure the normal operation of a circuit throughout its lifespan, an aging timing simulation must be performed using circuit simulation software before actual application to check whether the timing of the circuit has converged. The results of the aging timing simulation are used to evaluate the lifespan of circuits or devices, etc. As the precision of circuits increases, even small differences can affect the evaluation results. Therefore, improving the accuracy of aging timing simulation is an urgent problem to be solved at present. Summary of the Invention

[0004] The purpose of this invention is to provide a simulation method, apparatus, and system for analyzing chip aging, so as to at least solve the problem of improving the accuracy of aging timing simulation mentioned above.

[0005] To achieve the above objectives, a first aspect of the present invention provides a simulation method for analyzing chip aging, the method comprising:

[0006] Obtain the thermal network table and the first thermal network table for each device on the chip;

[0007] The operating temperature of the device during operation is determined based on the device's thermal network surface.

[0008] The electrical parameters of the device at the operating temperature are obtained from the device's first power grid meter.

[0009] Based on the electrical parameters of the device at the operating temperature, the performance parameters of the device after aging are obtained through simulation.

[0010] Based on the performance parameters of each device after aging, the performance changes of the chip after aging are obtained through simulation.

[0011] Furthermore, the thermal network meter is obtained through simulation based on the chip layout, packaging information, PCB board information, and air quality information.

[0012] Optionally, the thermal mesh includes: the coordinates of the device in the layout, the thermal resistance of the device, and the thermal conductivity of the device. In a chip circuit, the chip layout, packaging information, PCB board information, and air information all affect the thermal conductivity and thermal resistance of each device on the chip during use. By using this information, the thermal mesh of each device can be obtained to study the temperature of different devices during operation.

[0013] Optionally, the first power meter includes: device voltage and device current at different operating temperatures. The first power meter is a conventional power meter, typically generated by a simulator in simulation based on the circuit design.

[0014] Furthermore, the step of obtaining the performance parameters of the device after aging through simulation based on the electrical parameters of the device at the operating temperature includes:

[0015] The device voltage and current at the operating temperature are input into a reliability model for simulation to obtain the device's performance parameters after aging.

[0016] Simulation of the thermal grid meter can yield the operating temperature of each component. Different components, due to variations in their performance and power output, will have different operating temperatures. The impact of operating at different temperatures on aging varies. This application uses the corresponding component voltage and current obtained from the thermal grid meter based on the component's operating temperature for simulation, fully considering the temperature differences between different components during operation, thus making the aging simulation results more accurate.

[0017] Optionally, the reliability model supports aging effects including at least hot carrier injection, time-dependent breakdown, positive bias temperature instability, and negative bias temperature instability. This method provides a reliability model supporting multiple aging effects, adapting to different user needs and having a wide range of applications.

[0018] Optionally, the performance parameters include: saturation current, threshold voltage, linear current, and transconductance. The electrical parameters obtained after aging have a broad coverage, which is more beneficial for simulating the performance changes of the circuit after aging.

[0019] Furthermore, the step of obtaining the performance change of the chip after aging through simulation based on the performance parameters of each device after aging includes:

[0020] Based on the performance parameters of the device after aging, a second grid table for the device after aging is established.

[0021] SPICE simulations were performed using the second grid meters of each device to obtain the performance changes of the chip after aging. By simulating the chip based on the aging parameters of different devices operating at different temperatures, the obtained performance parameters after chip aging are more accurate and easier for users to identify and compare the performance changes of the circuit after aging.

[0022] A second aspect of the present invention provides a simulation apparatus for analyzing chip aging, comprising:

[0023] Controller, used for:

[0024] Obtain the thermal network table and the first thermal network table for each device on the chip;

[0025] The operating temperature of the device during operation is determined based on the device's thermal network surface.

[0026] The electrical parameters of the device at the operating temperature are obtained from the device's first power grid meter.

[0027] Based on the electrical parameters of the device at the operating temperature, the performance parameters of the device after aging are obtained through simulation.

[0028] Based on the performance parameters of each device after aging, the performance changes of the chip after aging are obtained through simulation. This device can simulate the electrical parameters of each device after aging at the operating temperature based on the thermal grid meter and the first grid meter, and then simulate the performance parameters of the chip after aging based on the electrical parameters after aging. The chip aging simulation fully considers the temperature of different devices, making the aging simulation results more accurate.

[0029] A third aspect of the present invention provides a simulation system for analyzing chip aging, the system comprising:

[0030] The thermal network table acquisition module is used to acquire the thermal network table of each device on the chip;

[0031] The first power meter acquisition module is used to acquire the first power meter of each device on the chip.

[0032] The electrical parameter aging module is used to determine the operating temperature of the device during operation based on the device's thermal grid meter; obtain the electrical parameters of the device at the operating temperature based on the device's first thermal grid meter; and obtain the performance parameters of the device after aging through simulation based on the electrical parameters of the device at the operating temperature.

[0033] The chip aging module simulates the performance changes of the chip after aging based on the performance parameters of each component. This system fully considers the individual temperatures of different components during chip aging simulation, resulting in more accurate simulation results.

[0034] On the other hand, the present invention provides a machine-readable storage medium storing instructions that cause a machine to execute the simulation method for analyzing chip aging described in this application.

[0035] The above technical solution enables more accurate calculation of the aging amount of each device in the chip, thereby simulating more precise performance changes after circuit degradation.

[0036] Other features and advantages of the embodiments of the present invention will be described in detail in the following detailed description section. Attached Figure Description

[0037] The accompanying drawings are provided to further illustrate embodiments of the present invention and form part of the specification. They are used together with the following detailed description to explain the embodiments of the present invention, but do not constitute a limitation thereof. In the drawings:

[0038] Figure 1 This is a flowchart of a simulation method for analyzing chip aging provided by one embodiment of the present invention;

[0039] Figure 2 This is a block diagram of a simulation system for analyzing chip aging, provided by one embodiment of the present invention. Detailed Implementation

[0040] The specific embodiments of the present invention will be described in detail below with reference to the accompanying drawings. It should be understood that the specific embodiments described herein are for illustration and explanation only and are not intended to limit the present invention.

[0041] The inventors discovered that existing simulation methods, when calculating the aging of each component in a circuit, assume all components operate at the same temperature. However, in reality, different components generate heat differently due to varying power, resulting in differences in their operating temperatures. Existing simulation methods fail to account for the varying aging effects of different temperatures. This error can cause inaccuracies in the estimated lifespan of components. For example, based on the aging formula provided by the manufacturer, if a component operates at 120°C, its saturation current will degrade by 10% after 14 years. However, at 126°C, the 10% degradation only takes 9 years. In this example, a 6°C error results in a 5-year error in the estimated lifespan. In reality, if the chip contains power devices (especially grid chips), a 6°C temperature difference on the chip is easily observed, which severely impacts the accurate estimation of chip lifespan.

[0042] Example 1

[0043] Figure 1This is a flowchart of a simulation method for analyzing chip aging, provided by one embodiment of the present invention. Figure 1 As shown, the method includes:

[0044] Step 1: Obtain the thermal network table and the first thermal network table for each device on the chip. The thermal network table is obtained through simulation based on the chip's layout, package information, PCB board information, and air information. The simulation software can be any one of Cadence, Apache, or ThermalX.

[0045] In this embodiment, the thermal netlist format is the same as the SPICE netlist format. The thermal netlist includes: the coordinates of the device in the layout, the thermal resistance value of the device, and the thermal fusibility value of the device. In a chip circuit, the chip layout, package information, PCB board information, and air information all affect the thermal fusibility and thermal resistance of each device on the chip during use. By using this information, the thermal netlist of each device can be obtained to study the temperature of different devices during operation.

[0046] In other embodiments, if a thermal grid is obtained for individual devices, there is no layout, and the coordinates of the devices in the thermal grid within the layout can be determined by assuming location information. If there is absolutely no location information, a thermal resistance and thermal fuse can be added to each device in the thermal grid, considering only the self-heating effect of the device. In this case, the influence of the temperature of nearby devices on each other cannot be taken into account.

[0047] In this embodiment, the first power meter is a conventional power meter, typically generated by a simulator during simulation based on the circuit design. The first power meter includes: device voltage and device current.

[0048] Step 2: Determine the operating temperature of the device during operation based on the device's thermal network table. The operating temperature is obtained through simulation using the thermal network table. During operation, the device generates heat under the influence of electrical energy. Different devices generate different amounts of heat, and the device's temperature is affected by both its own heat generation and the thermal radiation from surrounding devices. Therefore, different devices have different operating temperatures.

[0049] Step 3: Obtain the electrical parameters of the device at the operating temperature based on the device's first power grid meter.

[0050] Step 4: Based on the electrical parameters of the device at the operating temperature, obtain the performance parameters of the device after aging through simulation. Specifically:

[0051] The device voltage and current at the operating temperature are input into a reliability model for simulation to obtain the device's performance parameters after aging.

[0052] In this embodiment, the reliability model supports aging effects including at least hot carrier injection (HCI), time-delayed breakdown (TDDB), positive bias temperature instability (PBTI), and negative bias temperature instability (NBTI). This method provides a reliability model supporting multiple aging effects, adapting to different user needs and having a wide range of applications.

[0053] As shown in Table 1, without introducing temperature effects, the lifetime of each device is 14 years (assuming a chip temperature of 120°C) using a hypothetical approach. However, if actual temperature deviations are taken into account, the device may experience a 10% degradation in Idsat over 6 to 9 years.

[0054] Table 1

[0055]

[0056]

[0057] This invention uses the simulation of a power grid to obtain the operating temperature of various devices. Different devices, due to variations in their performance and power consumption, will have different operating temperatures. The impact of operating at different temperatures on aging varies. This application uses the device voltage and current corresponding to the operating temperature from the power grid for simulation, fully considering the temperature differences between different devices, thus making the aging simulation results more accurate.

[0058] In this embodiment, the performance parameters include: saturation current (Idsat), threshold voltage (Vth), linear current (Idlin), and transconductance (Gm). The performance parameters obtained after aging have a broad coverage, which is more beneficial for simulating the performance changes of the circuit after aging.

[0059] Step 5: Based on the performance parameters of each device after aging, obtain the performance changes of the chip after aging through simulation, including:

[0060] Based on the performance parameters of the device after aging, a second grid table for the device after aging is established.

[0061] SPICE simulations were performed on the second grid meters of each device to obtain the performance changes of the chip after aging. The saturation current, threshold voltage, linear current, and transconductance of each device in the second grid meters are already the values ​​after aging. By simulating the chip based on the performance parameters of different devices operating at different temperatures after aging, the obtained performance parameters after chip aging are more accurate and more conducive to users to discover and compare the performance changes of the circuit after aging.

[0062] Example 2

[0063] A second aspect of the present invention provides a simulation apparatus for analyzing chip aging, comprising:

[0064] Controller, used for:

[0065] Obtain the thermal network table and the first thermal network table for each device on the chip. The thermal network table is obtained through simulation based on the chip's layout, package information, PCB board information, and air information.

[0066] The operating temperature of the device during operation is determined based on the device's thermal network surface.

[0067] The electrical parameters of the device at the operating temperature are obtained from the device's first power grid meter.

[0068] Based on the electrical parameters of the device at its operating temperature, the performance parameters of the device after aging are obtained through simulation, specifically including:

[0069] The device voltage and current at the operating temperature are input into a reliability model for simulation to obtain the performance changes of the device after aging.

[0070] Based on the performance parameters of each device after aging, the performance changes of the chip after aging are obtained through simulation, specifically including:

[0071] Based on the performance parameters of the device after aging, a second grid table for the device after aging is established.

[0072] SPICE simulation was performed on the second grid meter of each device to obtain the performance changes of the chip after aging.

[0073] The device can simulate the electrical parameters of each device after aging at the operating temperature based on the thermal grid meter and the first grid meter, and then simulate the performance parameters of the chip after aging based on the electrical parameters after aging. The device fully considers the temperature of different devices when performing chip aging simulation, making the aging simulation results more accurate.

[0074] Example 3

[0075] Figure 2 This is a block diagram of a simulation system for analyzing chip aging, provided by one embodiment of the present invention. Figure 2 As shown, the system includes:

[0076] The thermal network table acquisition module is used to acquire the thermal network tables of each device on the chip.

[0077] Specifically, the thermal network table acquisition module simulates and acquires the thermal network table of each device based on the input chip layout, package information, PCB board information, and air information.

[0078] The first power meter acquisition module is used to acquire the first power meter of each device on the chip based on circuit design simulation.

[0079] The electrical parameter aging module is used to determine the operating temperature of the device during operation based on the device's thermal grid; obtain the corresponding electrical parameters of the device at the operating temperature based on the device's first thermal grid; and obtain the performance parameters of the device after aging through simulation based on the electrical parameters of the device at the operating temperature.

[0080] After obtaining the electrical parameters of the device at its operating temperature, these parameters are input into a reliability model for simulation to obtain the performance changes of the device after aging. The aforementioned electrical parameters of the device at its operating temperature include the device voltage and device current at that temperature.

[0081] The chip aging module is used to simulate the performance changes of the chip after aging based on the performance parameters of each device after aging.

[0082] Specifically, the chip aging module can establish a second electrical grid table after aging based on the electrical parameters after aging; then, SPICE simulation is performed based on the second electrical grid table of each device to obtain the performance changes of the chip after aging.

[0083] This system can fully consider the temperature of different devices when performing chip aging simulation, making the aging simulation results more accurate.

[0084] This invention also provides a machine-readable storage medium storing instructions that cause a machine to execute the simulation method for analyzing chip aging described in this application.

[0085] Those skilled in the art will understand that all or part of the steps in the methods of the above embodiments can be implemented by a program instructing related hardware. This program is stored in a storage medium and includes several instructions to cause a microcontroller, chip, or processor to execute all or part of the steps of the methods described in the various embodiments of the present invention. The aforementioned storage medium includes various media capable of storing program code, such as a USB flash drive, a portable hard drive, a read-only memory (ROM), a random access memory (RAM), a magnetic disk, or an optical disk.

[0086] The optional embodiments of the present invention have been described in detail above with reference to the accompanying drawings. However, the embodiments of the present invention are not limited to the specific details described above. Within the scope of the technical concept of the embodiments of the present invention, various simple modifications can be made to the technical solutions of the embodiments of the present invention, and these simple modifications all fall within the protection scope of the embodiments of the present invention. It should also be noted that the various specific technical features described in the above specific embodiments can be combined in any suitable manner without contradiction. To avoid unnecessary repetition, the embodiments of the present invention will not further describe the various possible combinations.

[0087] Furthermore, various different embodiments of the present invention can be combined in any way, as long as they do not violate the spirit of the embodiments of the present invention, they should also be regarded as the content disclosed by the embodiments of the present invention.

Claims

1. A simulation method for analyzing chip aging, characterized by, The method comprises: obtaining a thermal network table and a first electrical network table of each device on a chip, the thermal network table of the device being obtained by simulation according to a layout of the chip, packaging information, PCB board information and air information; determining a working temperature of the device in a working process according to the thermal network table of the device, the working temperature being obtained by simulation according to the thermal network table; obtaining an electrical parameter corresponding to the working temperature of the device according to the first electrical network table of the device; obtaining a performance parameter of the device after aging by simulation according to the electrical parameter of the device at the working temperature, comprising: inputting a device voltage and a device current of the device at the working temperature into a reliability model to obtain the performance parameter of the device after aging by simulation; establishing a second electrical network table of the device after aging according to the performance parameter of the device after aging, the second electrical network table comprising a saturated current, a threshold voltage, a linear current and a transconductance of each device after aging; performing SPICE simulation according to the second electrical network table of each device to obtain a performance change of the chip after aging.

2. The simulation method for analyzing chip aging according to claim 1, wherein, The thermal network table comprises coordinates of the device in the layout, a thermal resistance value of the device and a thermal melting value of the device.

3. The simulation method for analyzing chip aging according to claim 1, wherein, The first electrical network table comprises a device voltage and a device current of the device at different working temperatures.

4. The simulation method for analyzing chip aging according to claim 1, wherein, The reliability model supports at least aging effects including hot carrier injection, time-dependent dielectric breakdown, positive bias temperature instability and negative bias temperature instability.

5. The simulation method for analyzing chip aging according to claim 1, wherein, The performance parameter comprises a saturated current, a threshold voltage, a linear current and a transconductance.

6. An analog simulation apparatus for analyzing chip aging, characterized by, Comprise: a controller configured to: obtain a thermal network table and a first electrical network table of each device on a chip, the thermal network table of the device being obtained by simulation according to a layout of the chip, packaging information, PCB board information and air information; determine a working temperature of the device in a working process according to the thermal network table of the device, the working temperature being obtained by simulation according to the thermal network table; obtain an electrical parameter corresponding to the working temperature of the device according to the first electrical network table of the device; obtain a performance parameter of the device after aging by simulation according to the electrical parameter of the device at the working temperature, comprising: inputting a device voltage and a device current of the device at the working temperature into a reliability model to obtain the performance parameter of the device after aging by simulation; establish a second electrical network table of the device after aging according to the performance parameter of the device after aging, the second electrical network table comprising a saturated current, a threshold voltage, a linear current and a transconductance of each device after aging; perform SPICE simulation according to the second electrical network table of each device to obtain a performance change of the chip after aging.

7. An analog simulation system for analyzing chip aging, characterized by, The system comprises: a thermal network table obtaining module configured to obtain a thermal network table of each device on a chip, the thermal network table of the device being obtained by simulation according to a layout of the chip, packaging information, PCB board information and air information; a first electrical network table obtaining module configured to obtain a first electrical network table of each device on a chip; an electrical parameter aging module configured to determine a working temperature of the device in a working process according to the thermal network table of the device, the working temperature being obtained by simulation according to the thermal network table; obtain an electrical parameter corresponding to the working temperature of the device according to the first electrical network table of the device; obtain a performance parameter of the device after aging by simulation according to the electrical parameter of the device at the working temperature, comprising: The device voltage and the device current of the device at the working temperature are input into the reliability model to simulate and obtain the performance parameters of the device after aging; The chip aging module is configured to establish a second electrical network table of the device after aging according to the performance parameters of the device after aging, the second electrical network table including a saturated current, a threshold voltage, a linear current and a transconductance of each device after aging, and perform SPICE simulation according to the second electrical network table of each device to obtain the performance change of the chip after aging. 8.A machine readable storage medium, having stored thereon instructions for causing a machine to perform the simulation method for analyzing chip aging according to any one of claims 1-5.

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