A double-pulse test method for active neutral point clamped converter

Abstract

The present invention provides a double-pulse testing method for an active neutral-point clamped converter. The method comprises the steps of testing the voltage path in a single-phase bridge arm of the active neutral-point clamped converter using a first test sequence and a second test sequence. The double-pulse testing method can cover all switching conditions of an active neutral-point clamped three-level converter, thereby improving testing efficiency.

Description

Technical Field

[0001] The invention belongs to the field of power testing, and in particular relates to a double-pulse testing method for an active neutral point clamped converter. Background Art

[0002] To address the problems of unbalanced power device losses in diode-neutral-point-clamped converters and the high construction costs of flying-capacitor-clamped converters during operation, German scholar T. Bruckner proposed the active neutral-point-clamped three-level converter topology at the first IEEE-PESC conference in 2001. Compared to diode-neutral-point-clamped converters, active neutral-point-clamped converters replace diodes with active, fully controlled devices. This increases the current path at zero-voltage, disperses internal switching losses, and improves output current capability. Compared to flying-capacitor-clamped converters, active neutral-point-clamped converters eliminate the flying capacitor, significantly reducing equipment size and construction costs. Consequently, active neutral-point-clamped three-level converters have become a mainstream topology for medium-voltage, high-capacity converters.

[0003] Existing testing methods are inefficient for testing active neutral point clamped three-level converters, and efficient testing methods are urgently needed. Summary of the Invention

[0004] In view of the above problems, the present invention provides a double-pulse testing method for an active neutral point clamped converter.

[0005] The double-pulse test method for an active neutral point clamped converter of the present invention comprises the following steps:

[0006] The voltage path in the single-phase bridge arm of the active neutral point clamped converter is tested using the first test sequence and the second test sequence.

[0007] further,

[0008] The single-phase bridge arm of the active neutral point clamped converter comprises a first switch tube (S1), a second switch tube (S2), a third switch tube (S3), a fourth switch tube (S4), a fifth switch tube (S5), a sixth switch tube (S6), a first capacitor (C d1 ) and the second capacitor (C d2 ),

[0009] Each of the first switching tube (S1) to the sixth switching tube (S6) is connected in anti-parallel to a corresponding diode, that is, the first electrode of the switching tube is connected to the second electrode of the corresponding diode, and the second electrode of the switching tube is connected to the first electrode of the corresponding diode;

[0010] The first switch tube (S1) to the fourth switch tube (S4) are sequentially connected in series, that is, the second electrode of the previous switch tube is connected to the first electrode of the next switch tube;

[0011] The first capacitor (C d1 ) is connected to the first electrode of the first switch tube (S1), the first capacitor (C d1 ) is connected to the second electrode of the second capacitor (C d2 ) and a second electrode of a fifth switching tube (S5);

[0012] The second capacitor (C d2 ) is connected to the second electrode of the fourth switching tube (S4);

[0013] The first electrode of the fifth switch tube (S5) is connected to the second electrode of the first switch tube (S1), and the second electrode of the fifth switch tube (S5) is connected to the first electrode of the sixth switch tube (S6).

[0014] further,

[0015] The first capacitor (C d1 ) is a positive electrode and a second electrode is a negative electrode;

[0016] The second capacitor (C d2 ) is a positive electrode and the second electrode is a negative electrode.

[0017] further,

[0018] The first electrode of the corresponding diode is an anode, and the second electrode is a cathode.

[0019] further,

[0020] The first switching tube (S1) to the sixth switching tube (S6) are fully controlled power electronic devices.

[0021] further,

[0022] The first switch tube (S1) to the sixth switch tube (S6) are insulated gate bipolar transistors, integrated gate commutated thyristors or injection enhanced gate transistors,

[0023] When the first switching tube (S1) to the sixth switching tube (S6) are insulated gate bipolar transistors or injection enhanced gate transistors, the first electrodes of the first switching tube (S1) to the sixth switching tube (S6) are collectors, and the second electrodes are emitters;

[0024] When the first switching tube (S1) to the sixth switching tube (S6) are integrated gate-commutated thyristors, the first electrodes of the first switching tube (S1) to the sixth switching tube (S6) are anodes, and the second electrodes are cathodes.

[0025] further,

[0026] An inductor (L) is connected between the second electrode of the second switching tube (S2) and the second electrode of the fifth switching tube (S5).

[0027] further,

[0028] Assume that T represents the duration of the square wave pulse in the driving control signal of the first switching tube (S1) to the sixth switching tube (S6),

[0029] Then the first test sequence and the second test sequence both include 6 consecutive adjacent duration periods T: the 1st T to the 6th T. After the 6th T ends, the first switch tube (S1) to the sixth switch tube (S6) are all turned off.

[0030] in,

[0031] In the first test sequence, the first switch tube (S1) is turned on in the 1st and 3rd time periods, the second switch tube (S2) is turned on in the 1st to 4th time periods and the 6th time period, and the third to sixth switch tubes (S3) to (S6) remain turned off in the first test sequence;

[0032] In the second test sequence, the second switch tube (S2) is turned on in the 1st and 3rd time periods, the sixth switch tube (S6) is turned on in the 1st to 4th time periods and the 6th time period, the first switch tube (S1) is turned on in the 1st to 4th time period, and the third to fifth switch tubes (S3) remain turned off in the second test sequence.

[0033] further,

[0034] When the output voltage is u0, the voltage path in the single-phase bridge arm of the active neutral point clamped converter is tested using the first test sequence and the second test sequence to obtain the test results of the forward voltage vector switching.

[0035] in,

[0036] When the output voltage is u0, if the first switch tube (S1), the second switch tube (S2) and the sixth switch tube (S6) are turned on and the third switch tube (S3), the fourth switch tube (S4) and the fifth switch tube (S5) are turned off, the AC side potential of the active neutral point clamped converter is E; if the second switch tube (S2), the fourth switch tube (S4) and the fifth switch tube (S5) are turned on and the first switch tube (S1), the third switch tube (S3) and the sixth switch tube (S6) are turned off, the AC side potential of the active neutral point clamped converter is E. The potential is 0; if the first switch tube (S1), the third switch tube (S3) and the sixth switch tube (S6) are turned on and the second switch tube (S2), the fourth switch tube (S4) and the fifth switch tube (S5) are turned off, the potential on the AC side of the active neutral point clamped converter is 0; if the third switch tube (S3), the fourth switch tube (S4) and the fifth switch tube (S5) are turned on and the first switch tube (S1), the second switch tube (S2) and the sixth switch tube (S6) are turned off, the potential on the AC side of the active neutral point clamped converter is -E.

[0037] further,

[0038] When the output voltage is -u0, the voltage path in the single-phase bridge arm of the active neutral point clamped converter is tested using the first test sequence and the second test sequence to obtain the test results of reverse voltage vector switching.

[0039] in,

[0040] When the output voltage is -u0, if the first switch tube (S1), the second switch tube (S2) and the sixth switch tube (S6) are turned on and the third switch tube (S3), the fourth switch tube (S4) and the fifth switch tube (S5) are turned off, the AC side potential of the active neutral point clamped converter is -E; if the second switch tube (S2), the fourth switch tube (S4) and the fifth switch tube (S5) are turned on and the first switch tube (S1), the third switch tube (S3) and the sixth switch tube (S6) are turned off, the AC side potential of the active neutral point clamped converter is -E. The AC side potential of the active neutral point clamped converter is 0; if the first switch tube (S1), the third switch tube (S3) and the sixth switch tube (S6) are turned on and the second switch tube (S2), the fourth switch tube (S4) and the fifth switch tube (S5) are turned off, the AC side potential of the active neutral point clamped converter is 0; if the third switch tube (S3), the fourth switch tube (S4) and the fifth switch tube (S5) are turned on and the first switch tube (S1), the second switch tube (S2) and the sixth switch tube (S6) are turned off, the AC side potential of the active neutral point clamped converter is E.

[0041] The active neutral point clamped converter double-pulse test method of the present invention can cover all switching conditions of the active neutral point clamped three-level converter, thereby improving test efficiency.

[0042] Other features and advantages of the present invention will be described in the following description, and in part will become apparent from the description, or will be understood by practicing the present invention. The purpose and other advantages of the present invention can be realized and obtained by the structures pointed out in the description, claims and drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0043] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the following briefly introduces the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings described below are some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0044] Figure 1 FIG. 1 shows a current conduction path 1 of an active neutral point clamped converter according to the prior art;

[0045] Figure 2 FIG2 shows a second current conduction path of an active neutral point clamped converter according to the prior art;

[0046] Figure 3 FIG3 shows a third current conduction path of an active neutral point clamped converter according to the prior art;

[0047] Figure 4 FIG4 shows a current conduction path 4 of an active neutral point clamped converter according to the prior art;

[0048] Figure 5 FIG4 shows a current conduction path 5 of an active neutral point clamped converter according to the prior art;

[0049] Figure 6 FIG6 shows a current conduction path 6 of an active neutral point clamped converter according to the prior art;

[0050] Figure 7 FIG. 7 shows a current conduction path 7 of an active neutral point clamped converter according to the prior art;

[0051] Figure 8 FIG8 shows a current conduction path eight of an active neutral point clamped converter according to the prior art;

[0052] Figure 9 A double pulse experiment circuit diagram according to an embodiment of the present invention is shown;

[0053] Figure 10 1 is a schematic diagram showing a test sequence 1 adopted by a double-pulse test method for an active neutral point clamped converter according to an embodiment of the present invention;

[0054] Figure 11FIG2 shows a schematic diagram of a test sequence 2 used in a double-pulse test method for an active neutral point clamped converter according to an embodiment of the present invention.

[0055] In the picture: C d1 : First capacitor, C d2 : Second capacitor, E:C d1 or C d2 The voltage across both ends of the MOSFET, S1: first switching tube, S2: second switching tube, S3: third switching tube, S4: fourth switching tube, S5: fifth switching tube, S6: sixth switching tube, D1: first diode, D2: second diode, D3: third diode, D4: fourth diode, D5: fifth diode, D6: sixth diode, u0: AC side output voltage (referred to as output voltage), i0: AC side output current (referred to as output current), V1+: first forward voltage vector, V2+: second forward voltage vector, V3+: third forward voltage vector, V4+: fourth forward voltage vector, V1-: first reverse voltage vector, V2-: second reverse voltage vector, V3-: third reverse voltage vector, V4-: fourth reverse voltage vector. DETAILED DESCRIPTION

[0056] To make the objectives, technical solutions, and advantages of the embodiments of the present invention more clear, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative efforts shall fall within the scope of protection of the present invention.

[0057] There are three different potentials E, -E, and 0 on the AC side of the active neutral point clamped converter, and the 0 potential has two different paths. Depending on the different conducting devices, there are four voltage vectors V1, V2, V3, and V4 as shown in Table 1.

[0058] Table 1. Pulse Width Modulation (PWM) Switching State Table of Active Neutral Clamped Converter

[0059] <![CDATA[S1]]> <![CDATA[S2]]> <![CDATA[S3]]> <![CDATA[S4]]> <![CDATA[S5]]> <![CDATA[S6]]> <![CDATA[Output voltage u0]]> Voltage Vector 1 1 0 0 0 1 E V1 0 1 0 1 1 0 0 V2 1 0 1 0 0 1 0 V3 0 0 1 1 1 0 -E V4

[0060] When the above four voltage vectors are applied, the active neutral point clamped converter coexists according to the different directions of the AC current. Figures 1 to 8 There are eight current conduction paths as shown. Figures 1 to 8 As shown in the figure, C d1 and C d2The first and second capacitors are respectively, S1 to S6 are respectively the first to sixth switching transistors, and D1 to D6 are respectively the first to sixth diodes. u0 and i0 are respectively the output voltage and output current. When the output voltage is u0, if S1, S2, and S6 are on and S3, S4, and S5 are off, the AC side potential of the active neutral point clamped converter is E; if S2, S4, and S5 are on and S1, S3, and S6 are off, the AC side potential of the active neutral point clamped converter is 0; if S1, S3, and S6 are on and S2, S4, and S5 are off, the AC side potential of the active neutral point clamped converter is 0; if S3, S4, and S5 are on and S1, S2, and S6 are off, the AC side potential of the active neutral point clamped converter is -E. When current is output from the emitter of the second switching transistor S2 or the collector of the third switching transistor S3 (i.e., when the output voltage is u0 as shown in Table 1), the voltage vector is positive, and the four voltage vectors are labeled V1+, V2+, V3+, and V4+. When current is input from the emitter of the second switching transistor S2 or the collector of the third switching transistor S3 (i.e., when the output voltage is -u0, and the AC side potential of the active neutral point clamped converter is opposite to that shown in the "Output voltage u0" column in Table 1), the voltage vector is negative, and the four voltage vectors are labeled V1-, V2-, V3-, and V4-. In Table 1, 1 represents "on" and 0 represents "off."

[0061] In the single-phase bridge arm of the active neutral point clamped converter, the first switch tube S1 to the sixth switch tube S6 are all fully controlled power electronic devices such as IGBTs (insulated gate bipolar transistors). i (Assumed to be IGBT) and the corresponding diode D i Anti-parallel connection, i is an integer and 1≤i≤6, that is, the collector of the i-th switch Si is connected to the i-th diode D i The cathode of the i-th switch tube T i The emitter of the diode D i The first switch tube S1 to the fourth switch tube S4 are connected in series in sequence, that is, the emitter of the previous switch tube is connected to the collector of the next switch tube; the first capacitor C d1 The positive electrode is connected to the collector of the first switch tube S1, and the first capacitor C d1 The negative electrode is connected to the second capacitor C d2 The positive electrode and the emitter of the fifth switch tube S5; the second capacitor C d2The negative electrode of the switch is connected to the emitter of the fourth switch tube S4; the collector of the fifth switch tube S5 is connected to the emitter of the first switch tube S1, and the emitter of the fifth switch tube S5 is connected to the collector of the sixth switch tube S6; the emitter of the sixth switch tube S6 is connected to the collector of the fourth switch tube S4. The fully controlled power electronic device can also be an IGCT (integrated gate-commutated thyristor) or an IEGT (injection enhancement gate transistor). When the switch tube is an IGCT, the collector of the switch tube should be the anode and the emitter of the switch tube should be the cathode. When the fifth switch tube S5 and the sixth switch tube S6 also participate in modulation, the single-phase bridge arm is in active neutral point clamping (ANPC) mode.

[0062] Depend on Figures 1 to 8 It can be seen that the eight current conduction paths of the active neutral point clamped converter are:

[0063] 1. When the voltage vector is V1+, the current flows through the first capacitor C d1 The negative electrode of the first capacitor C is input and the emitter of the first switch tube S2 is output. At this time, the current conduction path is the first current conduction path: the first capacitor C d1 →First switch tube S1→Second switch tube S2;

[0064] 2. When the voltage vector is V2+, the current flows through the first capacitor C d1 The current is inputted through the negative electrode of the diode D5 and outputted through the emitter of the second switch tube S2. At this time, the current conduction path is the second current conduction path: the fifth diode D5 → the second switch tube S2.

[0065] 3. When the voltage vector is V3+, the current flows through the first capacitor C d1 The current is inputted from the negative electrode of the sixth switch tube S6 and outputted from the collector of the third switch tube S3. At this time, the current conduction path is the third current conduction path: the sixth switch tube S6 → the third diode D3;

[0066] 4. When the voltage vector is V4+, the current flows through the first capacitor C d1 The negative electrode of the second capacitor C is input and output by the collector of the third switch tube S3. At this time, the current conduction path is the fourth current conduction path: the second capacitor C d2 → fourth diode D4 → third diode D3;

[0067] 5. When the voltage vector is V1-, the current is input from the emitter of the second switch tube S2 and is connected to the first capacitor C d1 The negative output of the diode is the fifth current conduction path: the second diode D2 → the first diode D1 → the first capacitor C d1 ;

[0068] 6. When the voltage vector is V2-, the current is input from the emitter of the second switch tube S2 and is connected to the first capacitor Cd1 The negative electrode output of the device is output, and the current conduction path is the sixth current conduction path: the second diode D2 → the fifth switch tube S5;

[0069] 7. When the voltage vector is V3-, the current is input from the collector of the third switch tube S3 and is connected to the first capacitor C d1 The negative electrode output of , at this time the current conduction path is the seventh current conduction path: the third switch tube S3 → the sixth diode D6;

[0070] 8. When the voltage vector is V4-, the current is input from the collector of the third switch tube S3 and is connected to the first capacitor C d1 The negative electrode output of the current conduction path is the eighth current conduction path: the third switch tube S3 → the fourth switch tube S4 → the second capacitor C d2 .

[0071] Figure 9 The figure shows a double pulse experimental circuit diagram for implementing the double pulse test method of the active neutral point clamped converter of the present invention. Figure 9 It can be seen that implementing the dual-pulse test method for an active neutral-point clamped converter of the present invention requires that an inductor L be connected between the emitter of the second switching transistor S2 and the emitter of the fifth switching transistor S5 in a single-phase bridge arm of the active neutral-point clamped converter. That is, the emitter of the second switching transistor S2 is connected to the first end of the inductor L, and the other end of the inductor L is connected to the emitter of the fifth switching transistor S5. The inductor L serves as a load.

[0072] In order to test the switching transient characteristics when switching between different output levels, the switching between the eight current paths can be tested using the following eight double-pulse experiments, wherein, in the square wave signal (hereinafter referred to as the square wave signal) controlling the single-phase bridge arm, in each square wave cycle, the pulse with the output level E is followed by a zero level with the output level 0:

[0073] (1) Switching between V1+ and V2+ (i.e., V1+→V2+, where “→” indicates switching).

[0074] That is, the first current conduction path and the second current conduction path are switched. When switching between V1+ and V2+, as shown in Table 2, in each square wave cycle of the square wave signal, during the pulse period with an output level of E, the control voltage vector is V1+. At this time, the single-phase bridge arm is in the first current conduction path. When the pulse with an output level of E in the square wave signal transitions to a zero level with an output level of 0, the control voltage vector switches from V1+ to V2+, thus achieving the switch from the first current conduction path to the second current conduction path in the single-phase bridge arm. In two consecutive adjacent square wave cycles, when the zero level with an output level of 0 in the previous square wave cycle transitions to a pulse with an output level of E in the next square wave cycle, the control voltage vector switches from V2+ to V1+, thus achieving the switch from the second current conduction path to the first current conduction path in the single-phase bridge arm. In summary, in two adjacent square wave periods in the square wave signal, the switching of V1+→V2+, V2+→V1+, and V1+→V2+ can be controlled in sequence.

[0075] Table 2. Double pulse voltage vector table 1

[0076] Output Level Voltage Vector Pulse 1 E V1+ Zero Level 1 0 V2+ Pulse 2 E V1+ Zero Level 2 0 V2+

[0077] (2) Switching between V1+ and V3+.

[0078] That is, the first current conduction path and the third current conduction path are switched. When switching between V1+ and V3+, as shown in Table 3, in each square wave cycle of the square wave signal, during the pulse period with an output level of E, the control voltage vector is V1+. At this time, the single-phase bridge arm is in the first current conduction path. When the pulse with an output level of E in the square wave signal transitions to a zero level with an output level of 0, the control voltage vector switches from V1+ to V3+, thus achieving the switch from the first current conduction path to the third current conduction path in the single-phase bridge arm. In two consecutive adjacent square wave cycles, when the zero level with an output level of 0 in the previous square wave cycle transitions to a pulse with an output level of E in the next square wave cycle, the control voltage vector switches from V3+ to V1+, thus achieving the switch from the third current conduction path to the first current conduction path in the single-phase bridge arm. In summary, in two adjacent square wave cycles of the square wave signal, the switching of V1+→V3+, V3+→V1+, and V1+→V3+ can be controlled in sequence.

[0079] Table 3. Double pulse voltage vector table 2

[0080] Output Level Voltage Vector Pulse 1 E V1+ Zero Level 1 0 V3+ Pulse 2 E V1+ Zero Level 2 0 V3+

[0081] (3) Switching between V2+ and V4+.

[0082] That is, the second current conduction path and the fourth current conduction path are switched. When switching between V2+ and V4+, as shown in Table 4, in the square wave signal, in the first of two adjacent square wave cycles, during the pulse period with an output level of E, the control voltage vector is V1+. At this time, the single-phase bridge arm is in the first current conduction path. When the pulse with an output level of E in the first square wave cycle transitions to a zero level with an output level of 0, the control voltage vector switches from V1+ to V2+, achieving the switch from the first current conduction path to the second current conduction path in the single-phase bridge arm. In two adjacent square wave cycles, when the zero level with an output level of 0 in the first square wave cycle transitions to a pulse with an output level of -E in the second square wave cycle, the control voltage vector switches from V2+ to V4+, achieving the switch from the second current conduction path to the fourth current conduction path in the single-phase bridge arm. Then, in the second of two consecutive square wave cycles, when the pulse with an output level of -E in the square wave signal transitions to a zero level of 0, the voltage vector is controlled to switch from V4+ to V2+, thereby switching the fourth current conduction path in the single-phase bridge arm to the second current conduction path. In summary, in the zero level of the first square wave cycle and the second square wave cycle of the square wave signal, the switching from V2+ to V4+ and then from V4+ to V2+ is sequentially controlled.

[0083] Table 4. Double pulse voltage vector table 3

[0084] Output Level Voltage Vector Pulse 1 E V1+ Zero Level 1 0 V2+ Pulse 2 -E V4+ Zero Level 2 0 V2+

[0085] (4) Switching between V3+ and V4+.

[0086] That is, the third current conduction path and the fourth current conduction path are switched. When switching between V3+ and V4+, as shown in Table 5, in the square wave signal, in the first of two adjacent square wave cycles, during the pulse with an output level of E, the control voltage vector is V1+. At this time, the single-phase bridge arm is in the first current conduction path. When the pulse with an output level of E in the first square wave cycle transitions to a zero level of 0, the control voltage vector switches from V1+ to V3+, achieving the switch from the first current conduction path to the third current conduction path in the single-phase bridge arm. In two adjacent square wave cycles, when the zero level of 0 in the first square wave cycle transitions to a pulse with an output level of -E in the second square wave cycle, the control voltage vector switches from V3+ to V4+, achieving the switch from the third current conduction path to the fourth current conduction path in the single-phase bridge arm. Then, in the second of two consecutive square wave cycles, when the pulse with an output level of -E in the square wave signal transitions to a zero level of 0, the voltage vector is controlled to switch from V4+ to V3+, thereby switching the fourth current conduction path in the single-phase bridge arm to the third current conduction path. In summary, in the zero level of the first square wave cycle and the second square wave cycle of the square wave signal, the switching from V3+ to V4+ and then from V4+ to V3+ is sequentially controlled.

[0087] Table 5. Double pulse voltage vector table 4

[0088]

[0089]

[0090] (5) Switching between V1- and V2-.

[0091] That is, the fifth current conduction path and the sixth current conduction path are switched. When switching between V1- and V2-, as shown in Table 6, in the square wave signal, in the first of two adjacent square wave cycles, during the pulse with an output level of -E, the control voltage vector is V4-. At this time, the single-phase bridge arm is in the eighth current conduction path. When the pulse with an output level of -E in the first square wave cycle transitions to a zero level of 0, the control voltage vector switches from V4- to V2-, achieving the switch from the eighth current conduction path to the sixth current conduction path in the single-phase bridge arm. Furthermore, in two adjacent square wave cycles, when the zero level of 0 in the first square wave cycle transitions to a pulse with an output level of E in the second square wave cycle, the control voltage vector switches from V2- to V1-, achieving the switch from the sixth current conduction path to the fifth current conduction path in the single-phase bridge arm. Then, in the second of two consecutive square wave cycles, when the pulse with an output level of E in the square wave signal transitions to a zero level of 0, the voltage vector is controlled to switch from V1- to V2-, thereby switching the fifth current conduction path to the sixth current conduction path in the single-phase bridge arm. In summary, in the zero level of the first square wave cycle and the second square wave cycle of the square wave signal, the switching from V2- to V1- and then from V1- to V2- is sequentially controlled.

[0092] Table 6. Double pulse voltage vector table 5

[0093]

[0094]

[0095] (6) Switching between V1- and V3-.

[0096] That is, the fifth current conduction path and the seventh current conduction path are switched. When switching between V1- and V3-, as shown in Table 7, in the square wave signal, in the first of two adjacent square wave cycles, during the pulse period with an output level of -E, the control voltage vector is V4-. At this time, the single-phase bridge arm is in the eighth current conduction path. When the pulse with an output level of -E in the first square wave cycle transitions to a zero level with an output level of 0, the control voltage vector switches from V4- to V3-, achieving the switch from the eighth current conduction path to the seventh current conduction path in the single-phase bridge arm. In two adjacent square wave cycles, when the zero level with an output level of 0 in the first square wave cycle transitions to a pulse with an output level of E in the second square wave cycle, the control voltage vector switches from V3- to V1-, achieving the switch from the seventh current conduction path to the fifth current conduction path in the single-phase bridge arm. Then, in the second of two consecutive square wave cycles, when the pulse with an output level of E in the square wave signal transitions to a zero level of 0, the voltage vector is controlled to switch from V1- to V3-, thereby switching the fifth current conduction path to the seventh current conduction path in the single-phase bridge arm. In summary, in the zero level of the first square wave cycle and the second square wave cycle of the square wave signal, the switching from V3- to V1- and then from V1- to V3- is sequentially controlled.

[0097] Table 7. Double pulse voltage vector table 6

[0098] Output Level Voltage Vector Pulse 1 -E V4- Zero Level 1 0 V3- Pulse 2 E V1- Zero Level 2 0 V3-

[0099] (7) Switching between V2- and V4-.

[0100] That is, the sixth current conduction path and the eighth current conduction path are switched. When switching between V2- and V4-, as shown in Table 8, in each square wave cycle of the square wave signal, during the pulse period with an output level of -E, the control voltage vector is V4-. At this time, the single-phase bridge arm is the eighth current conduction path. When the pulse with an output level of E in the square wave signal transitions to a zero level with an output level of 0, the control voltage vector switches from V4- to V2-, thus achieving the switch from the eighth current conduction path to the sixth current conduction path in the single-phase bridge arm. Furthermore, in two consecutive adjacent square wave cycles, when the zero level with an output level of 0 in the previous square wave cycle transitions to a pulse with an output level of -E in the next square wave cycle, the control voltage vector switches from V2- to V4-, thus achieving the switch from the sixth current conduction path to the eighth current conduction path in the single-phase bridge arm. In summary, in two adjacent square wave periods in the square wave signal, the switching of V4-→V2-, V2-→V4-, and V4-→V2- can be controlled in sequence.

[0101] Table 8. Double pulse voltage vector table 7

[0102] Output Level Voltage Vector Pulse 1 -E V4- Zero Level 1 0 V2- Pulse 2 -E V4- Zero Level 2 0 V2-

[0103] (8) Switching between V3 and V4.

[0104] That is, the seventh current conduction path and the eighth current conduction path are switched. When switching between V3- and V4-, as shown in Table 9, in each square wave cycle of the square wave signal, during the pulse period with an output level of -E, the control voltage vector is V4-. At this time, the single-phase bridge arm is in the eighth current conduction path. When the pulse with an output level of E in the square wave signal transitions to a zero level with an output level of 0, the control voltage vector switches from V4- to V3-, thus achieving the switch from the eighth current conduction path to the seventh current conduction path in the single-phase bridge arm. In two consecutive adjacent square wave cycles, when the zero level with an output level of 0 in the previous square wave cycle transitions to a pulse with an output level of -E in the next square wave cycle, the control voltage vector switches from V3- to V4-, thus achieving the switch from the seventh current conduction path to the eighth current conduction path in the single-phase bridge arm. In summary, in two adjacent square wave periods in the square wave signal, the switching of V4-→V3-, V3-→V4-, and V4-→V3- can be controlled in sequence.

[0105] Table 9. Double pulse voltage vector table 8

[0106] Output Level Voltage Vector Pulse 1 -E V4- Zero Level 1 0 V3- Pulse 2 -E V4- Zero Level 2 0 V3-

[0107] If experiments are conducted directly based on the eight double-pulse voltage vectors described above, eight sets of experiments are required for each single-arm power module of the active neutral point clamped converter. To improve test efficiency, the following double-pulse test sequence is proposed.

[0108] Figure 10 and Figure 11 The figures show the test sequence 1 (ie, the first test sequence) and the test sequence 2 (ie, the second test sequence) used in the double-pulse test method for the active neutral point clamped converter of the present invention. Figure 10 and Figure 11 In the figure, g1-g6 represent the gate drive signals of the first switch tube S1 to the sixth switch tube S6, and T represents the duration of the square wave pulse in the gate drive signals of the first switch tube S1 to the sixth switch tube S6 (i.e., the drive control signals of the first switch tube S1 to the sixth switch tube S6).

[0109] Considering the working condition of output voltage u0, Figure 10The test sequence 1 shown includes six consecutive durations T: from T1 to T6. After T6, the first through sixth switches S1 through S6 are turned off. The first switch S1 is turned on during T1 and T3, and the second switch S2 is turned on during T1 to T4 and T6. The third through sixth switches S3 through S6 remain off during test sequence 1. Voltage vector switching occurs at the start of T1 and at the end of each duration T from T1 to T6 (a total of seven times). In the first time, the first switch tube S1 and the second switch tube S2 are turned on, and the other switch tubes are turned off. The voltage vector in the single bridge arm power module of the active neutral point clamped converter is the first positive voltage vector V1+; in the second time, the second switch tube S2 is turned on, and the other switch tubes are turned off. The voltage vector in the single bridge arm power module of the active neutral point clamped converter is the second positive voltage vector V2+; in the third time, the voltage vector in the single bridge arm power module of the active neutral point clamped converter is the same as that in the first time, which is the first positive voltage vector V1+; in the fourth time, the voltage vector in the single bridge arm power module of the active neutral point clamped converter is the same as that in the second time, which is the second positive voltage vector V2+; in the fifth time, the first switch tube S1 to The sixth switch S6 is turned off, and the voltage vector in the power module of a single bridge arm of the active neutral point clamped converter is the fourth positive voltage vector V4+. In the 6th time period (T), the voltage vector in the power module of a single bridge arm of the active neutral point clamped converter is the same as in the 2nd time period (T), namely, the second positive voltage vector V2+. After the end of the 6th time period (T), the first to sixth switches S1 to S6 are turned off, and the voltage vector in the power module of a single bridge arm of the active neutral point clamped converter is the fourth positive voltage vector V4+. Therefore, at the start time of the 1st time period (T) and the end time of each duration T from the 1st time period to the 6th time period (T), voltage vector switching occurs in the test sequence 1. The voltage vector switching sequence is: V1+ → V2+ → V1+ → V2+ → V4+ → V2+ → V4+.

[0110] Similarly, under the working condition of output voltage u0, Figure 11Test sequence 2 includes the same six consecutive durations T as test sequence 1: T1 to T6. After T6, switches S1 through S6 are turned off. Switch S2 is turned on during T1 and T3, switch S6 is turned on during T1 to T4, and T6, and switch S1 is turned on during T1 to T4. Switch S3 through S5 remain off during test sequence 2. Voltage vector switching occurs at the start of T1 and at the end of each duration T from T1 to T6. In the first time step, the second switch tube S2, the sixth switch tube S6, and the first switch tube S1 are turned on, and the other switch tubes are turned off. The voltage vector in the single bridge arm power module of the active neutral point clamped converter is the first positive voltage vector V1+; in the second time step, the sixth switch tube S6 and the first switch tube S1 are turned on, and the other switch tubes are turned off. The voltage vector in the single bridge arm power module of the active neutral point clamped converter is the third positive voltage vector V3+; in the third time step, the voltage vector in the single bridge arm power module of the active neutral point clamped converter is the same as that in the first time step, which is the first positive voltage vector V1+; in the fourth time step, the voltage vector in the single bridge arm power module of the active neutral point clamped converter is the same as that in the second time step, which is the third positive voltage vector V3+; in the fifth time step, the first switch tube S6 and the first switch tube S1 are turned on, and the other switch tubes are turned off. The voltage vector in the single bridge arm power module of the active neutral point clamped converter is the third positive voltage vector V3+; in the third time step, the voltage vector in the single bridge arm power module of the active neutral point clamped converter is the same as that in the first time step, which is the first positive voltage vector V1+; in the fourth time step, the voltage vector in the single bridge arm power module of the active neutral point clamped converter is the same as that in the second time step, which is the third positive voltage vector V3+; in the fifth time step, the first switch tube S6 and the first switch tube S1 are turned on, and the other switch tubes are turned off. Switches S1 through S6 are turned off, and the voltage vector in the power module of a single bridge arm of the active neutral point clamped converter is the fourth positive voltage vector V4+. In the 6th T, only the sixth switch S6 is turned on, while the other switches are turned off. The voltage vector in the power module of a single bridge arm of the active neutral point clamped converter is the third positive voltage vector V3+. After the end of the 6th T, switches S1 through S6 are turned off, and the voltage vector in the power module of a single bridge arm of the active neutral point clamped converter is the fourth positive voltage vector V4+. As a result, voltage vector switching occurs in test sequence 2 at the start of the 1st T and at the end of each duration T from the 1st T to the 6th T. The voltage vector switching sequence is: V1+ → V3+ → V1+ → V3+ → V4+ → V3+ → V4+.

[0111] In summary, under the aforementioned test sequences 1 and 2, with an output voltage of u0, test results for forward voltage vector switching can be obtained. Considering that in the eight double-pulse experimental tests described above, the first four double-pulse tests (forward voltage vector switching) and the last four double-pulse tests (reverse voltage vector switching) are identical, except for the voltage direction. Therefore, the test results for reverse voltage vector switching can be obtained by varying the output voltage, that is, under the output voltage -u0 condition, using the aforementioned test sequences 1 and 2. Under the output voltage -u0 condition, using the aforementioned test sequence 1, the voltage vector switching sequence is V1- → V2- → V1- → V2- → V4- → V2- → V4-; using the aforementioned test sequence 2, the voltage vector switching sequence is V1- → V3- → V1- → V3- → V4- → V3- → V4-.

[0112] The active neutral point clamped converter double-pulse test method of the present invention can cover all switching conditions of the active neutral point clamped three-level converter, thereby improving test efficiency.

[0113] Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some of the technical features therein; and these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. A double-pulse test method for an active neutral point clamped converter, characterized in that: Including steps: Testing a voltage path in a single-phase bridge arm of an active neutral point clamped converter using a first test sequence and a second test sequence; The single-phase bridge arm of the active neutral point clamped converter comprises a first switch tube (S1), a second switch tube (S2), a third switch tube (S3), a fourth switch tube (S4), a fifth switch tube (S5), a sixth switch tube (S6), a first capacitor (C d1 ) and the second capacitor (C d2 ), Each of the first switching tube (S1) to the sixth switching tube (S6) is connected in anti-parallel to a corresponding diode, that is, the first electrode of the switching tube is connected to the second electrode of the corresponding diode, and the second electrode of the switching tube is connected to the first electrode of the corresponding diode; The first switch tube (S1) to the fourth switch tube (S4) are sequentially connected in series, that is, the second electrode of the previous switch tube is connected to the first electrode of the next switch tube; The first capacitor (C d1 ) is connected to the first electrode of the first switch tube (S1), the first capacitor (C d1 ) is connected to the second electrode of the second capacitor (C d2 ) and a second electrode of a fifth switching tube (S5); The second capacitor (C d2 ) is connected to the second electrode of the fourth switching tube (S4); The first electrode of the fifth switch tube (S5) is connected to the second electrode of the first switch tube (S1), and the second electrode of the fifth switch tube (S5) is connected to the first electrode of the sixth switch tube (S6); Assume that T represents the duration of the square wave pulse in the driving control signal of the first switching tube (S1) to the sixth switching tube (S6), Then the first test sequence and the second test sequence both include 6 consecutive adjacent duration periods T: the 1st T to the 6th T. After the 6th T ends, the first switch tube (S1) to the sixth switch tube (S6) are all turned off. in, In the first test sequence, the first switch tube (S1) is turned on in the 1st and 3rd time periods, the second switch tube (S2) is turned on in the 1st to 4th time periods and the 6th time period, and the third to sixth switch tubes (S3) to (S6) remain turned off in the first test sequence; In the second test sequence, the second switch tube (S2) is turned on in the 1st and 3rd time periods, the sixth switch tube (S6) is turned on in the 1st to 4th time periods and the 6th time period, the first switch tube (S1) is turned on in the 1st to 4th time period, and the third to fifth switch tubes (S3) remain turned off in the second test sequence.

2. The double-pulse test method for an active neutral point clamped converter according to claim 1, characterized in that: The first capacitor (C d1 ) is a positive electrode and a second electrode is a negative electrode; The second capacitor (C d2 ) is a positive electrode and the second electrode is a negative electrode.

3. The double-pulse test method for an active neutral point clamped converter according to claim 1, wherein: The first electrode of the corresponding diode is an anode, and the second electrode is a cathode.

4. A double-pulse test method for an active neutral point clamped converter according to any one of claims 1 to 3, characterized in that: The first switching tube (S1) to the sixth switching tube (S6) are fully controlled power electronic devices.

5. The double-pulse test method for an active neutral point clamped converter according to claim 4, characterized in that: The first switch tube (S1) to the sixth switch tube (S6) are insulated gate bipolar transistors, integrated gate commutated thyristors or injection enhanced gate transistors, When the first switching tube (S1) to the sixth switching tube (S6) are insulated gate bipolar transistors or injection enhanced gate transistors, the first electrodes of the first switching tube (S1) to the sixth switching tube (S6) are collectors, and the second electrodes are emitters; When the first switching tube (S1) to the sixth switching tube (S6) are integrated gate-commutated thyristors, the first electrodes of the first switching tube (S1) to the sixth switching tube (S6) are anodes, and the second electrodes are cathodes.

6. The double-pulse test method for an active neutral point clamped converter according to claim 5, characterized in that: An inductor (L) is connected between the second electrode of the second switching tube (S2) and the second electrode of the fifth switching tube (S5).

7. The double-pulse test method for an active neutral point clamped converter according to claim 6, characterized in that: When the output voltage is u0, the voltage path in the single-phase bridge arm of the active neutral point clamped converter is tested using the first test sequence and the second test sequence to obtain the test results of the forward voltage vector switching. in, When the output voltage is u0, if the first switch tube (S1), the second switch tube (S2) and the sixth switch tube (S6) are turned on and the third switch tube (S3), the fourth switch tube (S4) and the fifth switch tube (S5) are turned off, the AC side potential of the active neutral point clamped converter is E; if the second switch tube (S2), the fourth switch tube (S4) and the fifth switch tube (S5) are turned on and the first switch tube (S1), the third switch tube (S3) and the sixth switch tube (S6) are turned off, the AC side potential of the active neutral point clamped converter is E. The potential is 0; if the first switch tube (S1), the third switch tube (S3) and the sixth switch tube (S6) are turned on and the second switch tube (S2), the fourth switch tube (S4) and the fifth switch tube (S5) are turned off, the potential on the AC side of the active neutral point clamped converter is 0; if the third switch tube (S3), the fourth switch tube (S4) and the fifth switch tube (S5) are turned on and the first switch tube (S1), the second switch tube (S2) and the sixth switch tube (S6) are turned off, the potential on the AC side of the active neutral point clamped converter is -E.

8. A double-pulse test method for an active neutral point clamped converter according to claim 7, characterized in that: When the output voltage is -u0, the voltage path in the single-phase bridge arm of the active neutral point clamped converter is tested using the first test sequence and the second test sequence to obtain the test results of reverse voltage vector switching. in, When the output voltage is -u0, if the first switch tube (S1), the second switch tube (S2) and the sixth switch tube (S6) are turned on and the third switch tube (S3), the fourth switch tube (S4) and the fifth switch tube (S5) are turned off, the AC side potential of the active neutral point clamped converter is -E; if the second switch tube (S2), the fourth switch tube (S4) and the fifth switch tube (S5) are turned on and the first switch tube (S1), the third switch tube (S3) and the sixth switch tube (S6) are turned off, the AC side potential of the active neutral point clamped converter is -E. The AC side potential of the active neutral point clamped converter is 0; if the first switch tube (S1), the third switch tube (S3) and the sixth switch tube (S6) are turned on and the second switch tube (S2), the fourth switch tube (S4) and the fifth switch tube (S5) are turned off, the AC side potential of the active neutral point clamped converter is 0; if the third switch tube (S3), the fourth switch tube (S4) and the fifth switch tube (S5) are turned on and the first switch tube (S1), the second switch tube (S2) and the sixth switch tube (S6) are turned off, the AC side potential of the active neutral point clamped converter is E.

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