144 results about "Pulse test" patented technology

The invention discloses a dynamic on-resistance test circuit based on a gallium nitride transistor and a test method thereof. Belongs to the technical field of power electronics. The circuit comprises a DPT test circuit, a switch state switching circuit and a clamping circuit, the test method comprises the following steps: monitoring the voltage between test points on the clamping circuit and the current on the coaxial resistor to obtain the on resistance of the to-be-tested tube; the switching between the hard switching test and the soft switching test is realized by changing the switch interface. According to the invention, a gallium nitride transistor and a clamping circuit are introduced into a traditional double-pulse test circuit, and a dynamic on-resistance test function in a soft switching mode and a hard switching mode is integrated. Compared with a traditional testing circuit, the clamping circuit can capture the dynamic on-resistance within nanosecond time delay, meanwhile, the peak of the clamping voltage is greatly reduced, the testing precision is improved, and rapid and accurate measurement of the dynamic on-resistance is achieved.

The invention relates to a power device online test system and a power device test control method. The system comprises an upper computer, a test board and a digital signal generator, the test board and the digital signal generator are connected with the upper computer, n aging circuits, driving circuits and measuring circuits are integrated on the test board, and the upper computer is used for determining test parameters of periodic tests of at least one to-be-tested power device and determining the test parameters of the to-be-tested power device for each test. Determining a performance test type of the to-be-tested power device according to the test parameters, generating a performance test instruction corresponding to the performance test type, and sending the performance test instruction to a digital signal generator; generating a corresponding pulse test signal, and transmitting the pulse test signal to the driving circuit; a relay in a test channel is controlled to be switched on and / or switched off according to the pulse test signal, a performance test corresponding to the performance test type is achieved for the to-be-tested power device through the test channel, and the test channel comprises an aging circuit and a measuring circuit.

The utility model provides an open-loop controlled multifunctional hydraulic pulse test bench, which comprises a storage oil tank, an oil supply pump machine, a reversing valve, a pressurizing oil cylinder and an oil supplementing overflow valve, according to the test bed, a large amount of oil flows into a system at the moment that an oil way is opened by a reversing valve, and due to the fact that an overflow valve has a lag phenomenon in response, oil pressure instantaneously generates an overshoot peak value, pressure in a pipeline rapidly rises and a pressure peak appears, then the overflow valve is conducted, the oil is guided out along the overflow valve, and the pressure in the system is reduced to the set pressure of the overflow valve; water hammer waves and rectangular waves of various waveforms and frequency bands can be generated by adjusting the diameter of a variable damping hole of the one-way throttle valve and the rotating speed of the motor, so that the hydraulic pulse test bed can form hydraulic pulse waveforms of various waveforms and frequency bands; the set pressure of the overflow valve is increased, meanwhile, the travel switch loses efficacy, and when the reversing valve is located at the right position all the time, a damage test can be conducted on the hydraulic pipeline to measure the maximum pressure value capable of being borne by a tested piece.

The invention discloses an intelligent optical path protection monitoring system for a power system. The intelligent optical path protection monitoring system comprises a master station end arranged in a communication machine room in a power supply area and substation ends arranged in transformer substations. In the master station end, an optical transceiver is connected with an OLP protection unit, an optical pulse tester is connected with the OLP protection unit through a program control multi-path optical switch, and a master control board is connected with the optical pulse tester and the OLP protection unit. In the substation end, the optical transceiver is connected with the OLP protection unit, and the main control board is connected with the OLP protection unit; and the OLP unit of the main station end is connected with the OLP unit of each sub-station end through a main link optical fiber and a standby link optical fiber. According to the invention, optical path automatic switching protection and optical cable on-line visual monitoring analysis can be realized, and a real-time, rapid and accurate fault point positioning means can be realized.

The invention discloses a loop inductance-based multi-chip parallel current rising process modeling method and system, and the method comprises the steps: writing a current rising process equation through a loop inductance method of a multi-chip parallel double-pulse test circuit, and accurately describing the current rising behavior in the multi-chip parallel double-pulse test circuit. By calculating the terminal voltage of each chip, the method can determine a key factor for achieving a complete current sharing condition, in a parallel circuit, current sharing is the key for ensuring that all components uniformly share loads and avoid overheating and damage, and the established simulation circuit model is based on an actual current rising process equation and the current sharing condition. And the behavior of an actual circuit can be accurately reflected. Based on circuit topology described by a graph theory, Kelvin sources, non-Kelvin sources and other connection modes are unified, most (all) electromagnetic induction effects are described with least inductance parameters, a simple and effective equation is obtained, and analysis and expansion are facilitated.

The invention discloses a method and a system for calibrating time sequence deviation of double-pulse test voltage and current waveforms. The method comprises the steps of signal interception, time domain coarse alignment, periodic oscillation section interception, spectrum decomposition and oscillation frequency phase analysis, and frequency domain fine alignment and waveform reconstruction. According to the method, the inherent phase relation of voltage and current oscillation waveforms after a switching device is turned off is extracted, and signal preprocessing and frequency domain calculation are combined, so that rapid and high-precision automatic time sequence alignment is realized. Compared with a hardware method, the method provided by the invention is simple to operate, does not need to modify the circuit in advance, does not influence the reliability of a test result, does not depend on a specific probe or a test fixture, has very high universality, and can be realized through software.

A test method and apparatus for bipolar degradation of a diode, and a device. The method comprises: respectively performing static characteristic tests on a first diode and a second diode, so as to obtain a first static characteristic test result and a second static characteristic test result; setting a pulse test current, a pulse test time and a pulse cycle time, so that, on the basis of the pulse test current, the pulse test time and the pulse cycle time, a power semiconductor pulse current test device performs repeated short pulse current power cycle tests on the first diode under normal temperature conditions, and performs repeated short pulse current power cycle tests on the second diode under high temperature conditions; then, performing static tests, so as to obtain a plurality of static characteristic test results; and on the basis of the static characteristic test results, obtaining a bipolar degradation test result of a diode. By means of the method, bipolar degradation of the diode is tested, and the accuracy and reliability of the test result are improved.

The invention discloses an IGBT parallel current balancing method and device based on real-time feedback control, and relates to the technical field of power electronic conversion, and the method comprises the steps: activating a double-pulse test device to carry out the transient test of an IGBT, and obtaining the test information; performing simulation analysis by taking the multiple physical parameters as constraints to obtain simulation information; performing collaborative analysis on the test information and the simulation information to obtain a parallel current prediction function; introducing an equalization control coefficient to obtain an equalization control quantity; and activating a grid charge regulator to control and regulate the balance control quantity of the IGBT. According to the invention, the technical problems that the existing control and adjustment technology of conversion equipment between alternating current and direct current lacks an accurate feedback and dynamic adaptation mechanism, parallel branch parameters are difficult to control in a balanced manner, and the requirements of efficient and stable electric energy conversion under complex working conditions cannot be met are solved; the technical effects of accurately controlling the parallel branch current of the alternating current and direct current conversion equipment in a balanced manner and improving the electric energy conversion efficiency and the system stability under complex working conditions are achieved.

The present application relates to the technical field of electric fault detection, in particular to a pressure sensitive device damage diagnosis system combined with pulse test, comprising the following modules: an original signal acquisition module, inputting pulse sequences to the pressure sensitive device, recording voltage response signals and current response signals under each pulse sequence respectively, and generating a response signal set; based on the response signal set, wavelet decomposition is performed on the voltage response signals and the current response signals. In the present application, the pulse sequences are inputted and the voltage response signals and the current response signals under each pulse sequence are recorded, so that the data acquisition covers different working states and reduces the feature loss caused by a single test point. The voltage response signals and the current response signals are divided into different frequency intervals by using the wavelet decomposition method, which is helpful to separate the high-frequency and low-frequency features, so that the local abnormal signals are not covered by the global features, and the analysis ability for short-time fault features is enhanced.

The invention relates to a method, a device and a system for measuring electrical parameters of an IGBT (Insulated Gate Bipolar Translator) module. The method comprises the steps of obtaining a historical double-pulse test result of an IGBT module, and obtaining a historical residual life curve; according to the difference between the historical remaining life of each abnormal inflection point and the historical remaining life of the adjacent test data point, determining the anomaly degree of the abnormal inflection point; in each abnormal interval, according to the proportion of fault working condition subintervals in the working condition data and the deviation degree of the multiple monitoring parameters, the fluctuation degree in the abnormal interval is determined; determining the matching degree of the abnormal inflection point based on the difference between the abnormity degree and the fluctuation degree of each abnormal inflection point; and performing a double-pulse test on the IGBT module once to obtain the current residual life, and correcting the current residual life based on the matching degree of the plurality of abnormal inflection points and the difference of the historical residual life between the adjacent test data points in the corresponding abnormal interval to obtain a target residual life value. According to the invention, the accuracy of residual life prediction of the IGBT module can be improved.

The invention relates to a double-pulse test tool and method for a full-control device series valve, and the tool comprises an upper computer main control unit which is used for transmitting a control instruction, receiving waveform data, and carrying out the automatic parameter calculation; the control unit is connected with the upper computer main control unit, comprises a high-voltage power supply, a support capacitor and a bridge arm change-over switch, and is used for providing adjustable high voltage and realizing rapid reconstruction of a test loop; the test unit is electrically connected with the control unit and the to-be-tested device and comprises a busbar box and a load inductor, and the busbar box is used for interconnecting the supporting capacitor, the load inductor, the bridge arm change-over switch and the to-be-tested device to form an energy transmission main loop; and the acquisition unit is connected with the upper computer main control unit and the test unit, comprises an oscilloscope, a voltage probe and a current probe, and is used for capturing the electrical parameter waveform of the device to be tested in real time and uploading the electrical parameter waveform to the upper computer main control unit.

The invention relates to the technical field of power module test circuits, in particular to a double-pulse test circuit. The device comprises a test unit, a module unit, a first switch unit and a second switch unit. The module unit comprises an IGBT tube Q1, an IGBT tube Q2, a diode FRD1, a diode FRD2 and an inductor Ls. And the inductor Ls is connected with different IGBTs through the switching of the second switch unit. The first switch unit comprises seven ganged switches, and the multiple ganged switches are respectively connected with three poles of a tested IGBT tube and positive and negative poles of a tested diode FRD in a switchable manner, and directly switch the required tested IGBT tube and the tested diode FRD. Therefore, the position of the interface and the DSP drive do not need to be changed, and repeated wiring is avoided. Only one path of driving IC is needed, multi-path signal interference does not exist, the position of an interface does not need to be changed, and signal acquisition errors caused by manual operation are avoided.

A loop-symmetrical switching device double-pulse test laminated busbar and test system, belonging to the technical field of switching device testing, solves the problem of how to reduce the stray inductance of the laminated busbar. When performing a double-pulse test on a SiC-based switching device, on the upper and lower surfaces of the laminated busbar, the current of the test loop flows from one side of the two parts divided by the insulating slot through a connecting assembly to the other side of the two parts divided by the insulating slot, thereby passing through the corresponding flexible coil current sensor to complete the collection of the loop current. On the upper and lower surfaces of the laminated busbar, the path of the equivalent current forms a loop that is symmetrical in top and bottom. The currents in the loop are equal in magnitude and opposite in direction, and the magnetic fields generated by the currents in the loop cancel each other out, thereby minimizing the current residual loop and reducing the loop stray inductance. The laminated busbar occupies a small space.

This application discloses a double-pulse testing device and method for power semiconductors, belonging to the field of power semiconductor technology. The device includes: a global control module, used to generate a parameter package based on the test task and characteristic parameters of the target device when a double-pulse test is to be performed on a target device, send the parameter package to a target local execution module, and iteratively adjust the parameter package based on the double-pulse test results of the target device fed back by the target local execution module, while simultaneously sending the iteratively adjusted parameter package to the target local execution module until the double-pulse test results of the target device fed back by the target local execution module meet the test objective; and a target local execution module, used to perform double-pulse testing on the target device according to the parameter package issued by the global control module, and to feed back the double-pulse test results of the target device to the global control module. This device can improve the efficiency and accuracy of double-pulse testing of power semiconductors.

The application discloses a dynamic on-resistance test circuit based on a gallium nitride transistor and a test method thereof, and belongs to the technical field of power electronics.The circuit comprises a DPT test circuit, a switching state switching circuit and a clamping circuit; the test method is to obtain the on-resistance of the to-be-tested tube by monitoring the voltage between test points on the clamping circuit and the current on the coaxial resistor; and the switching between hard switching and soft switching tests is realized by changing the switching interface.The gallium nitride transistor and the clamping circuit are introduced on the traditional double-pulse test circuit, and the dynamic on-resistance test functions in the soft switching and hard switching modes are integrated.Compared with the traditional test circuit, the clamping circuit of the application can capture the dynamic on-resistance within nanosecond time delay, greatly reduces the peak of the clamping voltage, improves the test precision, and realizes the fast and accurate measurement of the dynamic on-resistance.

The application relates to a power device dynamic on-resistance detection method, system, device, storage medium and program product, which is applied to a power device dynamic on-resistance detection system, and the power device dynamic on-resistance detection system comprises an upper computer, a controller, a double-pulse test circuit and a signal collector, wherein the double-pulse test circuit is installed with a measured gallium nitride power device; the method comprises the following steps: under the condition that the test temperature of the measured gallium nitride power device meets preset test conditions, sending multiple groups of double-pulse test signals to the double-pulse test circuit through the controller; collecting multiple groups of electrical test parameters of the measured gallium nitride power device under the multiple groups of double-pulse test signals through the signal collector; and detecting the on-resistance of the measured gallium nitride power device based on the multiple groups of electrical test parameters through the upper computer. The method improves the detection accuracy of power device dynamic on-resistance detection.

The utility model discloses a negative logic IPM dipulse test circuit, which comprises a first power supply, a signal generator, a first driving IC, an inductor, a second power supply, a capacitor and an IPM, and is characterized in that the positive electrode of the first power supply is connected with the first driving IC, and the negative electrode of the first power supply is connected with the first driving IC and the signal generator; two ends of the signal generator are connected with the first driving IC, the first driving IC is connected with the IPM, and the IPM is connected with the second power supply, the inductor and the capacitor. According to the test circuit provided by the utility model, IPM double-pulse test is realized only by relying on the double-pulse signal of the signal generator, an inverter does not need to be purchased, the required power supply is less, the difficulty and the cost are reduced, and the test circuit is simpler.

The present application relates to seismic instrument testing technology, and discloses a seismic instrument testing method based on data communication, which comprises the following steps: a host computer is connected with a seismic instrument through handshaking, and the seismic instrument obtains testing instructions from the host computer; the testing instructions are analyzed to obtain a testing type and enter a testing mode; when the testing type is index testing, the seismic instrument is tested according to the testing instructions to obtain a first testing result; when the testing type is state testing, the seismic instrument is tested according to the testing instructions to obtain a second testing result; the first testing result and the second testing result are sent to the host computer, and the testing mode is exited; the seismic instrument is updated according to the testing data, and the testing is completed after the updating is finished. The present application also discloses a seismic instrument testing device based on data communication, an electronic device and a storage medium. The present application can improve the seismic instrument testing efficiency.

This application relates to a control link delay testing system, method, and apparatus. The system method includes: a valve control system and a test pulse module; the valve control system includes a main control module and a control link, the test pulse module is connected to the main control module via the control link, and the test pulse module is also directly connected to the main control module; the test pulse module outputs a preset test excitation signal to the main control module via the control link, receives a response signal returned by the main control module, and determines the uplink delay of the control link based on the transmission time of the test excitation signal and the reception time of the response signal; the test pulse module receives a pulse test signal sent by the main control module, and also receives a drive signal sent by the main control module via the control link, and determines the downlink delay of the control link based on the reception time of the pulse test signal and the reception time of the drive signal. Through the above testing process, accurate measurement of the uplink and downlink delays of the valve control system's control link can be achieved.

The utility model provides a kind of perovskite and metal oxide composite structure artificial synapse device, including high doped silicon layer, silicon oxide layer, perovskite film and metal oxide film, the top of high doped silicon layer is provided with silicon oxide layer, the top of silicon oxide layer is provided with perovskite film, the top of perovskite film is provided with metal oxide film.The utility model changes device structure to realize the function of artificial synapse, makes device to appear counterclockwise hysteresis when being bidirectional transmission characteristic curve test, and output current shows memory function when being pulse test.Through depositing perovskite film first, subsequently depositing metal oxide film on perovskite film, avoid the direct contact of perovskite film and air, so that device has better stability and life.The preparation method of the utility model only includes spin coating, magnetron sputtering and thermal evaporation, and operation process is simpler, process is compatible simultaneously, and time cost and process cost are lower.

This invention provides an automatic parameter extraction method and system for GaN HEMT device models based on differential evolution algorithms, belonging to the field of semiconductor device modeling technology. By deeply integrating the global optimization capability of differential evolution algorithms with semiconductor device physical models, and utilizing pulse test data and self-heating effect iterative models, this invention achieves physical-level decoupling of electrical and thermal parameters. It overcomes the problems of traditional methods, such as being prone to getting trapped in local optima, the tendency for small physical quantities to collapse to zero values, and the extraction distortion caused by multi-physics coupling, significantly improving parameter extraction accuracy and model generalization ability.

A safety test circuit includes a pulse test control circuit configured to receive a zero-vector signal and to generate a pulse test signal when the zero-vector signal is active, and first and second safety channels. The first safety channel includes a first enable circuit configured to receive the pulse test signal and a first safety input signal, and to generate a first enable signal which is active only when both the pulse test signal and the first safety input signal are inactive, and a first power signal gate configured to receive a first plurality of power control signals and to transfer the first plurality of power control signals to a power module only when the first enable signal is active. The second safety channel includes a second enable circuit configured similar to the first enable circuit, and a second power signal configured similar to the first power signal gate.

The present invention discloses a method for testing a seismic detector based on the seismic wavelet principle, comprising the following steps: creating a quiet and electromagnetically shielded space to ensure that the free axis of the seismic detector is perpendicular to the ground; selecting a seismic wavelet signal generator and a seismic detector response output recorder; connecting the seismic detector output to the input of an acquisition station during operation; starting a seismic detector pulse test on a seismic instrument in a set manner and recording the pulse; quantifying the waveform characteristics of the pulse response from various aspects such as frequency, phase, amplitude, and time; and using the seismic detector response data tested based on the seismic wavelet principle as an object, quantifying the seismic detector's background noise and the lowest resolvable frequency, and based on the data, calculating the dynamic range of the seismic detector when matched with the seismic instrument and the response frequency band of the seismic detector when matched with the seismic instrument. The present invention can solve the technical problem that the test results of traditional seismic detectors cannot directly reflect the quality of the sensing seismic wavelet.

The embodiment of the invention provides a common-source inductance extraction method, system and equipment based on double-pulse test and a medium, and the method comprises the steps: firstly, carrying out the first detection of a constructed first half-bridge circuit, determining a prediction adjustment range of a gate drive resistor Rg through a first detection result, and carrying out the adjustment, and obtaining an adjusted second half-bridge circuit; and then carrying out second detection on the second half-bridge circuit, and extracting the common-source inductance by utilizing the detected gate-source voltage measurement value and gate-source voltage filtering value of the active tube and the change rate of the drain current. According to the embodiment of the invention, the power device is excited by using double-pulse signals, and the common-source inductance is extracted by combining the change of drain current and grid voltage. The method has the advantages of high precision, low cost, no need of disassembly and packaging and the like, and is particularly suitable for common-source inductance measurement of high-frequency power devices.

The present invention pertains to a marker for discriminating an optical core wire, the marker being connected to an optical core wire that constitutes an optical network and exhibiting unique response characteristics when an optical pulse is applied. This marker for discriminating an optical core wire comprises an optical fiber, and achieves unique response characteristics by a combination of optical pulse response characteristics respectively imparted to sections defined by performing segmentation every length interval, along the length direction of the optical fiber, that corresponds to the resolution of a pulse tester for generating an optical pulse. The optical pulse response characteristics include response characteristics in which an optical pulse is attenuated and response characteristics in which an optical pulse is not attenuated. The response characteristics in which an optical pulse is attenuated are imparted by providing, to the sections, any one of a fusion point, a connector, or a bend. The unique response characteristics are expressed by a bit string in which numbers representing response characteristics in which an optical pulse is attenuated and numbers representing response characteristics in which an optical pulse is not attenuated are arranged in the order of the sections.

The present invention discloses a method for detecting anti-corona defects of stator wire rods of high-voltage motors, and relates to the technical field of electrical component detection methods, including a method for detecting anti-corona defects of stator wire rod slots and a method for detecting anti-corona defects of stator wire rod ends. A high-frequency pulse test power supply is applied to the stator wire rod, and the rapidly increasing capacitive current makes the charge energy at the anti-corona defect of the stator wire rod large, the discharge energy high, and the discharge fast. The temperature change and discharge of the anti-corona layer on the surface of the stator wire rod can be clearly observed by visual or infrared thermal imaging, and the efficiency is relatively high; and the temperature change of the inner anti-corona layer of the stator wire rod can also be observed by infrared thermal imaging. It is judged whether there is an anti-corona defect in the overlap area of ​​the inner anti-corona layer of the stator wire rod through the temperature change, and there is no need to wait until the anti-corona defect of the inner anti-corona layer is exposed after the motor has been running for a long time before knowing it, and it can be discovered, repaired or replaced in time.

The invention discloses a portable rechargeable high-voltage ignition pulse tester for dual-channel isolated acquisition, and belongs to the technical field of high-voltage pulse signal testing equipment. The tester comprises a main control module, a battery management system, a dual-channel pulse signal monitoring module, a man-machine interaction module and a power management module. Each path of the dual-channel pulse signal monitoring module is independently provided with a gas discharge tube for protection and photoelectric isolation and is independently powered by the isolation DC-DC module, so that complete electrical isolation of a high-voltage side and a low-voltage side is realized, and safety and measurement precision are ensured. The main control module adopts a microcontroller to collect and process amplitudes and times of two paths of ignition pulses in real time, information such as pulse counting, voltage values and battery electric quantity is visually displayed through a display screen, and the device is particularly suitable for high-voltage ignition pulse external field rapid detection and maintenance of engines and ignition devices in the fields of aviation, military industry and the like.

The application provides a multi-parameter fusion asphalt mixture acoustic emission sensor layout optimization method, comprising: arranging a plurality of acoustic emission sensors at equal intervals along a straight line parallel to the longitudinal direction of the surface of the asphalt mixture to be measured, performing an acoustic emission pulse test, and measuring amplitude, ringing count and wave speed; determining an effective arrangement range in which acoustic emission signals can be effectively received according to the distance at which each index attenuates by 50%, and taking the minimum value as the initial interval of the acoustic emission sensor arrangement; according to the CRLB principle, an optimization function of the acoustic emission sensor network layout is constructed; and the optimization function in step S2 is solved by using an improved genetic algorithm. The application determines the physical space constraint of the effective arrangement of the sensor through standard attenuation testing and multi-parameter fusion, constructs a regional overall positioning accuracy optimization function that fuses the exponential wave speed equation and the spatial uncertainty of the sound source, and improves the physical accuracy and reliability of the layout optimization model from a theoretical source.

The invention discloses a double-pulse test circuit and method suitable for a high-voltage SiC MOSFET (Metal-Oxide-Semiconductor Field Effect Transistor), and belongs to the technical field of semiconductor device testing. The circuit comprises an FPGA (Field Programmable Gate Array) controller, a driving main chip, a desaturation short circuit detection circuit, a bidirectional voltage-stabilizing protection circuit, a SiC MOSFET upper tube test loop and a SiC MOSFET lower tube; the output end of the FPGA controller is connected with the input end of the SiC MOSFET upper tube test loop and the input end of the driving board, and the input end of the FPGA controller is connected with the output end of the driving main chip. The input end of the desaturation short circuit detection circuit is electrically connected with the drain electrode and the source electrode of the SiC MOSFET lower tube, and the input end of the desaturation short circuit detection circuit is electrically connected with the driving main chip. One end of the bidirectional voltage stabilization protection circuit is connected with the output end of the driving main chip, and the other end of the bidirectional voltage stabilization protection circuit is connected with the grid electrode of the SiC MOSFET lower tube. The high-voltage SIC MOSFET test circuit can solve the problem that the high-voltage SIC MOSFET test circuit is low in safety.

The invention provides a control method and device of a double-pulse testing device, a testing system and a storage medium, and relates to the technical field of electronic device testing. The method comprises the following steps: sending a first pulse to a to-be-tested IGBT device; the first pulse is used for controlling the to-be-tested IGBT device to be turned off after saturation conduction; continuously sending a plurality of second pulses to the to-be-measured IGBT device until the device temperature of the to-be-measured IGBT device rises to the target temperature, and measuring the switching characteristic of the to-be-measured IGBT device at the target temperature; wherein the pulse width of the second pulse is smaller than that of the first pulse, and the to-be-tested IGBT device works in a linear region within the duration of the pulse width of the second pulse. According to the invention, the performance test of the IGBT device in the high-temperature state can be realized by using the double-pulse test device.