368 results about "Magnetoresistive random-access memory" patented technology

System and method for a unified memory and network controller for an all-flash array (AFA) storage blade in a distributed flash storage clusters over a fabric network. The unified memory and network controller has 3-way control functions including unified memory buses to cache memories and DDR4-AFA controllers, a dual-port PCIE interconnection to two host processors of gateway clusters, and four switch fabric ports for interconnections with peer controllers (e.g., AFA blades and/or chassis) in the distributed flash storage network. The AFA storage blade includes dynamic random-access memory (DRAM) and magnetoresistive random-access memory (MRAM) configured as data read/write cache buffers, and flash memory DIMM devices as primary storage. Remote data memory access (RDMA) for clients via the data caching buffers is enabled and controlled by the host processor interconnection(s), the switch fabric ports, and a unified memory bus from the unified controller to the data buffer and the flash SSDs.

A magnetic memory cell comprises in-plane anisotropy tunneling magnetic junction (TMJ) and two fixed in-plane storage-stabilized layers, which splits on the both side of the data storage layer of the TMJ. The magnetizations of the said fixed in-plane storage-stabilized layers are all normal to that of the reference layer of TMJ but point to opposite direction. The existing of the storage-stabilized layers not only enhances the stability of the data storage, but also can reduce the critical current needed to flip the data storage layer via some specially added features.

A magnetic tunnel junction (MTJ) includes a magnetic free layer, having a variable magnetization direction; an insulating tunnel barrier located adjacent to the free layer; a magnetic fixed layer having an invariable magnetization direction, the fixed layer disposed adjacent the tunnel barrier such that the tunnel barrier is located between the free layer and the fixed layer, wherein the free layer and the fixed layer have perpendicular magnetic anisotropy; and one or more of: a composite fixed layer, the composite fixed layer comprising a dusting layer, a spacer layer, and a reference layer; a synthetic antiferromagnetic (SAF) fixed layer structure, the SAF fixed layer structure comprising a SAF spacer located between the fixed layer and a second fixed magnetic layer; and a dipole layer, wherein the free layer is located between the dipole layer and the tunnel barrier.

A novel three-terminal SOT-MRAM memory cell with a unique magnetic stabilization layer or structure is proposed. A complementary magnetic footprint of the data storage layer for the memory cell is able to be created within the magnetic stabilization layer or structure by the magnetic field from the storage layer to enhance the magnetic and thermal stability of the memory cell. Several designs for both perpendicular and in-plane SOT-MRAM memory cell have been invented. With proper wire connection and sensing arrangement, the proposed memory cell is capable of forming not only the 2D array but also 3D array.

The present invention provides a low-resistance magnetoresistive element of a spin-injection write type. A crystallization promoting layer that promotes crystallization is formed in contact with an interfacial magnetic layer having an amorphous structure, so that crystallization is promoted from the side of a tunnel barrier layer, and the interface between the tunnel barrier layer and the interfacial magnetic layer is adjusted. With this arrangement, it is possible to form a magnetoresistive element that has a low resistance so as to obtain a desired current value, and has a high TMR ratio.

A method and apparatus for deterministically switching a free layer in a spin orbit torque magnetoresistive random access memory (SOT-MRAM) cell is disclosed herein. In one embodiment, an SOT-MRAM memory cell is provided. The SOT-MRAM memory cell includes a magnetic tunnel junction, a ferromagnetic bias layer, and an antiferromagnetic layer. The magnetic tunnel junction includes a free layer having primarily two bi-stable magnetization directions, a reference layer having a fixed magnetization direction, and an insulating tunnel barrier layer positioned between the free layer and the reference layer. The ferromagnetic bias layer is configured to provide spin orbit torque via anomalous Hall effect and simultaneously configured to provide a magnetic bias field on the free layer to achieve deterministic switching. The antiferromagnetic layer is positioned below the ferromagnetic bias layer and is configured to pin a magnetization direction of the ferromagnetic bias layer in a predetermined direction.

A magnetic random access memory comprises a plurality of memory elements each comprising a magnetic pinned layer; a synthetic antiferromagnetic free layer including a first ferromagnetic layer, a second ferromagnetic layer, and a first nonmagnetic layer positioned between the first ferromagnetic layer and the second ferromagnetic layer, wherein the directions of magnetization of the first ferromagnetic layer and the second ferromagnetic layer are antiparallel; and a first conductive nonmagnetic layer positioned between the magnetic pinned layer and the synthetic antiferromagnetic free layer; and means for applying a current to each of the plurality of memory elements to affect the direction of magnetization of the synthetic antiferromagnetic free layer. A method of storing data using the magnetoresistive random access memory is also provided.

A magnetic tunnel junction (MTJ) for use in a magnetoresistive random access memory (MRAM) has a CoFeB alloy free layer located between the MgO tunnel barrier layer and an upper MgO capping layer, and a CoFeB alloy enhancement layer between the MgO capping layer and a Ta cap. The CoFeB alloy free layer has high Fe content to induce perpendicular magnetic anisotropy (PMA) at the interfaces with the MgO layers. To avoid creating unnecessary PMA in the enhancement layer due to its interface with the MgO capping layer, the enhancement layer has low Fe content. After all of the layers have been deposited on the substrate, the structure is annealed to crystallize the MgO. The CoFeB alloy enhancement layer inhibits diffusion of Ta from the Ta cap layer into the MgO capping layer and creates good crystallinity of the MgO by providing CoFeB at the MgO interface.

A magnetoresistive device includes a magnetic free layer having first and second surfaces, the magnetic free layer being comprised of a ferromagnetic material having a perpendicular magnetic anisotropy, a spin current generation layer contacting the first surface of the magnetic free layer, a tunnel barrier layer having one surface contacting the second surface of the magnetic free layer, a reference layer contacting another surface of the tunnel barrier layer, and a leakage field generation layer including first and second leakage field generation layers each of which is comprised of a ferromagnetic material and generates a leakage field, an in-plane component of the leakage field at an part of the magnetic free layer is formed generating a domain wall having an in-plane magnetization component in the magnetic free layer.

A magnetic random access memory includes a single tunnel junction element which includes a first fixed layer, a first recording layer, and a first nonmagnetic layer, a double tunnel junction element which includes a second fixed layer and a third fixed layer, a second recording layer, a second nonmagnetic layer formed between the second fixed layer and the second recording layer, and a third nonmagnetic layer formed between the third fixed layer and the second recording layer, and in which the magnetization directions in the second fixed layer and the second recording layer take one of the parallel state and the antiparallel state in accordance with a direction of an electric current flowing between the second fixed layer and the second recording layer, and a transistor connected to a memory cell having the single tunnel junction element and the double tunnel junction element connected in parallel.

It is made possible to provide a magnetoresistive effect element that can reverse magnetization direction with a low current, having low areal resistance (RA) and a high TMR ratio. A magnetoresistive effect element includes: a film stack that includes a magnetization free layer including a magnetic layer in which magnetization direction is changeable, a magnetization pinned layer including a magnetic layer in which magnetization direction is pinned, and an intermediate layer provided between the magnetization free layer and the magnetization pinned layer, the intermediate layer being an oxide containing boron (B) and an element selected from the group consisting of Ca, Mg, Sr, Ba, Ti, and Sc. Current is applied bidirectionally between the magnetization pinned layer and the magnetization free layer through the intermediate layer, so that the magnetization of the magnetization free layer is reversible.

A magnetoresistive random access memory (MRAM) element includes a bottom electrode embedded in a first insulating layer; an annular reference layer in a first via hole of a second insulating layer on the first insulating layer, the annular reference layer being situated above the bottom electrode; a first gap fill material layer filling the first via hole; a barrier layer covering the annular reference layer, the second insulating layer and the first gap fill material layer; an annular free layer in a second via hole of a third insulating layer on the second insulating layer, the annular free layer being situated above the annular reference layer; and a top electrode stacked on the annular free layer.

An apparatus comprising a magnetically shielded MRAM chip and a method of manufacturing the same. The apparatus includes an MRAM module and a protective cover. The MRAM module includes a circuit board and a memory chip attached to the circuit board, the memory chip containing magnetoresistive random access memory (MRAM) cells. The protective cover includes a magnetic shielding material and at least partially encloses the memory chip. In another embodiment, the protective cover shields the memory chip without shielding at least a portion of the circuit board.

A method for writing a magnetic random access memory-based ternary content addressable memory cell comprising a first magnetic tunnel junction being formed from a storage layer, a sense layer having a magnetization direction adjustable relative to the magnetization of the storage layer, and an insulating layer between the storage and sense layers; a sense line coupled with the storage layer; a first field line and a second field line, and the first field line being orthogonal to the second field line; comprising: providing a first write data to said storage layer via the second field line to store a first stored data with a high or low logic state; characterized in that, the method further comprises providing the first write data to said storage layer via the first field line to store the first stored data with a masked logic state.

A MRAM memory and process thereof is described. A GMR magnetic layer is patterned to form a memory bit layer and an intermediate conductive layer. The intermediate conductive layer is disposed between two conductive layers such that shallow metal plugs can be utilized to interconnect the intermediate conductive layer and the conductive layers. Thus, a conventional deep tungsten plug process, interconnecting two conductive layers, is eliminated.

A device includes a first magnetic tunnel junction (MTJ) element having a first read margin and a second MTJ element having a second read margin. The first read margin is greater than twice the second read margin. The device also includes an access transistor coupled between the first MTJ element and the second MTJ element. A gate of the access transistor is coupled to a word line. The first MTJ element, the second MTJ element, and the access transistor form a multi-bit spin torque transfer magnetoresistive random access memory (STT-MRAM) memory cell.

A MRAM includes a first magnetoresistive effect (MR) element that takes a low and high resistance states. A second MR element is fixed to a low or high resistance state. First and second MOSFETs are connected to the first and second MR elements, respectively. A sense amplifier amplifies a difference between values of current flowing through the first and second MOSFETs. A current circuit outputs reference current whose value lies between current flowing through the first MR element of the low and high resistance states. A third MOSFET has one end that receives the reference current and is connected to its own gate terminal. The gate terminal of the second MOSFET receives the same potential as the gate terminal of the third MOSFET. A first resistance element is connected to the others end of the third MOSFET and has the same resistance as the second magnetoresistive effect element.

An apparatus includes a capping layer disposed on top of a free layer. The apparatus also includes a magnetic etch stop layer disposed on top of the capping layer. The capping layer and the magnetic etch stop layer are included in a spin-transfer torque magnetoresistive random access memory (STT-MRAM) magnetic tunnel junction (MTJ) device.