49 results about "Spin orbit torque" patented technology

The invention provides a magnetic random access memory and a preparation method thereof. The magnetic random access memory is applied to a comparison circuit, and comprises a magnetic tunnel junction comprising a free layer, a barrier layer and a reference layer which are stacked in sequence; the spin-orbit torque layer is located on the side, away from the reference layer, of the free layer, the conductive material layer is located on the side, away from the spin-orbit torque layer, of the magnetic tunnel junction, and a conductive material of the conductive material layer has the following characteristics that spontaneous magnetization capacity is achieved, and the resistance temperature coefficient is smaller than 0; the conductive material layer comprises a first part and a second part which are arranged at an interval, the first part is in contact with the reference layer, a first input end of the comparison circuit is electrically connected with the first part, and a second input end of the comparison circuit is electrically connected with the second part. According to the invention, the technical problems that the reading window of the magnetic tunnel junction becomes small and even the reading is wrong and the magnetic random access memory needs to apply an auxiliary magnetic field along the current direction to realize the deterministic overturning of the magnetic moment are at least solved.

A spin orbit torque (SOT) magnetic tunnel junction (MTJ) device includes a substrate, a seed layer over the substrate, and a bismuth antimony (BiSb) layer having a (0120) orientation on the seed layer. The seed layer includes a silicide layer and a surface control layer. The silicide layer includes a material of NiSi, NiFeSi, NiFeTaSi, NiCuSi, CoSi, CoFeSi, CoFeTaSi, CoCuSi, or a combination thereof. The surface control layer includes a material of NiFe, NiFeTa, NiTa, NiW, NiFeW, NiCu, NiCuM, NiFeCu, CoTa, CoFeTa, NiCoTa, Co, CoM, CoNiM, CoNi, NiSi, CoSi, NiCoSi, Cu, CuAgM, CuM, or a combination thereof, where M is Fe, Cu, Co, Ta, Ag, Ni, Mn, Cr, V, Ti, or Si.

This disclosure generally relates to the design of a spin-orbit torque (SOT) differential reader. The SOT differential reader is a multi-terminal device comprising a first shield, a first spin Hall layer, a first free layer, a gap layer, a second spin Hall layer, a second free layer, and a second shield. The gap layer serves as an electrode and is disposed between the first and second spin Hall layers. Electrical lead connections are located around the first spin Hall layer, the second spin Hall layer, the gap layer, the first shield, and / or the second shield. These lead connections facilitate the flow of current from the negative lead to the positive lead and / or the voltage from the negative lead to the positive lead. The positioning of these lead connections and the positioning of the SOT differential layers improve the reader resolution without reducing the shield-to-shield spacing (i.e., the read gap).

The present disclosure generally relates to spintronic material stacks and devices. The various disclosed embodiments of YBiPt based spin orbit torque (SOT) stacks can be used for high temperature applications. Disclosed herein are various buffer and / or interlayer configurations in spintronic stacks that can promote growth of YBiPt in the (110) orientation, to promote a high spin Hall angle (SHA) in SOT applications. One embodiment is a spintronic stack comprising a buffer layer comprising one or more layers, the one or more layers each individually comprising: MgO (100), TiN (100), Ta, Nb, HfN, Ta3W2 (110), TaW2 (100), Ta3W2N, TaW2N, or heated YPt, an SOT layer comprising YBiPt in the (110) orientation, an interlayer comprising one or more of MgO, Ta3WN, TaW3N, Ta3W (110), TaW3 (100), YPt (110), NiFeGeN, NiAlN, NiAl, NiFeGe, NiAlGe, or HfN, and a ferromagnetic layer.

A semiconductor device includes a magnetic tunneling junction (MTJ) on a substrate, a first spin orbit torque (SOT) layer on the MTJ, a spacer adjacent to the MTJ and the first SOT layer, and a second SOT layer on the first SOT layer. Preferably, the first SOT layer and the second SOT layer are made of same material.

The invention discloses a magnetoresistive random access memory (MRAM) and a manufacturing method thereof, and the manufacturing method of the magnetoresistive random access memory (MRAM) mainly comprises the following steps: forming a spin-orbit torque (SOT) layer on a substrate, then forming a magnetic tunneling junction (MTJ) on the SOT layer, forming a first covering layer beside the MTJ, forming a second covering layer beside the MTJ, and forming a second covering layer beside the MTJ. Forming a second covering layer beside the first covering layer, wherein the top surface of the second covering layer is lower than the top surface of the first covering layer;

A magnetic sensor element is disclosed, comprising a magnetic tunnel junction (MTJ) comprising a reference layer, a tunnel barrier layer, a sense layer having a sense magnetization freely orientable in the presence of the external magnetic field. The reference layer has a reference magnetization and comprises a reference SAF structure and an in-plane sensitivity axis. A SOT electrode configured to pass a SOT current adapted to switch the first reference magnetization in two opposed directions along the sensitivity axis by a spin orbit torque interaction. Also disclosed is a sensing device comprising at least one sensing branch including at least one magnetic sensor element and a sensing operation using the sensing device for sensing an external magnetic field. The magnetic sensor element allows for sensing the external magnetic field with low 1 / f noise.

The present disclosure generally relates to spintronic material stacks and devices. The various disclosed embodiments of YBiPt based spin orbit torque (SOT) stacks can be used for high temperature applications. Disclosed herein are various buffer and / or interlayer configurations in spintronic stacks that can promote growth of YBiPt in the (110) orientation, to promote a high spin Hall angle (SHA) in SOT applications. One embodiment is a spintronic stack comprising a buffer layer comprising one or more layers, the one or more layers each individually comprising: MgO(100), TiN(100), Ta, Nb, HfN, Ta3W2 (110), TaW2 (100), Ta3W2N, TaW2N, or heated YPt, an SOT layer comprising YBiPt in the (110) orientation, an interlayer comprising one or more of MgO, Ta3WN, TaW3N, Ta3W (110), TaW3 (100), YPt (110), NiFeGeN, NiAlN, NiAl, NiFeGe, NiAlGe, or HfN, and a ferromagnetic layer.

The invention discloses a magnetic random access memory unit and a forming method thereof, and a magnetic random access memory, and the memory unit comprises a spin-orbit torque layer which is used for enabling a write current to flow through when the write operation is carried out on the magnetic random access memory unit; the magnetic tunnel junction is positioned below the spin-orbit torque layer and is in contact with the spin-orbit torque layer; the first conductive structure is located on one side of the magnetic tunnel junction and located below the spin-orbit torque layer, and the first conductive structure is in contact with the spin-orbit torque layer; the second conductive structure is located on the other side of the magnetic tunnel junction and located below the spin-orbit torque layer, the second conductive structure is in contact with the spin-orbit torque layer, and the first conductive structure and the second conductive structure are used for enabling the spin-orbit torque layer to be connected with a write-in current. While the communication delay between the MRAM and the transistor is slowed down, the difficulty that the MRAM needs to stop on a spin-orbit torque layer in the process of forming the magnetic tunnel junction, the first conductive structure and the second conductive structure is also avoided.

The present embodiments relate to a PMR write-head structure where the spin-orbit torque (SOT) material is in contact with the main pole in the write gap (WG). In addition, with the write shield (WS) electrically isolated from the side shield (SS) in the present designs, the current can be confined in the SOT material near the main pole, and the device resistance can remain within a reasonable range. It can be shown, using simulations, that the main pole switching rise time can be improved by 18˜24% using spin-orbit torque from heavy metals like platinum.

A method for fabricating a semiconductor device includes the steps of first forming a spin orbit torque (SOT) layer on a substrate, forming a magnetic tunneling junction (MTJ) on the SOT layer, forming a first cap layer on the MTJ, forming a first inter-metal dielectric (IMD) layer on the first cap layer, forming a second cap layer on the first cap layer and the first IMD layer, forming a second IMD layer on the first cap layer, the first IMD layer, and the second cap layer, and then planarizing the first cap layer, the first IMD layer, the second cap layer, and the second IMD layer.

The invention discloses a zero-field spin-orbit moment memory with a ferromagnetic layer component gradient structure and a preparation method thereof, the core structure of the memory comprises a CoFeB ferromagnetic layer with a vertical component gradient, and magnetic moments at two sides of a domain wall generate asymmetry in amplitude or orientation by regulating and controlling gradient distribution of Co, Fe and B elements and inducing non-uniform Dzyaloshiski-Moriya interaction (DMI); furthermore, domain wall chiral characteristics are weakened, a net effective field is formed, and deterministic magnetization overturning without assistance of an external magnetic field is finally realized. In the preparation process, a magnetron sputtering technology is adopted, a heavy metal strong spin orbit coupling layer, a vertical magnetic anisotropy magnetic free layer with component gradient, a tunnel barrier layer, a magnetic vertical reference layer, an artificial antiferromagnetic pinning layer and a covering layer are stacked in sequence, and a magnetic tunnel junction (MTJ) unit is prepared through annealing and micro-nano processing technologies. The invention provides an efficient solution for the research and development of controllable magnetic memories and logic devices, and has a wide application prospect in the field of high-density magnetic memories.

A magnetoresistive memory device and an integrated memory circuit are provided. The magnetoresistive memory device includes a magnetic tunneling junction (MTJ) and a composite spin orbit torque (SOT) channel in contact with a terminal of the MTJ. The SOT channel includes: a first channel layer, configured to convert a portion of a charge current into an orbital current based on orbital Hall effect; and a second channel layer, covering the first channel layer, and configured to convert a portion of the charge current into a first spin current based on spin Hall effect, and to convert the orbital current to a second spin current.

The present disclosure generally relates to a deep neural network (DNN) device utilizing a spin orbit-spin orbit (SO-SO) device. The SO-SO devices each include two SOT layers (a first spin-orbit torque (SOT1) layer, a second spin-orbit torque (SOT2) layer) and a ferromagnetic layer disposed between the SOT1 layer and the SOT2 layer. Each SO-SO device further comprises three terminals, one terminal per SOT layer for in-plane current to flow into or out of the respective SOT layer, and one terminal for vertical current to flow through the plurality of layers or the entire stack of the SO-SO device. Accordingly, the SO-SO device efficiently provides spin-charge and charge-spin mechanisms in the same device, and can be flexibly configured to perform various functions of a neural node of a DNN. These functions include storing programmed weights, multiplying inputs and weights and summing such multiplication results, and executing an activation function to determine neural node outputs.

This allows for even greater spin-orbit torque to be generated in SrRuO3. [Solution] This current-induced magnetization reversal element comprises a substrate 101 and a thin film 102 made of SrRuO3 crystals epitaxially grown on the substrate 101. The substrate 101 is made of a crystal whose lattice constant differs by 0.5% or more from the lattice constant of the pseudo-cubic crystal of SrRuO3, and whose main surface on which the thin film 102 is formed is a cubic (001) or pseudo-cubic (001) plane. In the thin film 102, the oxygen octahedron is rotated with respect to the crystal axis of the pseudo-cubic crystal of SrRuO3.

A memory includes a plurality of magnetoresistive devices, wherein each magnetoresistive device includes a fixed magnetic layer, a free magnetic layer, a tunnel barrier disposed between the fixed and free magnetic layers, and an insertion layer disposed below the free magnetic layer, wherein the fixed magnetic layer is formed above the free magnetic layer. The memory also includes a plurality of antiferromagnetic layers, wherein each antiferromagnetic layer is disposed above a seed layer. The memory further includes a spin-orbit-torque (SOT) channel, wherein the SOT channel is disposed between the plurality of magnetoresistive devices and the plurality of antiferromagnetic layers.

The present disclosure generally relates to temperature detection devices including a ferromagnetic (FM) material disposed at a media facing surface (MFS). The FM material is configured to produce a first electric voltage signal in response to a temperature gradient due to an anomalous Nernst effect. The temperature detection device may also include a spin-orbit torque (SOT) material abutting the FM material. The SOT material includes at least one of BiSb, a topological insulator, a topological half-Heusler alloy, or a weakly oxidized heavy metal. The SOT material is recessed from the MFS, wherein the SOT material is configured to receive a spin current parallel to the temperature gradient generated by a spin Seebeck effect in the FM material. The spin current is detectable as a second electric voltage signal via an inverse spin Hall effect. The first electric voltage signal is added to the second electric voltage signal.

A method for fabricating a semiconductor device includes the steps of forming a magnetic tunneling junction (MTJ) on a substrate, forming a spin orbit torque (SOT) layer on the MTJ, forming an inter-metal dielectric (IMD) layer around the MTJ and the SOT layer, forming a first hard mask on the IMD layer, forming a semiconductor layer on the first hard mask, and then patterning the first hard mask.

The present disclosure provides a spin-orbit torque superlattice material, comprising a plurality of superlattice units sequentially stacked to form a multi-period superlattice structure, each of the superlattice units comprising: a spin Hall layer having a spin Hall effect for converting an electric charge flow into a high-density spin flow; a magnetic layer located above the spin Hall layer and flipping a magnetization direction under the action of the spin flow; and a symmetry-breaking layer located above the magnetic layer for breaking spatial inversion symmetry and enhancing magnetic anisotropy of the magnetic layer; the symmetry-breaking layer is an insulating film or a conductive film having a spin Hall angle opposite to that of the spin Hall layer. The present disclosure also provides a magnetic racetrack device and a magnetic tunnel junction device based on the spin-orbit torque superlattice material.

The invention discloses a magnetoresistive random access memory (MRAM) and a manufacturing method thereof, and the manufacturing method of the magnetoresistive random access memory (MRAM) mainly comprises the following steps: forming a spin-orbit torque (SOT) layer on a substrate, then forming a magnetic tunneling junction (MTJ) on the SOT layer, forming a first covering layer on the MTJ, forming a second covering layer on the MTJ, forming a second covering layer on the first covering layer, and forming a second magnetic tunneling junction (MTJ) on the second covering layer. A first oxidation process is then performed to form a first spacer beside the MTJ. Wherein the bottom surface of the first covering layer is lower than the bottom surface of the first gap wall.

The present invention relates to spin-orbit torque magnetic devices and methods of manufacturing the same. According to an embodiment, a magnetic device can include a magnetic bias layer, a spin Hall layer on the magnetic bias layer, a free magnetic layer on the spin Hall layer, an intermediate layer on the free magnetic layer, and a reference magnetic layer on the intermediate layer, wherein the spin Hall layer includes a first spin Hall layer and a second spin Hall layer formed of materials having opposite signs of spin Hall angle, respectively. The magnetic device can be a magnetic random access memory or a spin logic device.

A spin-orbit moment magnetic random access memory (MORAM) and method for controlling an artificial antiferromagnetic free layer with ferroelectric metal are disclosed. The MORAM comprises multiple memory cells, with the free magnetic layer being an artificial antiferromagnetic structure comprising a first magnetic layer, a non-magnetically coupled layer formed on the first magnetic layer, and a second magnetic layer formed on the non-magnetically coupled layer. The ferroelectric metal layer simultaneously possesses ferroelectric polarization characteristics and a spin-orbit coupling effect, generating a spin-orbit moment when an in-plane current is applied to drive the magnetic moment reversal of the free magnetic layer. Simultaneously, the magnetic coupling state of the artificial antiferromagnetic structure is controlled by the ferroelectric polarization electric field. The simultaneous presence of ferroelectric polarization and spin-orbit coupling characteristics in the ferroelectric metal layer enables both ferroelectric control and spin-orbit moment writing functions, thereby simplifying the device structure, reducing the write current density required for magnetic moment reversal, and lowering device power consumption.

A magnetic memory device includes a magnetic tunneling junction including a free layer, a tunnel barrier layer, and a pinned layer, a spin orbit torque layer at an opposite side of the tunnel barrier layer with respect to the free layer to change a magnetization direction of the free layer, and a domain wall pinning site configured to fix the pinned domain wall. The free layer includes a first region having a first width and in which a movable domain wall moves, and second and third regions extending from both end portions of the first region and respectively having a second width and a third width, which are greater than the first width. A domain wall pinning site is in the third region of the free layer and fix a pinned domain wall among the movable domain wall and the pinned domain wall, which are formed in an initialization process.

A magnetoresistive random access memory device includes a bottom electrode, a spin orbit torque layer, a magnetic tunneling junction and a top electrode. The spin orbit torque layer is disposed on the bottom electrode. The magnetic tunneling junction is disposed on the spin orbit torque layer. The top electrode is disposed on the magnetic tunneling junction.

A method for fabricating a magnetoresistive random access memory (MRAM) device includes the steps of first forming a spin orbit torque (SOT) layer on a substrate, forming a magnetic tunneling junction (MTJ) on the SOT layer, forming a first cap layer on the MTJ, and then performing a first oxidation process to form a first spacer adjacent to the MTJ. Preferably, a bottom surface of the first cap layer is lower than a bottom surface of the first spacer.

A semiconductor device and a method of fabricating the same are disclosed. The method of fabricating the semiconductor device includes forming a magnetic tunneling junction (MTJ) stack structure on a substrate, forming a first spin orbit torque (SOT) layer on the MTJ stack structure, forming a first hard mask on the first SOT layer, and patterning the first hard mask, the first SOT layer, and the MTJ stack structure using a second hard mask to form an MTJ.

The invention belongs to the technical field of integrated circuit design, and particularly relates to an in-memory floating-point number calculation circuit and method based on a spin-orbit moment magnetic random access memory, and the circuit comprises a row decoder, a writing circuit, an SOT-MRAM array, a sensing amplifier SA, a control module, a column selection unit, a shifter and a rounding circuit. When the floating-point number multiplication circuit is used for carrying out floating-point number multiplication, an exclusive-OR gate is further constructed through a majority of logic gates constructed in the storage array, and the adder and the multiplier respectively carry out floating-point number sign bit exclusive-OR operation, exponent bit addition operation and mantissa multiplication operation. The mantissa bit normalization and rounding operations are respectively completed by an array external shifter and a rounding circuit, and adders and multipliers with different bits can be constructed in the storage array according to the type of the floating-point number. The method and the device can support calculation of multiple types of floating-point numbers and effectively reduce power consumption of floating-point number calculation.

The magnetic random access memory data writing method provided by the invention comprises the following steps: determining a first writing signal based on to-be-written data, and writing a plurality of magnetic tunnel junctions into first data through the first writing signal; if the to-be-written data contains at least one first type of second data located at at least one end of the to-be-written data, determining a second write-in signal, and writing the magnetic tunnel junction corresponding to the first type of second data as second data through the second write-in signal; and if the to-be-written data contains at least one second type of second data located in the center of the to-be-written data, determining a third write-in signal, and writing the magnetic tunnel junction corresponding to the second type of second data as second data through the third write-in signal to complete data write-in. According to the embodiment of the invention, the specific data is written into one or more target MTJs in the plurality of MTJs on the same spin orbit moment layer through the plurality of writing paths without influencing the data storage state in other MTJs, so that the device cost is reduced, and the storage density is improved.

The invention provides a semiconductor structure, which comprises an inter-metal dielectric layer disposed on the substrate, a metal interconnection disposed in the inter-metal dielectric layer, wherein at least a portion of a top surface of the inter-metal dielectric layer is lower than a top surface of the metal interconnection, a MTJ (magnetic tunneling junction) stacked structure disposed on the metal interconnection, and a SOT (spin orbit torque) layer arranged on the MTJ stacked structure, wherein the SOT layer comprises a first part with a thick thickness and two second parts with a thin thickness.

Systems, methods, and apparatus related to spin orbit torque magnetoresistive random access memory (SOT-MRAM) devices. In one approach, an SOT-MRAM device has a unit cell structure in which two or more magnetic tunnel junctions (MTJs) share a common spin orbit torque (SOT) layer. Bit data stored using each MTJ can be independently read and written. The unit cell structure permits using a higher bit storage density due to sharing of the SOT layer.