FPGA-based addition carry chain delay measurement method and system

A technology of addition and carry chain and measurement method, applied in the direction of measuring electricity, measuring devices, measuring electrical variables, etc., can solve problems such as lack of accuracy, inability to respond to delay time differences, real-time adjustment of working voltage, etc., to achieve accurate results.

Active Publication Date: 2018-05-22
WUHAN WANJI INFORMATION TECH
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Problems solved by technology

In actual situations, the measured number of carry chains is not a fixed value, and even needs to be expressed in decimals, so the average measurement method also needs to repeat the measurement many times, so as to provide higher-precision calibration. This method can be used during system operation. In real-time measurement, but it cannot reflect the difference in the delay time of each carry chain, and the accuracy is lacking
[0005] The BIN-by-BIN method needs to measure the delay time of each carry chain, which is usually measured by the code density method. The method is as follows: a square wave signal that is not related to the sampling clock is generated outside the system as the Hit signal. Each rising edge of , trig...

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  • FPGA-based addition carry chain delay measurement method and system
  • FPGA-based addition carry chain delay measurement method and system
  • FPGA-based addition carry chain delay measurement method and system

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Embodiment approach

[0058] Embodiment 1 of the present invention provides the first specific implementation of a method for measuring the delay of the addition and carry chain based on FPGA, see figure 1 , the measurement method of the delay of the addition carry chain based on FPGA is used to measure the delay of the addition carry chain in the idle time that the multi-bit adder in the FPGA carries out actual timing measurement, and the measurement method specifically includes as follows content:

[0059] Step 1: The pulse test signal triggers the carry chain of the multi-bit adder, and collects the running position value of the carry chain according to the current change of the pulse test signal.

[0060] In step 1, the measurement method of the delay of the addition carry chain based on FPGA can be realized by applying a measurement system of the delay of addition carry chain based on FPGA, and the measurement system specifically includes: the reference clock CLK_ref in the FPGA , sampling cl...

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Abstract

The invention provides an FPGA-based addition carry chain delay measurement method and system. The measurement method comprises steps: pulse test signals trigger the carry chain of a multi-bit adder,and according to the change condition of the current pulse test signals, the operation position value of the carry chain is acquired; with the clock cycle for generating the pulse test signals as an interval, the pulse test signals are translated sequentially, and after each time of pulse test signal translation, the operation position value can be triggered and acquired again until the operationposition values corresponding to all operation positions in the carry chain are acquired; and the relationship data between each operation position value of the carry chain and the corresponding position of each pulse test signal are acquired, and according to the relationship data, the delay time at each operation position of the carry chain is obtained. The delay time between different carry chains can be measured in real time, influences of temperature and voltage fluctuations can be avoided, and FPGA-based TDC module high-precision timing can be realized.

Description

technical field [0001] The invention relates to the technical field of digital measurement, in particular to an FPGA-based measurement method and system for adding and carrying chain delay. Background technique [0002] In the FPGA-based time-to-digital conversion TDC design architecture, the use of carry chain delay chains to obtain high-precision delay information has been widely used. However, this TDC based on the carry chain structure is limited by the uniformity of the carry chain. The ambient temperature and different FPGAs will change the delay of the carry chain, which is the main limiting factor to improve the performance of TDC. Therefore, it is necessary to measure the delay time of the carry chain in real time. [0003] At present, the carry chain measurement methods are mainly divided into analog and digital. Among them, the analog method is mainly realized by the feedback circuit, which is often used in integrated chips, while the carry chain measurement in th...

Claims

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Application Information

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IPC IPC(8): G01R31/28G01R31/317
CPCG01R31/2882G01R31/31725
Inventor 杨明惠周行杨俊
Owner WUHAN WANJI INFORMATION TECH
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