FPGA-based method and system for measuring add-carry chain delay

Abstract

The invention provides a method and system for measuring the delay of an addition carry chain based on FPGA. The measurement method includes: a pulse test signal triggers the carry chain of a multi-bit adder, and collects the carry chain according to the change of the current pulse test signal The running position value of the pulse test signal; at the interval of the clock cycle that generates the pulse test signal, the pulse test signal is shifted in turn, and after each shift of the pulse test signal, it is re-triggered and the running position value is obtained until all the running positions in the carry chain are obtained The corresponding operating position value; and obtain the relational data between each operating position value of the carry chain and the corresponding position of each pulse test signal, and obtain the delay time at each operating position of the carry chain according to the relational data. The invention can measure the delay time between different carry chains in real time, avoid the influence of temperature and voltage fluctuations, and further realize the high-precision timing of TDC components based on FPGA.

Description

technical field [0001] The invention relates to the technical field of digital measurement, in particular to an FPGA-based measurement method and system for adding and carrying chain delay. Background technique [0002] In the FPGA-based time-to-digital conversion TDC design architecture, the use of carry chain delay chains to obtain high-precision delay information has been widely used. However, this TDC based on the carry chain structure is limited by the uniformity of the carry chain. The ambient temperature and different FPGAs will change the delay of the carry chain, which is the main limiting factor to improve the performance of TDC. Therefore, it is necessary to measure the delay time of the carry chain in real time. [0003] At present, the carry chain measurement methods are mainly divided into analog and digital. Among them, the analog method is mainly realized by the feedback circuit, which is often used in integrated chips, while the carry chain measurement in th...

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Problems solved by technology

In actual situations, the measured number of carry chains is not a fixed value, and even needs to be expressed in decimals, so the average measurement method also needs to repeat the measurement many times, so as to provide higher-precision calibration. This method can be used during system operation. In real-time measurement, but it cannot reflect the difference in the delay time of each carry chain, and the accuracy is lacking

[0005] The BIN-by-BIN method needs to measure the delay time of each carry chain, which is usually measured by the code density method. The method is as follows: a square wave signal that is not related to the sampling clock is generated outside the system as the Hit signal. Each rising edge of , triggers a time marker measurement. Since the Hit signal is not correlated with the sampling clock, after multiple measurements, the triggering moments of the Hit signal should be evenly distributed within one period of the sampling clock, so the flip-flop array is latched. In the running state of the carry chain, the positions of its rising or falling edges should be equally probable distributed in one cycle. Conversely, the number of HITs captured by each carry chain should be proportional to the delay time of the carry chain. The delay time of each carry chain is measured, but this method can only be measured before the system is running, and cannot be adjusted in real time according to the ambient temperature and operating voltage

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