Multi-source monitoring, operation and control

Abstract

Embodiments of the present disclosure relate to multi-power supply monitoring, operation, and control. An apparatus includes a first power supply, a second power supply, and a controller. The first power supply supplies a first input voltage through a first circuit path to power a first input of a load. The second power supply supplies a second input voltage through a second circuit path to power a second input of the load. During at least a ramp-up or a ramp-down in either of the first input voltage and the second input voltage or both the first input voltage and the second input voltage, the controller controls a continuity of the first circuit path to the second circuit path in accordance with the first input voltage and the second input voltage.

Description

Technical Field

[0001] The embodiments of this disclosure generally relate to multi-power source monitoring, operation, and control. Background Technology

[0002] As the demand for more processing power and Ethernet data traffic continues to increase, newer circuits, such as Ethernet ASICs (Application-Specific Integrated Circuits), now require more complex power delivery.

[0003] For example, the general trend is to increase load current while reducing core voltage. In some cases, such as circuits, the load has a core voltage requirement of 0.75V and up to 2400 amps.

[0004] Currently, no single controller can simultaneously drive a sufficient number of power converter phases to provide adequate power (e.g., via 2400 amps) to supply power to a load. This means that conventional power supply technologies may require two separate asynchronous power converters to power the load. Summary of the Invention

[0005] This disclosure includes observations of deficiencies in conventional power monitoring and power control techniques. For example, it is undesirable to provide different levels of input voltage from an asynchronous power supply to different input voltage pins of a load, as such different input voltage levels could damage the corresponding load.

[0006] The embodiments described herein include novel methods for tracking and controlling power delivery in multiphase power sources that simultaneously supply power to a common load.

[0007] More specifically, embodiments of this document include an apparatus comprising a first power supply, a second power supply, and a controller. The first power supply supplies a first input voltage via a first circuit path to power a first input to a load. The second power supply supplies a second input voltage via a second circuit path to power a second input to the load. During operation, to ensure that the same input voltage level is simultaneously applied to the input voltage pins of the load from different power supplies (such as the first and second power supplies), the controller controls the connectivity from the first circuit path to the second circuit path based on the first and second input voltages.

[0008] In one embodiment, during the ramp-up or ramp-down of one or both of the first and second input voltages, the controller controls the connectivity of the first circuit path to the second circuit path based on the first and second input voltages (e.g., via one or more switches). This embodiment ensures that the same input voltage level is applied to the first and second circuit paths during power-on and power-off.

[0009] Another embodiment of this document includes a switching circuit device connected between a first circuit path and a second circuit path. During a ramp of a first input voltage from a first power supply, a controller activates the switching circuit device to an ON state. A ramp occurs at the beginning of generating the corresponding first and second input voltages. A ramp also occurs at the point of de-energization, disconnecting the generation of the corresponding first and second input voltages.

[0010] In yet another example embodiment, the apparatus described herein includes a switching circuit device (such as one or more switches) connected between a first circuit path and a second circuit path. A controller activates the switching circuit device to an ON state in response to detecting that the magnitude of a first input voltage is lower than a first threshold voltage value and the magnitude of a second voltage is lower than a second threshold voltage value. This ensures that the same voltage is applied to the load at different inputs (such as pins, ports, etc.).

[0011] In yet another example embodiment, during the startup (ramp) condition where a first power supply generates a first input voltage and a second power supply generates a second input voltage, the controller monitors both the magnitudes of the first and second input voltages. Based on the detected operating conditions, the controller switches between connecting the first and second circuit paths and disconnecting them.

[0012] For example, in one embodiment, before the first power supply generates a first input voltage higher than a first threshold and the second power supply generates a second input voltage higher than a second threshold, the controller electrically connects the first circuit path and the second circuit path to each other via a low-impedance (e.g., short-circuit) path.

[0013] Alternatively, in one embodiment, after the first power supply generates a first input voltage higher than a first threshold voltage value and the second power supply generates a second input voltage higher than a second threshold voltage value, the controller disconnects the first circuit path from the second circuit path (providing an open circuit).

[0014] In yet another example embodiment, the first input voltage generated by the first power supply is asynchronous with respect to the second input voltage generated by the second power supply. More specifically, in one embodiment, the first power supply (such as one or more power supply phases) operates with a different signal clock than the second power supply (such as one or more power supply phases). The control described herein supports simultaneously supplying input voltages to the load at different inputs, even if one of the power supplies may generate an input voltage to power the load more slowly.

[0015] In yet another example embodiment, the load includes a first input (such as a first input pin) and a second input (such as a second input pin), each of the input pins being configured to receive an input voltage to power different internal circuitry within the load. In one embodiment, the first input includes a first set of multiple input voltage pins, each of which (via a first input voltage) powers a first portion of the load (a first circuitry); and the second input includes a second set of multiple input voltage pins, each of which (via a second input voltage) powers a second portion of the load (a second circuitry). In one embodiment, the first circuitry interacts with the second circuitry during power-on of both the first and second circuitry.

[0016] Another embodiment of this document includes providing an electrically conductive path between a first circuit path and a second circuit path via a controller before the first input voltage is higher than a first threshold and the second input voltage is higher than a second threshold or one thereof.

[0017] Another embodiment of the apparatus (or system, device, hardware, etc.) described herein includes one or more field-effect transistors (switches). In one embodiment, the field-effect transistors are directly coupled to a first circuit path and a second circuit path. A controller controls the state of the field-effect transistors based on the magnitudes of a first input voltage and a second input voltage.

[0018] Another example embodiment of this document includes a series coupling of a first switch and a second switch between a first circuit path and a second circuit path. The switches include any number of series switches connected in parallel. After detecting that both the magnitudes of the first and second input voltages are above a threshold, the controller generates a common control signal that simultaneously controls both the first and second switching circuit devices to an OFF state. Conversely, the controller generates a common control signal in response to detecting that both the first and second input voltages are above a voltage threshold to simultaneously control both the first and second switching circuit devices to an OFF state. This embodiment prevents the power outputs from short-circuiting each other when both are powered on and running.

[0019] Therefore, embodiments of this document include providing connectivity between the first and second circuit paths during the ramp-up phases of the first and second power supplies. After both the first and second input voltages exceed corresponding thresholds, the controller electrically disconnects the first and second circuit paths.

[0020] The embodiments described herein are superior to conventional techniques. For example, the load described herein may be configured to consume a large amount of current; requiring power from multiple different power sources. Instead of implementing complex circuitry to synchronize the generation and application of input voltages from each of the multiple sources to different portions of the circuitry in the load to ensure mirroring of input voltages from multiple different power sources, the embodiments herein include implementing supplementary switching circuitry (one or more switches) to ensure that different portions of the circuitry in the load are simultaneously powered with the same input voltage magnitude, even if the power sources generate input voltages asynchronously. In other words, during the power-on and power-off of the two power sources and during the power supply to different portions of the load, the controller controls the switching circuitry to temporarily connect the input voltages from the different power sources to ensure simultaneous power supply until both power sources generate a received input voltage above a threshold applied to the load.

[0021] These and other more specific embodiments are disclosed below in more detail.

[0022] Note that while the embodiments discussed herein are applicable to power supplies and supplying power to corresponding loads, the concepts disclosed herein can be advantageously applied to any other suitable topology and general power control applications.

[0023] Note that any resource discussed herein may include one or more computerized devices, mobile communication devices, servers, base stations, wireless communication devices, communication management systems, workstations, user equipment, handheld computers, or laptop computers, etc., to perform and / or support any or all of the method operations disclosed herein. In other words, one or more computerized devices or processors may be programmed and / or configured to operate as explained herein to perform the different embodiments described herein.

[0024] Another embodiment of this document includes a software program to perform the steps and operations summarized above and disclosed in detail below. One such embodiment includes a computer program product comprising a non-transitory computer-readable storage medium (i.e., any computer-readable hardware storage medium) on which software instructions are encoded for subsequent execution. When executed in a computerized device (hardware) having a processor, the instructions are programmed and / or cause the processor (hardware) to perform the operations disclosed herein. This arrangement is typically provided as software, code, instructions, and / or other data (e.g., data instructions) disposed on or encoded on a non-transitory computer-readable storage medium (such as optical media (e.g., CD-ROM), floppy disk, hard disk, memory stick, memory device, etc.) or other media such as firmware in one or more ROMs, RAMs, PROMs, etc., or such as application-specific integrated circuits (ASICs). The software or firmware or other such configuration can be installed on a computerized device to cause the computerized device to perform the techniques explained herein.

[0025] Therefore, the embodiments herein relate to methods, systems, computer program products, etc., that support operations as discussed herein.

[0026] One embodiment of this document includes a computer-readable storage medium and / or a system having instructions stored thereon. When executed by computer processor hardware, the computer processor hardware (such as one or more processor devices located in the same or different locations) causes the computer processor hardware to: monitor a first input voltage supplying power to a first input of a load via a first circuit path; monitor a second input voltage supplying power to a second input of the load via a second circuit path; and control the connectivity between the first circuit path and the second circuit path based on the first input voltage and the second input voltage.

[0027] For clarity, the order of the steps above has been added. Note that any processing steps discussed in this article can be performed in any suitable order.

[0028] Other embodiments of this disclosure include software programs and / or corresponding hardware to perform any of the method embodiment steps and operations summarized above and disclosed in detail below.

[0029] It should be understood that systems, methods, apparatuses, instructions, etc., on computer-readable storage media discussed herein can also be strictly embodied as software programs, firmware, as a mixture of software, hardware and / or firmware, or as hardware such as that within a processor (hardware or software), or within an operating system or software application.

[0030] As discussed herein, the techniques described herein are well-suited for use in applications supporting switching power supplies. However, it should be noted that the embodiments described herein are not limited to such applications, and the techniques discussed herein are also well-suited for other applications.

[0031] Additionally, it should be noted that although each of the various features, techniques, configurations, etc., described herein may be discussed in different places within this disclosure, it is intended that each concept in the concepts may optionally be implemented independently of each other or in combination with each other, where appropriate. Therefore, one or more of the inventions described herein may be embodied and observed in many different ways.

[0032] Furthermore, please note that the initial discussion of the embodiments herein (a brief description of the embodiments) does not specifically designate every embodiment and / or additional novel aspect of this disclosure or claimed invention. Rather, this brief description merely presents corresponding novel points beyond general embodiments and conventional techniques. For further details and / or possible perspectives (arrangements) of the invention discussed below, the reader may refer to the detailed description section (which is an overview of the embodiments) and the accompanying drawings corresponding to this disclosure. Attached Figure Description

[0033] Figure 1 This is an example general diagram of a power supply system that supports input and control of different input voltages to the load, according to embodiments of this document.

[0034] Figure 2 This is an example detailed diagram of a power supply system that supports input and control of different input voltages to the load, according to embodiments of this document.

[0035] Figure 3 This is an example diagram illustrating a truth table for controlling the connectivity of multiple circuit paths according to embodiments of this document.

[0036] Figure 4 This is an example timing diagram of the control of multiple ramp power supplies and corresponding switch connectivity according to embodiments of this document.

[0037] Figure 5 This is an example timing diagram of the control of multiple ramp power supplies and corresponding switch connectivity according to embodiments of this document.

[0038] Figure 6 This is an example diagram illustrating a switching circuit device according to an embodiment of this document.

[0039] Figure 7 This is an example diagram illustrating a switching circuit device according to an embodiment of this document.

[0040] Figure 8 This is an example diagram illustrating a switching circuit device according to an embodiment of this document.

[0041] Figure 9 This is an example diagram illustrating a switching circuit device according to an embodiment of this document.

[0042] Figure 10 This is an example diagram illustrating computer processor hardware and associated software instructions for performing methods according to embodiments of this document.

[0043] Figure 11 This is an example diagram illustrating a method according to an embodiment of this document.

[0044] Figure 12 This is an example diagram illustrating the fabrication of a circuit according to an embodiment of this document.

[0045] The foregoing and other objects, features, and advantages of the present invention will become apparent from the following more detailed description of preferred embodiments, as illustrated in the accompanying drawings, wherein the same reference numerals denote the same parts in different views. The drawings are not necessarily drawn to scale, but rather focus on illustrating embodiments, principles, concepts, etc. Detailed Implementation

[0046] Embodiments herein include an apparatus comprising multiple power supplies and a controller. In one embodiment, the multiple power supplies include a first power supply and a second power supply. During operation, the first power supply supplies a first input voltage via a first circuit path to power a first input to a load. The second power supply supplies a second input voltage via a second circuit path to power a second input to the load. During at least a ramp-up or ramp-down of either the first or second input voltage, or both the first and second input voltages, the controller controls the connectivity of the first circuit path to the second circuit path based on the first and second input voltages. For example, as further discussed herein, during both a ramp-up and ramp-down of the first and second input voltages, the controller electrically connects the first circuit path to the second circuit path before detecting that both the first and second input voltages are above a corresponding threshold.

[0047] This embodiment ensures that different inputs (such as different sets of input voltage pins of the load) simultaneously receive the same input voltage during the ramp-up and ramp-down of the power supply.

[0048] Now, more specifically, Figure 1 This is an example general diagram of a power supply that supports the generation of different input voltages and the input of different input voltages to a load, according to embodiments of this document.

[0049] In this example embodiment, the power system 100 includes a power supply 121, a power supply 122, a monitor 151, a monitor 152, a controller 140, a switch S1, and a load 118.

[0050] Load 118 includes any number of inputs to receive power (such as multiple input voltages).

[0051] For example, in this example embodiment, load 118 includes a first input 141 (such as one or more input voltage pins); load 118 includes a second input 142 (such as one or more input voltage pins).

[0052] Load 118 can be configured to include any number of inputs to receive corresponding input voltages. For illustrative purposes, Figure 1 The load 118 in the middle includes two inputs, namely input 141 and input 142.

[0053] As further shown, power supply 121 generates input voltage 131 (such as VIN1). Power supply 121 outputs input voltage 131 to circuit path 101. Circuit path 101 delivers input voltage 131 from power supply 121 to input 141 of load 118 and node A of switch S1.

[0054] Additionally, power supply 122 generates input voltage 132 (e.g., VIN2). Power supply 122 outputs input voltage 132 to circuit path (CP) 102. Circuit path 102 delivers input voltage 132 from power supply 122 to input 142 of load 118 and node B of switch S1.

[0055] The state of switch S1 controls the open-circuit or short-circuit conditions between nodes A and B of switch S1.

[0056] As previously described, the power system 100 also includes monitors 151 and 152. As shown, monitor 151 monitors the input voltage 131 supplied by power supply 121 to input 141 of load 118. In one embodiment, monitor 151 compares the magnitude of input voltage 131 with a corresponding threshold TV1. Based on the comparison of the magnitude of input voltage 131 with the corresponding threshold TV1, monitor 151 generates a monitor signal 161. Monitor 151 outputs monitor signal 161 to controller 140. In one embodiment, monitor signal 161 indicates whether input voltage 131 is greater than or less than threshold TV1.

[0057] Similarly, monitor 152 monitors the input voltage 132 supplied by power supply 122 to input 142 of load 118. In one embodiment, monitor 152 compares the magnitude of input voltage 132 with a corresponding threshold TV2. Based on the comparison of the magnitude of input voltage 132 with the corresponding threshold TV2, monitor 152 generates a monitor signal 162 and outputs monitor signal 162 to controller 140. In one embodiment, monitor signal 162 indicates whether input voltage 132 is greater than or less than threshold TV2.

[0058] As previously described, embodiments of this document include novel methods for monitoring and controlling simultaneous power delivery from multiple power sources to load 118. For example, in one embodiment, controller 140 monitors received monitor signals 161 and 162. To ensure that the same input voltage level is applied simultaneously to both inputs 141 and 142, the controller controls the connectivity from first circuit path 101 to second circuit path 102 based on a first input voltage 131 and a second input voltage 132.

[0059] In one embodiment, the first power supply 121 and the second power supply 122 operate asynchronously to each other. For example, in a non-limiting example embodiment, power supply 121 operates under a first clock (Clock1); power supply 122 operates under a second clock (Clock2).

[0060] Alternatively or concurrently, power supplies 121 and 122 operate under the same clock input. However, the power supplies independently generate corresponding input voltages 131 and 132 and may delay each other. In this case, the magnitude of the corresponding input voltage 131 is not always equal to the magnitude of input voltage 132 at power-on and power-off. In one embodiment, when both input voltage 131 and input voltage 132 are above a threshold, it is desirable to disconnect circuit path 101 from circuit path 102.

[0061] In this example embodiment, controlling the connectivity of the first circuit path 101 and the second circuit path 102 includes controlling the corresponding state of the switch S1.

[0062] More specifically, as further discussed herein, in response to detecting that the input voltage 131 is less than the threshold TV1 or that the input voltage 132 is less than the threshold TV2, the controller 140 controls the switch to the on state, providing a low-impedance path (short-circuit path) between the first circuit path 101 and the second circuit path 102.

[0063] As previously discussed, in response to detecting that input voltage 131 is greater than threshold TV1 and input voltage 132 is greater than threshold TV2, controller 140 controls switch S1 to the off state, providing a high-impedance path (open circuit path) between the first circuit path 101 and the second circuit path 102.

[0064] Figure 2 This is an example diagram illustrating a controller and corresponding switching circuit according to an embodiment of this document.

[0065] In this example embodiment, the power supply 121 includes a multi-phase controller PC1 and corresponding multiple phases PH11, PH12, etc. In response to receiving a corresponding enable signal instructing the generation of a corresponding input voltage 131, the multi-phase controller PC1 controls the operation of the multiple phases PH11, PH12, etc. to convert the power supply voltage into a corresponding input voltage 131 (such as 1.0 VDC or other suitable value) supplied to node A and input 141 of switch S1.

[0066] In one embodiment, power supply 121 includes thirty-two phases (such as offset phases) that generate a corresponding input voltage 131. However, power supply 121 may include any number of phases.

[0067] Furthermore, in this example embodiment, the power supply 122 includes a multi-phase controller PC2 and corresponding multiple phases PH21, PH22, etc. In response to receiving a corresponding enable signal instructing the generation of a corresponding input voltage 132, the multi-phase controller PC2 controls the operation of the multiple phases PH21, PH22, etc., to convert the received power supply voltage into a corresponding input voltage 132 (such as 1.0 VDC or other suitable value) supplied to node B and input 142 of switch S1.

[0068] In one embodiment, power supply 122 includes thirty-two phases (such as offset phases) that generate a corresponding input voltage 132. However, power supply 122 may include any number of phases.

[0069] As further shown in this example embodiment, controller 140 includes a corresponding NAND gate 220 and a driver D1, which controls the operation of switch S1 by driving node C via a control signal (CTL SIG) 105. The NAND gate generates control signal 205 based on the corresponding states of monitor signal 161 and monitor signal 162.

[0070] Driver D1 generates a corresponding control signal 105 to drive node C, depending on the state of control signal 205 generated by NAND gate 220. Figure 3 Additional details are shown in the diagram for generating the corresponding control signals 205 and 105, and the corresponding truth table 310.

[0071] Refer again Figure 2 As previously discussed, load 118 includes a first input 141 (such as a first one or more input pins) and a second input 142 (such as a second one or more input pins), each of the input pins being configured to receive an input voltage to power circuitry in the load.

[0072] More specifically, load 118 includes input 141 to receive input voltage 131 generated by power supply 121. Input voltage 131 supplies power to a first portion 251 (such as a first circuit arrangement) of load 118 via input 141. Load 118 includes input 142 to receive input voltage 132 generated by power supply 122. Input voltage 132 supplies power to a second portion 252 (such as a second circuit arrangement) of load 118 via input 142.

[0073] In one embodiment, the load is a single integrated circuit. Alternatively, the load 118 may include any number of integrated circuits.

[0074] As previously discussed, in one embodiment, even though the inputs 141 and 142 of load 118 are coupled to different circuit devices, it is expected that the same voltage is applied to the different inputs 141 and 142 during ramp-up, ramp-down, and fault modes associated with generating the corresponding input voltages 131 and 132.

[0075] Therefore, in one embodiment, the first input 141 includes a first set of multiple input voltage pins that collectively (via the first input voltage 131) power a first portion 251 (a first set of load circuitry) of the load 118; and the second input 142 includes a second set of multiple input voltage pins that collectively (via the second input voltage 132) power a second portion 252 (a second set of load circuitry) of the load 118.

[0076] Figure 3 This is an example diagram illustrating different operating states for controlling the connectivity of multiple input voltage paths according to embodiments herein.

[0077] As previously discussed, controller 140 monitors the magnitude of the corresponding input voltage 131 via monitor signal 161; controller 140 monitors the magnitude of the corresponding input voltage 132 via monitor signal 162.

[0078] In one embodiment, via the NAND control function supplied through NAND gate 220, and as shown by truth table 310, controller 140 activates switch S1 to the on state (short circuit of circuit path 101 and circuit path 102) in response to detecting that monitor signal 161 is logic low (corresponding to the condition that the magnitude of input voltage 131 is lower than threshold TV1) and monitor signal 162 is logic low (corresponding to the condition that the magnitude of input voltage 132 is lower than threshold TV2).

[0079] The controller 140 activates switch S1 to the ON state (short circuit of circuit path 101 and circuit path 102) in response to detecting that the monitor signal 161 is logic low (corresponding to the condition that the magnitude of the input voltage 131 is lower than the threshold TV1) and the monitor signal 162 is logic high (corresponding to the condition that the magnitude of the input voltage 132 is higher than the threshold TV2).

[0080] The controller 140 activates switch S1 to the on state (short circuit of circuit path 101 and circuit path 102) in response to detecting that the monitor signal 161 is logic high (corresponding to the condition that the magnitude of the input voltage 131 is higher than the threshold TV1) and the monitor signal 162 is logic low (corresponding to the condition that the magnitude of the input voltage 132 is lower than the threshold TV2).

[0081] The activation of the corresponding switch S1 for the above three states (00, 01, and 10) ensures that when any or both of the input voltages are below the corresponding threshold, the same voltage is applied to the load 118 at different inputs 141 and 142 (such as pins, ports, etc.).

[0082] The controller 140 activates switch S1 to the off state (open circuit between circuit path 101 and circuit path 102) in response to detecting that the monitor signal 161 is logic high (corresponding to the condition that the magnitude of the input voltage 131 is higher than the threshold TV1) and the monitor signal 162 is logic high (corresponding to the condition that the magnitude of the input voltage 132 is higher than the threshold TV2).

[0083] The deactivation of the corresponding switch S1 for the final state (11) ensures that the outputs of power supplies 121 and 122 are not short-circuited to each other during conditions when their respective magnitudes are higher than the operating thresholds TV1 and TV2 (i.e., circuit path 101 is not connected to circuit path 102).

[0084] Please note that the states of input voltages 131 and 132 can change over time. For example, input voltage 131 can be higher or lower than threshold TV1; input voltage 132 can be higher or lower than threshold TV2. Based on the detected operating conditions (magnitudes of input voltages 131 and 132) indicated in Table 310, the controller 140 switches between connecting the first circuit path 101 to the second circuit path 102 and disconnecting the first circuit path 101 from the second circuit path 102 via switch S1 and the corresponding control.

[0085] Figure 4 This is an example timing diagram illustrating input voltage control during the ramp-up phase of multiple power supplies according to an embodiment of this document.

[0086] As shown in this example embodiment, during the ramp-up of either the first input voltage 131 or the second input voltage 132, or both the first input voltage 131 and the second input voltage 132, the controller 140 controls the connectivity of the first circuit path 101 (e.g., via one or more switches associated with S1) to the second circuit path 102 based on the first input voltage 131 and the second input voltage 132. This embodiment ensures that the same input voltage level is applied to both the first circuit path 101 (and input 141) and the second circuit path 102 (and input 142) during the startup of the power supplies 121 and 122.

[0087] For example, during the startup condition (ramp) when the first power supply 121 generates the first input voltage 131 and the second power supply 122 generates the second input voltage 132, the controller 140 monitors both the magnitude of the first input voltage 131 and the magnitude of the second input voltage 132.

[0088] Before time T1, input voltage 131 is below threshold TV1; input voltage 132 is below threshold TV2. In this case, both monitor signals 161 and 162 are logic low. The logic low state causes controller 140 to generate control signal 105 as logic high, activating switch S1 to a short-circuit (ON) state, connecting circuit path 101 to circuit path 102.

[0089] Between time T1 and time T4, the magnitude of input voltage 132 is below the threshold TV2. This causes controller 140 to activate switch S1. Because switch S1 is on, input voltage 131 supplies power to both the first input 141 and the second input 142 of load 118. In other words, input voltage 131 is supplied to the second input 142 of load 118 via switch S1.

[0090] Note further that before time T2, the input voltage 131 is below the threshold TV1. In this case, the load 118 is not properly powered. However, between time T2 and time T4, the input voltage 131 is above the threshold TV1. In this case, the load 118 and the corresponding inputs 141 and 142 are powered using a single input voltage 131. In one embodiment, since the power supply 121 may not be able to provide sufficient current to the load 118 to operate in the maximum power consumption mode, the input voltage 131 allows the load 118 to operate at least in sleep mode or low power mode.

[0091] After time T4, the magnitude of input voltage 132 also increases above the threshold TV2. In this case, controller 140 deactivates switch S1; independent of power supply 122 supplying input voltage 132 to the second input 142 of load 118, power supply 121 supplies power to the first input 141 of load 118. In this case, load 118 is able to operate in maximum power consumption mode because both input voltage 141 and input voltage 142 supply current to the dynamic load 118.

[0092] Figure 5 This is an example timing diagram illustrating input voltage control during the ramp-up of multiple power supplies according to an embodiment of this document.

[0093] As shown in this example embodiment, controller 140 controls the connectivity of the first circuit path 101 (e.g., via one or more switches associated with S1) to the second circuit path 102 based on either the first input voltage 131 or the second input voltage 132, or the first input voltage 131 and the second input voltage 132 during a sag. This embodiment ensures that the same input voltage level is applied to both the first circuit path 101 (and input 141) and the second circuit path 102 (and input 142) during the shutdown of power supplies 121 and 122.

[0094] For example, during a shutdown condition (slop) when the first power supply 121 generates the first input voltage 131 and the second power supply 122 generates the second input voltage 132, the controller 140 monitors both the magnitude of the first input voltage 131 and the magnitude of the second input voltage 132.

[0095] Before time T7, input voltage 131 is higher than threshold TV1; input voltage 132 is higher than threshold TV2. In this case, both monitor signals 161 and 162 are logic high. The logic high state causes controller 140 to generate control signal 105 as logic low, deactivating switch S1 to the open (conducting) state and disconnecting circuit path 101 from circuit path 102.

[0096] At time T7, the input voltage 132 drops below the threshold TV2. In this situation, the monitor signal 162 switches to logic low. This causes the controller 140 to activate switch S1 to the on state.

[0097] Therefore, between time T7 and time T10, the magnitude of input voltage 132 is below the threshold TV2. This causes controller 140 to activate switch S1. Because switch S1 is on, input voltage 131 supplies power to both the first input 141 and the second input 142 of load 118. In other words, input voltage 131 is supplied to the second input 142 of load 118 via switch S1.

[0098] Note further that after time T9, the input voltage 131 is below the threshold TV1. In this case, the load 118 is not properly powered. However, between time T7 and time T9, the input voltage 131 is above the threshold TV1. In this case, the load 118 is powered using a single input voltage 131. In one embodiment, the input voltage 131 allows the load 118 to operate at least in sleep mode or low power mode to limit the current supplied by the power supply 121 via the input voltage 131.

[0099] Figure 6 This is an example diagram illustrating a switching circuit device according to an embodiment of this document.

[0100] In this example embodiment, the device (such as power system 100) or switch S1 described herein includes one or more field-effect transistors (switches).

[0101] For example, in this exemplary embodiment, switch S1 includes multiple switches, such as switch Q1, switch Q2, switch Q3, switch Q4, switch Q5, switch Q6, switch Q7, and switch Q8. Note that switch S1 may include any number of switches.

[0102] As further shown, the series combination of switches Q1 and Q5 is coupled between nodes A and B of switch S1. For example, the drain node (D) of switch Q1 is connected to node A; the drain node (D) of switch Q5 is connected to node B; the source node (S) of switch Q1 is connected to the source node (S) of switch Q5; and each of the gate nodes (G) of switch Q1 and switch Q5 is connected to node C.

[0103] Similarly, the series combination of switches Q2 and Q6 is coupled between nodes A and B of switch S1. For example, the drain node (D) of switch Q2 is connected to node A; the drain node (D) of switch Q6 is connected to node B; the source node (S) of switch Q2 is connected to the source node (S) of switch Q6; and each of the gate nodes (G) of switch Q2 and switch Q6 is connected to node C.

[0104] Similarly, the series combination of switches Q3 and Q7 is coupled between nodes A and B of switch S1. For example, the drain node (D) of switch Q3 is connected to node A; the drain node (D) of switch Q7 is connected to node B; the source node (S) of switch Q3 is connected to the source node (S) of switch Q7; and each of the gate nodes (G) of switch Q3 and switch Q7 is connected to node C.

[0105] Similarly, the series combination of switches Q4 and Q8 is coupled between nodes A and B of switch S1. For example, the drain node (D) of switch Q4 is connected to node A; the drain node (D) of switch Q8 is connected to node B; the source node (S) of switch Q4 is connected to the source node (S) of switch Q8; and each of the gate nodes (G) of switch Q4 and switch Q8 is connected to node C.

[0106] As previously discussed, controller 140 generates signal 105 as a logic high voltage (e.g., greater than 1 VDC) to turn on switch S1 and the corresponding field-effect transistor, connecting node A and node B. Controller 140 generates signal 105 as a logic low voltage (e.g., approximately 0 VDC) to turn off switch S1 and the corresponding field-effect transistor, disconnecting node A from node B.

[0107] Figure 7 This is an example diagram illustrating a switching circuit device according to an embodiment of this document.

[0108] In this example embodiment, switch S1 includes switches Q1, Q2, Q3, and Q4 connected in parallel between node A and node B. For example, the drain node (D) of switch Q1 is connected to node A of switch S1; the source node (S) of switch Q1 is connected to node B of switch S1; and the gate node (G) of switch Q1 is connected to node C of switch S1.

[0109] The drain node (D) of switch Q2 is connected to node A of switch S1; the source node (S) of switch Q2 is connected to node B of switch S1; and the gate node (G) of switch Q2 is connected to node C of switch S1.

[0110] The drain node (D) of switch Q3 is connected to node A of switch S1; the source node (S) of switch Q3 is connected to node B of switch S1; and the gate node (G) of switch Q3 is connected to node C of switch S1.

[0111] The drain node (D) of switch Q4 is connected to node A of switch S1; the source node (S) of switch Q4 is connected to node B of switch S1; and the gate node (G) of switch Q4 is connected to node C of switch S1.

[0112] As previously discussed, controller 140 generates signal 105 as a logic high voltage (e.g., greater than 1 VDC) to turn on switch S1 and the corresponding field-effect transistor, connecting node A and node B. Controller 140 generates signal 105 as a logic low voltage (e.g., approximately 0 VDC) to turn off switch S1 and the corresponding field-effect transistor, disconnecting node A from node B.

[0113] Figure 8 This is an example diagram illustrating a switching circuit device according to an embodiment of this document.

[0114] In this example embodiment, switch S1 includes switches Q5, Q6, Q7 and Q8 that are connected in parallel between node A and node B.

[0115] For example, the source node (S) of switch Q5 is connected to node A of switch S1; the drain node (D) of switch Q5 is connected to node B of switch S1; and the gate node (G) of switch Q5 is connected to node C of switch S1.

[0116] The source node (S) of switch Q6 is connected to node A of switch S1; the drain node (D) of switch Q6 is connected to node B of switch S1; and the gate node (G) of switch Q6 is connected to node C of switch S1.

[0117] The source node (S) of switch Q7 is connected to node A of switch S1; the drain node (D) of switch Q7 is connected to node B of switch S1; and the gate node (G) of switch Q7 is connected to node C of switch S1.

[0118] The source node (S) of switch Q8 is connected to node A of switch S1; the drain node (D) of switch Q8 is connected to node B of switch S1; and the gate node (G) of switch Q8 is connected to node C of switch S1.

[0119] As previously discussed, controller 140 generates signal 105 as a logic high voltage (e.g., greater than 1 VDC) to turn on switch S1, connecting node A and node B. Controller 140 generates signal 105 as a logic low voltage (e.g., approximately 0 VDC) to turn off switch S1, disconnecting node A from node B.

[0120] Figure 9 This is an example diagram illustrating a switching circuit device according to an embodiment of this document.

[0121] Another embodiment of the device described herein (such as power system 100) includes one or more field-effect transistors (switches).

[0122] For example, in this exemplary embodiment, switch S1 includes multiple switches, such as switch Q1, switch Q2, switch Q3, switch Q4, switch Q5, switch Q6, switch Q7, and switch Q8. Note that switch S1 may include any number of switches.

[0123] As further shown, the series combination of switches Q1 and Q5 is coupled between nodes A and B of switch S1. For example, the source node (S) of switch Q1 is connected to node A; the source node (S) of switch Q5 is connected to node B; the drain node (D) of switch Q1 is connected to the drain node (D) of switch Q5; and each of the gate nodes (G) of switch Q1 and switch Q5 is connected to node C.

[0124] Similarly, the series combination of switches Q2 and Q6 is coupled between nodes A and B of switch S1. For example, the source node (S) of switch Q2 is connected to node A; the source node (S) of switch Q6 is connected to node B; the drain node (D) of switch Q2 is connected to the drain node (D) of switch Q6; and each of the gate nodes (G) of switch Q2 and switch Q6 is connected to node C.

[0125] Similarly, the series combination of switches Q3 and Q7 is coupled between nodes A and B of switch S1. For example, the source node (S) of switch Q3 is connected to node A; the source node (S) of switch Q7 is connected to node B; the drain node (D) of switch Q3 is connected to the drain node (D) of switch Q7; and each of the gate nodes (G) of switch Q3 and switch Q7 is connected to node C.

[0126] Similarly, the series combination of switches Q4 and Q8 is coupled between nodes A and B of switch S1. For example, the source node (S) of switch Q4 is connected to node A; the source node (S) of switch Q8 is connected to node B; the drain node (D) of switch Q4 is connected to the drain node (D) of switch Q8; and each of the gate nodes (G) of switch Q4 and switch Q8 is connected to node C.

[0127] As previously discussed, controller 140 generates signal 105 as a logic high voltage (e.g., greater than 1 VDC) to turn on switch S1, connecting node A and node B. Controller 140 generates signal 105 as a logic low voltage (e.g., approximately 0 VDC) to turn off switch S1, disconnecting node A from node B.

[0128] As previously discussed, the embodiments described herein are superior to conventional techniques. For example, the load 118 described herein can be configured to consume a large amount of current, requiring power from multiple different power sources. Instead of implementing complex circuitry to synchronize the generation and application of input voltages from each of the multiple sources to different portions of the circuitry in the load 118 to ensure mirror-like magnitudes of input voltages 131 and 132, the embodiments herein include implementing supplementary switching circuitry S1 (e.g., via one or more switches) to ensure that even if the power sources generate input voltages 131 and 132 asynchronously, the different portions of the circuitry in the load 118 are simultaneously powered with the same input voltage magnitude. In other words, during conditions such as the power-on and power-off of two power converters and the power supply to different portions of the load 118, the controller 140 temporarily connects the input voltages 131 and 132 from the different power sources via the switching device S1 to ensure simultaneous power supply to the load 118 using one of the input voltages until both power sources 121 and 122 generate input voltages 131 and 132 above one or more thresholds.

[0129] Figure 10 This is an example block diagram of a computer device for implementing any of the operations discussed herein, according to embodiments thereof.

[0130] As shown in the figure, (such as any resource implemented by one or more resources such as controller 140, monitor 151, monitor 152, power supply 121, power supply 122, etc.) the computer system 1000 of this example includes: interconnect 1011, interconnect 1011 coupled to a computer-readable storage medium 1012 (such as a non-transitory type medium (or hardware storage medium)) capable of storing and retrieving digital information, a processor 1013 (e.g., computer processor hardware (such as one or more processor devices)), I / O interface 1014, and communication interface 1017.

[0131] I / O interface 1014 provides connectivity to any suitable circuit device, such as monitor 151, monitor 152, switch S1, etc.

[0132] The computer-readable storage medium 1012 can be any hardware storage resource or device, such as a memory, optical storage, hard disk drive, floppy disk, etc. In one embodiment, the computer-readable storage medium 1012 stores instructions and / or data used by the control application 140-1 to perform any of the operations described herein.

[0133] Furthermore, in this example embodiment, the communication interface 1017 enables the computer system 1000 and the processor 1013 to communicate via resources such as network 190 to retrieve information from remote sources and communicate with other computers.

[0134] As shown, a computer-readable storage medium 1012 is encoded using a control application 140-1 (e.g., software, firmware, etc.) executed by a processor 1013. The control application 140-1 can be configured to include instructions to perform any of the operations discussed herein.

[0135] During operation in one embodiment, the processor 1013 accesses the computer-readable storage medium 1012 via the use of the interconnect 1011 in order to initiate, run, execute, interpret, or otherwise perform instructions in the control application 140-1 stored on the computer-readable storage medium 1012.

[0136] The execution of control application 140-1 produces processing functions (such as control process 140-2) in processor 1013. In other words, control process 140-2 associated with processor 1013 means that one or more aspects of control application 140-1 are executed within or on processor 1013 in computer system 1000.

[0137] According to different embodiments, please note that the computer system 1000 may be a microcontroller device, logic, hardware processor, mixed analog / digital circuit device, etc., configured to control power supply and perform any of the operations described herein.

[0138] Now will be via Figure 11 The flowcharts below discuss the functions supported by different resources. Note that the steps in the following flowcharts can be performed in any suitable order.

[0139] Figure 11 This is an example diagram illustrating a method for controlling a power supply according to an embodiment of this document.

[0140] In processing operation 1110, controller 140 monitors a first input voltage 131 (VIN1) supplied by power supply 121 to power a first input (such as one or more input voltage pins) of load 118 through first circuit path 101.

[0141] In processing operation 1120, controller 140 monitors a second input voltage 132 (VIN2) supplied by power supply 122 to power a second input (such as one or more input voltage pins) to load 118 via second circuit path 102.

[0142] In processing operation 1130, controller 140 controls the connectivity between the first circuit path 101 and the second circuit path 102 based on the first input voltage 131 and the second input voltage 132.

[0143] Figure 12 This is an example diagram illustrating the assembly of a power supply circuit on a circuit board according to an embodiment of this document.

[0144] In this example embodiment, assembler 1240 receives substrate 1210 (such as a circuit board).

[0145] Assembler 1240 also attaches (couples) controller 140 (and one or more corresponding components or systems associated with power system 100, such as power supply 121, power supply 122, monitor 151, monitor 152, etc.) to substrate 1210.

[0146] Assembler 1240 connects controller 140 and, for example, via circuit paths (such as one or more traces, conductors, cables, wires, etc.). Figure 1 The corresponding resource coupling is shown.

[0147] Please note that components associated with the power system 100 (such as controller 140, power supply 121, power supply 122, monitor 151, monitor 152, etc.) may be attached or coupled to the substrate 1210 in any suitable manner. For example, one or more components in the power supply 100 may be soldered to the substrate, inserted into sockets on the substrate 1210, etc.

[0148] Note further that substrate 1210 is optional. The circuit path can be provided in the cable that provides connectivity between power system 100 and load 118.

[0149] In a non-limiting example embodiment, load 118 is disposed on a substrate separate from substrate 1210; the substrate of load 118 is directly or indirectly connected to substrate 1210, etc. Any part of controller 140 or power system 100 may be disposed on a separate, smaller board inserted into a socket of substrate 1210.

[0150] Therefore, embodiments herein include a system comprising: a substrate 1210 (such as a circuit board, a stand-alone board, a motherboard, a stand-alone board destined to be coupled to a motherboard, a host, etc.); a power system 100 including corresponding components as described herein; and a load 118. As previously discussed, power is supplied to the load 118 based on a delivery of input voltage 131 and / or input voltage 132 through one or more circuit paths 101 and 102.

[0151] Please note that load 118 can be any suitable circuitry or hardware, such as one or more CPUs (Central Processing Units), GPUs (Graphics Processing Units), and ASICs (Application-Specific Integrated Circuits, such as those that include one or more AI accelerators), and the load can be located on substrate 1210 or placed in a remote location.

[0152] It should be noted again that the techniques described herein are well-suited for circuit applications, such as those implementing power control of loads. However, it should be understood that the embodiments described herein are not limited to such applications, and the techniques discussed herein are also highly applicable to other applications.

[0153] Based on the description set forth herein, numerous specific details have been set forth to provide a thorough understanding of the claimed subject matter. However, those skilled in the art will understand that the claimed subject matter can be practiced without these specific details. In other instances, methods, apparatuses, systems, etc., known to those skilled in the art have not been described in detail to avoid obscuring the claimed subject matter. Some portions of the detailed description have been presented based on algorithms or symbolic representations of operations on data bits or binary digital signals stored in the memory of a computing system (such as computer memory). These algorithmic descriptions or representations are examples of techniques used by those of ordinary skill in the field of data processing to convey the substance of their work to others skilled in the art. The algorithms described herein are generally considered to be a self-consistent sequence of operations or similar processes that lead to a desired result. In this context, the operation or process involves the physical manipulation of physical quantities. Typically, although not necessarily, these quantities may take the form of electrical or magnetic signals that can be stored, transmitted, combined, compared, or otherwise manipulated. Sometimes, primarily for common reasons, it is convenient to refer to such signals as bits, data, values, elements, symbols, characters, terms, numbers, numerals, etc. However, it should be understood that all these and similar terms are associated with appropriate physical quantities and are merely convenient labels. As will be apparent from the following discussion, unless otherwise specifically stated, it should be understood that throughout the discussion of this specification, terms such as “processing,” “computing,” “calculating,” and “determining” refer to the actions or processes of a computing platform (such as a computer or similar electronic computing device) that manipulate or convert data represented as physical electronic or magnetic quantities within the computing platform’s memory, registers, or other information storage, transmission, or display devices.

[0154] While the invention has been specifically shown and described with reference to preferred embodiments thereof, those skilled in the art will understand that various changes in form and detail may be made without departing from the spirit and scope of the invention as defined by the appended claims. Such changes are intended to be covered by the scope of the invention. Therefore, the foregoing description of embodiments of the invention is not intended to be limiting. Rather, any limitation on the invention is set forth in the following claims.

Claims

1. A power monitoring device, comprising: The controller is operable as follows: Monitor the first input voltage that is supplied through the first circuit path to power the first input of the load; Monitor the second input voltage delivered through the second circuit path to supply power to the second input of the load; as well as The connectivity between the first circuit path and the second circuit path is controlled based on the first input voltage and the second input voltage. The first circuit path extends between the switching circuit device and the first input of the load, and the second circuit path extends between the switching circuit device and the second input of the load. The controlled connectivity includes activating the switching circuit device to a conducting state in response to detecting that the magnitude of the first input voltage is less than a first threshold. The switching circuit device includes a first switching circuit section and a second switching circuit section arranged in series; and The controller is operable to generate a common control signal that simultaneously controls both the first and second switching circuit sections to the off state after detecting that both the magnitude of the first input voltage and the magnitude of the second input voltage are higher than a threshold. The first and second switching circuit sections are coupled in series between the first and second circuit paths.

2. The apparatus of claim 1, wherein the controller is operable to: in response to detecting that the magnitude of the first input voltage is lower than a first threshold voltage value and the magnitude of the second input voltage is lower than a second threshold voltage value, activate the switching circuit device between the first circuit path and the second circuit path to a conducting state.

3. The apparatus of claim 1, wherein the controller is further operable to: during the ramp of the first input voltage, control the activation of a switching circuit device connected between the first circuit path and the second circuit path to a conducting state.

4. The apparatus of claim 1, wherein the controller is further operable to: monitor both the magnitude of the first input voltage and the magnitude of the second input voltage during a startup condition in which a first power supply generates the first input voltage and a second power supply generates the second input voltage.

5. The apparatus of claim 4, wherein the controller is further operable to connect the first circuit path to the second circuit path before both the first power supply generates the first input voltage above a first threshold and the second power supply generates the second input voltage above a second threshold.

6. The apparatus of claim 4, wherein the controller is further operable to disconnect the first circuit path from the second circuit path after both the first power supply generates a first input voltage higher than a first threshold and the second power supply generates a second input voltage higher than a second threshold.

7. The apparatus of claim 1, wherein the first input voltage generated by the first power source is generated asynchronously relative to the second input voltage generated by the second power source.

8. The apparatus of claim 1, wherein the first input of the load comprises a first set of a plurality of input voltage pins of the load; and The second input of the load includes a second set of multiple input voltage pins of the load.

9. The apparatus of claim 1, wherein the controller is operable to provide an electrically conductive path between the first circuit path and the second circuit path before both the first input voltage is higher than a first threshold and the second input voltage is higher than a second threshold.

10. The apparatus of claim 1, wherein the controller is operable to control the state of the field-effect transistor between the first circuit path and the second circuit path based on the first input voltage and the second input voltage.

11. A power supply monitoring method, comprising: Monitor the first input voltage supplied through the first circuit path to power the first input to the load; Monitor the second input voltage supplied through the second circuit path to power the second input of the load; as well as The connectivity between the first circuit path and the second circuit path is controlled according to the first input voltage and the second input voltage. The controlled connectivity includes activating a switching circuit device to a conducting state in response to detecting that the magnitude of the first input voltage is less than a first threshold or the magnitude of the second input voltage is less than a second threshold. In the conducting state, the switching circuit device directly electrically couples the first circuit path to the second circuit path. The switching circuit device includes a first switching circuit section and a second switching circuit section, and the method further includes: After detecting that both the magnitude of the first input voltage and the magnitude of the second input voltage are higher than a threshold, a common control signal is generated to simultaneously control both the first and second switching circuit sections to the off state. The first and second switching circuit sections are coupled in series between the first and second circuit paths.

12. The method of claim 11, wherein controlling the connectivity of the first circuit path and the second circuit path comprises: In response to the condition that the magnitude of the first input voltage is lower than a first threshold voltage value and the magnitude of the second input voltage is lower than a second threshold voltage value, the switching circuit device between the first circuit path and the second circuit path is activated to the on state.

13. The method of claim 11, wherein controlling the connectivity of the first circuit path and the second circuit path comprises: During the ramp of the first input voltage, the first circuit path and the second circuit path are electrically connected to the on state.

14. The method of claim 11, wherein controlling the connectivity of the first circuit path and the second circuit path comprises: During the startup conditions where the first power source generates the first input voltage and the second power source generates the second input voltage, both the magnitude of the first input voltage and the magnitude of the second input voltage are monitored.

15. The method of claim 14, wherein controlling the connectivity of the first circuit path and the second circuit path comprises: The first circuit path is electrically connected to the second circuit path before the first input voltage exceeds the first threshold and the second input voltage exceeds the second threshold.

16. The method of claim 14, wherein controlling the connectivity of the first circuit path and the second circuit path comprises: After the first power supply generates a first input voltage higher than a first threshold and the second power supply generates a second input voltage higher than a second threshold, the first circuit path is disconnected from the second circuit path.

17. The method of claim 11, wherein the generation of the first input voltage by the first power source is asynchronous with respect to the generation of the second input voltage by the second power source.

18. The method of claim 11, wherein the first input comprises a first set of a plurality of input voltage pins of the load; and The second input includes a second set of multiple input voltage pins of the load.

19. The method of claim 11, wherein controlling the connectivity of the first circuit path and the second circuit path comprises: An electrically conductive path is provided between the first circuit path and the second circuit path before the first input voltage is higher than the first threshold and the second input voltage is higher than the second threshold.

20. The method of claim 11, further comprising: Before both the first input voltage and the second input voltage are above a threshold, the first circuit path and the second circuit path are directly coupled via a field-effect transistor switch.

21. A computer-readable storage medium having instructions stored thereon, which, when executed by computer processor hardware, cause the computer processor hardware to: A first input voltage is supplied to power the first input of the load through a first circuit path; A second input voltage is supplied to power the second input of the load through a second circuit path; and The connectivity between the first circuit path and the second circuit path is controlled based on the first input voltage and the second input voltage. The first circuit path extends between the switching circuit device and the first input of the load, and the second circuit path extends between the switching circuit device and the second input of the load. The controlled connectivity includes activating the switching circuit device to a conducting state in response to detecting that the magnitude of the first input voltage is less than a first threshold. The switching circuit device includes a first switching circuit section and a second switching circuit section arranged in series; and The computer processor hardware is operable to generate a common control signal that simultaneously controls both the first and second switching circuit sections to a cutoff state after detecting that both the magnitude of the first input voltage and the magnitude of the second input voltage are higher than a threshold. The first and second switching circuit sections are coupled in series between the first and second circuit paths.

22. A power monitoring system, comprising: Circuit board; The device according to claim 1, wherein the device is coupled to the circuit board; as well as The load is coupled to the substrate.

23. A power supply monitoring method, comprising: Receiver circuit board; as well as The device according to claim 1 is coupled to the circuit board.

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