Semiconductor device and method for manufacturing semiconductor device

Abstract

The present invention relates to a semiconductor device and a method for manufacturing a semiconductor device. The method comprises laminating a first semiconductor substrate and a second semiconductor substrate to form a laminate, inserting a first filler having a first viscosity into a gap provided between the periphery of the first semiconductor substrate and the periphery of the second semiconductor substrate, inserting a second filler having a second viscosity into the gap adjacent to the first filler after the first filler has been inserted into the gap, and thinning the second semiconductor substrate. The second filler has a second viscosity higher than the first viscosity.

Description

[0001] Citation of Related Applications

[0002] This application is based upon and pursues the benefit of priority from prior Japanese Patent Application No. 2020-125438, filed on July 22, 2020, the entire contents of which are incorporated herein by reference. Technical Field

[0003] Embodiments of the present invention relate to a semiconductor device and a method for manufacturing the semiconductor device. Background Art

[0004] As a method for manufacturing a semiconductor device, for example, a bonding process is known in which a first semiconductor substrate having peripheral circuits including a CMOS (Complementary Metal-Oxide-Semiconductor) and a second semiconductor substrate having a memory cell array are separately formed and then the first and second semiconductor substrates are bonded together. In the bonding process, a metal pad provided on the first semiconductor substrate is bonded to a metal pad provided on the second semiconductor substrate. Summary of the Invention

[0005] The semiconductor device and the method for manufacturing the semiconductor device according to the embodiment of the present invention can improve the productivity of the semiconductor memory device.

[0006] A method for manufacturing a semiconductor device in one embodiment comprises bonding a first semiconductor substrate and a second semiconductor substrate to form a laminate, embedding a first filler having a first viscosity in a gap provided between an outer periphery of the first semiconductor substrate and an outer periphery of the second semiconductor substrate, embedding the first filler into the gap, and then embedding a second filler into the gap adjacent to the first filler, and thinning the second semiconductor substrate, wherein the second filler has a second viscosity higher than the first viscosity.

[0007] A semiconductor device in one embodiment comprises: a first semiconductor substrate; a second semiconductor substrate, which is bonded to the first semiconductor substrate to form a laminate and is thinner than the first semiconductor substrate; a gap, which is arranged between the outer periphery of the first semiconductor substrate and the outer periphery of the second semiconductor substrate; a first filler, which is arranged in the gap and has a first viscosity; and a second filler, which is arranged in the gap adjacent to the first filler and has a second viscosity higher than the first viscosity.

[0008] According to the above configuration, the productivity of the semiconductor storage device can be improved. BRIEF DESCRIPTION OF THE DRAWINGS

[0009] Figure 1It is a perspective view showing a semiconductor device according to one embodiment.

[0010] Figure 2 This is a cross-sectional view showing a semiconductor device according to one embodiment.

[0011] Figure 3 This is a cross-sectional view showing a semiconductor device according to one embodiment.

[0012] Figure 4 (A) to (D) are cross-sectional views showing steps of manufacturing a semiconductor device according to one embodiment.

[0013] Figure 5 (A) and (B) are views showing a semiconductor manufacturing apparatus for manufacturing a semiconductor device according to an embodiment.

[0014] Figure 6 These are diagrams for explaining a method for manufacturing a semiconductor device according to one embodiment.

[0015] Figure 7 These are diagrams for explaining a method for manufacturing a semiconductor device according to one embodiment.

[0016] Figure 8 (A) and (B) are views showing a semiconductor manufacturing apparatus for manufacturing a semiconductor device according to an embodiment.

[0017] Figure 9 It is a cross-sectional view showing a configuration example of a semiconductor device according to one embodiment. DETAILED DESCRIPTION

[0018] The following describes in detail the semiconductor devices and methods for manufacturing semiconductor devices according to the embodiments with reference to the accompanying drawings. In the following description, components having substantially the same function and configuration are denoted by the same reference numerals, and repeated descriptions are provided only when necessary. Furthermore, each embodiment described below exemplifies a device or method for embodying the technical concept of the embodiment and does not specify the material, shape, structure, or arrangement of the components as described below. The technical concept of the embodiments includes various modifications to the claims.

[0019] <Overall Configuration of Semiconductor Device 1> Figure 1 It is a perspective view showing the semiconductor device 1 according to the present embodiment. Figure 2 yes Figure 1 A cross-sectional view taken along line A1 - A2 of a region 100 included in the semiconductor device 1 is shown. Figure 3 yes Figure 1 The structure of the semiconductor device 1 of this embodiment is not limited to Figures 1 to 3 The composition shown.

[0020] like Figure 1 As shown, the semiconductor device 1 has a first semiconductor substrate 22 and a second semiconductor substrate 23. The first semiconductor substrate 22 has a substrate 11 and a first circuit portion 12 provided on the substrate 11. The second semiconductor substrate 23 has a substrate 13 and a second circuit portion 14 provided on the substrate 13. The details will be described below. The first circuit portion 12 and the second circuit portion 14 are device layers having devices such as a plurality of transistors and passive components. In addition, the details will be described below. The first circuit portion 12 has a first metal pad 5 ( Figure 3 ), the second circuit portion 14 has a second metal pad 8 ( Figure 3 ), by placing the first metal pad 5 ( Figure 3 ) and the second metal pad 8 ( Figure 3 ) are connected so that the first semiconductor substrate 22 and the second semiconductor substrate 23 are bonded together. Figure 1 In the embodiment, the first filler 41 is omitted ( Figure 2 ) and the second filler 42 ( Figure 2 ) is shown. In addition, the substrate 11 and the substrate 13 are, for example, silicon substrates (silicon wafers).

[0021] During the manufacturing process of the first semiconductor substrate 22 and the second semiconductor substrate 23, each substrate is processed through multiple chemical mechanical polishing (CMP) processes. As a result, the ends of the first circuit portion 12 and the second circuit portion 14 of the first semiconductor substrate 22 and the second semiconductor substrate 23 have an over-polished shape, a so-called collapsed edge (over-polished end). Figure 1 In order to simply illustrate the structure of the semiconductor device 1, the thickness of the first circuit portion 12 and the thickness of the second circuit portion 14 are made uniform. However, in reality, Figure 2 As shown in the figure below, the thickness of the first circuit portion 12 and the thickness of the second circuit portion 14 are thinner from the center of the first semiconductor substrate 22 and the center of the second semiconductor substrate 23 as they are closer to the end 22b of the first semiconductor substrate 22 and the end 23b of the second semiconductor substrate 23.

[0022] like Figure 2 As shown, the semiconductor device 1 has a gap 15 provided between the first semiconductor substrate 22 and the second semiconductor substrate 23. Figure 1The semiconductor device 1 has the same or similar structure. When viewed in cross section, the gap is provided along the surface 22a of the first semiconductor substrate 22 and the surface 23a of the second semiconductor substrate 23. The gap includes a first gap portion 15a and a second gap portion 15b. The first gap portion 15a is located closer to the center 101 of the first semiconductor substrate 22 and the second semiconductor substrate 23 than the end portion 22b of the first semiconductor substrate 22 and the end portion 23b of the second semiconductor substrate 23. The second gap portion 15b is provided between the first gap portion 15a and the end portion 22b of the first semiconductor substrate 22 and the end portion 23b of the second semiconductor substrate 23. Furthermore, the semiconductor device 1 includes a first filler 41 and a second filler 42.

[0023] Reference numeral S denotes the bonding surface between the first semiconductor substrate 22 and the second semiconductor substrate 23. Bonding surface S is shown for convenience. The semiconductor device 1 includes a laminated body formed by bonding the first semiconductor substrate 22 and the second semiconductor substrate 23 together, with the first semiconductor substrate 22 and the second semiconductor substrate 23 being integrated. For example, bonding surface S can be identified by analyzing a cross-section of the semiconductor device 1.

[0024] In the semiconductor device 1 of this embodiment, for example, the surface 22a of the first semiconductor substrate 22 can also be called the peripheral portion of the first semiconductor substrate 22, the surface 23a of the second semiconductor substrate 23 can also be called the peripheral portion of the second semiconductor substrate 23, the gap 15 can also be called the gap portion or the non-bonded portion, the first gap portion 15a can also be called the thin layer portion or the innermost thin layer portion of the gap 15, and the second gap portion 15b can also be called the thick layer portion or the outermost thick layer portion of the gap 15.

[0025] For example, the thickness LVMH (when viewed in cross section) of the first gap 15a is 50 μm or less, and the depth length (width (when viewed in cross section) LVMD of the first gap 15a is 350 μm or more and 3500 μm or less. For example, the thickness HVMH (when viewed in cross section) of the second gap 15b is 50 μm or more and 700 μm or less, and the depth length (width (when viewed in cross section) HVMD of the second gap 15b is less than 350 μm. The thickness HVMH of the second gap 15b is greater than the thickness LVMH of the first gap 15a.

[0026] The first filler 41 is provided in the gap 15, particularly in the first gap portion 15a. Since the first gap portion 15a provided with the first filler 41 is a thin layer, when the material constituting the first filler 41 is a material having a relatively high viscosity (high viscosity), the material constituting the first filler 41 may not be embedded in the first gap portion 15a. As a result, after the first semiconductor substrate 22 and the second semiconductor substrate 23 are bonded to form a laminate, when at least one of the first semiconductor substrate 22 and the second semiconductor substrate 23 is thinned, debris and peeling may occur. Therefore, the material constituting the first filler 41 is preferably a material having a relatively low viscosity (low viscosity) so as to penetrate into the fine parts of the first gap portion 15a. The material constituting the first filler 41 includes an organic compound. The material constituting the first filler 41 includes, for example, a silicon compound and an organic solvent. Furthermore, the viscosity μ1 of the material of the first filler 41 is equal to or greater than 0.1 mPa·s (milliPascals / second) and less than 1000 mPa·s, and is, for example, 2.2 mPa·s.

[0027] The second filler 42 is provided adjacent to the first filler 41 in the gap 15, particularly in the second gap portion 15b. Since the second gap portion 15b in which the second filler 42 is provided is a thick layer, when the material constituting the second filler 42 is a material with a relatively low viscosity (low viscosity), the material constituting the second filler 42 may not be embedded in the second gap portion 15b. As a result, after the first semiconductor substrate 22 and the second semiconductor substrate 23 are bonded to form a laminate, when at least one of the first semiconductor substrate 22 and the second semiconductor substrate 23 is thinned, chipping and peeling may occur. Therefore, the material constituting the second filler 42 is preferably in close contact with the first filler 41, the surface 22a of the first semiconductor substrate 22, and the surface 23a of the second semiconductor substrate 23, so as to be embedded in the high viscosity material of the second gap portion 15b. The material constituting the second filler 42 includes a glass material or an inorganic polymer. The material constituting the second filler 42 includes, for example, an oxide containing aluminum. The viscosity μ2 of the material of the second filler 42 is 1000 mPa·s (milliPascals / second) or more and less than 1,000,000 mPa·s, for example, 50 mPa·s. The viscosity of the material constituting the second filler 42 is higher than that of the material constituting the first filler 41 .

[0028] As Figure 3 In detail, the first semiconductor substrate 22 has an insulating film 25 so as to cover the substrate 11. Figure 1 and Figure 2The same or similar structure. The first circuit portion 12 includes, for example: a peripheral circuit portion 12a, including a plurality of transistors including CMOS, passive components, and a wiring layer connected to at least a portion of the first metal pad 5; and a plurality of electrode layers 12b. The plurality of electrode layers 12b include, for example, a plurality of wiring layers (not shown), a plurality of first metal pads 5, a plurality of through-hole plugs 34, an insulating film 44, and an insulating film 45. The peripheral circuit portion 12a is electrically connected to the plurality of through-hole plugs 34 and the plurality of first metal pads 5, and the first metal pads 5 are arranged on the through-hole plugs 34 within the insulating film 44 and the insulating film 45. The first semiconductor substrate 22 may also be pre-formed with a through electrode (not shown) that passes through the first semiconductor substrate 22. In addition, Figure 3 In the embodiment, the first filler 41 is omitted ( Figure 2 ) and the second filler 42 ( Figure 2 ) icon.

[0029] The second semiconductor substrate 23 includes an insulating film 25 covering the substrate 13. The second circuit portion 14 includes, for example, a memory cell portion 14a comprising a plurality of CMOS transistors, passive components, a memory cell array comprising a plurality of memory cells, a plurality of source lines, a plurality of word lines, a plurality of bit lines, and a wiring layer connected to at least a portion of the second metal pad 8; and a plurality of electrode layers 14b. The plurality of electrode layers 14b include, for example, a plurality of wiring layers (not shown), a plurality of second metal pads 8, a plurality of via plugs 35, and insulating films 44 and 45. The memory cell portion 14a is electrically connected to the plurality of via plugs 35 and the plurality of metal pads 8, which are provided on the via plugs 35 within the insulating films 44 and 45. The second semiconductor substrate 23 may also have pre-formed through electrodes (not shown) penetrating the second semiconductor substrate 23.

[0030] Insulating film 25, insulating film 44, and first metal pad 5 are exposed on surface 22a of first semiconductor substrate 22. Insulating film 25, insulating film 44, and second metal pad 8 are exposed on surface 23a of second semiconductor substrate 23. The material constituting insulating film 25 includes, for example, silicon oxide. The material constituting insulating film 44 is, for example, a material containing oxide and silicon, which is different from the material constituting insulating film 25. The material constituting insulating film 45 includes, for example, inorganic insulating materials such as silicon nitride, silicon carbide, silicon oxynitride, and nitrogen-containing silicon carbide. The material constituting first metal pad 5 and second metal pad 8 may include, for example, copper or a copper alloy, or may include a conductive material such as a metal other than the aforementioned materials.

[0031] After the first semiconductor substrate 22 and the second semiconductor substrate 23 are bonded together, the second semiconductor substrate 23 is thinned. The second semiconductor substrate 23 is thinned using, for example, back grinding or a chemical solution. At this time, the second semiconductor substrate 23 is thinned to a degree that leaves only the second circuit portion 14. The substrate 13 of the second semiconductor substrate 23 may or may not remain.

[0032] In the first semiconductor substrate 22 and the second semiconductor substrate 23, since the end of the first circuit portion 12 and the end of the second circuit portion 14 have a collapsed edge shape, a gap 15 is generated when the first semiconductor substrate 22 and the second semiconductor substrate 23 are bonded together. If the second semiconductor substrate 23 is directly thinned in a state where the gap 15 is generated, there is a possibility that debris and peeling will occur in the laminate. As a result, there is a concern that the quality and manufacturing yield of the semiconductor device 1 will be reduced. For example, in order to suppress the reduction in the quality and manufacturing yield of the semiconductor device 1, there is a method of embedding the gap 15 with a filler. However, with this method, it is likely that both the first gap portion 15a (thin layer portion) and the second gap portion 15b (thick layer portion) of the gap 15 cannot be fully embedded.

[0033] In the semiconductor device 1 of this embodiment, the first gap 15a (thin portion) is filled with the first filler 41, and the second gap 15b (thick portion) is filled with the second filler 42, which has a higher viscosity than the first filler 41. As a result, the semiconductor device 1 of this embodiment can fully fill the gap 15, thus effectively preventing chipping and flaking. Furthermore, the semiconductor device 1 of this embodiment effectively prevents degradation in the quality and yield of the semiconductor device 1.

[0034] <Manufacturing Steps of Semiconductor Device 1> Figure 4 The manufacturing steps of the semiconductor device 1 of this embodiment are not limited to the following. Figure 4 The structure shown in the figure is sometimes omitted. Figures 1 to 3 Same or similar composition.

[0035] like Figure 4 As shown in (A), a first semiconductor substrate 22 and a second semiconductor substrate 23 are prepared. The first semiconductor substrate 22 and the second semiconductor substrate 23 are bonded together to form a laminate. Figure 3As shown, a portion of the surface of the insulating film 44 exposed to the surface 22a of the first semiconductor substrate 22 is directly bonded to a portion of the surface of the insulating film 44 exposed to the surface 23a of the second semiconductor substrate 23 through element diffusion between insulators, van der Waals force, dehydration condensation or polymerization and other chemical reactions, and the surface of the first metal pad 5 is directly bonded to the surface of the second metal pad 8 through element diffusion between metals, van der Waals force, volume expansion or recrystallization by melting. The bonding process can use well-known techniques in the technical field. For example, the first semiconductor substrate 22 and the second semiconductor substrate 23 can be bonded using mechanical pressure, annealing, or both mechanical pressure and annealing. In addition, a portion of the first metal pad 5 or a portion of the second metal pad 8 can also be virtual electrodes that are not connected to each other.

[0036] Then, if Figure 4 As shown in FIG. 1B , a filler is inserted into the gap 15 . Specifically, the first filler 41 is inserted into the first gap 15 a . Details will be described below. For example, a method for inserting the first filler 41 into the first gap 15 a includes using a filler supply device such as a dispensing nozzle or a dropper.

[0037] Then, if Figure 4 As shown in Figure (C), a filler is inserted into the gap 15. Specifically, a second filler 42 having a higher viscosity than the first filler 41 is inserted into the second gap 15b. Details will be described below, but one method for inserting the second filler 42 into the second gap 15b includes applying a film with the second filler 42 attached in a thin film along the outer periphery of the laminate.

[0038] Then, if Figure 4 As shown in (D), the second semiconductor substrate 23 is thinned. Specifically, the surface opposite to the surface 23a of the second semiconductor substrate 23 (the back surface and the surface where the second metal pad 8 is formed) is ground using back grinding or chemical solution. Figure 3 ) is the surface on the opposite side). Thus, the thickness of the second semiconductor substrate 23 can be reduced to a desired thickness.

[0039] As described above, the semiconductor device 1 of this embodiment employs a bonding process in which the first semiconductor substrate 22 and the second semiconductor substrate 23 are separately manufactured and then bonded together. As a result, the semiconductor device 1 of this embodiment can separate the thermal steps of the manufacturing process, effectively suppressing the effects of temperature during the manufacturing process. Furthermore, the semiconductor device 1 of this embodiment employs a bonding process in which the first semiconductor substrate 22 having the peripheral circuit and the second semiconductor substrate 23 having the memory cell array are separately manufactured and then bonded together. As a result, the semiconductor device 1 of this embodiment has a structure that effectively utilizes the area of ​​the semiconductor device 1 and can reduce the size of the semiconductor device. Furthermore, the semiconductor device 1 of this embodiment uses two fillers, a first filler 41 and a second filler 42 having a higher viscosity than the first filler 41, to fill the gap 15. As a result, the semiconductor device 1 of this embodiment can fully fill the gap 15, effectively suppressing chipping and flaking, thereby preventing a decrease in the quality and manufacturing yield of the semiconductor device 1. Therefore, by using the semiconductor device 1 and the method for manufacturing the semiconductor device 1 according to the present embodiment, the productivity of the semiconductor memory device is improved.

[0040] <Method of Fitting the First Filler 41 into the Gap 15> Figure 5 (A) is a view taken from the opposite side of the surface 22a of the first semiconductor substrate 22 (the back side, the side where the first metal pad 5 is formed) Figure 3 ) is a diagram of a semiconductor manufacturing apparatus 200A for manufacturing the semiconductor device 1 of this embodiment. Figure 5 (B) is from Figure 5 (A) is a side view of the semiconductor manufacturing apparatus 200A viewed from the direction A. Figure 6 and Figure 7 1 is a diagram for explaining an example of a method for manufacturing a semiconductor device 1 according to this embodiment. The semiconductor manufacturing apparatus and the method for manufacturing a semiconductor device according to this embodiment are not limited to Figures 5 to 7 The structure shown in the figure is sometimes omitted. Figures 1 to 4 Same or similar composition.

[0041] like Figure 5 (A) and Figure 5As shown in (B), a semiconductor manufacturing apparatus 200A is installed with a laminated body obtained by bonding the first semiconductor substrate 22 and the second semiconductor substrate 23. The semiconductor manufacturing apparatus 200A has a holding portion 210, a dispensing nozzle (filler supply device) 31a, and a light irradiation device 56. The holding portion 210 has: a holding table 211 for vacuum-adsorbing the surface 1a of the laminated body obtained by bonding the first semiconductor substrate 22 and the second semiconductor substrate 23 to hold the laminated body; a support shaft 212 for supporting the holding table 211; and a motor (omitted in the figure) for rotating the support shaft 212. At this time, the center 101 ( Figure 1 ) coincides with the center or approximate center of the support shaft 212, and the laminate is held on the holding table 211 at an approximately right angle to the ground. For example, while maintaining the surface of the holding table 211 at an approximately right angle to the ground, the holding table 211 rotates with the support shaft 212 as the rotation center. The distribution nozzle 31a transfers or drops the first filling material 41 directly to the first gap portion 15a. The first filling material 41 penetrates in the depth direction of the first gap portion 15a due to the capillary phenomenon. The light irradiation device 56 irradiates the first filling material 41 transferred or dropped to the first gap portion 15a with light to harden the first filling material 41.

[0042] The semiconductor manufacturing apparatus 200A of this embodiment irradiates the first filler 41, which has just been transferred or dropped into the first gap 15a, with light from the light irradiation device 56. As a result, the first filler 41 can be embedded in the first gap 15a and cured before the first filler 41 drops from the first gap 15a.

[0043] like Figure 6 As shown, semiconductor manufacturing apparatus 200B has a configuration in which dispensing nozzle 31a of semiconductor manufacturing apparatus 200A is replaced with a dropper 31b. The configuration of semiconductor manufacturing apparatus 200B other than dropper 31b is identical to that of semiconductor manufacturing apparatus 200A, and its description is omitted here. Alternatively, the dropper may be a syringe.

[0044] like Figure 7 As shown, the semiconductor manufacturing apparatus 200C is a spin coater. Since the spin coater is a well-known apparatus in the technical field, a detailed description thereof is omitted here. For example, a laminated body obtained by laminating a first semiconductor substrate 22 and a second semiconductor substrate 23 is placed on a stage (not shown) that can rotate relative to a central axis. The laminated body is oriented relative to the central axis. Figure 7 The first filler 41 is dropped from the dispensing nozzle 31c while rotating in the direction of the white arrow (clockwise) shown. The dropped first filler 41 is circulated from the end 23b of the second semiconductor substrate 23 to the surface 23a along the black arrow due to centrifugal force. Furthermore, the first filler 41 is dissipated along the first gap 15a ( Figure 3 ) is embedded in the depth direction. The first filler 41 is embedded in the depth direction of the first gap 15a ( Figure 3 ) is embedded in the depth direction, and then the laminate is baked and annealed. Therefore, the first filler 41 is embedded in the first gap 15a ( Figure 3 ) in the depth direction and then hardened.

[0045] As described above, according to the method for manufacturing the semiconductor device 1 of this embodiment, the first filler 41 can be embedded in the depth direction of the first gap 15 a and cured without dripping from the first gap 15 a .

[0046] <Method of Fitting the Second Filler 42 into the Gap 15> Figure 8 (A) is a side view of a semiconductor manufacturing apparatus 300 for manufacturing the semiconductor device 1 according to the present embodiment. Figure 8 (B) is to Figure 8 (A) is an enlarged view of the end portions of the first semiconductor substrate 22 and the second semiconductor substrate 23. The semiconductor manufacturing apparatus and the semiconductor device manufacturing method for manufacturing the semiconductor device of this embodiment are not limited to Figure 8 The structure shown in the figure is sometimes omitted. Figures 1 to 7 Same or similar composition.

[0047] like Figure 8 As shown in Figure 1A, semiconductor manufacturing apparatus 300 includes a holding unit (rotating device) 310 for holding a laminate of a first semiconductor substrate 22 and a second semiconductor substrate 23, and an application head 320 for applying a second filler material adhesive tape 54 to the second gap 15b. Furthermore, the application head 320 feeds the second filler material adhesive tape 54 while applying a specific tension to the tape, and includes a take-up reel 331 and a feed reel 232 for winding the tape.

[0048] The holding unit 310 includes a holding table 311 for vacuum-absorbing and holding the laminated material; a support shaft 312 for supporting the holding table 311; and a motor 313 for rotating the support shaft 312. The lower end of the support shaft 312 is connected to the motor 313, and the support shaft 312 and the holding table 311 rotate integrally via the motor 313. For example, while the surface of the holding table 311 holding the laminated material is maintained substantially horizontal to the ground, the holding table 311 rotates about the support shaft 312.

[0049] like Figure 8As shown in FIG. 2B , the rubbing head 320 includes a support portion 321 having two protrusions 321a and 321b, an elastic member 322 comprising elastic rubber or the like stretched between the protrusions 321a and 321b, and an air cylinder 323 connected to the support portion 321. The air cylinder 323 is used to move the rubbing head 320 to an optimal position.

[0050] Furthermore, in the mechanism of a polishing apparatus used for polishing the end of a semiconductor substrate in a semiconductor device manufacturing step, by replacing the polishing tape with the second filler material attached tape 54 , the polishing apparatus can be used as the semiconductor manufacturing apparatus 300 of this embodiment.

[0051] like Figure 8 As shown in FIG. 1A , in a semiconductor manufacturing apparatus 300, the laminate is held on a holding table 311. The laminate is positioned on the holding table 311 so that the centers of the first semiconductor substrate 22 and the second semiconductor substrate 23 coincide with the centers of the support shaft 312. The second filler material attachment tape 54 is attached so that the surface on the film 55 side contacts the elastic member 322. The air cylinder 323 is then driven to sandwich the laminate of the first semiconductor substrate 22 and the second semiconductor substrate 23 between the two protrusions 321a and 321b. The wiping head 320 is then moved so that the outer peripheries of the first semiconductor substrate 22 and the second semiconductor substrate 23 contact the elastic member 322 via the second filler material attachment tape 54. The laminate is then rotated at a constant speed using the holding portion 310. Furthermore, the take-up reel 331 and the delivery reel 232 are rotated at a constant speed, and the second filler material attachment tape 54 is delivered and taken up while applying a constant tension to the second filler material attachment tape 54 .

[0052] Furthermore, in detail, Figure 8As shown in (B), the second filler material adhesive tape 54 is pressed against the outer periphery of the laminated body of the first semiconductor substrate 22 and the second semiconductor substrate 23 by the elastic member 322 stretched between the protrusions 321a and 321b. At this time, the elastic member 322, which is pressed against the outer periphery of the laminated body of the first semiconductor substrate 22 and the second semiconductor substrate 23 through the second filler material adhesive tape 54, is stretched, generating tension in the elastic member 322. This tension in the elastic member 322 applies a constant force to the outer periphery of the laminated body of the first semiconductor substrate 22 and the second semiconductor substrate 23 via the second filler material adhesive tape 54, causing the second filler 42 on the second filler material adhesive tape 54 to be applied to the second gap 15b. Furthermore, because the take-up reel 331 and the delivery reel 232 rotate at a constant speed, the new surface of the second filler material adhesive tape 54 is constantly pressed against the gap. Furthermore, since the laminated body is rotated at a constant speed, the second filler 42 can be applied along the outer periphery of the laminated body of the first semiconductor substrate 22 and the second semiconductor substrate 23 .

[0053] After the second filler 42 is filled in the second gap 15b, drying, heating, or light irradiation is performed as needed to cure the second filler 42. The method for curing the second filler 42 is appropriately selected depending on the material of the second filler 42.

[0054] Furthermore, in order to shape the second filler 42 and prevent the laminate from being contaminated by excess second filler 42 , after the second filler 42 is hardened, a polishing film may be used to polish and remove excess second filler 42 overflowing from the second gap 15 b .

[0055] <Configuration Example of Semiconductor Device 1>

[0056] Figure 9 1 is a cross-sectional view showing a configuration example of the semiconductor device 1 according to the present embodiment. The configuration example of the semiconductor device 1 according to the present embodiment is not limited to Figure 9 The structure shown in the figure is sometimes omitted. Figures 1 to 8 Same or similar composition.

[0057] like Figure 9 As shown, the X direction and the Y direction are parallel to the surface of the substrate 28 and perpendicular to each other, and the Z direction is perpendicular to the surface of the substrate 28. Here, the +Z direction is regarded as the upward direction, and the -Z direction is regarded as the downward direction. For example, in the second semiconductor substrate 23, as the second circuit portion 14 ( Figure 3 ) is located above the substrate 28, and the substrate 28 is located below the memory cell array 24. The -Z direction may or may not coincide with the direction of gravity. The substrate 28 is, for example, a silicon substrate (silicon wafer).

[0058] The second semiconductor substrate 23 includes a plurality of word lines WL, source lines BG, bit lines BL, and select gates (not shown), and serves as an electrode layer in the memory cell array 24 . Figure 9 1 shows the staircase structure of the memory cell array 24. One end of a columnar portion CL passing through a word line WL is electrically connected to a source line BG, and the other end is electrically connected to a bit line BL. Memory cells are formed at the intersections of the columnar portion CL and the word line WL.

[0059] The first semiconductor substrate 22 has a plurality of transistors 29. Each of the plurality of transistors 29 has a gate electrode 30 provided on the substrate 28 via a gate insulating film, a source diffusion layer (not shown) and a drain diffusion layer (not shown) provided in the substrate 28. In addition, the first semiconductor substrate 22 has a plurality of plugs 31, a wiring layer 32 including a plurality of wirings, and a wiring layer 33 including a plurality of wirings. The plurality of plugs 31 are provided on the source diffusion layer or the drain diffusion layer of the plurality of transistors 29, the wiring layer 32 is provided on the plurality of plugs 31, and the wiring layer 33 is provided on the wiring layer 32. Furthermore, the first semiconductor substrate 22 has a plurality of through-hole plugs 34 and a plurality of first metal pads 5. The plurality of through-hole plugs 34 are provided on the wiring layer 33, and the plurality of first metal pads 5 are provided on the through-hole plugs 34 in the insulating film 27. Having the first circuit portion 12 ( Figure 3 ) functions as a control circuit (logic circuit) for controlling the second semiconductor substrate 23. In this embodiment, the control circuit is also referred to as a peripheral circuit.

[0060] The second semiconductor substrate 23 includes a plurality of second metal pads 8, a plurality of via plugs 35, and a wiring layer 36 including a plurality of wiring lines. The plurality of second metal pads 8 are provided on the first metal pads 5 within the insulating film 26, the plurality of via plugs 35 are provided on the second metal pads 8, and the wiring layer 36 is provided on the via plugs 35. Each word line WL or each bit line BL is electrically connected to the corresponding wiring line within the wiring layer 36. Furthermore, the second semiconductor substrate 23 includes via plugs 37 provided on the wiring layer 36 and metal pads 38. The via plugs 37 are provided within the insulating film 26 or the insulating film 25 and on the wiring layer 36, and the metal pads 38 are provided on the insulating film 25 or on the via plugs 37.

[0061] The metal pad 38 serves as Figure 9 The external connection pads of the semiconductor chip 21 shown function to connect to a mounting substrate or other devices via wires, solder balls, metal bumps, etc. The second semiconductor substrate 23 includes an insulating film 25 and a passivation film 39 formed on the metal pads 38. The passivation film 39 has an opening P that exposes the upper surface of the metal pads 38. The opening P is used, for example, to connect a wire to the metal pads 38.

[0062] The above describes the configurations, manufacturing methods, etc. of several embodiments of the present invention, but these configurations, manufacturing methods, etc. are provided as examples and are not intended to limit the scope of the invention. These novel embodiments can be implemented in various other ways, can be appropriately combined and implemented within the scope of the invention, and can be omitted, replaced, or modified in various ways. The embodiments, configurations, manufacturing methods, etc. of the embodiments, or variations thereof are included within the scope or spirit of the invention and are included within the scope of the invention described in the claims and their equivalents.

Claims

1. A method for manufacturing a semiconductor device, characterized in that: Laminating a first semiconductor substrate and a second semiconductor substrate to form a laminate; Filling a first filler having a first viscosity into a gap provided between an outer periphery of the first semiconductor substrate and an outer periphery of the second semiconductor substrate; After the first filler is embedded in the gap, a second filler is embedded in the gap adjacent to the first filler, wherein the second filler has a second viscosity higher than the first viscosity; thinning the second semiconductor substrate; and The gap includes: a first gap portion and a second gap portion, wherein the second gap portion is thicker than the first gap portion when the laminate is viewed in cross section; The first filling material is embedded in the first gap, and the second filling material is embedded in the second gap. 2 . The method for manufacturing a semiconductor device according to claim 1 , wherein the first filler comprises an organic compound, and the second filler comprises a glass material or an inorganic polymer.

3. A method for manufacturing a semiconductor device according to claim 2, wherein the first gap portion is arranged along the surface of the first semiconductor substrate and the surface of the second semiconductor substrate when the laminate is cross-sectioned, and is located closer to the center of the first semiconductor substrate and the second semiconductor substrate than the end of the first semiconductor substrate and the end of the second semiconductor substrate; and the second gap portion is arranged between the first gap portion and the end of the first semiconductor substrate and the end of the second semiconductor substrate. 4 . The method for manufacturing a semiconductor device according to claim 1 , wherein the first filling material is embedded in the first gap using a dropper, a dispenser, or spin coating.

5. The method for manufacturing a semiconductor device according to claim 4, wherein the second filler is embedded in the second gap by applying a film to which the second filler is attached in a thin film form to the laminate along an outer periphery of the laminate. 6 . The method for manufacturing a semiconductor device according to claim 1 , wherein after embedding the second filler, a polishing film is used to remove the second filler overflowing from the second gap.

7. A method for manufacturing a semiconductor device according to claim 1, wherein before forming the laminate, a first circuit portion and a first metal pad electrically connected to the first circuit portion are formed on the first semiconductor substrate, and a second circuit portion and a second metal pad electrically connected to the second circuit portion are formed on the second semiconductor substrate, and the first semiconductor substrate and the second semiconductor substrate are bonded together by connecting the first metal pad and the second metal pad to form the laminate. 8 . The method for manufacturing a semiconductor device according to claim 1 , wherein before forming the laminate, a through electrode is formed in at least one of the first semiconductor substrate and the second semiconductor substrate.

9. A semiconductor device comprising: a first semiconductor substrate; a second semiconductor substrate, which is bonded to the first semiconductor substrate to form a laminate and is thinner than the first semiconductor substrate; A filler provided between the outer periphery of the first semiconductor substrate and the outer periphery of the second semiconductor substrate, comprising: a first filler having a first viscosity; and a second filler, adjacent to the first filler, having a second viscosity higher than the first viscosity; and In a cross-sectional view of the laminate, the second filler is thicker than the first filler. 10 . The semiconductor device according to claim 9 , wherein the first filler comprises an organic compound, and the second filler comprises a glass material or an inorganic polymer.

11. A semiconductor device according to claim 10, wherein the first filling material is arranged along the surface of the first semiconductor substrate and the surface of the second semiconductor substrate when the laminate is cross-sectioned, and is located closer to the center of the first semiconductor substrate and the second semiconductor substrate than the end of the first semiconductor substrate and the end of the second semiconductor substrate; and the second filling material is arranged between the first filling material and the end of the first semiconductor substrate and the end of the second semiconductor substrate.

12. A semiconductor device according to claim 9, wherein the first semiconductor substrate has a first circuit portion and a first metal pad electrically connected to the first circuit portion, the second semiconductor substrate has a second circuit portion and a second metal pad electrically connected to the second circuit portion, and the first metal pad is electrically connected to the second metal pad. 13 . The semiconductor device according to claim 9 , wherein at least one of the first semiconductor substrate and the second semiconductor substrate has a through electrode.

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