Cross-voltage domain chip, electronic device and voltage conversion method

Abstract

The present application provides a cross-voltage domain chip, electronic device and voltage conversion method, the chip includes: a write data unit and a read data unit, wherein the write data unit is used to select a write data from multiple input write data, and convert a first voltage to a second voltage, the first voltage is the voltage of the selected write data, and the second voltage is greater than the first voltage; and / or the read data unit is used to select a read data from multiple input read data, and convert a third voltage to a fourth voltage, the third voltage is the voltage of the selected read data, and the third voltage is greater than the fourth voltage. At least one of the read data unit and the write data unit in the chip does not require multiple voltage conversion modules, and can perform voltage conversion on multiple data, which solves the problem of a large number of voltage conversion modules in the cross-voltage domain chip in the prior art, thereby reducing the total area of ​​the chip and saving the cost of the chip.

Description

Technical Field

[0001] The present application relates to the field of electronic circuits, and in particular to a cross-voltage domain chip, an electronic device, and a method for converting voltage. Background Art

[0002] There will be different power supply voltage working areas in the chip, and voltage conversion modules must be used between different working voltage working areas. If the voltage difference is relatively large, for example, the voltage conversion module from 1.2V to 3.3V (each voltage conversion module has an area of ​​about 150 square microns under TSMC's 40nm low-power process), the voltage conversion module from 1.0V to 1.2V (each voltage conversion module has an area of ​​about 16 square microns under TSMC's 40nm low-power process), that is to say, the area of ​​the voltage conversion module from 1.2V to 3.3V is about 9 to 10 times the area of ​​the voltage conversion module from 1.0V to 1.2V; if there are many signals across voltage domains, and each signal requires a voltage conversion module, such as typically, 1,000 signals need to cross voltage domains, then the area of ​​the voltage conversion module alone will reach 150,000 square microns, however, the total area of ​​an ARM's M4F central processing unit (CPU) core is only about 140,000 square microns.

[0003] Therefore, in chips across voltage domains, reducing the number of voltage conversion modules to reduce the total chip area and save chip costs has become an urgent problem that needs to be solved.

[0004] The above information disclosed in the background technology section is only used to enhance the understanding of the background technology of the technology described in this article. Therefore, the background technology may contain certain information that does not form the prior art known in this country for those skilled in the art. Summary of the invention

[0005] The main purpose of the present application is to provide a cross-voltage domain chip, an electronic device and a voltage conversion method to solve the problem of a large number of voltage conversion modules in the cross-voltage domain chip in the prior art.

[0006] In order to achieve the above-mentioned purpose, according to one aspect of the present application, a cross-voltage domain chip is provided, including a write data unit and a read data unit, wherein the write data unit is used to select one channel of write data from multiple input write data and convert a first voltage into a second voltage, the first voltage is the voltage of the selected one channel of write data, and the second voltage is greater than the first voltage; and / or the read data unit is used to select one channel of read data from multiple input read data and convert a third voltage into a fourth voltage, the third voltage is the voltage of the selected one channel of read data, and the third voltage is greater than the fourth voltage.

[0007] Furthermore, the write data unit includes: a write data selection module, used to select one path of the write data output from multiple paths of input write data; a first voltage conversion module, electrically connected to the write data selection module, the first voltage conversion module is used to convert the first voltage into a second voltage, wherein the voltage of the write data output by the write data selection module is the first voltage.

[0008] Further, the chip also includes a register, and the write data selection module includes: a first encoder, including a first output end, multiple third input ends and a third output end, the first output end is used to output write address selection data, each of the third input ends is used to input a first write enable signal, the first write enable signal corresponds to the write data one-to-one, all of the first write enable signals are used to determine the write address selection data, the third output end outputs a second write enable signal, and the second write enable signal is used to control whether each of the write data is stored in the register; a write data selector, including multiple first input ends, second input ends and second output ends, the write data is input from the first input end one-to-one, the second input end is electrically connected to the first output end, the second output end is electrically connected to the input end of the first voltage conversion module, and the write data selector is used to select data according to the write address, select one path of the write data from multiple paths of the write data and output it from the second output end.

[0009] Further, the first voltage conversion module includes a fourth input terminal, a fifth input terminal and a sixth input terminal, the second output terminal is electrically connected to the fourth input terminal, the first output terminal is electrically connected to the fifth input terminal, the third output terminal is electrically connected to the sixth input terminal, and the first voltage conversion module also includes a fourth output terminal, a fifth output terminal and a sixth output terminal, the fourth output terminal outputs conversion write data, the fifth output terminal outputs conversion write address selection data, and the sixth output terminal outputs a conversion write enable signal, the voltage of the write address selection data and the voltage of the second write enable signal are the first voltage, and the voltage of the conversion write data, the voltage of the conversion write address selection data and the voltage of the conversion write enable signal are the second voltage.

[0010] Furthermore, the chip also includes: a first decoder, including a seventh input terminal, an eighth input terminal, a ninth input terminal, a seventh output terminal and multiple eighth output terminals, the seventh input terminal is electrically connected to the fourth output terminal, the eighth input terminal is electrically connected to the fifth output terminal, the ninth input terminal is electrically connected to the sixth output terminal, the seventh output terminal converts the write data, and each of the eighth output terminals outputs the converted write enable signal decoded by the first decoder in a one-to-one correspondence.

[0011] Further, the read data selection unit includes: a read data selection module, used to select one read data output from multiple input read data; a second voltage conversion module, electrically connected to the read data selection module, used to convert the third voltage into the fourth voltage, wherein the voltage of the read data output by the read data selection unit is the third voltage.

[0012] Further, the read data selection module includes: a second decoder, electrically connected to the second voltage conversion module, the second decoder includes multiple tenth input terminals and ninth output terminals, each of the tenth input terminals inputs one path of the read data, the ninth output terminal outputs second read data, the second read data is one path of the multiple paths of the read data, the second voltage conversion module includes an eleventh input terminal and a tenth output terminal, the ninth output terminal is electrically connected to the eleventh input terminal, the tenth output terminal outputs converted read data, the voltage of the read data is the second voltage, the voltage of the read data is the third voltage, and the voltage of the converted read data is the fourth voltage.

[0013] Further, the read data selection module also includes: a second encoder, including multiple twelfth input terminals and eleventh output terminals, each of the twelfth input terminals inputs a read enable signal, and the eleventh output terminal outputs read address selection data; a third voltage conversion module, including a thirteenth input terminal and a twelfth output terminal, the third voltage conversion module is used to convert the first voltage into the second voltage, the eleventh output terminal is electrically connected to the thirteenth input terminal, and the twelfth output terminal outputs the converted read address selection data, the voltage of the read address selection data is the first voltage, and the voltage of the converted read address selection data is the second voltage, the second decoder also includes a fourteenth input terminal, the twelfth output terminal is electrically connected to the fourteenth input terminal, and the second decoder is used to select one path of the read data from multiple paths of the read data according to the read address selection data and output it from the ninth output terminal.

[0014] Furthermore, the first encoder is an encoder with 16-bit input and 4-bit output.

[0015] Furthermore, the second encoder is an encoder with 16-bit input and 4-bit output.

[0016] According to another aspect of the present application, an electronic device is provided, including a cross-voltage domain chip, wherein the cross-voltage domain chip is any one of the cross-voltage domain chips described above.

[0017] According to another aspect of the present application, a method for converting voltage is provided, which is applied in a chip across voltage domains, including: selecting one channel of write data from multiple input channels of write data, and converting a first voltage into a second voltage, wherein the first voltage is the voltage of the selected channel of write data, and the second voltage is greater than the first voltage; and / or, selecting one channel of read data from multiple input channels of read data, and converting a third voltage into a fourth voltage, wherein the third voltage is the voltage of the selected channel of read data, and the third voltage is greater than the fourth voltage.

[0018] By applying the technical solution of the present application, a write data selection module selects one write data path from multiple input write data paths and outputs it, and a first voltage conversion module performs voltage conversion on the write data selected by the write data selection module, thereby realizing conversion of the voltage of the write data from a first voltage to a second voltage, that is, realizing conversion of the voltage of the write data from a low voltage to a high voltage. Since the write data selection module can select one write data path from multiple write data paths and then perform voltage conversion on the selected write data, compared with the prior art in which each write data path requires a corresponding first voltage conversion module to perform voltage conversion, a first voltage conversion module in the present chip can realize voltage conversion of multiple write data paths at different times, thereby reducing the number of first voltage conversion modules, thereby reducing the total area of ​​the chip and saving the cost of the chip. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] The drawings constituting part of the present application are used to provide a further understanding of the present application. The exemplary embodiments and descriptions of the present application are used to explain the present application and do not constitute an improper limitation on the present application. In the drawings:

[0020] Figure 1 A partial structural schematic diagram of a chip across voltage domains according to an embodiment of the present application is shown;

[0021] Figure 2 A partial structural schematic diagram of another cross-voltage domain chip according to an embodiment of the present application is shown.

[0022] The above drawings include the following reference numerals:

[0023] 10. First voltage conversion module; 20. First encoder; 30. Write data selector; 40. First decoder; 50. Second voltage conversion module; 60. Second decoder; 70. Second encoder; 80. Third voltage conversion module. DETAILED DESCRIPTION

[0024] It should be noted that the following detailed descriptions are illustrative and are intended to provide further explanation of the present application. Unless otherwise specified, all technical and scientific terms used herein have the same meanings as those commonly understood by those skilled in the art to which the present application belongs.

[0025] It should be noted that the terms used herein are only for describing specific embodiments and are not intended to limit the exemplary embodiments according to the present application. As used herein, unless the context clearly indicates otherwise, the singular form is also intended to include the plural form. In addition, it should be understood that when the terms "comprise" and / or "include" are used in this specification, it indicates the presence of features, steps, operations, devices, components and / or combinations thereof.

[0026] It should be understood that when an element (such as a layer, film, region, or substrate) is described as being "on" another element, the element may be directly on the other element, or there may be intermediate elements. Moreover, in the specification and claims, when an element is described as being "connected" to another element, the element may be "directly connected" to the other element, or "connected" to the other element through a third element.

[0027] As introduced in the background technology, the prior art has a problem of a large number of voltage conversion modules in a cross-voltage domain chip. To solve the above problem, an embodiment of the present application provides a cross-voltage domain chip and an electronic device.

[0028] According to an embodiment of the present application, a cross-voltage domain chip is provided, including a data writing unit and a data reading unit, wherein:

[0029] The data writing unit is used to select one path of the write data from the input multiple paths of write data, and convert a first voltage into a second voltage, wherein the first voltage is the voltage of the selected path of the write data, and the second voltage is greater than the first voltage;

[0030] And / or, the data reading unit is used to select one path of the read data from the input multiple paths of read data, and convert the third voltage into a fourth voltage, the third voltage is the voltage of the selected path of the read data, and the third voltage is greater than the fourth voltage.

[0031] In the above-mentioned cross-voltage domain chip, at least one of the write data unit and the read data unit can select multiple input data, select one of the data, and then perform voltage conversion. In this way, at least one of the read data unit and the write data unit does not need multiple voltage conversion modules, and can perform voltage conversion on multiple data, solving the problem of a large number of voltage conversion modules in the cross-voltage domain chip in the prior art, thereby reducing the total area of ​​the chip and saving the cost of the chip.

[0032] In a specific embodiment of the present application, Figure 1 As shown, the cross-voltage domain chip includes a write data selection module and a first voltage conversion module 10, wherein the write data selection module is used to select one of the above-mentioned write data from the input multiple write data to output; the first voltage conversion module 10 is electrically connected to the write data selection module, and the first voltage conversion module 10 is used to convert the first voltage into a second voltage, wherein the voltage of the write data output by the write data selection module is the above-mentioned first voltage. In the cross-voltage domain chip, the write data selection module selects one of the write data from the input multiple write data to output, and the first voltage conversion module performs voltage conversion on the write data selected by the write data selection module, thereby realizing the conversion of the voltage of the write data from the first voltage to the second voltage, that is, realizing the conversion of the voltage of the write data from a low voltage to a high voltage. Since the write data selection module can select one of the write data from the multiple write data, and then perform voltage conversion on the selected write data, compared with the prior art, each write data needs a corresponding first voltage conversion module to perform voltage conversion, and a first voltage conversion module in the present chip can realize voltage conversion of multiple write data at different times, reducing the number of first voltage conversion modules, thereby reducing the total area of ​​the chip and saving the cost of the chip.

[0033] Specifically, the second voltage being greater than the first voltage determines that the function of the first voltage conversion module is to convert a low voltage into a high voltage, that is, to write data in a low voltage domain into a high voltage domain.

[0034] Specifically, the combination of the first voltage and the second voltage may be 1.0V and 1.2V, 1.0V and 1.5V, 1.2V and 3.3V, 1.0V and 3.3V, and the like.

[0035] In another embodiment of the present application, Figure 1As shown, the write data selection module includes a first encoder 20 and a write data selector 30. The first encoder 20 includes a first output terminal, and the first output terminal is used to output write address selection data; the write data selector 30 includes a plurality of first input terminals, a second input terminal, and a second output terminal. The write data is input from the first input terminal one by one, the second input terminal is electrically connected to the first output terminal, and the second output terminal is electrically connected to the input terminal of the first voltage conversion module 10. The write data selector 30 is used to select one path of the write data from multiple paths of the write data according to the write address selection data and output it from the second output terminal. Multiple paths of write data are input from the first input terminal of the write data selector 30, and the first output terminal of the first encoder 20 outputs the write address selection data. The write address selection data output by the first encoder 20 is input to the write data selector 30. The write data selector 30 selects the output write data according to the write address selection data, that is, the write address selection data output by the first encoder 20 realizes the control of the write data selector 30 to select the write data, as shown in FIG. Figure 1 As shown, the multiple write data are low voltage write data 0, low voltage write data 1, ..., low voltage write data N, that is, the write data selector 30 is located in the low voltage domain, and the write address selection data determines which write data the write data selector 30 selects. For example, if the write address selection data output is 0000, the write data selector 30 selects the first write data ( Figure 1 The low voltage write data 0 in the write address selection data output is 0011, then the write data selector 30 selects the third write data ( Figure 1 Write data 3) output; write address selection data output is 1111, then the write data selector 30 writes data ( Figure 1 The write data in 15) is output.

[0036] In another embodiment of the present application, Figure 1 As shown, the first encoder 20 further includes a plurality of third input terminals, each of which is used to input a first write enable signal, the first write enable signal corresponds to the write data one by one, all of the first write enable signals are used to determine the write address selection data, and each first write enable signal represents whether a write data is enabled. Figure 1As shown, the multiple first write enable signals are low voltage write enable 0, low voltage write enable 1, ..., low voltage write enable N, that is, the first encoder 20 is also located in the low voltage domain, each first write enable signal is a one-bit data, represented by 0 or 1, 1 indicates that the write data corresponding to the first write enable signal can be written, and 0 indicates that the write data corresponding to the first write enable signal cannot be written. All of the above first write enable signals are used to determine the above write address selection data. For example, there are 16 first write enable signals, and the 16 first write enable signals constitute a sixteen-bit binary number. The write address selection data is a four-bit binary number. When the sixteen-bit binary number is represented as 0001 in hexadecimal, it means that low voltage write enable 0 is 1, low voltage write enable 1 to low voltage write enable 15 are all 0, and the write address selection data output is 0000, indicating Figure 1 The low voltage write data 0 in is selected, and the sixteen-bit binary number is expressed in hexadecimal as 8000 (the write enable signal has only one logic 1 at a time, that is, only one high level), and the write address selection data output is 1111, indicating Figure 1 The low voltage write data 15 is selected, that is, the write data is selected by writing the address selection data. A first voltage conversion module 10 can realize voltage conversion of multiple write data at different times, thereby reducing the number of first voltage conversion modules 10, thereby reducing the total area of ​​the chip and saving the cost of the chip.

[0037] In another embodiment of the present application, the chip further comprises a register, and the register is electrically connected to the write data selector, that is, each write data input to the write data selector needs to be pre-stored in a corresponding register.

[0038] In another embodiment of the present application, Figure 1 As shown, the first encoder 20 also includes a third output terminal, and the third output terminal outputs a second write enable signal. The second write enable signal is used to control whether each of the above-mentioned write data is stored in the above-mentioned register. When any one of the first write enable signals is 1, the second write enable signal is 1. The second write enable signal is 1, indicating that each of the above-mentioned write data can be stored in the above-mentioned register to facilitate subsequent data reading.

[0039] In another embodiment of the present application, Figure 1As shown, the first voltage conversion module 10 includes a fourth input terminal, a fifth input terminal and a sixth input terminal, the second output terminal is electrically connected to the fourth input terminal, the first output terminal is electrically connected to the fifth input terminal, the third output terminal is electrically connected to the sixth input terminal, the write data selected by the write data selector 30 is the second write data, the second write data is input to the first voltage conversion module 10, the write address selection data is input to the first voltage conversion module 10, the second write enable signal is input to the first voltage conversion module 10, and the first voltage conversion module 10 realizes the conversion of the voltage of the write data, the voltage of the write address selection data and the voltage of the second write enable signal, and converts the low voltage into a high voltage.

[0040] In another embodiment of the present application, Figure 1 As shown, the first voltage conversion module 10 further includes a fourth output terminal, a fifth output terminal and a sixth output terminal, the fourth output terminal outputs conversion write data, the fifth output terminal outputs conversion write address selection data, the sixth output terminal outputs conversion write enable signal, the voltage of the write address selection data and the voltage of the second write enable signal are the first voltage, the voltage of the conversion write data, the voltage of the conversion write address selection data and the voltage of the conversion write enable signal are the second voltage, specifically, the conversion write data has the same value as the second write data, for example, if the value of the second write data is 0001, then the value of the conversion write data is also 0001, but after voltage conversion, the voltage of the second write data is different from the voltage of the conversion write data, when the first voltage is 1.2V and the second voltage is 1.5V, the voltage corresponding to 1 in the value of the second write data is 1.2V, and the voltage corresponding to 1 in the value of the conversion write data is 1.5V, that is, after conversion by the first voltage conversion module 10, only the voltage values ​​corresponding to the input data and the output data are changed.

[0041] In another embodiment of the present application, Figure 1 As shown, the chip further includes a first decoder 40, the first decoder 40 includes a seventh input terminal, an eighth input terminal, a ninth input terminal, a seventh output terminal and a plurality of eighth output terminals, the seventh input terminal is electrically connected to the fourth output terminal, the eighth input terminal is electrically connected to the fifth output terminal, the ninth input terminal is electrically connected to the sixth output terminal, the seventh output terminal outputs the conversion write data, and the high voltage write data is as shown in FIG. Figure 1 The high voltage write data 0, high voltage write data 1, ..., high voltage write data N in the high voltage write data 0, high voltage write data 1, ..., high voltage write data N, that is, the first decoder 40 is located in the high voltage domain. It should be noted that, Figure 1The high voltage write data 0 and the low voltage write data 0 are numerically the same, except that the voltage values ​​represented by the same data are different. For example, the high voltage write data 0 and the low voltage write data 0 are both 0101, but the voltage value corresponding to 1 in the low voltage write data 0 is 1.2V, and the voltage value corresponding to 1 in the high voltage write data 0 is 3.0V. The first decoder 40 outputs only one high voltage write data at a time. By selecting the low voltage write data by the write data selector, the first decoder 40 outputs the corresponding high voltage write data. That is to say, when the write data selector 30 selects the low voltage write data 0, the first decoder 40 finally outputs the high voltage write data 0. When the write data selector 30 selects the low voltage write data 1, the first decoder 40 finally outputs the high voltage write data 1, thereby realizing the writing of the low voltage write data from the low voltage domain to the high voltage domain. Each of the above-mentioned eighth output terminals outputs the signal after the conversion write enable signal is decoded by the first decoder in a one-to-one correspondence. The conversion write data output by the first voltage conversion module 10 , the converted write address selection data and the converted write enable signal are input to the first decoder 40 for decoding to obtain the converted write data, which is decoded by the first decoder as a high-voltage write data, as well as high-voltage write enable 0, high-voltage write enable 1, ..., and high-voltage write enable N. For example, when the write address selection data is 0000, the write data selector selects the low-voltage write data 0 input, the high-voltage write enable 0 obtained after the converted write address selection data is decoded by the first decoder is 1, and the high-voltage write enable 1 to the high-voltage write enable 15 are all 0; when the write address selection data is 1111, the write data selector selects the low-voltage write data 15 input, the high-voltage write enable 15 obtained after the converted write address selection data is decoded by the first decoder is 1, and the high-voltage write enable 0 to the high-voltage write enable 14 are all 0, that is, one first voltage conversion module 10 realizes writing of multiple write data from the low voltage domain to the high voltage domain, reducing the number of first voltage conversion modules 10, thereby reducing the total area of ​​the chip and saving the cost of the chip.

[0042] In order to read data from one voltage domain into another voltage domain, such as Figure 2As shown, the chip further includes a read data selection unit and a read data selection module and a second voltage conversion module 50, the read data selection module is used to select one of the read data from the input multiple read data for output; the multiple read data are respectively high voltage read data 0, high voltage read data 1, ..., high voltage read data N, that is, the read data selection module is in the high voltage domain, the second voltage conversion module 50 is electrically connected to the read data selection module, and is used to convert the third voltage into the fourth voltage, wherein the voltage of the read data output by the read data selection module is the third voltage, the read data selection module selects one of the read data from the input multiple read data for output, and the second voltage conversion module 50 performs voltage conversion on the read data selected by the read data selection module, thereby realizing the conversion of the voltage of the read data from the third voltage to the fourth voltage, that is, realizing the conversion of the voltage of the read data from the high voltage to the low voltage, compared with the prior art, each read data needs the corresponding second voltage conversion module 50 to perform voltage conversion, and the second voltage conversion module 50 in the present chip can realize the voltage conversion of multiple read data at different times, thereby reducing the number of second voltage conversion modules 50, thereby reducing the total area of ​​the chip and saving the cost of the chip.

[0043] Specifically, the second voltage being greater than the first voltage determines that the function of the second voltage conversion module is to convert a high voltage into a low voltage, that is, to realize reading data of multiple high voltage domains into a low voltage domain through one second voltage conversion module.

[0044] Specifically, the combination of the first voltage and the second voltage may be 1.0V and 1.2V, 1.0V and 1.5V, 1.2V and 3.3V, 1.0V and 3.3V, and the like.

[0045] In another embodiment of the present application, Figure 2As shown, the read data selection module includes a second decoder 60, which is electrically connected to the second voltage conversion module 50. The second decoder 60 is located in the high voltage domain. The second decoder 60 includes a plurality of tenth input terminals and a ninth output terminal. Each of the tenth input terminals inputs one path of the read data, and the ninth output terminal outputs the second read data. The second read data is one path of the multiple paths of the read data. The second voltage conversion module 50 includes an eleventh input terminal and a tenth output terminal. The ninth output terminal is electrically connected to the eleventh input terminal, and the tenth output terminal outputs the converted read data. The voltage of the read data is the third voltage, and the voltage of the converted read data is the fourth voltage, i.e., the low voltage. After the multiple paths of read data are input from the second decoder 60, the second decoder 60 outputs the second read data, which is input to the second voltage conversion module 50. The second voltage conversion module 50 converts the voltage of the read data from the third voltage to the fourth voltage, thereby realizing the reading of the read data from the high voltage domain into the low voltage domain.

[0046] In another embodiment of the present application, Figure 2 As shown, the chip further includes a second encoder 70 and a third voltage conversion module 80. The second encoder 70 includes a plurality of twelfth input terminals and an eleventh output terminal. Each of the twelfth input terminals inputs a read enable signal, and the eleventh output terminal outputs read address selection data. The third voltage conversion module 80 includes a thirteenth input terminal and a twelfth output terminal. The third voltage conversion module 80 is used to convert the first voltage into the second voltage. The eleventh output terminal is electrically connected to the thirteenth input terminal. The twelfth output terminal outputs the converted read address selection data. The voltage of the read address selection data is the first voltage, and the voltage of the converted read address selection data is the second voltage. The second decoder 60 further includes a fourteenth input terminal. The twelfth output terminal is electrically connected to the fourteenth input terminal. The second decoder 60 is used to select one of the read data from the multiple read data according to the read address selection data and output it from the ninth output terminal. The read address selection data controls the selection of the read data by the second decoder 60. Figure 2 As shown, the read enable signals are low voltage read enable 0, low voltage read enable 1, ..., and low voltage read enable N, that is, the second encoder 70 is located in the low voltage domain, each read enable signal is a one-bit data, represented by 0 or 1, 1 represents that the read data corresponding to the read enable signal can be read in, and 0 represents that the read data corresponding to the read enable signal cannot be read in, all of the above read enable signals are used to determine the above read address selection data, for example, there are 16 read enable signals, the 16 read enable signals constitute a sixteen-bit binary number, the read address selection data is a four-bit binary number, when the sixteen-bit binary number is represented by hexadecimal as 0000, the read address selection data output is 0000, indicating Figure 2 The high voltage read data 0 in the 16-bit binary number is expressed in hexadecimal as 8000 (the read enable signal has only one logic 1 at a time, that is, only one high level), and the read address selection data output is 1111, indicating Figure 1 The high voltage read data 15 is selected, that is, the selection of the read data is realized by reading the address selection data, and a second voltage conversion module 50 can realize the voltage conversion of multiple read data at the same time, thereby reducing the number of second voltage conversion modules 50, thereby reducing the total area of ​​the chip and saving the cost of the chip.

[0047] In a specific implementation manner of the present application, the first encoder is an encoder with 16-bit input and 4-bit output. Of course, the output and input bits of the first encoder can be set according to the actual number of write data (or the number of address spaces of write data). The write data has 16 channels, the first write enable signals have 16 channels, and the write address selection data is four-bit binary encoded data. For example, there are 16 first write enable signals, and the 16 first write enable signals constitute a sixteen-bit binary number. The write address selection data is a four-bit binary number. The sixteen-bit binary number is expressed as 0000 in hexadecimal, and the write address selection data output is 0000, indicating Figure 1 The write data 0 in is selected, and the 16-bit binary number is expressed in hexadecimal as 8000 (the write enable signal has only one logic 1 at a time, that is, only one high level), and the write address selection data output is 1111, indicating Figure 1 The write data 15 in is selected, that is, the selection of the write data is realized by writing the address selection data, and a first voltage conversion module can realize the voltage conversion of multiple write data at different times, thereby reducing the number of first voltage conversion modules, thereby reducing the total area of ​​the chip and saving the cost of the chip.

[0048] In another specific implementation manner of the present application, the second encoder is an encoder with 16-bit input and 4-bit output, and the output and input bits of the second encoder can be set according to the actual number of read data (or the number of address spaces of the read data), the read data has 16 channels, the read enable signals have 16 channels, and the read address selection data is four-bit binary encoded data. For example, there are 16 read enable signals, and the 16 read enable signals constitute a sixteen-bit binary number. The read address selection data is a four-bit binary number, and the sixteen-bit binary number is expressed as 0000 in hexadecimal, and the read address selection data output is 0000, indicating Figure 2 The high voltage read data 0 in the 16-bit binary number is expressed in hexadecimal as 8000 (the read enable signal has only one logic 1 at a time, that is, only one high level), and the read address selection data output is 1111, indicating Figure 1 The high voltage read data 15 is selected, that is, the selection of the read data is realized by reading the address selection data, and a second voltage conversion module can realize the voltage conversion of multiple read data at different times, thereby reducing the number of second voltage conversion modules, thereby reducing the total area of ​​the chip and saving the cost of the chip.

[0049] A typical embodiment of the present application provides an electronic device, including a cross-voltage domain chip, wherein the cross-voltage domain chip is any one of the cross-voltage domain chips mentioned above, and at least one of the read data unit and the write data unit in the chip does not require multiple voltage conversion modules to perform voltage conversion on multiple data, thereby reducing the total area of ​​the electronic device and saving the cost of the electronic device.

[0050] In another embodiment of the present application, each of the write data is 32-bit write data, of course, the write data can also be 16 bits, 8 bits, 64 bits, etc., and each of the read data is 32-bit read data, of course, the read data can also be 16 bits, 8 bits, 64 bits, etc., in the case of 16-way write data, 16-way read data, write data is 32-bit write data, and read data is 32-bit read data. When the cross-voltage domain chip in the prior art is applied, (32-bit write data + 1-bit second write enable signal + 32-bit read data) multiplied by 16 is required, and a total of 1040 voltage conversion modules are required. After using the cross-voltage domain chip of the present application, only (4-bit write address selection data, 1-bit second write enable signal, 32-bit write data, 4-bit read address selection data, 32-bit read data) is required, a total of 73 bits of data, a total area of ​​about 10950 square microns, and a total cost of about one-fourteenth of the original. If there are more address spaces across voltage domains, the proportion of area saved will be greater.

[0051] In another typical embodiment of the present application, a method for converting voltage is provided, which is applied in a chip across voltage domains, including: selecting one channel of write data from multiple input channels of write data, and converting a first voltage into a second voltage, wherein the first voltage is the voltage of the selected channel of write data, and the second voltage is greater than the first voltage; and / or, selecting one channel of read data from multiple input channels of read data, and converting a third voltage into a fourth voltage, wherein the third voltage is the voltage of the selected channel of read data, and the third voltage is greater than the fourth voltage.

[0052] In the above method, at least one of the reading process and the writing process can select multiple input data, select one of the data, and then perform voltage conversion. In this way, at least one of the reading process and the writing process does not require multiple voltage conversion modules, and multiple data can be converted into voltage. When the voltage conversion method is applied to at least one of the reading process and the writing process of a chip across voltage domains, the problem of a large number of voltage conversion modules in the chip across voltage domains in the prior art can be solved, thereby reducing the total area of ​​the chip and saving the cost of the chip.

[0053] From the above description, it can be seen that the above embodiments of the present application achieve the following technical effects:

[0054] 1) In the above-mentioned cross-voltage domain chip of the present application, at least one of the write data unit and the read data unit can select multiple input data, select one of the data, and then perform voltage conversion. In this way, at least one of the read data unit and the write data unit does not need multiple voltage conversion modules, and can perform voltage conversion on multiple data, which solves the problem of a large number of voltage conversion modules in the cross-voltage domain chip in the prior art, thereby reducing the total area of ​​the chip and saving the cost of the chip.

[0055] 2) The electronic device of the present application includes a cross-voltage domain chip, and the above-mentioned cross-voltage domain chip is any one of the above-mentioned cross-voltage domain chips. At least one of the read data unit and the write data unit in the chip does not require multiple voltage conversion modules, and can perform voltage conversion on multiple data, thereby reducing the total area of ​​the electronic device and saving the cost of the electronic device.

[0056] 3) In the method of the present application, at least one of the reading process and the writing process can select multiple input data, select one of the data, and then perform voltage conversion. In this way, at least one of the reading process and the writing process does not require multiple voltage conversion modules, and multiple data can be converted into voltage. When the voltage conversion method is applied to at least one of the reading process and the writing process of a chip across voltage domains, the problem of a large number of voltage conversion modules in the chip across voltage domains in the prior art can be solved, thereby reducing the total area of ​​the chip and saving the cost of the chip.

[0057] The above description is only the preferred embodiment of the present application and is not intended to limit the present application. For those skilled in the art, the present application may have various modifications and variations. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application shall be included in the protection scope of the present application.

Claims

1. A chip across voltage domains, characterized in that: It includes a write data unit and a read data unit, wherein: The data writing unit is used to select one path of the write data from the input multiple paths of write data, and convert a first voltage into a second voltage, wherein the first voltage is the voltage of the selected path of the write data, and the second voltage is greater than the first voltage; The data reading unit is used to select one path of the read data from the input multiple paths of read data, and convert the third voltage into a fourth voltage, the third voltage is the voltage of the selected path of the read data, and the third voltage is greater than the fourth voltage; Wherein, the data reading unit includes: A read data selection module, used for selecting one path of read data to output from multiple paths of input read data; A second voltage conversion module, electrically connected to the read data selection module, and configured to convert the third voltage into the fourth voltage, wherein the voltage of the read data output by the read data selection module is the third voltage; The read data selection module comprises: The second decoder is electrically connected to the second voltage conversion module, the second decoder includes multiple tenth input terminals and ninth output terminals, each of the tenth input terminals inputs one path of the read data, and the ninth output terminal outputs one path of the read data among the multiple paths of the read data, the second voltage conversion module includes an eleventh input terminal and a tenth output terminal, the ninth output terminal is electrically connected to the eleventh input terminal, and the tenth output terminal outputs the converted read data, the voltage of the read data is the third voltage, and the voltage of the converted read data is the fourth voltage.

2. The chip according to claim 1, characterized in that: The data writing unit comprises: A write data selection module, used for selecting one path of write data to output from multiple paths of input write data; A first voltage conversion module is electrically connected to the write data selection module, and the first voltage conversion module is used to convert the first voltage into the second voltage, wherein the voltage of the write data output by the write data selection module is the first voltage.

3. The chip according to claim 2, characterized in that: The chip also includes a register, The write data selection module comprises: A first encoder comprises a first output terminal, a plurality of third input terminals and a third output terminal, wherein the first output terminal is used to output write address selection data, the third input terminal is used to input a first write enable signal, the first write enable signal corresponds to the write data one by one, all the first write enable signals are used to determine the write address selection data, the third output terminal outputs a second write enable signal, and the second write enable signal is used to control whether to store each of the write data in the register; A write data selector includes a plurality of first input terminals, a second input terminal and a second output terminal, wherein the write data is input from the first input terminals one by one, the second input terminal is electrically connected to the first output terminal, and the second output terminal is electrically connected to the input terminal of the first voltage conversion module. The write data selector is used to select data according to the write address, select one path of the write data from the multiple paths of the write data and output it from the second output terminal.

4. The chip according to claim 3, characterized in that: The first voltage conversion module includes a fourth input terminal, a fifth input terminal and a sixth input terminal, the second output terminal is electrically connected to the fourth input terminal, the first output terminal is electrically connected to the fifth input terminal, and the third output terminal is electrically connected to the sixth input terminal. The first voltage conversion module also includes a fourth output terminal, a fifth output terminal and a sixth output terminal, the fourth output terminal outputs conversion write data, the fifth output terminal outputs conversion write address selection data, and the sixth output terminal outputs a conversion write enable signal, the voltage of the write address selection data and the voltage of the second write enable signal are the first voltage, and the voltage of the conversion write data, the voltage of the conversion write address selection data and the voltage of the conversion write enable signal are the second voltage.

5. The chip according to claim 4, characterized in that: The data writing unit also includes: The first decoder includes a seventh input terminal, an eighth input terminal, a ninth input terminal, a seventh output terminal and multiple eighth output terminals, the seventh input terminal is electrically connected to the fourth output terminal, the eighth input terminal is electrically connected to the fifth output terminal, the ninth input terminal is electrically connected to the sixth output terminal, the seventh output terminal outputs the conversion write data, and each of the eighth output terminals outputs the signal after the conversion write enable signal is decoded by the first decoder in a one-to-one correspondence.

6. The chip according to claim 1, characterized in that: The read data selection module also includes: A second encoder comprises a plurality of twelfth input terminals and an eleventh output terminal, each of the twelfth input terminals inputs a read enable signal, and the eleventh output terminal outputs read address selection data; The third voltage conversion module includes a thirteenth input terminal and a twelfth output terminal, the third voltage conversion module is used to convert the first voltage into the second voltage, the eleventh output terminal is electrically connected to the thirteenth input terminal, the twelfth output terminal outputs the converted read address selection data, the voltage of the read address selection data is the first voltage, and the voltage of the converted read address selection data is the second voltage, the second decoder also includes a fourteenth input terminal, the twelfth output terminal is electrically connected to the fourteenth input terminal, and the second decoder is used to select one path of the read data from multiple paths of the read data according to the read address selection data and output it from the ninth output terminal.

7. The chip according to any one of claims 3 to 5, characterized in that: The first encoder is an encoder with 16-bit input and 4-bit output.

8. The chip according to claim 6, characterized in that: The second encoder is an encoder with 16-bit input and 4-bit output.

9. An electronic device, comprising a chip across voltage domains, characterized in that: The cross-voltage domain chip is the cross-voltage domain chip according to any one of claims 1 to 8.

10. A method for converting voltage, characterized in that: The cross-voltage domain chip used in any one of claims 1 to 8 comprises: Selecting one path of write data from the input multiple paths of write data, and converting a first voltage into a second voltage, wherein the first voltage is a voltage of the selected path of write data, and the second voltage is greater than the first voltage; Selecting one path of read data from the input multiple paths of read data, and converting the third voltage into a fourth voltage, wherein the third voltage is greater than the fourth voltage; Among them, selecting one channel of read data from multiple channels of input read data and converting the third voltage into a fourth voltage includes: decoding the input multiple channels of read data, outputting one channel of read data, and converting the voltage of one channel of read data into the voltage of converted read data, wherein the voltage of the read data is the third voltage, and the voltage of the converted read data is the fourth voltage.

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