Packet Processor Forwarding Database Cache

Abstract

Embodiments of the present disclosure relate to packet processor forwarding database caches. A forwarding database cache system is described herein. The forwarding database cache system includes a primary forwarding database and one or more forwarding database caches. When a packet is received, the cache is first searched for information, such as address information, and if found, the packet is forwarded to the appropriate destination. If the address information is not found in the cache, the primary forwarding database is searched, and based on the information in the primary forwarding database, the packet is forwarded to the appropriate destination.

Description

[0001] This application is a divisional application of the Chinese invention patent application with the application date of March 24, 2016, application number 201610176470.2, and name “PACKET PROCESSOR FORWARDING DATABASE Cache”. Technical Field

[0002] The present invention relates to the field of networking. Background Art

[0003] A cache is a component that transparently stores data so that future requests for that data can be served more quickly. The data stored in the cache can be a copy of a value that has been calculated earlier or an original value stored elsewhere. If the requested data is contained in the cache (cache hit), then this request can be served by simply reading the cache, which is relatively fast. Otherwise (cache miss), the data must be recalculated or fetched from its original storage location, which is relatively slow. Therefore, the greater the number of requests that can be served from the cache, the faster the overall system performance becomes. Summary of the invention

[0004] A forwarding database cache system is described herein. The forwarding database cache system includes a primary forwarding database and one or more forwarding database caches. When a packet is received, the cache is first searched for information, such as address information, and if found, the packet is forwarded to the appropriate destination. If the address information is not found in the cache, the primary forwarding database is searched, and based on the information in the primary forwarding database, the packet is forwarded to the appropriate destination.

[0005] In one aspect, a method includes receiving a packet containing information, searching a cache containing a first searchable information set for a match to the information, searching a memory containing a second searchable information set for the information if a match to the information is not found in the cache, and sending the packet to a destination based on the match to the information. The first information set is stored in a first forwarding database in the cache, and the second information set is stored in a second forwarding database in the memory. The first information set is stored in a plurality of first forwarding databases in the cache, and the second information set is stored in a second forwarding database in the memory. The cache and the memory are in the same physical memory. The cache and the memory are in different physical memories. The cache includes a plurality of first physical memories, and the memory is a separate physical memory. The destination includes a virtual interface or port. The first searchable information set in the cache includes less searchable information than the second searchable information set in the memory, and further wherein the first searchable information set is capable of retrieving searchable information from the second searchable information set. The information includes address information.

[0006] In another aspect, a system includes: a packet processing element configured to process a packet including information; a main memory configured to store searchable information for searching for information; and a cache memory configured to store a subset of searchable information that is less than the entire searchable information for searching for information. The searchable information is stored in a first forwarding database in the cache and in a second forwarding database in the memory. The searchable information is stored in a plurality of first forwarding databases in the cache and in a second forwarding database in the memory. The cache memory and the main memory are in the same physical memory. The cache memory and the main memory are in different physical memories. The cache memory includes a plurality of first physical memories, and the main memory is a separate physical memory. Processing the packet includes forwarding the packet to a destination including a virtual interface or port. The information includes address information.

[0007] In yet another aspect, a device includes: a memory for storing an application, the application configured to: receive a packet containing information, search a cache containing a first searchable information set for a match to the information, search a memory containing a second searchable information set for the information if a match to the information is not found in the cache, and send the packet to a destination based on the match to the information; and a processing component coupled to the memory, the processing component configured to process the application. The first information set is stored in a first forwarding database in the cache, and the second information set is stored in a second forwarding database in the memory. The first information set is stored in a plurality of first forwarding databases in the cache, and the second information set is stored in a second forwarding database in the memory. The cache and the memory are in the same physical memory. The cache and the memory are in different physical memories. The cache includes a plurality of first physical memories, and the memory is a separate physical memory. The destination includes a virtual interface or port. The first searchable information set in the cache includes less searchable information than the second searchable information set in the memory, and the first searchable information set is capable of retrieving searchable information from the second searchable information set. The information includes address information. BRIEF DESCRIPTION OF THE DRAWINGS

[0008] The foregoing will be apparent from the following more particular description of example embodiments of the invention as illustrated in the accompanying drawings in which like reference characters refer to the same parts throughout the different views. The drawings are not necessarily drawn to scale, emphasis instead being placed upon illustrating the embodiments.

[0009] Figure 1 A diagram of a device implementing a forwarding database cache in accordance with some embodiments is illustrated.

[0010] Figure 2 A diagram of a device implementing a forwarding database cache having a primary memory and a secondary memory is illustrated in accordance with some embodiments.

[0011] Figure 3 A diagram of a device implementing a forwarding database cache having a primary memory and multiple secondary memories is illustrated in accordance with some embodiments.

[0012] Figure 4 A diagram illustrating resource allocation utilizing caching in accordance with some embodiments is illustrated.

[0013] Figure 5 A flow diagram for implementing a forwarding database cache according to some embodiments is illustrated.

[0014] Figure 6 A block diagram of an exemplary computing device configured to implement a forwarding database cache method in accordance with some embodiments is illustrated. DETAILED DESCRIPTION

[0015] The forwarding database determines the appropriate interface to which the input interface should forward the packet.Forwarding databases are used in networking, such as in bridges and routers.

[0016] Figure 1 A diagram of a device implementing a forwarding database cache according to some embodiments is illustrated. The device 100 includes a memory 102, which stores a main forwarding database 104 and one or more smaller forwarding databases 106. The device 100 also includes one or more packet processing elements 120, and the one or more packet processing elements 120 are used to process the received packets, including searching the main forwarding database 104 and one or more smaller forwarding databases 106 or triggering a search for these databases, and sending these packets based on the search results. In some embodiments, there are multiple main forwarding databases. The main forwarding database 104 is a complete database that stores all data (e.g., a complete set of MAC addresses), while one or more smaller forwarding databases 106 only store part or subset of the data (e.g., the most recently used information or information based on any other cache scheme). One or more smaller forwarding databases 106 can retrieve data from the main forwarding database 104 (e.g., after a cache miss). The data can be any data, such as address information (e.g., MAC address or IPv6 address).

[0017] For example, the main forwarding database 104 and one or more smaller forwarding databases 106 store address information so that after the device 100 receives packets, the device 100 can properly forward the packets to where they should go (e.g., port 1 or port 87) by searching one or more smaller forwarding databases 106 or the main forwarding database 104 for the appropriate destination.

[0018] When a packet is received, first the smaller forwarding database 106 is searched for the address, and if the address is not found, the main forwarding database 104 is searched. After the address is found, the packet is forwarded accordingly. In some embodiments, such as when the system can afford a slightly slower search, the main forwarding database is searched from time to time, unlike when a cache miss occurs.

[0019] Figure 2A diagram of a device implementing a forwarding database cache with a main memory and a secondary memory according to some embodiments is illustrated. The device 200 includes a main memory 202 storing a main forwarding database 204, and a secondary memory 208 storing one or more smaller forwarding databases 206. The device 200 also includes one or more packet processing elements 220, and the one or more packet processing elements 220 are used to process the received packets, including searching the main forwarding database 204 and one or more smaller forwarding databases 206 or triggering a search for these databases, and sending these packets based on the search results. In some embodiments, there are multiple main forwarding databases. The main forwarding database 204 is a complete database that stores all data, while one or more smaller forwarding databases 206 only store part or subset of the data (e.g., the most recently used information or information based on any other cache scheme). One or more smaller forwarding databases 206 can retrieve data from the main forwarding database 204 (e.g., after a cache miss). The data can be any data, such as address information (e.g., MAC address or IPv6 address).

[0020] For example, the main forwarding database 204 and one or more smaller forwarding databases 206 store address information so that after the device 200 receives packets, the device 200 can properly forward the packets to where they should go (e.g., port 1 or port 87) by searching one or more smaller forwarding databases 206 or the main forwarding database 204 for the appropriate destination.

[0021] When a packet is received, first the smaller forwarding database 206 is searched for the address, and if the address is not found, the main forwarding database 204 is searched. After the address is found, the packet is forwarded accordingly. In some embodiments, such as when the system can afford a slightly slower search, the main forwarding database is searched from time to time, unlike when a cache miss occurs.

[0022] In some embodiments, the primary memory 202 and the secondary memory 208 are physically separated. In some embodiments, the primary memory 202 and the secondary memory 208 have different speeds (eg, the secondary memory 208 is faster than the primary memory 202).

[0023] Figure 3A diagram of a device implementing a forwarding database cache with a main memory and multiple auxiliary memories according to some embodiments is illustrated. The device 300 includes a main memory 302 storing a main forwarding database 304, and multiple auxiliary memories 308, 312, 316 each storing one or more smaller forwarding databases 306, 310, 314, respectively. The device 300 also includes one or more packet processing elements 320, and the one or more packet processing elements 320 are used to process the received packets, including searching the main forwarding database 304 and one or more smaller forwarding databases 306, 310, 314 or triggering a search for these databases, and sending these packets based on the search results. In some embodiments, there are multiple main forwarding databases. The main forwarding database 304 is a complete database that stores all data, while one or more smaller forwarding databases 306, 310, 314 only store part or subset of the data (e.g., the most recently used information or information based on any other cache scheme). One or more smaller forwarding databases 306, 310, 314 can retrieve data from the main forwarding database 304 (e.g., after a cache miss). The data can be any data, such as address information (eg, a MAC address or an IPv6 address).

[0024] For example, the main forwarding database 304 and one or more smaller forwarding databases 306, 310, 314 store address information so that after the device 300 receives packets, the device 300 can properly forward the packets to where they should go (e.g., port 1 or port 87) by searching one or more smaller forwarding databases 306, 310, 314 or the main forwarding database 304 for the appropriate destination.

[0025] When a packet is received, first the smaller forwarding databases 306, 310, 314 are searched to find the address, and if the address is not found, the main forwarding database 304 is searched. After finding the address, the packet is forwarded accordingly. In some embodiments, such as when the system can afford a slightly slower search, the main forwarding database is searched from time to time, unlike when a cache miss. In some embodiments, the main memory can operate with a higher latency than these smaller databases, and still maintain a forwarding rate despite the higher latency.

[0026] In some embodiments, the main memory 302 and the plurality of secondary memories 308, 312, 316 are physically separate, and in some embodiments, some of these memories are physically separate and some are together. In some embodiments, the main memory 302 and the plurality of secondary memories 308, 312, 316 have different speeds (e.g., the secondary memories 308, 312, 316 are faster than the main memory 302, or the secondary memory 308 is faster than the secondary memory 312, the secondary memory 312 is faster than the secondary memory 316, and the secondary memory 316 is faster than the main memory 302).

[0027] Figure 1 , 2 The devices of and 3 can implement any caching scheme. In an exemplary caching scheme, when first started (e.g., when the first packet is received), the system searches in one of the smaller forwarding databases for a specific MAC address, but the MAC address will not be found, so the main forwarding database is searched, the MAC address is found, and then the MAC address is stored in one of the smaller forwarding databases (e.g., a write-through cache). In some embodiments, the information can be speculatively sent from the main forwarding database to one of the smaller forwarding databases. In some embodiments, if a hit is found, any speculative entry is deleted. In some embodiments, a combination of speculative read and write-back caching is implemented. In addition, an aging element can be used to determine which data should be removed.

[0028] Any implementation of deleting stale entries can be used, and any type of cache can be used (write-through, write-back, write-around). Any variables and implementations can be implemented, such as which data is removed from the cache (e.g., least recently used), and the use of hit bits.

[0029] In some embodiments, the smaller forwarding databases operate independently of each other and / or the master forwarding database.

[0030] In some embodiments, these databases include tags or identifiers associated with the data so that if there are conflicting tags, the cache can be cleared.

[0031] In certain embodiments, the main forwarding database and the smaller forwarding database are stored on the same physical memory, and in certain embodiments, they are stored on a separate physical memory. For example, the smaller forwarding database is stored on a faster physical memory than the physical memory storing the main forwarding database. In certain embodiments, each of the small forwarding databases is stored on a separate physical memory. In certain embodiments, there is a forwarding database larger than the main forwarding database. Any hierarchical structure of database can be implemented (for example, a large database with multiple small databases, multiple large databases with multiple small databases, or first-level database, second-level database to n-th level database).

[0032] In some embodiments, any data structure, such as a database, table, or any other data structure, can be utilized to store information and be searched.

[0033] Figure 4 A diagram of resource allocation utilizing a cache according to some embodiments is illustrated. A packet is received at a packet processing element 400, and the packet processing element 400 searches the first level cache 402 for address information. If the address is found in the first level cache 402, the packet processing element 400 can forward the packet to the appropriate location. If the address is not found in the first level cache 402 (e.g., there is a first level cache memory miss), the second level main memory 404 is read (or searched). The packet processing element 400 then forwards the packet to the appropriate location based on the second level main memory read. As a result of the read from the second level main memory 404, the first level cache 402 is updated with a new value, and other first level cache 402 memories may be invalidated or updated.

[0034] Figure 5A flow chart for implementing a forwarding database cache according to some embodiments is illustrated. In step 500, a device receives a data packet. The data packet includes destination information (e.g., which interface the packet should go to). In some embodiments, the packet is processed by a packet processing element. In step 502, one or more caches in the cache are searched to find the destination information. These caches contain forwarding databases or tables. If the destination information is found in the cache, then in step 504, the packet is sent to the destination associated with the destination information (e.g., port / stream / interface / "virtual interface", such as LAG, ECMP or tunnel interface). If the destination information is not found in the cache, then in step 506, the main forwarding database is searched. When the information is found in the main forwarding database, in step 504, the packet is sent to the destination associated with the destination information. In some embodiments, before or during forwarding the packet to the destination, the packet is modified (e.g., the packet format / content is modified to be properly received at the destination). In some embodiments, the information searched for is the destination address, and in some embodiments, the search is for information different from the destination address. In some embodiments, fewer steps or additional steps are implemented. In some embodiments, the order of these steps is modified.

[0035] Figure 6 A block diagram of an exemplary computing device configured to implement a forwarding database cache method according to some embodiments is illustrated. The computing device 600 can be used to obtain, store, calculate, process, communicate, receive, send, and / or display information, such as data packets. In general, a hardware structure suitable for implementing the computing device 600 includes a network interface 602, a memory 604, a processor 606, (multiple) I / O devices 608, a bus 610, and a storage device 612. As long as (multiple) suitable processors with sufficient speed are selected, the selection of (multiple) processors is not critical. The memory 604 can be any conventional computer memory known in the art. The storage device 612 can include a memory, a hard drive, a CDROM, a CDRW, a DVD, a DVDRW, a high-definition disk / drive, an ultra-HD drive, a flash memory card, or any other storage device. The computing device 600 can include one or more network interfaces 602. Examples of network interfaces include a network interface controller or a network card connected to an Ethernet or other type of local area network (LAN). The I / O device(s) 608 can include one or more of the following: keyboard, mouse, monitor, screen, printer, modem, touch screen, button interface, and other devices. The forwarding database cache application(s) 630 used to perform the forwarding database cache method can be stored in the storage device 612 and the memory 604 and processed as applications are typically processed. Figure 6 More or fewer of the components shown in can be included in computing device 600. In some embodiments, forwarding database cache hardware 620 is included. Figure 6 The computing device 600 in 600 includes an application 630 and hardware 620 for the forwarding database cache method, but the forwarding database cache method can be implemented on the computing device in hardware, firmware, software, or any combination thereof. For example, in some embodiments, the forwarding database cache application 630 is programmed in a memory and executed using a processor. In another example, in some embodiments, the forwarding database cache hardware 620 is a programmed hardware logic including gates that are specifically designed to implement the forwarding database cache method.

[0036] In some embodiments, (multiple) forwarding database cache application 630 includes several applications and / or modules. In some embodiments, these modules also include one or more sub-modules. In some embodiments, fewer modules or additional modules can be included.

[0037] Examples of suitable computing devices include servers, personal computers, laptops, mobile devices (eg, smart phones), network switches, routers, hubs, any other networking equipment, and any other computing devices.

[0038] In order to utilize the forwarding database cache, the switch or other device is configured to implement a forwarding database cache including a primary forwarding database, and one or more forwarding database caches. When a packet is received, the cache is first searched for information, such as address information, and if found, the packet is forwarded to the appropriate destination. If the address information is not found in the cache, the primary forwarding database is searched, and based on the information in the primary forwarding database, the packet is forwarded to the appropriate destination.

[0039] In operation, performance and size of the database are balanced by forwarding database caching. There may be billions of searches per second, and the rate will keep rising. Improving performance is a goal, but enabling scalability (e.g., allowing the size of the database to grow) is also important. There are also physical constraints to deal with (e.g., die size). Forwarding database caching resolves congestion. Localization of data helps alleviate some of the congestion issues.

[0040] Fully distributed / localized memory architectures have limitations in scaling based on forwarding data. A hybrid forwarding cache architecture can help alleviate, if not solve, many of these problems. As described, any cache scheme can be implemented, such as caching the most recently used or busiest used entries in the level 1 cache, and the cache is cleared on dirty or written from level 2 main memory.

[0041] By implementing a forwarding database cache, the most recent forwarding entries are localized in a level 1 cache that is local to the packet processing engine. Searches are performed at a high rate in the level 1 cache. If a miss occurs, a search is performed on the main level 2 memory. Reads occur as direct writes with a varying replacement strategy. Level 2 memory reads have greater latency, but this can be reduced using speculative reads. Other level 1 memories check for dirty entries and mark them as invalid.

[0042] The present invention has been described in terms of specific embodiments that incorporate details to facilitate understanding of the principles of construction and operation of the present invention. Such references herein to specific embodiments and their details are not intended to limit the scope of the appended claims thereto. It will be readily apparent to those skilled in the art that various other modifications may be made in the embodiments chosen for illustration without departing from the spirit and scope of the present invention as defined by the claims.

Claims

1. A method for forwarding a database cache, comprising: At a network switch, receiving a packet containing information; searching a cache on the network switch containing a first set of searchable information for a match to the information; searching a memory on the network switch containing a second set of searchable information for a match to the information if the match to the information is not found in the cache; sending the packet to a destination based on the match of the information, wherein at least a portion of the first set of searchable information is speculatively sent from the memory to the cache independent of searching the memory for matches to the portion; as well as In response to the match for the information being found within the cache, one or more speculative entries of the cache are deleted.

2. The method of claim 1, wherein the first set of searchable information is stored in a first forwarding database in the cache and the second set of searchable information is stored in a second forwarding database in the memory.

3. The method of claim 1, wherein the first set of searchable information is stored in a plurality of first forwarding databases in the cache, and the second set of searchable information is stored in a second forwarding database in the memory. The method according to claim 1 , wherein the cache comprises a plurality of first physical memories, and the memory is a separate physical memory. The method of claim 1 , wherein the destination comprises a virtual interface or a port.

6. The method of claim 1, wherein the first searchable information set within the cache contains less searchable information than the second searchable information set within the memory, and further wherein the first searchable information set is capable of retrieving searchable information from the second searchable information set. The method of claim 1 , wherein the information comprises address information.

8. A system for forwarding a database cache, comprising: a packet processing element of a network switch configured to process packets including information; The main memory of the network switch is configured to store searchable information for searching for the information; as well as A cache memory of the network switch is configured to store a subset of the searchable information that is less than the entire searchable information used to search for the information, wherein at least a portion of the searchable information is speculatively sent from the main memory to the cache memory independent of searching the main memory for a match to the portion, and further wherein in response to the match for the information being found within the cache, one or more speculative entries of the cache are deleted.

9. The system of claim 8, wherein the searchable information is stored in a first forwarding database in the cache memory and in a second forwarding database in the main memory.

10. The system of claim 8, wherein the searchable information is stored in a plurality of first forwarding databases in the cache memory and a second forwarding database in the main memory.

11. The system of claim 8, wherein the cache memory comprises a plurality of first physical memories, and the main memory is a separate physical memory.

12. The system of claim 8, wherein processing the packet comprises: The packet is forwarded to a destination that includes a virtual interface or port.

13. The system of claim 8, wherein the information includes address information.

14. A network switch, comprising: A memory for storing an application configured to: receiving a packet containing information; searching a cache containing a first set of searchable information for a match of said information; searching a memory containing a second set of searchable information for said information if said match for said information is not found in said cache; as well as sending the packet to a destination based on the matching of the information; as well as a processing component coupled to the memory, the processing component configured to process the application, wherein at least a portion of the first set of searchable information is speculatively sent from the memory to the cache independent of searching the memory for a match to the portion, and further wherein in response to the match of the information being found within the cache, one or more speculative entries of the cache are deleted.

15. The network switch of claim 14, wherein the first set of searchable information is stored in a first forwarding database in the cache and the second set of searchable information is stored in a second forwarding database in the memory.

16. The network switch of claim 14, wherein the first set of searchable information is stored in a plurality of first forwarding databases in the cache and the second set of searchable information is stored in a second forwarding database in the memory.

17. The network switch of claim 14, wherein the cache comprises a plurality of first physical memories, and the memory is a separate physical memory.

18. The network switch of claim 14, wherein the destination comprises a virtual interface or a port.

19. The network switch of claim 14, wherein the first searchable information set within the cache contains less searchable information than the second searchable information set within the memory, and further wherein the first searchable information set is capable of retrieving searchable information from the second searchable information set.

20. The network switch of claim 14, wherein the information comprises address information.

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