A dual resonator with on-chip temperature compensation and production process

Abstract

A dual resonator with on-chip temperature compensation, wherein the anchor point is connected to the oscillator through a spring, the driving electrode and the sensing electrode are connected to the oscillator, and the surface of the oscillator has a heavily doped oxide layer; it is divided into two sections, a high-temperature oscillator and a low-temperature oscillator, and the low-temperature oscillator forms an angle of 15-40 degrees with the edge of the MEMS chip. A production process for a dual resonator with on-chip temperature compensation, etching electrodes and low-temperature oscillator skylights: etching skylights on the device layer of SOI by deep ultraviolet etching technology to form an ohmic contact between the oscillator and the metal wire, and depositing metal electrodes; bonding the MEMS wafer to the circuit wafer: thinning and polishing to form terminal interconnection. Advantages of the present invention: adjusting the natural frequency of the resonator through frequency temperature compensation to improve the output accuracy of the pressure sensor, and can be applied to MEMS resonant pressure sensors, or timing resonators, filters, gyroscopes, resonant chemical sensors and other fields.

Description

Technical Field

[0001] The present invention relates to the field of sensors, and in particular to a dual resonator with on-chip temperature compensation and a production process. Background Art

[0002] At present, MEMS resonant pressure sensors are widely used in the field of electronic devices. They have high accuracy and strong anti-interference ability. Resonant pressure sensors on silicon also have the advantages of small size and low power consumption. By designing a dual resonator and adjusting the natural frequency of the resonator through frequency temperature compensation, the output accuracy of the pressure sensor can be improved. Summary of the invention

[0003] The purpose of the present invention is to realize that it can be applied not only to MEMS resonant pressure sensors, but also to timing resonators, filters, gyroscopes, resonant chemical sensors and other fields. A dual resonator with on-chip temperature compensation and a production process are provided.

[0004] The present invention provides a dual resonator with on-chip temperature compensation, characterized in that: the dual resonator with on-chip temperature compensation comprises an anchor point 1, a spring 2, an oscillator 3, a driving electrode 4, a sensing electrode 5, a heavily doped oxide layer 6, and a MEMS chip edge 7;

[0005] The anchor point 1 is connected to the oscillator 3 via a spring 2, the driving electrode 4 and the sensing electrode 5 are connected to the oscillator 3, and the surface of the oscillator 3 has a heavily doped oxide layer 6;

[0006] It is divided into two sections: a high-temperature oscillator and a low-temperature oscillator. The low-temperature oscillator is at an angle of 15-40 degrees to the edge of the MEMS chip to improve the thermal performance of the pendulum and effectively improve the temperature control sensitivity. The low-temperature oscillator is heavily doped with boron, arsenic, and phosphorus to improve its thermal performance.

[0007] The oscillator 3 comprises at least one spring 2, which is formed by plasma etching silicon and then treating the surfaces of the spring 2 and the oscillator 3 to improve the temperature performance.

[0008] The resonators are oriented at different angles to the edge of the silicon chip using photolithography and plasma etching to improve the thermal performance of the timing oscillator; a second reference resonator is also formed on the wafer at a different orientation.

[0009] The low frequency temperature coefficient resonators and springs are covered with a silicon dioxide layer, grown by chemical vapor deposition or thermal oxide.

[0010] Low frequency temperature coefficient resonators and springs are chemically doped with boron, phosphorus, and arsenic to high levels >1018 dopant atoms / cc to improve the thermal performance of the pressure sensor. The heavy doping can be through the entire cross section of the resonator or just the outer surface.

[0011] The low frequency temperature coefficient resonator and spring design can be positioned at angles from 15 to 40 degrees relative to the silicon edge.

[0012] A second reference resonator or high frequency temperature coefficient resonator is formed on a silicon oscillator on the MEMS chip. The second resonator is oriented vertically relative to the edge of the chip and has a different frequency output than the pressure sensor resonator over the temperature range. The high frequency temperature coefficient resonator is not heavily doped and has no oxide layer on its spring.

[0013] The frequencies of the two types of resonators are compared during calibration and operation to improve the performance of the oscillator over temperature and due to package stresses.

[0014] The process can be applied to many types of MEMS resonators to achieve better temperature performance, including timing oscillators, filters, gyroscopes, resonant pressure sensors and resonant chemical sensors.

[0015] The circuit wafer can be a CMOS wafer or a simple multi-metal layer interconnect wafer; the resonator can be a single crystal or doped polysilicon, epitaxial polycrystalline or Si-Ge layer.

[0016] After wafer-wafer bonding, the wafer stack can be thinned.

[0017] Wafer-to-wafer bonding in vacuum is preferred, but CVD thin film sealing can also be used.

[0018] A getter metal layer can be incorporated into a sealed vacuum chamber to absorb gases.

[0019] A variety of metals can be used to bond the two wafers, including Au-Si, Al-Ge, Cu-Cu, Cu-Sn, Au-Sn, Al-Al, Si-Si, and other solders and eutectic alloys.

[0020] Through Silicon Vias can be formed in either wafer for electrical connection to a circuit board, ASIC or package.

[0021] Deposition of oxide layer: First, an oxide layer 8 is grown on the SOI device layer. The single crystal silicon device layer 9 can also be polycrystalline silicon or a polycrystalline silicon epitaxial layer.

[0022] A production process of a dual resonator with on-chip temperature compensation, characterized by: etching electrodes and low-temperature oscillator skylights: etching skylights on the device layer of SOI by deep ultraviolet etching technology to form ohmic contacts between the oscillator and the metal wire, a metal electrode window 12 and a low-temperature oscillator window 13;

[0023] Depositing metal electrodes: This patent for depositing metal electrodes is divided into two cases:

[0024] The first case is that when the doping concentration of the device layer of SOI is sufficient to form an ohmic contact, there is no need to dope the metal electrode window, and the metal electrode and the metal sealing ring for vacuum sealing can be directly deposited, the metal electrode 14 and the metal sealing ring 15;

[0025] The second situation is when the doping concentration of the device layer of SOI is not enough to form an ohmic contact. At this time, the device layer under the metal electrode window needs to be heavily doped so that the device layer forms an ohmic contact with the metal electrode. Before heavy doping, HF dry etching is required to form a low-temperature oscillator anchor window as shown in the figure below.

[0026] HF dry etching forms a low-temperature oscillator anchor window 16, and the device layer is heavily doped 17. The device layer is heavily doped to increase the doping concentration of the metal electrode window device layer, providing conditions for the subsequent deposition of the metal electrode to form an ohmic contact, and the thermal performance of the low-temperature oscillator is improved after heavy doping.

[0027] High temperature oscillator anchor point window: a high temperature oscillator anchor point window is formed by HF dry etching;

[0028] The high temperature oscillator anchor window 18 is used to deposit metal electrodes and metal sealing rings. The above are two solutions for depositing metal electrodes at different device concentrations: one is when the device layer concentration is lower than the concentration value for forming ohmic contact with the metal electrode, and the other is when the device layer concentration is higher than the concentration for forming ohmic contact with the metal electrode.

[0029] HF dry etching:

[0030] The high temperature oscillator 19 and the low temperature oscillator 20 are formed by HF dry etching of the single crystal silicon device layer under the SOI oxide layer.

[0031] Metal circuit and wafer sealing of the second wafer:

[0032] It includes reactive metal titanium 21, an electrical contact metal layer 22, a sealing metal layer 23, and a wafer circuit 24; the second wafer can be a CMOS circuit wafer or a BiCMOS circuit wafer. The deposited titanium reactive layer is used to form a getter in the cavity formed by the high-temperature oscillator and the low-temperature oscillator after the circuit wafer is bonded to the MEMS wafer, which can reduce the Q value of the oscillator. The sealed electrical contact metal is used for metal sealing and forming electrical contact when the circuit wafer is bonded to the MEMS wafer.

[0033] Bond the MEMS wafer to the circuit wafer: the position is at bonding point 25;

[0034] Thinning and polishing: Use thinning and polishing technology to grind off the excess part of the bottom of MEMS;

[0035] Through-hole: Through-silicon via 26, forming terminal interconnection.

[0036] Advantages of the present invention:

[0037] The dual resonator with on-chip temperature compensation and the production process described in the present invention improve the output accuracy of the pressure sensor by designing a dual resonator and adjusting the natural frequency of the resonator through frequency temperature compensation. It can be applied not only to MEMS resonant pressure sensors, but also to timing resonators, filters, gyroscopes, resonant chemical sensors and other fields. BRIEF DESCRIPTION OF THE DRAWINGS

[0038] The present invention is further described in detail below in conjunction with the accompanying drawings and embodiments:

[0039] Figure 1 This is a schematic diagram of the high temperature oscillator and low temperature oscillator structure;

[0040] Figure 2 Schematic diagram of deposition oxidation;

[0041] Figure 3 Schematic diagram of etching electrodes and low temperature oscillator skylight;

[0042] Figure 4 Schematic diagram of depositing metal electrodes;

[0043] Figure 5 Schematic diagram of forming a low-temperature oscillator anchor window by HF dry etching;

[0044] Figure 6 This is a schematic diagram of the high temperature oscillator anchor point window;

[0045] Figure 7 Schematic diagram of HF dry etching;

[0046] Figure 8 The figure is a schematic diagram of the metal circuit and wafer sealing of the second wafer;

[0047] Fig. 9 Schematic diagram of bonding between MEMS wafer and circuit wafer;

[0048] Fig.10 is a schematic diagram of the bonding point;

[0049] Fig.11 Schematic diagram of thinning and polishing;

[0050] Fig.12 Schematic diagram of through hole. DETAILED DESCRIPTION

[0051] Example

[0052] The present invention provides a dual resonator with on-chip temperature compensation, characterized in that: the dual resonator with on-chip temperature compensation comprises an anchor point 1, a spring 2, an oscillator 3, a driving electrode 4, a sensing electrode 5, a heavily doped oxide layer 6, and a MEMS chip edge 7;

[0053] The anchor point 1 is connected to the oscillator 3 via a spring 2, the driving electrode 4 and the sensing electrode 5 are connected to the oscillator 3, and the surface of the oscillator 3 has a heavily doped oxide layer 6;

[0054] It is divided into two sections: a high-temperature oscillator and a low-temperature oscillator. The low-temperature oscillator is at an angle of 15-40 degrees to the edge of the MEMS chip to improve the thermal performance of the pendulum and effectively improve the temperature control sensitivity. The low-temperature oscillator is heavily doped with boron, arsenic, and phosphorus to improve its thermal performance.

[0055] The oscillator 3 comprises at least one spring 2, which is formed by plasma etching silicon and then treating the surfaces of the spring 2 and the oscillator 3 to improve the temperature performance.

[0056] The resonators are oriented at different angles to the edge of the silicon chip using photolithography and plasma etching to improve the thermal performance of the timing oscillator; a second reference resonator is also formed on the wafer at a different orientation.

[0057] The low frequency temperature coefficient resonators and springs are covered with a silicon dioxide layer, grown by chemical vapor deposition or thermal oxide.

[0058] Low frequency temperature coefficient resonators and springs are chemically doped with boron, phosphorus, and arsenic to high levels >1018 dopant atoms / cc to improve the thermal performance of the pressure sensor. The heavy doping can be through the entire cross section of the resonator or just the outer surface.

[0059] The low frequency temperature coefficient resonator and spring design can be positioned at angles from 15 to 40 degrees relative to the silicon edge.

[0060] A second reference resonator or high frequency temperature coefficient resonator is formed on a silicon oscillator on the MEMS chip. The second resonator is oriented vertically relative to the edge of the chip and has a different frequency output than the pressure sensor resonator over the temperature range. The high frequency temperature coefficient resonator is not heavily doped and has no oxide layer on its spring.

[0061] The frequencies of the two types of resonators are compared during calibration and operation to improve the performance of the oscillator over temperature and due to package stresses.

[0062] The process can be applied to many types of MEMS resonators to achieve better temperature performance, including timing oscillators, filters, gyroscopes, resonant pressure sensors and resonant chemical sensors.

[0063] The circuit wafer can be a CMOS wafer or a simple multi-metal layer interconnect wafer; the resonator can be a single crystal or doped polysilicon, epitaxial polycrystalline or Si-Ge layer.

[0064] After wafer-wafer bonding, the wafer stack can be thinned.

[0065] Wafer-to-wafer bonding in vacuum is preferred, but CVD thin film sealing can also be used.

[0066] A getter metal layer can be incorporated into a sealed vacuum chamber to absorb gases.

[0067] A variety of metals can be used to bond the two wafers, including Au-Si, Al-Ge, Cu-Cu, Cu-Sn, Au-Sn, Al-Al, Si-Si, and other solders and eutectic alloys.

[0068] Through Silicon Vias can be formed in either wafer for electrical connection to a circuit board, ASIC or package.

[0069] Deposition of oxide layer: First, an oxide layer 8 is grown on the SOI device layer. The single crystal silicon device layer 9 can also be polycrystalline silicon or a polycrystalline silicon epitaxial layer.

[0070] A production process of a dual resonator with on-chip temperature compensation, characterized by: etching electrodes and low-temperature oscillator skylights: etching skylights on the device layer of SOI by deep ultraviolet etching technology to form ohmic contacts between the oscillator and the metal wire, a metal electrode window 12 and a low-temperature oscillator window 13;

[0071] Depositing metal electrodes: This patent for depositing metal electrodes is divided into two cases:

[0072] The first case is that when the doping concentration of the device layer of SOI is sufficient to form an ohmic contact, there is no need to dope the metal electrode window, and the metal electrode and the metal sealing ring for vacuum sealing can be directly deposited, the metal electrode 14 and the metal sealing ring 15;

[0073] The second situation is when the doping concentration of the device layer of SOI is not enough to form an ohmic contact. At this time, the device layer under the metal electrode window needs to be heavily doped so that the device layer forms an ohmic contact with the metal electrode. Before heavy doping, HF dry etching is required to form a low-temperature oscillator anchor window as shown in the figure below.

[0074] HF dry etching forms a low-temperature oscillator anchor window 16, and the device layer is heavily doped 17. The device layer is heavily doped to increase the doping concentration of the metal electrode window device layer, providing conditions for the subsequent deposition of the metal electrode to form an ohmic contact, and the thermal performance of the low-temperature oscillator is improved after heavy doping.

[0075] High temperature oscillator anchor point window: a high temperature oscillator anchor point window is formed by HF dry etching;

[0076] The high temperature oscillator anchor window 18 is used to deposit metal electrodes and metal sealing rings. The above are two solutions for depositing metal electrodes at different device concentrations: one is when the device layer concentration is lower than the concentration value for forming ohmic contact with the metal electrode, and the other is when the device layer concentration is higher than the concentration for forming ohmic contact with the metal electrode.

[0077] HF dry etching:

[0078] The high temperature oscillator 19 and the low temperature oscillator 20 are formed by HF dry etching of the single crystal silicon device layer under the SOI oxide layer.

[0079] Metal circuit and wafer sealing of the second wafer:

[0080] It includes reactive metal titanium 21, an electrical contact metal layer 22, a sealing metal layer 23, and a wafer circuit 24; the second wafer can be a CMOS circuit wafer or a BiCMOS circuit wafer. The deposited titanium reactive layer is used to form a getter in the cavity formed by the high-temperature oscillator and the low-temperature oscillator after the circuit wafer is bonded to the MEMS wafer, which can reduce the Q value of the oscillator. The sealed electrical contact metal is used for metal sealing and forming electrical contact when the circuit wafer is bonded to the MEMS wafer.

[0081] Bond the MEMS wafer to the circuit wafer: the position is at bonding point 25;

[0082] Thinning and polishing: Use thinning and polishing technology to grind off the excess part of the bottom of MEMS;

[0083] Through-hole: Through-silicon via 26, forming terminal interconnection.

[0084] Matters not covered by the present invention are known technologies.

[0085] The above embodiments are only for illustrating the technical concept and features of the present invention, and their purpose is to enable people familiar with the technology to understand the content of the present invention and implement it accordingly, and they cannot be used to limit the protection scope of the present invention. Any equivalent changes or modifications made according to the spirit of the present invention should be included in the protection scope of the present invention.

Claims

1. A dual resonator with on-chip temperature compensation, characterized in that: The dual resonator with on-chip temperature compensation comprises an anchor point (1), a spring (2), an oscillator (3), a driving electrode (4), a sensing electrode (5), and a heavily doped oxide layer (6); The anchor point (1) is connected to the oscillator (3) via a spring (2), the driving electrode (4) and the sensing electrode (5) are connected to the oscillator (3), and the surface of the oscillator (3) is provided with a heavily doped oxide layer (6); It is divided into two sections: a high-temperature oscillator and a low-temperature oscillator. The low-temperature oscillator is at an angle of 15-40 degrees to the edge of the MEMS chip to improve the thermal performance of the pendulum and effectively improve the temperature control sensitivity. The low-temperature oscillator is heavily doped with boron, arsenic, and phosphorus to improve its thermal performance.

2. The dual resonator with on-chip temperature compensation according to claim 1, characterized in that: The oscillator (3) comprises at least one spring (2), the spring (2) is formed by plasma etching silicon, and then the surfaces of the spring (2) and the oscillator (3) are processed to improve the temperature performance.

3. The dual resonator with on-chip temperature compensation according to claim 1, characterized in that: The resonators are oriented at different angles to the edge of the silicon chip using photolithography and plasma etching to improve the thermal performance of the timing oscillator; A second reference resonator is also formed on the wafer in a different orientation.

4. The dual resonator with on-chip temperature compensation according to claim 1, characterized in that: The low frequency temperature coefficient resonators and springs are covered with a silicon dioxide layer, grown by chemical vapor deposition or thermal oxide.

5. The dual resonator with on-chip temperature compensation according to claim 1, characterized in that: The circuit wafer can be a CMOS wafer or a multi-metal layer interconnect wafer; The resonator is a single crystal or doped polysilicon, epitaxial polycrystalline or Si-Ge layer; After wafer-wafer bonding, the wafer stack can be thinned; Wafer-wafer bonding is done in vacuum or sealed using CVD thin films; A getter metal layer can be incorporated into a sealed vacuum chamber to absorb gases; A variety of metals can be used to bond two wafers, including Au-Si, Al-Ge, Cu-Cu, Cu-Sn, Au-Sn, Al-Al, Si-Si; Through Silicon Vias can be formed in either wafer for electrical connection to a circuit board, ASIC or package.

6. The dual resonator with on-chip temperature compensation according to claim 1, characterized in that: Deposition of oxide layer: First, an oxide layer (8) is grown on the SOI device layer, and the single crystal silicon device layer (9) is polycrystalline silicon or a polycrystalline silicon epitaxial layer.

7. A process for producing a dual resonator with on-chip temperature compensation as claimed in claim 1, characterized in that: Etching electrodes and low-temperature oscillator skylights: etching skylights on the device layer of SOI by deep ultraviolet etching technology to form ohmic contacts between the oscillator and the metal wire, a metal electrode window (12), and a low-temperature oscillator window (13); Depositing metal electrodes: There are two types of depositing metal electrodes: In the first case, when the doping concentration of the device layer of SOI is sufficient to form an ohmic contact, it is not necessary to dope the metal electrode window, and the metal electrode and the metal sealing ring for vacuum sealing can be directly deposited, the metal electrode (14) and the metal sealing ring (15); The second situation is when the doping concentration of the device layer of SOI is not enough to form an ohmic contact. At this time, the device layer under the metal electrode window needs to be heavily doped so that the device layer forms an ohmic contact with the metal electrode. Before heavy doping, a low-temperature oscillator anchor window needs to be formed by HF dry etching. HF dry etching forms a low-temperature oscillator anchor window (16), and heavily doping the device layer (17). The device layer is heavily doped to increase the doping concentration of the metal electrode window device layer, thereby providing conditions for subsequent deposition of metal electrodes to form ohmic contacts, and the thermal performance of the low-temperature oscillator is improved after heavy doping; High temperature oscillator anchor point window: a high temperature oscillator anchor point window is formed by HF dry etching; The high temperature oscillator anchor window (18) deposits a metal electrode and a metal sealing ring, wherein the above are two solutions for depositing metal electrodes at different device concentrations, one is a device layer concentration lower than a concentration value for forming an ohmic contact with the metal electrode, and the other is a device layer concentration higher than a concentration for forming an ohmic contact with the metal electrode; HF dry etching: A high temperature oscillator (19) and a low temperature oscillator (20) are formed by HF dry etching of the single crystal silicon device layer under the SOI oxide layer; Metal circuit and wafer sealing of the second wafer: The invention comprises reactive metal titanium (21), an electrical contact metal layer (22), a sealing metal layer (23), and a wafer circuit (24); the second wafer can be a CMOS circuit wafer or a BiCMOS circuit wafer; the deposited titanium reactive layer is used to form a getter in a cavity formed by a high-temperature oscillator and a low-temperature oscillator after the circuit wafer is bonded to the MEMS wafer, thereby reducing the Q value of the oscillator; the sealing electrical contact metal is used for metal sealing and forming electrical contact when the circuit wafer is bonded to the MEMS wafer.

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