A very small step-by-step local oscillator device and method
By using a DDS synthesizer and a temperature-controlled crystal oscillator to generate a local oscillator signal with a very small step, the problem of fractional step spurious signals in existing technologies is solved, thereby improving the channel utilization and narrow channel performance of the telemetry receiver.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2021-09-30
- Publication Date
- 2026-03-17
AI Technical Summary
Existing local oscillator schemes are difficult to achieve extremely small step sizes and suffer from fractional step spurious issues, failing to meet the channel utilization and narrow channel requirements of multi-frequency telemetry receivers.
A low-frequency signal output from a DDS synthesizer is mixed with a frequency multiplier signal from a temperature-controlled crystal oscillator. After filtering, the signal is used as a reference signal for the phase-locked loop module. Combined with a frequency divider, spurious signals are further suppressed to generate a local oscillator signal with minimal step size.
It achieves local oscillator signal generation with extremely small steps, while effectively suppressing fractional-step spurious signals, thus improving channel utilization and narrow channel performance.
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Figure CN113992204B_ABST
Abstract
Description
Technical Field
[0001] This invention belongs to the field of frequency synthesis technology, specifically relating to a very small step local oscillator device and local oscillator method. Background Technology
[0002] Telemetry receivers are a crucial component of telemetry ground stations. Their primary function is to acquire the state parameters of the target being measured, and they are widely used to obtain flight parameter data from drones, missiles, and other instruments, as well as to analyze the technical status of the target. Currently, most telemetry receivers use fixed frequencies, and correspondingly, the telemetry ground stations must also use fixed frequencies. However, with the increasing number of test runs, fixed frequencies are no longer sufficient to meet the requirements of a large number of tests and are easily constrained by other devices operating in the same frequency band.
[0003] For the reasons mentioned above, multi-frequency telemetry receivers and transmitters have emerged in large numbers. These allow transmitters to set frequency points at certain intervals, which can be adjusted during operation. Correspondingly, telemetry receivers can perform frequency locking and demodulation in frequency steps. The smaller the local oscillator step, the better the channel utilization and the narrow channel requirements can be met.
[0004] Currently, commonly used local oscillator (LO) schemes include direct frequency synthesis, phase-locked loop (PLL) frequency synthesis, integer division frequency synthesis, and fractional division frequency synthesis. However, these LO schemes all have some drawbacks, such as the inability to achieve extremely small step sizes, or poor spurious behavior at fractional steps with extremely small step sizes. Summary of the Invention
[0005] To address the shortcomings of existing technologies, this invention provides a very small step local oscillator device and method that can effectively suppress fractional step straying.
[0006] In a first aspect, a minimal step local oscillator device includes:
[0007] Reference signal source;
[0008] A DDS synthesizer is used to receive the output signal of the reference signal source and output a first output signal with a lower frequency.
[0009] A first filter is used to filter the first output signal to obtain a first signal to be mixed.
[0010] A frequency multiplier is used to receive the output signal of the reference signal source and output a second output signal with a higher frequency.
[0011] The second filter is used to filter the second output signal to obtain the second signal to be mixed.
[0012] A mixer is used to mix the first signal to be mixed and the second signal to be mixed to obtain a mixed signal;
[0013] The third filter is used to filter the mixing signal to obtain the phase-locked loop reference signal;
[0014] The phase-locked loop module is used to receive the phase-locked loop reference signal and output the local oscillator signal.
[0015] As a preferred embodiment, the reference signal source includes:
[0016] Thermostatic crystal oscillator;
[0017] A power divider is used to split the output signal of a temperature-controlled crystal oscillator into two paths, one of which serves as the reference signal for a DDS synthesizer and the other as the input signal for a frequency multiplier.
[0018] As a preferred embodiment, the extremely small step local oscillator device further includes:
[0019] A frequency divider is used to divide the local oscillator signal for output to further suppress spurious signals.
[0020] As a preferred embodiment, the first filter, the second filter, and the third filter are SAW filters.
[0021] Secondly, a method for a minimal step local oscillator includes a reference signal source and the following steps:
[0022] The DDS synthesizer receives the signal output from the reference signal source and outputs a first output signal with a lower frequency.
[0023] The first output signal is filtered to obtain the first signal to be mixed;
[0024] The frequency multiplier receives the signal output from the reference signal source and outputs a second output signal with a higher frequency.
[0025] The second output signal is filtered to obtain the second signal to be mixed.
[0026] The first signal to be mixed and the second signal to be mixed are mixed to obtain a mixed signal;
[0027] The mixed signal is filtered to obtain the phase-locked loop reference signal;
[0028] The phase-locked loop module receives the phase-locked loop reference signal and outputs the local oscillator signal.
[0029] As a preferred option, the following steps are also included:
[0030] The local oscillator signal is divided and output.
[0031] As a preferred embodiment, the reference signal source includes a temperature-controlled crystal oscillator and a power divider;
[0032] The method for minimizing step local oscillator movement further includes the following steps:
[0033] The power divider splits the output signal of the thermostatic crystal oscillator into two paths, one of which serves as the reference signal for the DDS synthesizer and the other as the input signal for the frequency multiplier.
[0034] Compared with the prior art, the present invention has the following beneficial effects:
[0035] By mixing the lower frequency signal output from the DDS with a higher crystal oscillator frequency, and then outputting the result via a PLL, a local oscillator scheme with extremely small step characteristics is achieved, while also exhibiting very low fractional step spurious emissions. Attached Figure Description
[0036] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0037] Figure 1 This is a schematic diagram of a minimal step local oscillator device according to the present invention;
[0038] Figure 2 This is another structural schematic diagram of a minimal step local oscillator device according to the present invention;
[0039] Figure 3 This is a schematic flowchart of a method for a minimal step local oscillator according to the present invention;
[0040] Figure 4 This is another flowchart illustrating a method for minimizing step local oscillator movement according to the present invention.
[0041] Among them, 1. Reference signal source; 11. Temperature-controlled crystal oscillator; 12. Power divider; 2. DDS synthesizer; 3. First filter; 4. Frequency multiplier; 5. Second filter; 6. Mixer; 7. Third filter; 8. Phase-locked loop module; 9. Frequency divider. Detailed Implementation
[0042] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.
[0043] To make the objectives, technical solutions, and advantages of this invention clearer, the invention will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the invention.
[0044] Firstly, such as Figure 1 As shown, a minimal step local oscillator device includes:
[0045] Reference signal source 1;
[0046] DDS synthesizer 2 is used to receive the output signal of the reference signal source 1 and output a first output signal with a lower frequency.
[0047] The first filter 3 is used to filter the first output signal to obtain the first signal to be mixed.
[0048] Frequency multiplier 4 is used to receive the output signal of the reference signal source 1 and output a second output signal with a higher frequency.
[0049] The second filter 5 is used to filter the second output signal to obtain the second signal to be mixed.
[0050] Mixer 6 is used to mix the first signal to be mixed and the second signal to be mixed to obtain a mixed signal;
[0051] The third filter 7 is used to filter the mixing signal to obtain the phase-locked loop reference signal;
[0052] Phase-locked loop module 8 is used to receive the phase-locked loop reference signal and output the local oscillator signal.
[0053] Wherein, the first output signal with a lower frequency means its frequency is lower than the output signal of the reference signal source, and the second output signal with a higher frequency means its frequency is higher than the output signal of the reference signal source. The types of the first, second, and third filters are not limited, but a suitable SAW filter is preferred due to its advantages of low insertion loss and good stopband suppression. In the prior art, the DDS synthesizer's output signal frequency, which ensures spurious performance, is low and unsuitable as a reference signal for a phase-locked loop (PLL) module. Since the higher the output frequency of the DDS synthesizer, the worse its spurious characteristics and phase noise performance, although the DDS synthesizer can directly generate a reference signal for the PLL module when the output signal frequency is high, its spurious characteristics and phase noise performance are difficult to guarantee. Therefore, this application uses a DDS synthesizer to output a lower frequency signal that ensures spurious characteristics and phase noise performance. This lower frequency signal is then mixed with the output signal of another reference signal source with a sufficiently high frequency. After filtering, a higher frequency mixed signal with good spurious characteristics and phase noise performance is obtained (the mixed signal can be a difference frequency signal or a sum frequency signal). Using the mixed signal as the reference signal of the phase-locked loop module can effectively improve the spurious characteristics and phase noise performance of the output signal of the phase-locked loop module, thereby achieving a very small step of the output local oscillator signal.
[0054] The output signal of the DDS synthesizer is mixed with the output signal of the frequency multiplier to obtain a mixed signal. Compared with the same-frequency signal directly output by the DDS synthesizer, this mixed signal has better phase noise performance and spurious characteristics. This embodiment achieves a local oscillator scheme with extremely small step characteristics and very low fractional-step spurious emissions by mixing the lower frequency signal output by the DDS with a higher crystal oscillator frequency signal, and then outputting it through a PLL. This local oscillator scheme can be used in telemetry receivers.
[0055] In one embodiment, such as Figure 2 As shown, the reference signal source includes:
[0056] 11-inch temperature-controlled crystal oscillator;
[0057] The power divider 12 is used to split the output signal of the temperature-controlled crystal oscillator 11 into two paths, one of which serves as the reference signal for the DDS synthesizer 2, and the other serves as the input signal for the frequency multiplier 4.
[0058] The reference signal source outputs two signals: one input to the DDS synthesizer and the other to the frequency multiplier. The reference signal source can be configured using two separate temperature-controlled crystal oscillators, or it can be a combination of a temperature-controlled crystal oscillator and a power divider to split the output signal of the temperature-controlled crystal oscillator into two outputs.
[0059] In one embodiment, such as Figure 2 As shown, the extremely small step local oscillator device further includes:
[0060] Frequency divider 9 is used to divide the local oscillator signal for output to further suppress spurious signals.
[0061] By using a frequency divider at the output of the phase-locked loop (PLL) module, spurious emissions can be further suppressed. The frequency divider can also further improve the output phase noise performance of the PLL module.
[0062] To more clearly illustrate the main idea of this invention, specific embodiments are listed below:
[0063] Taking the achievement of a very small step of 100Hz as an example, the temperature-controlled crystal oscillator is a 100MHz low-phase-noise, high-stability temperature-controlled crystal oscillator; the DDS synthesizer is an AD9910, which has an internal main frequency of up to 1GSPS and a maximum output frequency of 400MHz, with an output frequency resolution of 0.23Hz; the phase-locked loop module is an LMX2594 chip, with a minimum frequency step of 0.01Hz and a phase noise of -110dBc / Hz under a 100KHz offset and a 15GHz carrier.
[0064] The 100MHz signal output from the temperature-controlled crystal oscillator is split into two paths by a power divider. One path serves as the reference signal for a DDS synthesizer, which can output a variable frequency signal of 25MHz to 27MHz. The other path is input to a frequency multiplier, outputting a 200MHz multiplied signal. After filtering, both signals are input to a mixer to obtain a variable mixing signal of approximately 174MHz to 175MHz. This mixing signal is then filtered by a crystal filter and used as a reference signal input to the phase-locked loop module.
[0065] The formula for the local oscillator frequency of the LMX2594 phase-locked loop module is:
[0066] IF1 = 1430 + RF ①;
[0067] Wherein, IF1 is a local oscillator frequency, RF is the radio frequency input frequency, and 1430 (MHz) is an intermediate frequency.
[0068] The formulas for calculating integer and decimal steps in the phase-locked loop module LMX2594 are as follows:
[0069] F VCO =F REF (N+F / DEN) ②;
[0070] Where F VCO It is the output frequency of the VCO (voltage-controlled oscillator) of the phase-locked loop module, F. REFN is the reference signal frequency of the phase-locked loop module, F is the numerator of the fractional part, and DEN is the denominator of the fractional part. For ease of calculation, DEN can be taken as a constant of 8.
[0071] When the RF input signal is 2185MHz, according to formula ①, the local oscillator signal is 3615MHz. Since the output frequency range of the VCO inside the phase-locked loop module LMX2594 is 7500MHz-15000MHz, the VCO output frequency here is chosen to be four times the local oscillator signal, i.e., 14460MHz. Taking the reference frequency of the phase-locked loop module LMX2594 as 174MHz, the approximate multiple relationship between the VCO output frequency and the reference frequency is 83.1034. According to formula ②, combined with the approximate multiple relationship obtained above, the integer multiple N can be set to 83; if DEN in formula ② is 8, then the coefficient F is 1 (closest to the approximate multiple relationship), thus obtaining the actual multiple of 83.125. Therefore, the reference signal frequency of the phase-locked loop module can be calculated to be 173.954887MHz, and the output frequency of the DDS is 26.045112MHz. When the RF input signal is stepped to 2185.0001MHz in 100Hz increments, the corresponding DDS output frequency, calculated above, is 26.045107MHz. When the RF input signal is stepped to 2185.0002MHz, the corresponding DDS output frequency, calculated above, is 26.045103MHz. See Table 1.
[0072] When the RF input signal is 2200MHz, according to formula ①, the local oscillator signal is 3630MHz. Since the output frequency range of the VCO inside the phase-locked loop module LMX2594 is 7500MHz-15000MHz, the VCO output frequency here is chosen to be four times the local oscillator signal, i.e., 14520MHz. Taking the reference frequency of the phase-locked loop module LMX2594 as 174MHz, the approximate multiple relationship between the VCO output frequency and the reference frequency is 83.4482. According to formula ②, combined with the approximate multiple relationship obtained above, the integer multiple N can be set to 83; if DEN in formula ② is 8, then the coefficient F is 4 (closest to the approximate multiple relationship), thus obtaining an actual multiple of 83.5. Therefore, the reference signal frequency of the phase-locked loop module can be calculated to be 173.892215MHz, and the output frequency of the DDS is 26.107784MHz. When the RF input signal is stepped to 2200.0001MHz in 100Hz increments, the corresponding DDS output frequency, calculated above, is 26.107779MHz. When the RF input signal is stepped to 2200.0002MHz, the corresponding DDS output frequency, calculated above, is 26.107774MHz. See Table 1.
[0073] Table 1. Decimal Step Algorithm Table:
[0074]
[0075]
[0076] As described above, the output frequency of the DDS can be obtained from radio frequency signals (RF) at different frequencies using the above method, thereby achieving the goal of 100Hz fractional step. It is understood that the selection of devices and parameters in this embodiment can be adjusted according to the actual application environment, as long as it conforms to the main purpose of this invention (i.e., to boost the output frequency of the DDS to a suitable range through mixing, and then to achieve a local oscillator with good fractional spurious performance through a phase-locked loop), and is not limited to the device and parameter selection range disclosed in this embodiment.
[0077] Furthermore, the reason why this embodiment achieves 100Hz fractional stepping while having very low fractional spurious noise is as follows: According to formula ②, the VCO output frequency of LMX2594 is F. VCO The reference signal frequency of the LMX2594 is around 174MHz (between 173 and 175MHz). In this embodiment, the decimal denominator of the fractional part uses a constant of 8. Therefore, according to formula ②: F REF*(F / 8)≈(21.75*F)MHz, and the value of F ranges from 1 to 7, so the range of fractional steps is approximately 21.75MHz to 152.25MHz. Since the loop filter bandwidth of the LMX2594 is 100kHz, the LMX2594's loop filter can effectively filter out fractional step spurious signals. This achieves both fractional step functionality and low fractional step spurious signals. In contrast, if a small step is implemented solely by a PLL, its F... REF The value of *(F / DEN) lies within the loop bandwidth of its integrated phase-locked loop, which introduces a large fractional step spurious signal. This application utilizes a DDS synthesizer to achieve small steps, thus reducing the fractional step spurious signal. REF The value of *(F / DEN) is much larger than the loop bandwidth of the integrated phase-locked loop, thus effectively suppressing fractional step spurious signals.
[0078] Secondly, a method for minimizing step local oscillator input includes a reference signal source, such as... Figure 3 As shown, it also includes the following steps:
[0079] S110: The DDS synthesizer 2 receives the signal output by the reference signal source 1 and outputs a first output signal with a lower frequency.
[0080] S120: Filter the first output signal to obtain the first signal to be mixed;
[0081] S210: Frequency multiplier 4 receives the signal output by the reference signal source 1 and outputs a second output signal with a higher frequency;
[0082] S220: Filter the second output signal to obtain the second signal to be mixed;
[0083] S310: Mix the first signal to be mixed and the second signal to be mixed to obtain a mixed signal;
[0084] S320: Filter the mixing signal to obtain the phase-locked loop reference signal;
[0085] S330: Phase-locked loop module 8 receives the phase-locked loop reference signal and outputs the local oscillator signal.
[0086] Steps S110-S120 and S210-S220 are parallel and do not have a specific order. The first output signal having a lower frequency means its frequency is lower than the output signal of the reference signal source, and the second output signal having a higher frequency means its frequency is higher than the output signal of the reference signal source. The phase-locked loop reference signal is the signal used as a reference input for the phase-locked loop module.
[0087] In one embodiment, such as Figure 4 As shown, the method for minimizing step local oscillator movement further includes the following steps:
[0088] S340: Divide and output the local oscillator signal.
[0089] By dividing the local oscillator signal output by the phase-locked loop module, spurious signals can be further suppressed, and the output phase noise performance of the phase-locked loop module can be improved.
[0090] In one embodiment, the reference signal source 1 includes a temperature-controlled crystal oscillator 11 and a power divider 12;
[0091] like Figure 4 As shown, the method for minimizing step local oscillator movement further includes the following steps before steps S110 and S210:
[0092] S010: The power divider 12 splits the output signal of the isothermal crystal oscillator 11 into two paths, one of which serves as the reference signal for the DDS synthesizer 2, and the other serves as the input signal for the frequency multiplier 4.
[0093] The reference signal source outputs two signals: one is input to the DDS synthesizer as a reference signal, and the other is input to the frequency multiplier. The reference signal source can be configured using two separate temperature-controlled crystal oscillators, or it can be a combination of a temperature-controlled crystal oscillator and a power divider to split the output signal of the temperature-controlled crystal oscillator into two outputs.
[0094] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.
[0095] The embodiments described above are merely illustrative of several implementations of the present invention, and while the descriptions are specific and detailed, they should not be construed as limiting the scope of the invention. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of the present invention, and these modifications and improvements all fall within the scope of protection of the present invention. Therefore, the scope of protection of the present invention should be determined by the appended claims.
Claims
1. A very small step-tuned local oscillator device, characterized by Comprising: a reference signal source; a DDS synthesizer for receiving an output signal of the reference signal source and outputting a first output signal with a lower frequency; a first filter for filtering the first output signal to obtain a first mixing signal; a frequency multiplier for receiving an output signal of the reference signal source and outputting a second output signal with a higher frequency; a second filter for filtering the second output signal to obtain a second mixing signal; a mixer for mixing the first mixing signal and the second mixing signal to obtain a mixed signal; a third filter for filtering the mixed signal to obtain a phase-locked loop reference signal; a phase-locked loop module for receiving the phase-locked loop reference signal and outputting a local oscillator signal; the reference signal source comprises: a constant temperature crystal oscillator; a power divider for dividing an output signal of the constant temperature crystal oscillator into two paths, one of which is used as a reference signal of the DDS synthesizer, and the other of which is used as an input signal of the frequency multiplier, the DDS outputting a low frequency signal of 25-27MHz, and the frequency multiplier outputting a high frequency signal of 200MHz.
2. The extremely small step local oscillator device according to claim 1, further comprising: a frequency divider for dividing the local oscillator signal to further suppress spurs.
3. The extremely small step local oscillator device according to claim 1, wherein: the first filter, the second filter and the third filter are SAW filters. Comprising a reference signal source, further comprising the following steps:
4. A method of very small step frequency synthesizing, characterized by a DDS synthesizer receiving a signal output by the reference signal source and outputting a first output signal with a lower frequency; filtering the first output signal to obtain a first mixing signal; a frequency multiplier receiving a signal output by the reference signal source and outputting a second output signal with a higher frequency; filtering the second output signal to obtain a second mixing signal; mixing the first mixing signal and the second mixing signal to obtain a mixed signal; filtering the mixed signal to obtain a phase-locked loop reference signal; a phase-locked loop module receiving the phase-locked loop reference signal and outputting a local oscillator signal. further comprising the following steps:
5. A method of generating a very small step size for a local oscillator as claimed in claim 4, wherein, dividing the local oscillator signal to further suppress spurs.
6. The extremely small step local oscillator method according to claim 4, wherein: the reference signal source comprises a constant temperature crystal oscillator and a power divider; the extremely small step local oscillator method further comprises the following steps: the power divider divides an output signal of the constant temperature crystal oscillator into two paths, one of which is used as a reference signal of the DDS synthesizer, and the other of which is used as an input signal of the frequency multiplier.
Citation Information
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