Method, computer system and medium for inverse lithography mask optimization based on GPU acceleration level set

Abstract

Method, computer system and medium for inverse lithography mask optimization based on GPU acceleration of level set. To solve the problem of mask optimization, perform FFT operations on the obtained mask image and convolution kernel respectively to obtain the corresponding FFT results, then perform lithography model calculations through FFT to obtain the lithography results, reduce the error between the lithography target and the lithography results through the GPU optimization function, and optimize the lithography results through the GPU gradient function. The effect is to achieve high efficiency of the lithography acceleration model algorithm.

Description

Technical Field

[0001] The present invention belongs to the field of integrated circuits, and relates to a method, a computer system and a medium for inverse lithography mask optimization based on GPU-accelerated level set. Background Art

[0002] As the feature size of integrated circuit processes continues to decrease, existing manufacturing technologies face great challenges. Since the graphic size of the circuit is close to the wavelength of the light source used in the lithography process, interference effects will inevitably occur, resulting in lithography pattern distortion and thus affecting the production capacity of integrated circuit manufacturing. The application of resolution enhancement technology is a key step in improving production capacity. Optical proximity correction is the most core resolution enhancement technology. During the optical proximity correction process, the patterns on the mask to be processed are adjusted to compensate for the effects of optical scattering. The first category is the design rule-based method, which is characterized by simple application and fast speed and can handle simple designs well. However, the design rules for large-scale designs at advanced technology nodes increase exponentially, so the quality of mask optimization by design rule-based methods is limited. Another is the model-based method, which has a huge solution space, so it is very time-consuming to obtain a high-quality result. With the increasing complexity of circuit designs, both the above design rule-based and model-based methods will face problems of efficiency or output quality. Summary of the Invention

[0003] To solve the problem of mask optimization and overcome the present invention, the following technical solutions are proposed: A method for inverse lithography mask optimization based on GPU-accelerated level set, including

[0004] Reading the target image of the original lithography mask and obtaining the mask boundary through pixel-level parallel movement processing,

[0005] Obtaining a level set mask by parallel computing of all boundaries through GPU,

[0006] Performing FFT operations on the obtained mask image and convolution kernel respectively to obtain corresponding FFT results, and then performing lithography model calculations through FFT to obtain lithography results,

[0007] Reducing the error between the lithography target and the lithography result through the GPU optimization function,

[0008] Optimizing the lithography result through the GPU gradient function.

[0009] As a supplement to the technical solution, the method for inverse lithography mask optimization based on GPU-accelerated level set further includes the step of updating the level set mask.

[0010] As a supplement to the technical solution, the level set lithography mask representation:

[0011]

[0012] C represents the boundary of the photolithography mask, φ(x, y) represents the corresponding level set function, x and y represent the pixel coordinates in the image, inside represents inside the boundary, and outside represents outside the boundary.

[0013] As a supplement to the technical solution, the GPU optimization function:

[0014]

[0015] x and y represent the pixel coordinates in the image, Z represents the mask image generated by the GPU algorithm, Zt represents the target image of the photolithography mask, γ represents the correlation index, and N represents the width and height of the picture.

[0016] As a supplement to the technical solution, as a supplement to the technical solution, as a supplement to the technical solution, as a supplement to the technical solution, as a supplement to the technical solution, the GPU gradient function:

[0017]

[0018] M represents the mask image, Z represents the photolithography result generated by the GPU, Zt represents the target image, γ is a parameter, θ z is the slope of the sigmoid function, H flip is the 180-degree flip of the convolution kernel, H is the convolution kernel, represents the convolution operation, H represents the convolution kernel, and ⊙ represents the dot product operation.

[0019] As a supplement to the technical solution, the level set update:

[0020]

[0021] where φ i+1 (x, y) represents the updated level set function, i represents the i-th update, Δt represents the update step size, and t represents time.

[0022] As a supplement to the technical solution, the fast Fourier transform FFT program written by computing the unified device architecture programming model CUDA directly calls the computing resources of the GPU.

[0023] As a supplement to the technical solution, the CUFFT library developed by nvidia is used for the FFT operation.

[0024] A computer system, comprising:

[0025] A processor;

[0026] And a memory,

[0027] Among them, computer instructions are stored in the memory, and the processor executes the computer instructions to implement the steps of any one of the methods.

[0028] A computer-readable storage medium stores computer instructions thereon. When the computer instructions are executed by a processor, the steps of any one of the methods are implemented.

[0029] The beneficial effects of the present invention are:

[0030] The present invention designs a method for optimizing inverse lithography masks by using GPU-accelerated level sets. It has the following characteristics:

[0031] 1. The lithography acceleration model algorithm is highly efficient;

[0032] 2. It supports GPU operation, greatly accelerating the operation efficiency of inverse lithography masks. Description of the Drawings

[0033] Figure 1 It is a diagram of the optimization result. Detailed Embodiments

[0034] The following disclosure provides many different embodiments or examples for implementing different features of the present case. The following disclosure describes specific examples of the arrangement of each component to simplify the description. Of course, these specific examples are not intended to limit. For example, if the specification of the present invention describes that a first feature is formed on or above a second feature, it means that it may include an embodiment in which the above first feature and the above second feature are in direct contact, and may also include an embodiment in which additional features are formed between the above first feature and the above second feature, so that the above first feature and the second feature may not be in direct contact. In addition, the same reference signs and / or marks may be reused in different examples in the following disclosure. These repetitions are for the purpose of simplicity and clarity, and are not intended to limit a specific relationship between the different embodiments and / or structures discussed.

[0035] The lithography process is the most important manufacturing process in the modern ultra-large-scale integrated circuit manufacturing process, that is, an important means to transfer the design pattern of the integrated circuit on the mask to the silicon wafer through a lithography machine. When the design pattern of the integrated circuit on the mask is imaged on the silicon wafer through the projection objective lens of the lithography machine, as the feature size of the pattern on the mask becomes smaller, the diffraction phenomenon of light becomes gradually significant.

[0036] Inverse lithography technology (ILT) takes the pattern to be realized on a silicon wafer (wafer) as the target, and through complex inverse mathematical calculations, an ideal mask design pattern (usually a grayscale pattern or a so-called pixel-based mask pattern) is obtained. Subsequently, through operations such as simplification and extraction, the final polygon-based mask design pattern is obtained.

[0037] Current large-scale integrated circuits are generally manufactured using a lithography system. The lithography system is mainly divided into four parts: an illumination system (light source), a mask, a projection system, and a wafer. The light emitted by the light source is focused by a condenser lens and then incident on the mask. The open part of the mask is transparent; after passing through the mask, the light is incident on the wafer through the projection system; in this way, the mask pattern is replicated on the wafer.

[0038] As the lithography technology node enters 45nm - 22nm, the critical dimensions of the circuit are much smaller than the wavelength of the light source. Therefore, the interference and diffraction phenomena of light are more significant, resulting in distortion of the pattern projected from the photomask onto the silicon wafer, and even causing pattern distortion beyond the acceptable range. Typical effects include: line end shortening, rounding, and critical dimension shift, etc. The influence of this optical diffraction distortion is affected by the surrounding pattern environment and is called optical proximity effects (OPE for short).

[0039] To solve such optical proximity effects, it is necessary to pre-correct the designed layout so that the modified amount can exactly compensate for the proximity effects caused by the exposure system. Therefore, using a photomask written with a layout that has undergone optical proximity correction, the originally desired design pattern can be obtained on the wafer. This iterative process of correction is called Optical Proximity Correct (OPC for short). OPC is to improve the influence of optical proximity effects on exposure, so the basic work is to cut and move the layout segment by segment, then iterate continuously, and finally verify with the actual results.

[0040] In one embodiment, the present invention uses a GPU optimization function and a gradient descent algorithm to optimize the mask. Technical term explanations of the present invention:

[0041] 1) Lithography model and inverse lithography technology modeling

[0042] Based on the forward lithography model, a printed pattern can be obtained based on a given mask. This includes two models: the lithography projection model and the photoresist model. The lithography projection model can be described as an operation between the lithography kernel and the mask. The photoresist model determines the actual printed shape by judging whether the transmitted light intensity exceeds the threshold.

[0043] 2) Precise Edge Margin Error

[0044] The distortion of the printed pattern is continuous, and the distorted part of the generated pattern only contains protrusions or depressions. A large number of detection points are inserted on the target pattern contour line, and the vertical distance (perpendicular to the target contour line) between the target contour and the actual printed image at the detection points is calculated. If the sum of the errors exceeds a threshold, then an Edge Placement Error (EPE) violation is considered to occur at this measurement point.

[0045] The EPE value of the printed pattern is the total number of detection points with precise edge margin error on the image. The EPE error function is

[0046]

[0047] F epe = ∑ EPE violations

[0048] where: (x, y): points on the mask plane; D: the vertical distance between the target contour measurement point and the printed picture contour; th EPE : the EPE calculation error threshold; F epe : the EPE error optimization objective function.

[0049] 3) Process Variation Modeling

[0050] To minimize the disturbance effect on the printed pattern when process variations occur. Such disturbances can be measured by the Process Variation Band (PVBand); based on this idea, a penalty term for the process variation band is added to the commonly used optimization objective of minimizing the printed pattern error, in order to achieve the purpose of collaborative optimization, so the optimization objective can be expressed as.

[0051]

[0052] F exact = αF epe + βF pvb

[0053] where: F pvb : the process variation band optimization function; Z k : the printed picture generated under the k-th condition; Z t : the target pattern; N p : the number of different lithography conditions considered; F exact : the total optimization objective function; α, β: the weights of the optimization objective.

[0054] All the expressions involved in the modeling process are continuously differentiable functions, so the general first-order gradient-based algorithm can still be used for iterative solution.

[0055] To solve the optimization problem of masks in advanced processes, inverse lithography technology has begun to be widely used. Inverse lithography technology models the lithography process as an imaging process. By optimizing an objective function to solve the inverse process of this imaging, the optimized mask can be obtained. Different from model-based techniques, the level set inverse lithography technology based on GPU parallel acceleration can greatly accelerate the operation efficiency of the level set algorithm, thus achieving an acceleration effect.

[0056] GPU is a multi-core parallel processor, and the number of processing units far exceeds that of the CPU. Under the general computing model, GPU works as a coprocessor of the CPU, and through reasonable task allocation and decomposition, high-performance computing is completed, thereby accelerating the lithography mask operation process.

[0057] Both design rule-based and model-based methods will face problems of efficiency or output quality. Analytical methods are becoming a new trend. The present invention proposes a method for inverse lithography mask optimization based on GPU-accelerated level set.

[0058] 1) Inverse lithography technology modeling

[0059] According to the forward lithography model, a printed pattern can be obtained based on a given mask. This includes two models: the lithography projection model and the photoresist model. The lithography projection model can be described as the operation between the lithography kernel and the mask.

[0060] 2) Level set lithography mask representation method

[0061]

[0062] C represents the boundary of the lithography mask, φ(x, y) represents the corresponding level set function, x, y represent the pixel coordinates in the image, inside represents inside the boundary, and outside represents outside the boundary.

[0063] 3) GPU optimization function:

[0064]

[0065] x, y represent the pixel coordinates in the image, Z represents the mask image generated by the GPU algorithm, Zt represents the lithography mask target image, and γ represents the relevant index. Usually, γ = 2

[0066] 4) GPU gradient function:

[0067]

[0068] M represents the mask image, Z represents the lithography result generated by the GPU, Zt represents the target image, γ is a parameter, and θ z is the slope of the sigmoid function, H flip is the 180-degree flip of the convolution kernel, H is the convolution kernel, represents the convolution operation.

[0069] 5) Level set update formula:

[0070]

[0071] where φ i+1 (x,y) represents the updated level set function, i represents the i-th update, and Δt represents the update step size.

[0072] Optimization steps:

[0073] Establish a level set through image input. Use the formula in step 2).

[0074] Obtain the gradient in 4) by finding the optimization function in 3), and update the formula in 5).

[0075] The level set formula uses the Newton gradient descent method to obtain the final optimization result.

[0076] The main technical problem to be solved by the present invention is to provide a method for implementing GPU operation to improve the optimization processing speed of the level set lithography mask, which can simply and low-costly implement the function of directly calling the GPU for lithography mask optimization processing.

[0077] To solve the above technical problem, a technical solution adopted by the present invention is: to provide a method for implementing GPU operation to improve the optimization processing speed of the lithography mask, including: reading the target image of the original lithography mask, obtaining the mask boundary through pixel-level parallel movement processing, and then using the GPU to perform parallel calculations on all boundaries to obtain the level set mask.

[0078] And based on the obtained level set mask, perform FFT operations on the obtained mask image and convolution kernel respectively to obtain the FFT results, and then perform lithography model calculations through FFT to obtain the lithography result.

[0079] During this process, the mask is optimized, mainly including:

[0080] Reducing the error between the lithography target and the lithography result through the GPU optimization function,

[0081] Optimizing the lithography result through the GPU gradient function.

[0082] The fast Fourier transform (FFT) program written using the Compute Unified Device Architecture (CUDA) programming model in the present invention directly calls the computing resources of the GPU to perform FFT operations on the obtained mask image and convolution kernel respectively, obtaining the corresponding FFT results, and then performing lithography model calculations through FFT to obtain the final lithography result. The CUFFT library developed by NVIDIA is selected for the said FFT operation.

[0083] Differing from the existing lithography mask algorithms for optical proximity optimization, which are complex in algorithm, have high requirements, high costs, and long operation times, etc., the present invention uses the Compute Unified Device Architecture (CUDA) programming model to write various optimization programs for optical proximity optimization. These programs developed with CUDA can directly call the computing resources of the GPU for relevant calculations while processing mask optimization, without the need to build a complex computing platform, making it very simple and low-cost to implement; at the same time, CUDA is a parallel programming model and software environment. Through CUDA, users can utilize the GPU for general computing, and it is developed using an extended C language, in addition to being able to directly call the computing resources of the GPU.

[0084] As mentioned above, the above is only the preferred specific implementation mode of the present invention, but the protection scope of the present invention is not limited thereto. Any person skilled in the art within the technical scope disclosed by the present invention, according to the technical solution and inventive concept of the present invention, making equivalent substitutions or changes, should be covered within the protection scope of the present invention.

Claims

1. A method for inverse lithography mask optimization based on GPU-accelerated level set, characterized in that, it includes reading the target image of the original lithography mask, and obtaining the mask boundary through pixel-level parallel movement processing, obtaining a level set mask by parallel computing of all boundaries through the GPU, performing FFT operations on the obtained mask image and convolution kernel respectively to obtain corresponding FFT results, and then performing lithography model calculation through FFT to obtain a lithography result, reducing the error between the lithography target and the lithography result through a GPU optimization function, optimizing the lithography result through a GPU gradient function; The method for inverse lithography mask optimization based on GPU-accelerated level set, characterized in that, it further includes the step of updating the level set mask; Level set lithography mask representation: C represents the boundary of the lithography mask, φ(x, y) represents the corresponding level set function, x, y represent pixel coordinates in the image, inside represents inside the boundary, and outside represents outside the boundary; GPU optimization function: x, y represent pixel coordinates in the image, Z represents the mask image generated by the GPU algorithm, Zt represents the lithography mask target image, γ represents a related exponent, and N represents the width and height of the picture; GPU gradient function: M represents the mask image, Z represents the lithography result generated by the GPU, Zt represents the target image, γ is a parameter, θ z is the slope of the sigmoid function, H flip is the 180-degree flip of the convolution kernel, H is the convolution kernel, represents the convolution operation, H represents the convolution kernel, and ⊙ represents the dot product operation; Level set update: where φ i+1 (x, y) represents the updated level set function, i represents the i-th update, Δt represents the update step size, and t represents time; Directly call the computing resources of the GPU through a fast Fourier transform FFT program written in the Compute Unified Device Architecture programming model CUDA.

2. The method for inverse lithography mask optimization based on GPU-accelerated level set according to claim 1, characterized in that, using the CUFFT library developed by nvidia to perform the FFT operation.

3. A computer system, including: a processor; and a memory, wherein, computer instructions are stored in the memory, and the processor executes the computer instructions to implement the steps of the method according to any one of claims 1-2.

4. A computer-readable storage medium, on which computer instructions are stored, and when the computer instructions are executed by a processor, the steps of the method according to any one of claims 1-2 are implemented.

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