A Miniaturized BeiDou-3 Dual-Mode Antenna

Abstract

The present invention discloses a miniaturized Beidou-3 dual-mode antenna, which includes an antenna radome and an antenna box cover. An antenna body and a radio frequency module unit are sequentially arranged in the sealed body formed by the antenna radome and the antenna box cover. The antenna body includes a BD3-B3 antenna body, a BD3-S antenna body, a BD3-L antenna body, and a feed network printed circuit board. The radio frequency module unit includes a BD3-L control circuit, a BD3-L signal amplifier, a BD3-B3 signal low-noise amplifier, a BD3-S signal low-noise amplifier, a radio frequency module unit printed circuit board, and a plurality of signal feed points. An SSMA-K type radio frequency connector is fixedly arranged at the end of the radio frequency module unit. The SSMA-K type radio frequency connector includes a power supply and multiplexing circuit. The miniaturized Beidou-3 dual-mode antenna provided by the present invention has a small volume, is convenient to carry, and has stable signal reception.

Description

Technical Field

[0001] The present invention relates to the technical field of satellite navigation communication, and in particular to a miniaturized Beidou-3 dual-mode antenna. Background Art

[0002] In a modern battlefield, the command headquarters needs to know the position and status of each soldier and issue combat tasks to each soldier. At the same time, soldiers also need to use terminal devices to receive instructions and share some target data within the combat unit. Satellite communication can achieve quasi-real-time communication across all terrains, all weather conditions, and globally. The Beidou navigation system integrates navigation and short message communication functions and can provide navigation and communication functions globally. With the successful networking of Beidou-3 satellites, navigation communication without dead angles can be achieved globally, especially in the Asia-Pacific region. There is an urgent need for a miniaturized single-soldier communication terminal compatible with the Beidou-3 system to realize real-time positioning and the sending and receiving of short messages, ensuring smooth communication between the command headquarters and soldiers under any conditions. Summary of the Invention

[0003] The technical problem to be solved by the present invention is to provide a miniaturized Beidou-3 dual-mode antenna, which is small in size, convenient to carry, and stable in receiving signals.

[0004] To solve the above technical problem, the technical solution adopted by the present invention is: a miniaturized Beidou-3 dual-mode antenna, including an arc-shaped antenna cover and an antenna box cover with a flat top surface. The antenna box cover is fixedly arranged on the antenna cover, and a sealing ring is arranged at the connection between the antenna cover and the antenna box cover. An antenna body and a radio frequency module unit are sequentially arranged in the sealed body formed by the antenna cover and the antenna box cover. The antenna body includes a BD3-B3 antenna body, a BD3-S antenna body, a BD3-L antenna body, and a feed network printed board. The radio frequency module unit includes a BD3-L control circuit, a BD3-L signal amplifier, a BD3-B3 signal low-noise amplifier, a BD3-S signal low-noise amplifier, a radio frequency module unit printed board, and multiple signal feed points. A first shielding cover is fixedly sleeved outside the BD3-L control circuit, and a second shielding cover is fixedly sleeved outside the BD3-L signal amplifier. An SSMA-K type radio frequency connector is fixedly arranged at the end of the radio frequency module unit, and the SSMA-K type radio frequency connector extends out of the sealed body formed by the antenna cover and the antenna box cover. The SSMA-K type radio frequency connector includes a power supply and a multiplexing circuit. The radio frequency module unit and the antenna body are fixedly arranged on the antenna cover, and a hook is fixedly arranged on the top surface of the antenna box cover.

[0005] A further improvement of the technical solution of the present invention lies in that: the antenna box cover is fixedly arranged on the radome through a plurality of first screws, the radio frequency module unit and the antenna body are fixedly arranged on the radome through a plurality of second screws, a hook is fixedly arranged on the top surface of the antenna box cover through a plurality of third screws, and a product label and a product certificate are pasted on the top surface of the antenna box cover.

[0006] A further improvement of the technical solution of the present invention lies in that: the BD3-B3 Beidou signal is received by the BD3-B3 antenna body, the feeding point of the BD3-B3 antenna body is connected to the input end of the BD3-S signal low-noise amplifier, the output end of the BD3-S signal low-noise amplifier is connected to the B3 port of the power supply and multiplexing circuit, the BD3-S Beidou signal is received by the BD3-S antenna body, the feeding point of the BD3-S antenna body is connected to the input end of the BD3-B3 signal low-noise amplifier, the output end of the BD3-B3 signal low-noise amplifier is connected to the S port of the power supply and multiplexing circuit, the L port of the power supply and multiplexing circuit is connected to the input port of the BD3-L signal amplifier, the BD3-L control circuit controls the BD3-L signal amplifier by detecting the power signal after the surface acoustic wave filter in the BD3-L signal amplifier, and the output end of the BD3-L signal amplifier is connected to the BD3-L antenna body to transmit the BD3-L signal.

[0007] A further improvement of the technical solution of the present invention lies in that: the BD3-B3 signal low-noise amplifier includes a low-noise amplifier U6, a dielectric filter U8, a surface acoustic wave filter U9, a surface acoustic wave filter U10, and a low-noise amplifier U11. After the BD3-B3 Beidou signal enters the BD3-B3 signal low-noise amplifier, it is respectively connected to the first end of an inductor L10 and the pin 1 of the dielectric filter U8. The second end of the inductor L10 is grounded. The pins 3, 4, 5, 6, and 7 of the dielectric filter U8 are respectively grounded. The pin 2 of the dielectric filter U8 is respectively connected to the first end of an inductor L17 and the first end of a capacitor C49. The second end of the inductor L17 is grounded. The second end of the capacitor C49 is respectively connected to the first end of a capacitor C58 and the first end of an inductor L12. The second end of the capacitor C58 is grounded. The second end of the inductor L12 is connected to the pin 2 of the low-noise amplifier U6. The pins 0, 1, 3, 4, 5, 6, 10, and 11 of the low-noise amplifier U6 are all respectively grounded. The pin 12 of the low-noise amplifier U6 is connected to the first end of a resistor R5. The second end of the resistor R5 is respectively connected to a VCC-3.3V power supply, the first end of a capacitor C29, the first end of a capacitor C34, the first end of a resistor R9, and the first end of an inductor L11. The second ends of the capacitor C29 and the capacitor C34 are respectively grounded. The pin 8 of the low-noise amplifier U6 is respectively connected to the second end of the resistor R9, the second end of the inductor L11, and the first end of a capacitor C50. The second end of the capacitor C50 is respectively connected to the first end of a capacitor C60, the first end of an inductor L15, and the first end of an inductor L13. The second ends of the capacitor C60 and the inductor L15 are both respectively grounded. The second end of the inductor L13 is respectively connected to the first end of a capacitor C45 and the pin 2 of the surface acoustic wave filter U9. The second end of the capacitor C45 is grounded. The pins 1, 3, 4, and 6 of the surface acoustic wave filter U9 are respectively grounded. The pin 5 of the surface acoustic wave filter U9 is respectively connected to the first end of a capacitor C51 and the first end of a capacitor C47. The second end of the capacitor C47 is grounded. The second end of the capacitor C51 is connected to the first end of a capacitor C52. The second end of the capacitor C52 is connected to the pin 4 of the low-noise amplifier U11. The pins 0, 2, 3, 5, 6, 7, and 8 of the low-noise amplifier U11 are respectively grounded. The pin 1 of the low-noise amplifier U11 is respectively connected to the first end of an inductor L8 and the first end of a capacitor C53. The second end of the inductor L8 is respectively connected to the first end of a capacitor C30, the first end of a capacitor C32, and the first end of a resistor R4. The second ends of the capacitor C30 and C32 are respectively grounded. The second end of the resistor R4 is connected to VCC-3.A 3V power supply, the second end of the capacitor C53 is connected to the first end of the inductor L14, the second end of the inductor L14 is respectively connected to the first end of the capacitor C46 and the pin 2 of the surface acoustic wave filter U10, the second end of the capacitor C46 is grounded, the pins 1, 3, 4 and 6 of the surface acoustic wave filter U10 are respectively grounded, the pin 5 of the surface acoustic wave filter U10 is respectively connected to the first end of the capacitor C42 and the first end of the capacitor C55, the second end of the capacitor C42 is grounded, the second end of the capacitor C55 is respectively connected to the first end of the resistor R10 and the first end of the resistor R11, the second end of the resistor R10 is respectively connected to the first end of the resistor R12 and the first end of the capacitor C54, the second ends of the resistor R11 and the resistor R12 are respectively grounded, and the second end of the capacitor C54 is the output end of the BD3 - B3 Beidou signal.

[0008] A further improvement of the technical solution of the present invention lies in that: the BD3-S signal low-noise amplifier includes a dielectric filter U3, a low-noise amplifier U22, an FBAR filter U1, a surface acoustic wave filter U2, a temperature compensation attenuator U5, a low-noise amplifier U4, and a low-noise amplifier U7. After the BD3-S Beidou signal enters the BD3-S signal low-noise amplifier, it is respectively connected to the first end of a capacitor C24 and the pin 1 of the dielectric filter U3. The second end of the capacitor C24 is grounded. The pins 3, 4, 5, 6, and 7 of the dielectric filter U3 are respectively grounded. The pin 2 of the dielectric filter U3 is respectively connected to the first end of a capacitor C11 and the first end of a capacitor C23. The second end of the capacitor C23 is grounded. The second end of the capacitor C11 is connected to the first end of an inductor L4. The second end of the inductor L4 is respectively connected to the first end of a capacitor C12 and the first end of a capacitor C26. The second end of the capacitor C26 is grounded. The second end of the capacitor C12 is connected to the pin 2 of the low-noise amplifier U22. The pins 0, 1, 3, 7, 9, 10, and 11 of the low-noise amplifier U22 are respectively grounded. The pin 12 of the low-noise amplifier U22 is connected to the first end of a resistor R2. The second end of the resistor R2 is respectively connected to the VCC-3.3V power supply, the first end of a capacitor C1, the first end of a capacitor C5, and the first end of an inductor L1. The second ends of the capacitor C1 and the capacitor C5 are respectively grounded. The second end of the inductor L1 is respectively connected to the pin 8 of the low-noise amplifier U22, the first end of a capacitor C25, and the first end of a capacitor C13. The second end of the capacitor C25 is grounded. The second end of the capacitor C13 is respectively connected to the first end of a resistor R3 and the first end of an inductor L5. The second end of the resistor R3 is grounded. The second end of the inductor L5 is respectively connected to the pin 2 of the FBAR filter U1 and the first end of a capacitor C9. The second end of the capacitor C9 is grounded. The pins 1, 3, 4, and 6 of the FBAR filter U1 are respectively grounded. The pin 5 of the FBAR filter U1 is respectively connected to the first end of a capacitor C7 and the first end of a capacitor C8. The second end of the capacitor C7 is grounded. The second end of the capacitor C8 is connected to the first end of a capacitor C14. The second end of the capacitor C14 is connected to the pin 4 of the low-noise amplifier U7. The pins 0, 2, 3, 5, 6, 7, and 8 of the low-noise amplifier U7 are respectively grounded. The pin 1 of the low-noise amplifier U7 is respectively connected to the first end of an inductor L2 and the first end of a capacitor C18. The second end of the inductor L2 is respectively connected to the first end of a capacitor C3, the first end of a capacitor C6, and the first end of a resistor R34. The second end of the resistor R34 is connected to VCC-3.3V power supply, the second ends of the capacitor C3 and the capacitor C6 are respectively grounded, the second end of the capacitor C18 is connected to the first end of the capacitor C19, the second end of the capacitor C19 is respectively connected to the first end of the capacitor C17 and the pin 2 of the surface acoustic wave filter U2, the second end of the capacitor C17 is grounded, the pins 1, 3, 4 and 6 of the surface acoustic wave filter U2 are respectively grounded, the pin 5 of the surface acoustic wave filter U2 is respectively connected to the first ends of the capacitor C15 and the capacitor C16, the second end of the capacitor C15 is grounded, the second end of the capacitor C16 is connected to the pin 1 of the temperature compensation attenuator U5, the pin 3 of the temperature compensation attenuator U5 is grounded, the pin 2 of the temperature compensation attenuator U5 is connected to the first end of the capacitor C20, the second end of the capacitor C20 is connected to the pin 4 of the low-noise amplifier U4, the pins 0, 2, 3, 5, 6, 7 and 8 of the low-noise amplifier U4 are respectively grounded, the pin 1 of the low-noise amplifier U4 is respectively connected to the first end of the inductor L3 and the first end of the capacitor C22, the second end of the inductor L3 is respectively connected to the first ends of the capacitor C2, the capacitor C4 and the resistor R1, the second ends of the capacitor C2 and the capacitor C4 are respectively grounded, the second end of the resistor R1 is connected to the VCC-3.3V power supply, and the second end of the capacitor C22 is the output end of the BD3-S Beidou signal.

[0009] A further improvement of the technical solution of the present invention lies in that: the power supply and multiplexing circuit includes a linear voltage regulator W2 responsible for supplying power to the BD3-B3 signal low-noise amplifier and the BD3-S signal low-noise amplifier, a power splitter 4, and a power splitter 5. The BD3-L signal is respectively connected to one end of a capacitor C33 and pin 7 of the power splitter 5. Pins 0, 1, 3, 4, 5, 6, 8, 10, 11, and 12 of the power splitter 5 are grounded. The BD3-S Beidou signal output terminal is respectively connected to pin 9 of the power splitter 5 and the first end of a capacitor C43. The second end of the capacitor C43 is grounded. Pin 2 of the power splitter 5 is respectively connected to the first end of a capacitor C40 and the first end of a capacitor C37. The second end of the capacitor C40 is grounded. The second end of the capacitor C37 is respectively connected to pin 9 of the power splitter 4 and the first end of a capacitor C41. The second end of the capacitor C41 is grounded. The BD3-B3 Beidou signal output terminal is respectively connected to the first end of a capacitor C31 and pin 7 of the power splitter 4. The second end of the capacitor C31 is grounded. Pins 0, 1, 3, 4, 5, 6, 8, 10, 11, and 12 of the power splitter 4 are respectively grounded. Pin 2 of the power splitter 4 is respectively connected to the first end of a capacitor C35 and the first end of a capacitor C38. The second end of the capacitor C38 is grounded. The second end of the capacitor C35 is respectively connected to the first end of a resistor R6 and the first end of a resistor R7. The second end of the resistor R6 is respectively connected to the first end of a resistor R8, the first end of a capacitor C36, and the first end of a capacitor C39. The second ends of the resistor R7, the resistor R8, and the capacitor C39 are respectively grounded. The second end of the capacitor C36 is respectively connected to the first end of an inductor L9 and the COM common port of an SSMA-K type RF connector. The second end of the inductor L9 is respectively connected to the first end of a capacitor C44, the first end of a capacitor C56, the first end of a capacitor C59, a VCC-5V power supply, the first end of a capacitor C62, the first end of a capacitor C67, pin 1 and pin 3 of the linear voltage regulator W2. The second ends of the capacitor C44, the capacitor C56, the capacitor C59, the capacitor C62, the capacitor C67, and pin 2 of the linear voltage regulator W2 are respectively grounded. Pin 4 of the linear voltage regulator W2 is connected to the first end of a capacitor C69. The second end of the capacitor C69 is grounded. Pin 5 of the linear voltage regulator W2 is respectively connected to the first end of a capacitor C70, the first end of a capacitor C73, the first end of a capacitor C74, and a VCC-3.3V power supply. The second ends of the capacitor C70, the capacitor C73, and the capacitor C74 are respectively grounded.

[0010] A further improvement of the technical solution of the present invention lies in that: the BD3-L signal amplifier includes a power amplifier U12, a surface acoustic wave filter U13, an amplifier U15, an amplifier U16, a temperature compensation attenuator U17, a dielectric filter U21, and a linear voltage regulator W1. After the BD3-L signal enters the BD3-L signal amplifier, it is connected to the first end of a capacitor C57. The second end of the capacitor C57 is connected to the first end of a capacitor C84. The second end of the capacitor C84 is respectively connected to the first end of a capacitor C91 and the pin 2 of the surface acoustic wave filter U13. The pin 1, pin 3, pin 4, and pin 6 of the surface acoustic wave filter U13 are respectively grounded. The pin 5 of the surface acoustic wave filter U13 is respectively connected to the first end of a capacitor C90 and the first end of a capacitor C83. The second end of the capacitor C90 is grounded. The second end of the capacitor C83 is respectively connected to the first end of a capacitor C88 and the first end of a resistor R18. The second end of the resistor R18 is connected to the power signal input terminal L2 of the BD3-L control circuit. The second end of the capacitor C88 is connected to the pin 1 of the amplifier U16. The pin 2 of the amplifier U16 is grounded. The pin 3 of the amplifier U16 is respectively connected to the first end of an inductor L19 and the first end of a capacitor C82. The second end of the inductor L19 is respectively connected to the first end of a capacitor C78, the first end of a capacitor C81, and the VEN terminal of the BD3-L control circuit. The second ends of the capacitor C78 and the capacitor C81 are respectively grounded. The second end of the capacitor C82 is respectively connected to the first end of a resistor R17 and the first end of a resistor R19. The second end of the resistor R17 is respectively connected to the first end of a resistor R20 and the pin 1 of the temperature compensation attenuator U17. The second ends of the resistor R19 and the resistor R20 are respectively grounded. The pin 3 of the temperature compensation attenuator U17 is grounded. The pin 2 of the temperature compensation attenuator U17 is connected to the first end of a capacitor C86. The second end of the capacitor C86 is connected to the pin 1 of the amplifier U15. The pin 2 of the amplifier U15 is grounded. The pin 3 of the amplifier U15 is respectively connected to the first end of an inductor L18 and the first end of a capacitor C85. The second end of the inductor L18 is respectively connected to the first end of a capacitor C77, the first end of a capacitor C80, and the VEN terminal of the BD3-L control circuit. The second ends of the capacitor C77 and the capacitor C80 are respectively grounded. The second end of the capacitor C85 is connected to the first end of a capacitor C87. The second end of the capacitor C87 is connected to the pin 3 of the power amplifier U12. The pin 0, pin 1, pin 2, pin 4, pin 5, pin 7, pin 9, pin 10, pin 12, and pin 15 of the power amplifier U12 are respectively grounded. The pin 6 and pin 8 of the power amplifier U12 are left vacant. The pin 14 of the power amplifier U12 is connected to the first end of a capacitor C75, the first end of a capacitor C71, the first end of a capacitor C68, and the VCC-5V power supply.The second ends of the capacitor C75, the capacitor C71, and the capacitor C68 are respectively grounded. The pin 16 of the power amplifier U12 is respectively connected to the first end of the capacitor C79, the first end of the capacitor C72, the first end of the resistor R14, and the first end of the resistor R13. The second ends of the capacitor C79, the capacitor C72, and the resistor R14 are respectively grounded. The second end of the resistor R13 is respectively connected to the first end of the capacitor C63, the first end of the capacitor C64, and the pin 5 of the linear voltage regulator W1. The second ends of the capacitor C63, the capacitor C64, and the pin 2 of the linear voltage regulator W1 are respectively grounded. The pin 4 of the linear voltage regulator W1 is connected to the first end of the capacitor C61, and the second end of the capacitor C61 is grounded. The pin 1 of the linear voltage regulator W1 is respectively connected to the first end of the capacitor C65, the first end of the capacitor C66, and the VEN end of the BD3-L control circuit. The pin 3 of the linear voltage regulator W1 is connected to the VEN end of the BD3-L control circuit. The second ends of the capacitor C65 and the capacitor C66 are respectively grounded. The pin 11 of the power amplifier U12 is connected to the first end of the capacitor C89. The second end of the capacitor C89 is respectively connected to the first end of the capacitor C109 and the pin 1 of the dielectric filter U21. The pin 0 of the dielectric filter U21 is grounded. The pin 2 of the dielectric filter U21 is respectively connected to the first end of the capacitor C108 and the BD3-L Beidou signal output end. The second end of the capacitor C108 is grounded.,

[0011] A further improvement of the technical solution of the present invention lies in that: the BD3-L control circuit includes a logarithmic detector U20, a voltage comparator U18, a triode U14, a triode U19, a diode D1, and a PMOS switch tube D2. The power signal input terminal L2 is connected to the first end of a capacitor C95. The second end of the capacitor C95 is respectively connected to the first end of a resistor R32 and the first end of a resistor R33. The second end of the resistor R32 is grounded. The second end of the resistor R33 is respectively connected to the first end of a resistor R31 and the first end of a capacitor C94. The second end of the resistor R31 is grounded. The second end of the capacitor C94 is connected to pin 6 of the logarithmic detector U20. Pin 2 and pin 5 of the logarithmic detector U20 are grounded. Pin 1 and pin 4 of the logarithmic detector are respectively connected to the first end of a capacitor C106, the first end of a capacitor C107, and the VCC-5V power supply. The second end of the capacitor C106 and the second end of the capacitor C107 are respectively grounded. Pin 3 of the logarithmic detector U20 is connected to the first end of a resistor R30. The second end of the resistor R30 is respectively connected to the first end of a resistor R28 and the first end of a resistor R27. The second end of the resistor R28 is connected to a resistor R29 and then grounded. The second end of the resistor R27 is connected to pin 1 of the voltage comparator U18. Pin 2 of the voltage comparator U18 is grounded. Pin 3 of the voltage comparator U18 is respectively connected to the first end of a resistor R22 and the first end of a resistor R23. The second end of the resistor R22 is connected to the first end of a resistor R15. The second end of the resistor R15 is grounded. The second end of the resistor R23 is connected to the first end of a resistor R24. The second end of the resistor R24 is connected to the VCC-5V power supply. Pin 4 of the voltage comparator U18 is respectively connected to the first end of a resistor R21 and the first end of a resistor R26. Pin 5 of the voltage comparator U18 is respectively connected to the second end of the resistor R26, the first end of a capacitor C92, the first end of a capacitor C93, and the VCC-5V power supply. The second end of the capacitor C92 and the second end of the capacitor C93 are respectively grounded. The second end of the resistor R21 is respectively connected to the first end of a resistor R16 and the base of the triode U14. The emitter of the triode U14 is grounded. The collector of the triode U14 is respectively connected to the first end of a resistor R25, the base of the triode U19, and the positive electrode of the diode D1. The collector of the triode U19 is respectively connected to the second end of the resistor R25 and the VCC-5V power supply. The emitter of the triode U19 is connected to the negative electrode of the diode D1 and the G pole of the PMOS switch tube D2. The S pole of the PMOS switch tube D2 is connected to the VCC-5V power supply. The D pole of the PMOS switch tube D2 is connected to the VEN terminal of the BD3-L control circuit.

[0012] Due to the adoption of the above technical solution, the technical progress achieved by the present invention is:

[0013] 1. Through the design of the top hook on the antenna box cover, the present invention realizes the integration of the active antenna and the individual soldier, enabling the soldier to carry the active antenna with him / her at any time, greatly reducing the dependence on external antennas, allowing the individual soldier to communicate with the command center at any time and place, achieving two-way transmission of the battlefield situation between the command center and the combat terminal, and greatly improving the individual combat ability;

[0014] 2. The receiving link of the present invention improves the link rectangularity coefficient through a multi-stage series filter, effectively solving the electromagnetic compatibility problem. The design of the dielectric filter realizes the transceiver isolation, improves the stability and reliability of the product, and the design of the surface acoustic wave filter improves the out-of-band rejection ability and enhances the anti-interference ability;

[0015] 3. The present invention realizes miniaturization and improves portability through the design of the RF connector. The RF connector is of the SSMA-K type. The inside of the RF connector flange is designed to be directly welded and fixed on the printed circuit board, realizing electrical interconnection and ensuring reliable grounding. At the same time, the fixation of the RF connector is realized. Through the one-line-through design, the common transmission of three RF signals and electrical signals is realized, reducing the connection ports. The outside of the connector is designed with a circular flange and a sealing ring, and a sealing ring is provided at the connection between the radome and the antenna box cover to achieve watertightness, enabling the product to work normally in rainy days;

[0016] 4. Through the common design of the antenna body reflector and the RF ground (GND), the present invention effectively reduces the height of the product, realizes the miniaturization of the product, and the overall design is a top arc design, a bottom flat design, and a vertical plane chamfer design, improving the aesthetics of the product;

[0017] 5. Through the broadband design of the passive antenna and the RF circuit, the present invention realizes the compatibility with the Beidou-3 function, improves the expandability of the product, and can be applied to various platforms with the construction of Beidou-3. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] Figure 1 is the external shape diagram of the dual-mode antenna of the present invention;

[0019] Figure 2 is the structural schematic diagram of the dual-mode antenna of the present invention;

[0020] Figure 3 is the schematic diagram of the RF module unit in the dual-mode antenna of the present invention;

[0021] Figure 4 is the principle block diagram of the dual-mode antenna of the present invention;

[0022] Figure 5 is the schematic diagram of the BD3-B3 signal low-noise amplifier in the present invention;

[0023] Figure 6 is the schematic diagram of the BD3-S signal low-noise amplifier in the present invention;

[0024] Figure 7 is the schematic diagram of the multiplexing and combining circuit in the present invention;

[0025] Figure 8 is the schematic diagram of the BD3-L signal amplification circuit in the present invention;

[0026] Figure 9 is the schematic diagram of the BD3-L control circuit in the present invention;

[0027] Among them, 1. radome, 2. antenna body, 3. RF module unit, 3-1. printed circuit board of RF module unit, 3-2. signal feed point, 4. second screw, 5. first shielding cover, 6. second shielding cover, 7. sealing ring, 8. antenna box cover, 9. first screw, 10. hook, 11. third screw, 12. SSMA-K type RF connector, 13. product label, 14. product certificate, 15. BD3-B3 antenna body, 16. BD3-S antenna body, 17. BD3-L antenna body, 18. BD3-L control circuit, 19. BD3-L signal amplifier, 20. BD3-B3 signal low-noise amplifier, 21. BD3-S signal low-noise amplifier, 22. power supply and multiplexing circuit. Specific embodiments

[0028] The present invention will be further described in detail below in conjunction with embodiments:

[0029] As Figure 1 shown is the external view of the dual-mode antenna of the present invention. The present invention has a diameter of 65 mm and a height ≤ 38 mm, and the height without the hook is 26 mm. The SSMA-K type RF connector 12 is used and connected to the handheld terminal through a RF cable. The hook facilitates the soldier to hang the device of the present invention on the shoulder strap or backpack.

[0030] As Figure 2 and Figure 3Shown: A miniaturized Beidou-3 dual-mode antenna, including an arc-shaped radome 1 and an antenna box cover 8 with a flat top surface. The antenna box cover 8 is fixedly arranged on the radome 1 through a plurality of first screws 9. A sealing ring 7 is arranged at the connection between the radome 1 and the antenna box cover 8. An antenna body 2 and a radio frequency module unit 3 are sequentially arranged in the sealed body formed by the radome 1 and the antenna box cover 8. The radio frequency module unit 3 and the antenna body 2 are fixedly arranged on the radome 1 through a plurality of second screws 4. The antenna body 2 includes a BD3-B3 antenna body 15, a BD3-S antenna body 16, a BD3-L antenna body 17 and a feed network printed circuit board. The radio frequency module unit 3 includes a BD3-L control circuit 18, a BD3-L signal amplifier 19, a BD3-B3 signal low-noise amplifier 20, a BD3-S signal low-noise amplifier 21, a radio frequency module unit printed circuit board 3-1 and a plurality of signal feed points 3-2. The radio frequency module unit printed circuit board 3-1 carries the BD3-L control circuit 18 of the present invention. A first shielding cover 5 is fixedly sleeved outside the BD3-L control circuit 18. Through the design of the first shielding cover 5, external signals are prevented from interfering with the operation of the BD3-L control circuit 18. A second shielding cover 6 is fixedly sleeved outside the BD3-L signal amplifier 19. Through the design of the second shielding cover 6, external signals are prevented from interfering with the normal operation of the circuit of the BD3-L signal amplifier 19. An SSMA-K type radio frequency connector 12 is fixedly arranged at the end of the radio frequency module unit 3. The SSMA-K type radio frequency connector 12 extends out of the sealed body formed by the radome 1 and the antenna box cover 8. The SSMA-K type radio frequency connector 12 includes a power supply and multiplexing circuit 22. The radio frequency module unit 3 and the antenna body 2 are fixedly arranged on the radome 1. A hook 10 is fixedly arranged on the top surface of the antenna box cover 8 through a plurality of third screws 11. A product label 13 and a product certificate 14 are pasted on the top surface of the antenna box cover 8.

[0031] As Figure 4This is the principle block diagram of the dual-mode antenna of the present invention: The BD3-B3 Beidou signal is received by the BD3-B3 antenna body 15. The feeding point of the BD3-B3 antenna body 15 is connected to the input end of the BD3-S signal low-noise amplifier 21. The output end of the BD3-S signal low-noise amplifier 21 is connected to the B3 port of the power supply and multiplexing circuit 22. The BD3-S Beidou signal is received by the BD3-S antenna body 16. The feeding point of the BD3-S antenna body 16 is connected to the input end of the BD3-B3 signal low-noise amplifier 20. The output end of the BD3-B3 signal low-noise amplifier 20 is connected to the S port of the power supply and multiplexing circuit 22. The L port of the power supply and multiplexing circuit 22 is connected to the input port of the BD3-L signal amplifier 19. The BD3-L control circuit 18 controls the BD3-L signal amplifier 19 by detecting the power signal after the surface acoustic wave filter in the BD3-L signal amplifier 19. The output end of the BD3-L signal amplifier 19 is connected to the BD3-L antenna body 17 to transmit the BD3-L signal.

[0032] As Figure 5 shown: The BD3-B3 signal low-noise amplifier 20 includes a low-noise amplifier U6, a dielectric filter U8, a surface acoustic wave filter U9, a surface acoustic wave filter U10, and a low-noise amplifier U11. U8 is a dielectric filter MC2A1268F36FCB, which preselects and filters the low-noise amplifier link; U6 is a low-noise amplifier GRF2051DS, which performs the first-stage low-noise amplification; U9 and U10 are surface acoustic wave filters TA0862A, which perform frequency selection filtering on the low-noise amplifier link; U11 is an SGL0622Z, which performs the second-stage gain amplification on the low-noise amplifier link;

[0033] The BD3-B3 Beidou signal, after entering the BD3-B3 signal low-noise amplifier 20, is respectively connected to the first end of the inductor L10 and the pin 1 of the dielectric filter U8. The second end of the inductor L10 is grounded. The pins 3, 4, 5, 6, and 7 of the dielectric filter U8 are respectively grounded. The pin 2 of the dielectric filter U8 is respectively connected to the first end of the inductor L17 and the first end of the capacitor C49. The second end of the inductor L17 is grounded. The second end of the capacitor C49 is respectively connected to the first end of the capacitor C58 and the first end of the inductor L12. The second end of the capacitor C58 is grounded. The second end of the inductor L12 is connected to the pin 2 of the low-noise amplifier U6. The pins 0, 1, 3, 4, 5, 6, 10, and 11 of the low-noise amplifier U6 are respectively grounded. The pin 12 of the low-noise amplifier U6 is connected to the first end of the resistor R5. The second end of the resistor R5 is respectively connected to the VCC-3.3V power supply, the first end of the capacitor C29, the first end of the capacitor C34, the first end of the resistor R9, and the first end of the inductor L11. The second ends of the capacitor C29 and the capacitor C34 are respectively grounded. The pin 8 of the low-noise amplifier U6 is respectively connected to the second end of the resistor R9, the second end of the inductor L11, and the first end of the capacitor C50. The second end of the capacitor C50 is respectively connected to the first end of the capacitor C60, the first end of the inductor L15, and the first end of the inductor L13. The second ends of the capacitor C60 and the inductor L15 are respectively grounded. The second end of the inductor L13 is respectively connected to the first end of the capacitor C45 and the pin 2 of the surface acoustic wave filter U9. The second end of the capacitor C45 is grounded. The pins 1, 3, 4, and 6 of the surface acoustic wave filter U9 are respectively grounded. The pin 5 of the surface acoustic wave filter U9 is respectively connected to the first end of the capacitor C51 and the first end of the capacitor C47. The second end of the capacitor C47 is grounded. The second end of the capacitor C51 is connected to the first end of the capacitor C52. The second end of the capacitor C52 is connected to the pin 4 of the low-noise amplifier U11. The pins 0, 2, 3, 5, 6, 7, and 8 of the low-noise amplifier U11 are respectively grounded. The pin 1 of the low-noise amplifier U11 is respectively connected to the first end of the inductor L8 and the first end of the capacitor C53. The second end of the inductor L8 is respectively connected to the first end of the capacitor C30, the first end of the capacitor C32, and the first end of the resistor R4. The second ends of the capacitor C30 and C32 are respectively grounded. The second end of the resistor R4 is connected to the VCC-3.A 3V power supply, the second end of the capacitor C53 is connected to the first end of the inductor L14, the second end of the inductor L14 is respectively connected to the first end of the capacitor C46 and the pin 2 of the surface acoustic wave filter U10, the second end of the capacitor C46 is grounded, the pins 1, 3, 4 and 6 of the surface acoustic wave filter U10 are respectively grounded, the pin 5 of the surface acoustic wave filter U10 is respectively connected to the first end of the capacitor C42 and the first end of the capacitor C55, the second end of the capacitor C42 is grounded, the second end of the capacitor C55 is respectively connected to the first end of the resistor R10 and the first end of the resistor R11, the second end of the resistor R10 is respectively connected to the first end of the resistor R12 and the first end of the capacitor C54, the second ends of the resistor R11 and the resistor R12 are respectively grounded, and the second end of the capacitor C54 is the output end of the BD3 - B3 Beidou signal.

[0034] As Figure 6 shown: The BD3 - S signal low - noise amplifier 21 includes a dielectric filter U3, a low - noise amplifier U22, an FBAR filter U1, a surface acoustic wave filter U2, a temperature - compensated attenuator U5, a low - noise amplifier U4, and a low - noise amplifier U7. U3 is the dielectric filter UF2492M388, which performs pre - selection filtering on the low - noise amplifier link; U22 is the low - noise amplifier GRF2052DS, which performs the first - stage low - noise amplification; U1 is the FBAR filter FBF2492T8, and U2 is the surface acoustic wave filter TA1442A, which perform frequency - selection filtering on the low - noise amplifier link; U5 is the temperature - compensated STC0603N9, which ensures the gain stability of the low - noise amplifier link at high and low temperatures; U4 and U7 are SGL0622Z, which perform the second - and third - stage gain amplifications on the low - noise amplifier link.

[0035] After the BD3-S Beidou signal enters the BD3-S signal low-noise amplifier 21, it is respectively connected to the first end of the capacitor C24 and the pin 1 of the dielectric filter U3. The second end of the capacitor C24 is grounded. The pins 3, 4, 5, 6, and 7 of the dielectric filter U3 are respectively grounded. The pin 2 of the dielectric filter U3 is respectively connected to the first end of the capacitor C11 and the first end of the capacitor C23. The second end of the capacitor C23 is grounded. The second end of the capacitor C11 is connected to the first end of the inductor L4. The second end of the inductor L4 is respectively connected to the first end of the capacitor C12 and the first end of the capacitor C26. The second end of the capacitor C26 is grounded. The second end of the capacitor C12 is connected to the pin 2 of the low-noise amplifier U22. The pins 0, 1, 3, 7, 9, 10, and 11 of the low-noise amplifier U22 are respectively grounded. The pin 12 of the low-noise amplifier U22 is connected to the first end of the resistor R2. The second end of the resistor R2 is respectively connected to the VCC-3.3V power supply, the first end of the capacitor C1, the first end of the capacitor C5, and the first end of the inductor L1. The second ends of the capacitor C1 and the capacitor C5 are respectively grounded. The second end of the inductor L1 is respectively connected to the pin 8 of the low-noise amplifier U22, the first end of the capacitor C25, and the first end of the capacitor C13. The second end of the capacitor C25 is grounded. The second end of the capacitor C13 is respectively connected to the first end of the resistor R3 and the first end of the inductor L5. The second end of the resistor R3 is grounded. The second end of the inductor L5 is respectively connected to the pin 2 of the FBAR filter U1 and the first end of the capacitor C9. The second end of the capacitor C9 is grounded. The pins 1, 3, 4, and 6 of the FBAR filter U1 are respectively grounded. The pin 5 of the FBAR filter U1 is respectively connected to the first end of the capacitor C7 and the first end of the capacitor C8. The second end of the capacitor C7 is grounded. The second end of the capacitor C8 is connected to the first end of the capacitor C14. The second end of the capacitor C14 is connected to the pin 4 of the low-noise amplifier U7. The pins 0, 2, 3, 5, 6, 7, and 8 of the low-noise amplifier U7 are respectively grounded. The pin 1 of the low-noise amplifier U7 is respectively connected to the first end of the inductor L2 and the first end of the capacitor C18. The second end of the inductor L2 is respectively connected to the first end of the capacitor C3, the first end of the capacitor C6, and the first end of the resistor R34. The second end of the resistor R34 is connected to VCC-3.A 3V power supply, the second ends of the capacitor C3 and the capacitor C6 are grounded respectively, the second end of the capacitor C18 is connected to the first end of the capacitor C19, the second end of the capacitor C19 is connected to the first end of the capacitor C17 and the pin 2 of the surface acoustic wave filter U2 respectively, the second end of the capacitor C17 is grounded, the pins 1, 3, 4 and 6 of the surface acoustic wave filter U2 are grounded respectively, the pin 5 of the surface acoustic wave filter U2 is connected to the first ends of the capacitor C15 and the capacitor C16 respectively, the second end of the capacitor C15 is grounded, the second end of the capacitor C16 is connected to the pin 1 of the temperature compensation attenuator U5, the pin 3 of the temperature compensation attenuator U5 is grounded, the pin 2 of the temperature compensation attenuator U5 is connected to the first end of the capacitor C20, the second end of the capacitor C20 is connected to the pin 4 of the low noise amplifier U4, the pins 0, 2, 3, 5, 6, 7 and 8 of the low noise amplifier U4 are grounded respectively, the pin 1 of the low noise amplifier U4 is connected to the first ends of the inductor L3 and the capacitor C22 respectively, the second end of the inductor L3 is connected to the first ends of the capacitor C2, the capacitor C4 and the resistor R1 respectively, the second ends of the capacitor C2 and the capacitor C4 are grounded respectively, the second end of the resistor R1 is connected to the VCC - 3.3V power supply, and the second end of the capacitor C22 is the output end of the BD3 - S Beidou signal.

[0036] As Figure 7 shown: The power supply and multiplexing circuit 22 includes a linear voltage regulator W2, a power divider 4 and a power divider 5. The BD3 - L signal is connected to one end of the capacitor C33 and the pin 7 of the power divider 5 respectively. W2 is the linear voltage regulator TPS79333, which is responsible for supplying power to the BD3 - B3 and BD3 - S low noise amplifier link amplifiers. 4 and 5 are power dividers GP2S +, which combine the BD3 - B3, BD3 - S, and BD3 - L three - way signals into one for input and output, enabling the combined port SSMA - K connector to simultaneously transmit the three - way signals and supply power to the internal circuit.

[0037] The pins 0, 1, 3, 4, 5, 6, 8, 10, 11, and 12 of the power divider 5 are grounded. The BD3-S Beidou signal output terminal is respectively connected to the pin 9 of the power divider 5 and the first end of the capacitor C43. The second end of the capacitor C43 is grounded. The pin 2 of the power divider 5 is respectively connected to the first end of the capacitor C40 and the first end of the capacitor C37. The second end of the capacitor C40 is grounded. The second end of the capacitor C37 is respectively connected to the pin 9 of the power divider 4 and the first end of the capacitor C41. The second end of the capacitor C41 is grounded. The BD3-B3 Beidou signal output terminal is respectively connected to the first end of the capacitor C31 and the pin 7 of the power divider 4. The second end of the capacitor C31 is grounded. The pins 0, 1, 3, 4, 5, 6, 8, 10, 11, and 12 of the power divider 4 are respectively grounded. The pin 2 of the power divider 4 is respectively connected to the first end of the capacitor C35 and the first end of the capacitor C38. The second end of the capacitor C38 is grounded. The second end of the capacitor C35 is respectively connected to the first end of the resistor R6 and the first end of the resistor R7. The second end of the resistor R6 is respectively connected to the first end of the resistor R8, the first end of the capacitor C36, and the first end of the capacitor C39. The second ends of the resistor R7, the resistor R8, and the capacitor C39 are respectively grounded. The second end of the capacitor C36 is respectively connected to the first end of the inductor L9 and the COM combined port of the SSMA-K type RF connector 12. The second end of the inductor L9 is respectively connected to the first end of the capacitor C44, the first end of the capacitor C56, the first end of the capacitor C59, the VCC-5V power supply, the first end of the capacitor C62, the first end of the capacitor C67, the pins 1 and 3 of the linear voltage regulator W2. The second ends of the capacitor C44, the capacitor C56, the capacitor C59, the capacitor C62, the capacitor C67, and the pin 2 of the linear voltage regulator W2 are respectively grounded. The pin 4 of the linear voltage regulator W2 is connected to the first end of the capacitor C69. The second end of the capacitor C69 is grounded. The pin 5 of the linear voltage regulator W2 is respectively connected to the first end of the capacitor C70, the first end of the capacitor C73, the first end of the capacitor C74, and the VCC-3.3V power supply. The second ends of the capacitor C70, the capacitor C73, and the capacitor C74 are respectively grounded.

[0038] As Figure 8As shown in the figure: The BD3-L signal amplifier 19 includes a power amplifier U12, a surface acoustic wave filter U13, an amplifier U15, an amplifier U16, a temperature-compensated attenuator U17, a dielectric filter U21, and a linear voltage regulator W1. U13 is a surface acoustic wave filter SF9074 for filtering the amplification link; U15 and U16 are amplifiers YG602020 for performing first- and second-stage amplifications; U12 is a power amplifier chip RX7021 for outputting a 5W L signal; U21 is a dielectric filter QF694 for frequency-selective filtering of the amplification link; U17 is a temperature-compensated STC0603N9 for ensuring stable gain of the amplification link at high and low temperatures; W1 is a linear voltage regulator LP2985-2.9V for providing a bias voltage to the VREF pin of U12;

[0039] The BD3-L signal enters the BD3-L signal amplifier 19 and then connects to the first end of capacitor C57. The second end of capacitor C57 connects to the first end of capacitor C84. The second end of capacitor C84 respectively connects to the first end of capacitor C91 and pin 2 of the surface acoustic wave filter U13. Pin 1, pin 3, pin 4, and pin 6 of the surface acoustic wave filter U13 are respectively grounded. Pin 5 of the surface acoustic wave filter U13 respectively connects to the first end of capacitor C90 and the first end of capacitor C83. The second end of capacitor C90 is grounded. The second end of capacitor C83 respectively connects to the first end of capacitor C88 and the first end of resistor R18. The second end of resistor R18 connects to the power signal input terminal L2 of the BD3-L control circuit 18. The second end of capacitor C88 connects to pin 1 of amplifier U16. Pin 2 of amplifier U16 is grounded. Pin 3 of amplifier U16 respectively connects to the first end of inductor L19 and the first end of capacitor C82. The second end of inductor L19 respectively connects to the first end of capacitor C78, the first end of capacitor C81, and the VEN terminal of the BD3-L control circuit 18. The second ends of capacitor C78 and capacitor C81 are respectively grounded. The second end of capacitor C82 respectively connects to the first end of resistor R17 and the first end of resistor R19. The second end of resistor R17 respectively connects to the first end of resistor R20 and pin 1 of the temperature compensation attenuator U17. The second ends of resistor R19 and resistor R20 are respectively grounded. Pin 3 of the temperature compensation attenuator U17 is grounded. Pin 2 of the temperature compensation attenuator U17 connects to the first end of capacitor C86. The second end of capacitor C86 connects to pin 1 of amplifier U15. Pin 2 of amplifier U15 is grounded. Pin 3 of amplifier U15 respectively connects to the first end of inductor L18 and the first end of capacitor C85. The second end of inductor L18 respectively connects to the first end of capacitor C77, the first end of capacitor C80, and the VEN terminal of the BD3-L control circuit 18. The second ends of capacitor C77 and capacitor C80 are respectively grounded. The second end of capacitor C85 connects to the first end of capacitor C87. The second end of capacitor C87 connects to pin 3 of the power amplifier U12. Pins 0, 1, 2, 4, 5, 7, 9, 10, 12, and 15 of the power amplifier U12 are respectively grounded. Pins 6 and 8 of the power amplifier U12 are vacant. Pin 14 of the power amplifier U12 connects to the first end of capacitor C75, the first end of capacitor C71, the first end of capacitor C68, and the VCC-5V power supply. The second ends of capacitor C75, capacitor C71, and capacitor C68 are respectively grounded. Pin 16 of the power amplifier U12 respectively connects to the first end of capacitor C79, the first end of capacitor C72, the first end of resistor R14, and the first end of resistor R13.The second terminal of the capacitor C79, the second terminal of the capacitor C72, and the second terminal of the resistor R14 are respectively grounded. The second terminal of the resistor R13 is respectively connected to the first terminal of the capacitor C63, the first terminal of the capacitor C64, and the pin 5 of the linear voltage regulator W1. The second terminals of the capacitor C63, the capacitor C64, and the pin 2 of the linear voltage regulator W1 are respectively grounded. The pin 4 of the linear voltage regulator W1 is connected to the first terminal of the capacitor C61, and the second terminal of the capacitor C61 is grounded. The pin 1 of the linear voltage regulator W1 is respectively connected to the first terminal of the capacitor C65, the first terminal of the capacitor C66, and the VEN terminal of the BD3-L control circuit 18. The pin 3 of the linear voltage regulator W1 is connected to the VEN terminal of the BD3-L control circuit 18. The second terminals of the capacitor C65 and the capacitor C66 are respectively grounded. The pin 11 of the power amplifier U12 is connected to the first terminal of the capacitor C89. The second terminal of the capacitor C89 is respectively connected to the first terminal of the capacitor C109 and the pin 1 of the dielectric filter U21. The pin 0 of the dielectric filter U21 is grounded. The pin 2 of the dielectric filter U21 is respectively connected to the first terminal of the capacitor C108 and the BD3-L Beidou signal output terminal. The second terminal of the capacitor C108 is grounded.,

[0040] As Figure 9 shown: The BD3-L control circuit 18 includes a logarithmic detector U20, a voltage comparator U18, a triode U14, a triode U19, a diode D1, and a PMOS switch tube D2. U20 is a logarithmic detector LT5534 that converts the L signal into an enable level. U18 is a voltage comparator LMV321. U14 and U19 are triodes SC1623-L7. D2 is a PMOS switch tube ZXM161PO3F that is responsible for controlling the switch of the L link;

[0041] The power signal input terminal L2 is connected to the first end of the capacitor C95. The second end of the capacitor C95 is respectively connected to the first end of the resistor R32 and the first end of the resistor R33. The second end of the resistor R32 is grounded. The second end of the resistor R33 is respectively connected to the first end of the resistor R31 and the first end of the capacitor C94. The second end of the resistor R31 is grounded. The second end of the capacitor C94 is connected to the pin 6 of the logarithmic detector U20. The pin 2 and the pin 5 of the logarithmic detector U20 are grounded. The pin 1 and the pin 4 of the logarithmic detector are respectively connected to the first end of the capacitor C106, the first end of the capacitor C107 and the VCC - 5V power supply. The second end of the capacitor C106 and the second end of the capacitor C107 are respectively grounded. The pin 3 of the logarithmic detector U20 is connected to the first end of the resistor R30. The second end of the resistor R30 is respectively connected to the first end of the resistor R28 and the first end of the resistor R27. The second end of the resistor R28 is connected to the resistor R29 and then grounded. The second end of the resistor R27 is connected to the pin 1 of the voltage comparator U18. The pin 2 of the voltage comparator U18 is grounded. The pin 3 of the voltage comparator U18 is respectively connected to the first end of the resistor R22 and the first end of the resistor R23. The second end of the resistor R22 is connected to the first end of the resistor R15. The second end of the resistor R15 is grounded. The second end of the resistor R23 is connected to the first end of the resistor R24. The second end of the resistor R24 is connected to the VCC - 5V power supply. The pin 4 of the voltage comparator U18 is respectively connected to the first end of the resistor R21 and the first end of the resistor R26. The pin 5 of the voltage comparator U18 is respectively connected to the second end of the resistor R26, the first end of the capacitor C92, the first end of the capacitor C93 and the VCC - 5V power supply. The second end of the capacitor C92 and the second end of the capacitor C93 are respectively grounded. The second end of the resistor R21 is respectively connected to the first end of the resistor R16 and the base of the triode U14. The emitter of the triode U14 is grounded. The collector of the triode U14 is respectively connected to the first end of the resistor R25, the base of the triode U19 and the positive pole of the diode D1. The collector of the triode U19 is respectively connected to the second end of the resistor R25 and the VCC - 5V power supply. The emitter of the triode U19 is connected to the negative pole of the diode D1 and the G pole of the PMOS switch tube D2. The S pole of the PMOS switch tube D2 is connected to the VCC - 5V power supply. The D pole of the PMOS switch tube D2 is connected to the VEN terminal of the BD3 - L control circuit 18.

[0042] The present invention has the active antenna function of simultaneously receiving BD3 - B3, BD3 - S navigation and positioning signals and transmitting BD3 - L signals, which is provided for the Beidou handheld terminal to use; and realizes the active antenna function for receiving BD3 - B3, BD3 - S navigation and positioning signals and transmitting BD3 - L signals.

Claims

1. A miniaturized Beidou-3 dual-mode antenna, characterized in that: It includes a radome (1) with an arc shape and an antenna box cover (8) with a flat top surface. The antenna box cover (8) is fixedly arranged on the radome (1). A sealing ring (7) is arranged at the connection between the radome (1) and the antenna box cover (8). An antenna body (2) and a radio frequency module unit (3) are sequentially arranged in the sealed body formed by the radome (1) and the antenna box cover (8). The antenna body (2) includes a BD3-B3 antenna body (15), a BD3-S antenna body (16), a BD3-L antenna body (17), and a feed network printed circuit board. The radio frequency module unit (3) includes a BD3-L control circuit (18), a BD3-L signal amplifier (19), a BD3-B3 signal low-noise amplifier (20), a BD3-S signal low-noise amplifier (21), a radio frequency module unit printed circuit board (3-1), and a plurality of signal feed points (3-2). The BD3-L signal amplifier (19) includes a power amplifier U12, a surface acoustic wave filter U13, an amplifier U15, an amplifier U16, a temperature compensation attenuator U17, a dielectric filter U21, and a linear voltage regulator W1. The BD3-B3 signal low-noise amplifier (20) includes a low-noise amplifier U6, a dielectric filter U8, a surface acoustic wave filter U9, a surface acoustic wave filter U10, and a low-noise amplifier U11. The dielectric filter U8 performs preselection filtering on the low-noise amplifier link. The low-noise amplifier U6 performs the first-stage low-noise amplification. The surface acoustic wave filters U9 and U10 perform frequency selection filtering on the low-noise amplifier link. The low-noise amplifier U11 performs the second-stage gain amplification on the low-noise amplifier link. The BD3-S signal low-noise amplifier (21) includes a dielectric filter U3, a low-noise amplifier U22, an FBAR filter U1, a surface acoustic wave filter U2, a temperature compensation attenuator U5, a low-noise amplifier U4, and a low-noise amplifier U7. The dielectric filter U3 performs preselection filtering on the low-noise amplifier link; the low-noise amplifier U22 performs the first-stage low-noise amplification; the FBAR filter U1 and the surface acoustic wave filter U2 perform frequency selection filtering on the low-noise amplifier link; the temperature compensation attenuator U5 ensures the gain stability of the low-noise amplifier link at high and low temperatures; the low-noise amplifiers U4 and U7 perform the second- and third-stage gain amplifications on the low-noise amplifier link. The power supply and multiplexing circuit (22) includes a linear voltage regulator W2 responsible for supplying power to the BD3-B3 signal low-noise amplifier (20) and the BD3-S signal low-noise amplifier (21), a power divider 4, and a power divider 5. The power dividers 4 and 5 combine the BD3-B3, BD3-S, and BD3-L three-way signals into one for input and output, enabling the combined port SSMA-K connector to simultaneously transmit the three-way signals and supply power to the internal circuit;A first shielding cover (5) is fixedly sleeved outside the BD3-L control circuit (18), a second shielding cover (6) is fixedly sleeved outside the BD3-L signal amplifier (19), an SSMA-K type RF connector (12) is fixedly arranged at the end of the RF module unit (3), the SSMA-K type RF connector (12) extends out of the sealed body formed by the radome (1) and the antenna box cover (8), the SSMA-K type RF connector (12) includes a power supply and multiplexing circuit (22), the RF module unit (3) and the antenna body (2) are fixedly arranged on the radome (1), a hook (10) is fixedly arranged on the top surface of the antenna box cover (8), the BD3-B3 Beidou signal is received by the BD3-B3 antenna body (15), the feed point of the BD3-B3 antenna body (15) is connected to the input end of the BD3-S signal low-noise amplifier (21), the output end of the BD3-S signal low-noise amplifier (21) is connected to the B3 port of the power supply and multiplexing circuit (22), the BD3-S Beidou signal is received by the BD3-S antenna body (16), the feed point of the BD3-S antenna body (16) is connected to the input end of the BD3-B3 signal low-noise amplifier (20), the output end of the BD3-B3 signal low-noise amplifier (20) is connected to the S port of the power supply and multiplexing circuit (22), the L port of the power supply and multiplexing circuit (22) is connected to the input port of the BD3-L signal amplifier (19), the BD3-L control circuit (18) controls the BD3-L signal amplifier (19) by detecting the power signal after the surface acoustic wave filter in the BD3-L signal amplifier (19), and the output end of the BD3-L signal amplifier (19) is connected to the BD3-L antenna body (17) to transmit the BD3-L signal.; 2. The miniaturized Beidou-3 dual-mode antenna according to claim 1, wherein: The antenna box cover (8) is fixedly arranged on the radome (1) through a plurality of first screws (9). The radio frequency module unit (3) and the antenna body (2) are fixedly arranged on the radome (1) through a plurality of second screws (4). A hook (10) is fixedly arranged on the top surface of the antenna box cover (8) through a plurality of third screws (11). A product label (13) and a product certificate (14) are pasted on the top surface of the antenna box cover (8).

3. The miniaturized Beidou-3 dual-mode antenna according to claim 1, wherein: After the BD3 - B3 Beidou signal enters the BD3 - B3 signal low - noise amplifier (20), it is respectively connected to the first end of the inductor L10 and the pin 1 of the dielectric filter U8. The second end of the inductor L10 is grounded. The pins 3, 4, 5, 6, and 7 of the dielectric filter U8 are respectively grounded. The pin 2 of the dielectric filter U8 is respectively connected to the first end of the inductor L17 and the first end of the capacitor C49. The second end of the inductor L17 is grounded. The second end of the capacitor C49 is respectively connected to the first end of the capacitor C58 and the first end of the inductor L12. The second end of the capacitor C58 is grounded. The second end of the inductor L12 is connected to the pin 2 of the low - noise amplifier U6. The pins 0, 1, 3, 4, 5, 6, 10, and 11 of the low - noise amplifier U6 are respectively grounded. The pin 12 of the low - noise amplifier U6 is connected to the first end of the resistor R5. The second end of the resistor R5 is respectively connected to the VCC - 3.3V power supply, the first end of the capacitor C29, the first end of the capacitor C34, the first end of the resistor R9, and the first end of the inductor L11. The second ends of the capacitor C29 and the capacitor C34 are respectively grounded. The pin 8 of the low - noise amplifier U6 is respectively connected to the second end of the resistor R9, the second end of the inductor L11, and the first end of the capacitor C50. The second end of the capacitor C50 is respectively connected to the first end of the capacitor C60, the first end of the inductor L15, and the first end of the inductor L13. The second ends of the capacitor C60 and the inductor L15 are respectively grounded. The second end of the inductor L13 is respectively connected to the first end of the capacitor C45 and the pin 2 of the surface acoustic wave filter U9. The second end of the capacitor C45 is grounded. The pins 1, 3, 4, and 6 of the surface acoustic wave filter U9 are respectively grounded. The pin 5 of the surface acoustic wave filter U9 is respectively connected to the first end of the capacitor C51 and the first end of the capacitor C47. The second end of the capacitor C47 is grounded. The second end of the capacitor C51 is connected to the first end of the capacitor C52. The second end of the capacitor C52 is connected to the pin 4 of the low - noise amplifier U11. The pins 0, 2, 3, 5, 6, 7, and 8 of the low - noise amplifier U11 are respectively grounded. The pin 1 of the low - noise amplifier U11 is respectively connected to the first end of the inductor L8 and the first end of the capacitor C53. The second end of the inductor L8 is respectively connected to the first end of the capacitor C30, the first end of the capacitor C32, and the first end of the resistor R4. The second ends of the capacitor C30 and C32 are respectively grounded. The second end of the resistor R4 is connected to VCC - 3.A 3V power supply, the second end of the capacitor C53 is connected to the first end of the inductor L14, the second end of the inductor L14 is respectively connected to the first end of the capacitor C46 and the pin 2 of the surface acoustic wave filter U10, the second end of the capacitor C46 is grounded, the pins 1, 3, 4 and 6 of the surface acoustic wave filter U10 are respectively grounded, the pin 5 of the surface acoustic wave filter U10 is respectively connected to the first end of the capacitor C42 and the first end of the capacitor C55, the second end of the capacitor C42 is grounded, the second end of the capacitor C55 is respectively connected to the first end of the resistor R10 and the first end of the resistor R11, the second end of the resistor R10 is respectively connected to the first end of the resistor R12 and the first end of the capacitor C54, the second ends of the resistor R11 and the resistor R12 are respectively grounded, and the second end of the capacitor C54 is the output end of the BD3 - B3 Beidou signal.

4. The miniaturized Beidou-3 dual-mode antenna according to claim 3, characterized in that: After the BD3-S Beidou signal enters the BD3-S signal low-noise amplifier (21), it is respectively connected to the first end of capacitor C24 and pin 1 of dielectric filter U3. The second end of capacitor C24 is grounded. Pins 3, 4, 5, 6, and 7 of dielectric filter U3 are respectively grounded. Pin 2 of dielectric filter U3 is respectively connected to the first end of capacitor C11 and the first end of capacitor C23. The second end of capacitor C23 is grounded. The second end of capacitor C11 is connected to the first end of inductor L4. The second end of inductor L4 is respectively connected to the first end of capacitor C12 and the first end of capacitor C26. The second end of capacitor C26 is grounded. The second end of capacitor C12 is connected to pin 2 of low-noise amplifier U22. Pins 0, 1, 3, 7, 9, 10, and 11 of low-noise amplifier U22 are respectively grounded. Pin 12 of low-noise amplifier U22 is connected to the first end of resistor R2. The second end of resistor R2 is respectively connected to the VCC-3.3V power supply, the first end of capacitor C1, the first end of capacitor C5, and the first end of inductor L1. The second ends of capacitor C1 and capacitor C5 are respectively grounded. The second end of inductor L1 is respectively connected to pin 8 of low-noise amplifier U22, the first end of capacitor C25, and the first end of capacitor C13. The second end of capacitor C25 is grounded. The second end of capacitor C13 is respectively connected to the first end of resistor R3 and the first end of inductor L5. The second end of resistor R3 is grounded. The second end of inductor L5 is respectively connected to pin 2 of FBAR filter U1 and the first end of capacitor C9. The second end of capacitor C9 is grounded. Pins 1, 3, 4, and 6 of FBAR filter U1 are respectively grounded. Pin 5 of FBAR filter U1 is respectively connected to the first end of capacitor C7 and the first end of capacitor C8. The second end of capacitor C7 is grounded. The second end of capacitor C8 is connected to the first end of capacitor C14. The second end of capacitor C14 is connected to pin 4 of low-noise amplifier U7. Pins 0, 2, 3, 5, 6, 7, and 8 of low-noise amplifier U7 are respectively grounded. Pin 1 of low-noise amplifier U7 is respectively connected to the first end of inductor L2 and the first end of capacitor C18. The second end of inductor L2 is respectively connected to the first end of capacitor C3, the first end of capacitor C6, and the first end of resistor R34. The second end of resistor R34 is connected to VCC-3.A 3V power supply, the second ends of the capacitor C3 and the capacitor C6 are grounded respectively, the second end of the capacitor C18 is connected to the first end of the capacitor C19, the second end of the capacitor C19 is connected to the first end of the capacitor C17 and the pin 2 of the surface acoustic wave filter U2 respectively, the second end of the capacitor C17 is grounded, the pins 1, 3, 4 and 6 of the surface acoustic wave filter U2 are grounded respectively, the pin 5 of the surface acoustic wave filter U2 is connected to the first ends of the capacitor C15 and the capacitor C16 respectively, the second end of the capacitor C15 is grounded, the second end of the capacitor C16 is connected to the pin 1 of the temperature compensation attenuator U5, the pin 3 of the temperature compensation attenuator U5 is grounded, the pin 2 of the temperature compensation attenuator U5 is connected to the first end of the capacitor C20, the second end of the capacitor C20 is connected to the pin 4 of the low-noise amplifier U4, the pins 0, 2, 3, 5, 6, 7 and 8 of the low-noise amplifier U4 are grounded respectively, the pin 1 of the low-noise amplifier U4 is connected to the first ends of the inductor L3 and the capacitor C22 respectively, the second end of the inductor L3 is connected to the first ends of the capacitor C2, the capacitor C4 and the resistor R1 respectively, the second ends of the capacitor C2 and the capacitor C4 are grounded respectively, the second end of the resistor R1 is connected to the VCC - 3.3V power supply, and the second end of the capacitor C22 is the output end of the BD3-S Beidou signal.

5. The miniaturized Beidou-3 dual-mode antenna according to claim 4, wherein: The BD3-L signal is respectively connected to one end of the capacitor C33 and the pin 7 of the power divider 5. The pins 0, 1, 3, 4, 5, 6, 8, 10, 11 and 12 of the power divider 5 are grounded. The BD3-S Beidou signal output terminal is respectively connected to the pin 9 of the power divider 5 and the first end of the capacitor C43. The second end of the capacitor C43 is grounded. The pin 2 of the power divider 5 is respectively connected to the first end of the capacitor C40 and the first end of the capacitor C37. The second end of the capacitor C40 is grounded. The second end of the capacitor C37 is respectively connected to the pin 9 of the power divider 4 and the first end of the capacitor C41. The second end of the capacitor C41 is grounded. The BD3-B3 Beidou signal output terminal is respectively connected to the first end of the capacitor C31 and the pin 7 of the power divider 4. The second end of the capacitor C31 is grounded. The pins 0, 1, 3, 4, 5, 6, 8, 10, 11 and 12 of the power divider 4 are respectively grounded. The pin 2 of the power divider 4 is respectively connected to the first end of the capacitor C35 and the first end of the capacitor C38. The second end of the capacitor C38 is grounded. The second end of the capacitor C35 is respectively connected to the first end of the resistor R6 and the first end of the resistor R7. The second end of the resistor R6 is respectively connected to the first end of the resistor R8, the first end of the capacitor C36 and the first end of the capacitor C39. The second ends of the resistor R7, the resistor R8 and the capacitor C39 are respectively grounded. The second end of the capacitor C36 is respectively connected to the first end of the inductor L9 and the COM common port of the SSMA-K type radio frequency connector (12). The second end of the inductor L9 is respectively connected to the first end of the capacitor C44, the first end of the capacitor C56, the first end of the capacitor C59, the VCC-5V power supply, the first end of the capacitor C62, the first end of the capacitor C67, the pins 1 and 3 of the linear voltage regulator W2. The second ends of the capacitor C44, the capacitor C56, the capacitor C59, the capacitor C62, the capacitor C67 and the pin 2 of the linear voltage regulator W2 are respectively grounded. The pin 4 of the linear voltage regulator W2 is connected to the first end of the capacitor C69. The second end of the capacitor C69 is grounded. The pin 5 of the linear voltage regulator W2 is respectively connected to the first end of the capacitor C70, the first end of the capacitor C73, the first end of the capacitor C74 and the VCC-3.3V power supply. The second ends of the capacitor C70, the capacitor C73 and the capacitor C74 are respectively grounded.

6. The miniaturized Beidou-3 dual-mode antenna according to claim 5, characterized in that: After the BD3-L signal enters the BD3-L signal amplifier (19), it is connected to the first end of capacitor C57. The second end of capacitor C57 is connected to the first end of capacitor C84. The second end of capacitor C84 is respectively connected to the first end of capacitor C91 and pin 2 of surface acoustic wave filter U13. Pin 1, pin 3, pin 4, and pin 6 of the surface acoustic wave filter U13 are respectively grounded. Pin 5 of the surface acoustic wave filter U13 is respectively connected to the first end of capacitor C90 and the first end of capacitor C83. The second end of capacitor C90 is grounded. The second end of capacitor C83 is respectively connected to the first end of capacitor C88 and the first end of resistor R18. The second end of resistor R18 is connected to the power signal input terminal L2 of the BD3-L control circuit (18). The second end of capacitor C88 is connected to pin 1 of amplifier U16. Pin 2 of amplifier U16 is grounded. Pin 3 of amplifier U16 is respectively connected to the first end of inductor L19 and the first end of capacitor C82. The second end of inductor L19 is respectively connected to the first end of capacitor C78, the first end of capacitor C81, and the VEN terminal of the BD3-L control circuit (18). The second ends of capacitor C78 and capacitor C81 are respectively grounded. The second end of capacitor C82 is respectively connected to the first end of resistor R17 and the first end of resistor R19. The second end of resistor R17 is respectively connected to the first end of resistor R20 and pin 1 of temperature compensation attenuator U17. The second ends of resistor R19 and resistor R20 are respectively grounded. Pin 3 of the temperature compensation attenuator U17 is grounded. Pin 2 of the temperature compensation attenuator U17 is connected to the first end of capacitor C86. The second end of capacitor C86 is connected to pin 1 of amplifier U15. Pin 2 of amplifier U15 is grounded. Pin 3 of amplifier U15 is respectively connected to the first end of inductor L18 and the first end of capacitor C85. The second end of inductor L18 is respectively connected to the first end of capacitor C77, the first end of capacitor C80, and the VEN terminal of the BD3-L control circuit (18). The second ends of capacitor C77 and capacitor C80 are respectively grounded. The second end of capacitor C85 is connected to the first end of capacitor C87. The second end of capacitor C87 is connected to pin 3 of power amplifier U12. Pin 0, pin 1, pin 2, pin 4, pin 5, pin 7, pin 9, pin 10, pin 12, and pin 15 of the power amplifier U12 are respectively grounded. Pin 6 and pin 8 of the power amplifier U12 are vacant. Pin 14 of the power amplifier U12 is connected to the first end of capacitor C75, the first end of capacitor C71, the first end of capacitor C68, and the VCC-5V power supply. The second ends of capacitor C75, capacitor C71, and capacitor C68 are respectively grounded. Pin 16 of the power amplifier U12 is respectively connected to the first end of capacitor C79, the first end of capacitor C72, the first end of resistor R14, and the first end of resistor R13.The second terminal of the capacitor C79, the second terminal of the capacitor C72, and the second terminal of the resistor R14 are respectively grounded. The second terminal of the resistor R13 is respectively connected to the first terminal of the capacitor C63, the first terminal of the capacitor C64, and the pin 5 of the linear voltage regulator W1. The second terminals of the capacitor C63, the capacitor C64, and the pin 2 of the linear voltage regulator W1 are respectively grounded. The pin 4 of the linear voltage regulator W1 is connected to the first terminal of the capacitor C61, and the second terminal of the capacitor C61 is grounded. The pin 1 of the linear voltage regulator W1 is respectively connected to the first terminal of the capacitor C65, the first terminal of the capacitor C66, and the VEN terminal of the BD3-L control circuit (18). The pin 3 of the linear voltage regulator W1 is connected to the VEN terminal of the BD3-L control circuit (18). The second terminals of the capacitor C65 and the capacitor C66 are respectively grounded. The pin 11 of the power amplifier U12 is connected to the first terminal of the capacitor C89. The second terminal of the capacitor C89 is respectively connected to the first terminal of the capacitor C109 and the pin 1 of the dielectric filter U21. The pin 0 of the dielectric filter U21 is grounded. The pin 2 of the dielectric filter U21 is respectively connected to the first terminal of the capacitor C108 and the BD3-L Beidou signal output terminal. The second terminal of the capacitor C108 is grounded., 7. The miniaturized Beidou-3 dual-mode antenna according to claim 6, wherein: The BD3-L control circuit (18) includes a logarithmic detector U20, a voltage comparator U18, a triode U14, a triode U19, a diode D1, and a PMOS switch D2. The power signal input terminal L2 is connected to the first end of a capacitor C95. The second end of the capacitor C95 is respectively connected to the first end of a resistor R32 and the first end of a resistor R33. The second end of the resistor R32 is grounded. The second end of the resistor R33 is respectively connected to the first end of a resistor R31 and the first end of a capacitor C94. The second end of the resistor R31 is grounded. The second end of the capacitor C94 is connected to the pin 6 of the logarithmic detector U20. The pin 2 and pin 5 of the logarithmic detector U20 are grounded. The pin 1 and pin 4 of the logarithmic detector are respectively connected to the first end of a capacitor C106, the first end of a capacitor C107, and the VCC-5V power supply. The second end of the capacitor C106 and the second end of the capacitor C107 are respectively grounded. The pin 3 of the logarithmic detector U20 is connected to the first end of a resistor R30. The second end of the resistor R30 is respectively connected to the first end of a resistor R28 and the first end of a resistor R27. The second end of the resistor R28 is connected to a resistor R29 and then grounded. The second end of the resistor R27 is connected to the pin 1 of the voltage comparator U18. The pin 2 of the voltage comparator U18 is grounded. The pin 3 of the voltage comparator U18 is respectively connected to the first end of a resistor R22 and the first end of a resistor R23. The second end of the resistor R22 is connected to the first end of a resistor R15. The second end of the resistor R15 is grounded. The second end of the resistor R23 is connected to the first end of a resistor R24. The second end of the resistor R24 is connected to the VCC-5V power supply. The pin 4 of the voltage comparator U18 is respectively connected to the first end of a resistor R21 and the first end of a resistor R26. The pin 5 of the voltage comparator U18 is respectively connected to the second end of the resistor R26, the first end of a capacitor C92, the first end of a capacitor C93, and the VCC-5V power supply. The second end of the capacitor C92 and the second end of the capacitor C93 are respectively grounded. The second end of the resistor R21 is respectively connected to the first end of a resistor R16 and the base of the triode U14. The emitter of the triode U14 is grounded. The collector of the triode U14 is respectively connected to the first end of a resistor R25, the base of the triode U19, and the positive electrode of the diode D1. The collector of the triode U19 is respectively connected to the second end of the resistor R25 and the VCC-5V power supply. The emitter of the triode U19 is connected to the negative electrode of the diode D1 and the G terminal of the PMOS switch D2. The S terminal of the PMOS switch D2 is connected to the VCC-5V power supply. The D terminal of the PMOS switch D2 is connected to the VEN terminal of the BD3-L control circuit (18).

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