Electronic circuit and method for manufacturing an electronic circuit

By adopting the design of multiple circuit carriers and semiconductor components in power electronic circuits and combining chip bonding technology, the current density and switching speed limitation in the prior art is solved, more efficient current transmission and faster switching are achieved, and better thermal management and compact structure are provided.

CN114008774BActive Publication Date: 2025-05-13SIEMENS AG
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Patent Information

Application Number
CN202080042998.5
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Priority Date
2019-06-11
Filing Date
2020-06-05
Publication Date
2025-05-13
Estimated Expiration
2040-06-05

AI Technical Summary

Technical Problem

In the field of power electronics, the maximum allowable current density and switching speed of semiconductor components in the prior art are limited by the bonded leads, resulting in poor switching behavior of the circuit.

Method used

By designing an electronic circuit with multiple circuit carriers and semiconductor components, the chip bonding technology is used to directly connect the semiconductor components and the circuit carrier to avoid the use of bonded leads.

Benefits of technology

Achieve higher maximum achievable current density and switching speed, reduce parasitic inductance, improve thermal connection and heat dissipation, while achieving a more compact structure and better integration.

✦ Generated by Eureka AI based on patent content.

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Abstract

In order to improve the power, an electronic circuit (7) is proposed, which has a first circuit carrier and a second circuit carrier (6, 8) and a first semiconductor component and a second semiconductor component (9, 10). The first semiconductor component (9) abuts with its upper side against the lower side of the first circuit carrier (6) and with its lower side against the upper side of the second circuit carrier (8). The first circuit carrier (6) has a first through hole (11), which connects the first semiconductor component (9) to a first printed conductor. The first circuit carrier (6) has a second through hole (13), which electrically connects a connecting element (14) arranged between the circuit carriers to another printed conductor. A material-bonded connection is established between the circuit carriers via the first connecting element (14). The second semiconductor component (10) abuts against the lower side of the first circuit carrier (6) and is electrically connected to the first printed conductor or the second printed conductor. The circuit (7) has a third circuit carrier (17), wherein the lower side of the second semiconductor component (10) abuts against the upper side of the third circuit carrier (17). The lateral thermal expansion coefficient of the first circuit carrier (6) is greater than the lateral thermal expansion coefficient of the second circuit carrier (8) and greater than the lateral thermal expansion coefficient of the third circuit carrier (17).
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Description

Technical Field

[0001] The invention relates to an electronic circuit having a first circuit carrier and a second circuit carrier and a first semiconductor component of power electronics, the first semiconductor component having an upper side abutting against the lower side of the first circuit carrier and a lower side abutting against the upper side of the second circuit carrier. The circuit also has a third circuit carrier and a second semiconductor component. The invention also relates to a corresponding method for producing an electronic circuit. Background Art

[0002] In the field of power electronics, semiconductor components, such as switching elements, are usually in the form of power modules, also called power modules, or in the form of discrete packages. The semiconductor components are contacted with the aid of specific wire bonding techniques and the power modules are fixed to the circuit carrier, for example, by means of soldering, spring connections or crimping.

[0003] The use of bonding wires limits the maximum permissible current density through the semiconductor component. In addition, parasitic inductances occur, which limit the achievable switching speed of the switching element. Summary of the invention

[0004] Against this background, the object of the present invention is to provide an improved concept for an electronic circuit having at least one power electronic semiconductor component, by which the switching behavior of the circuit is improved in order to increase the maximum achievable current density and the switching speed.

[0005] According to an improved concept, this object is achieved by an electronic circuit and a method for producing an electronic circuit according to the independent claims. Advantageous developments and further embodiments are the subject matter of the dependent claims.

[0006] According to a first independent aspect of the improved concept, an electronic circuit is proposed, which has a first circuit carrier, a second circuit carrier, a third circuit carrier, a first power electronic semiconductor component and a second semiconductor component. The first semiconductor component has an upper side that abuts against the lower side of the first circuit carrier and a lower side that abuts against the upper side of the second circuit carrier. The first circuit carrier has a first through-hole, which electrically connects the upper side of the first semiconductor component to a first printed conductor of the first circuit carrier. The first circuit carrier has a second through-hole, which electrically connects a first connecting element arranged between the lower side of the first circuit carrier and the upper side of the second circuit carrier to a second printed conductor of the first circuit carrier. The first connecting element establishes a material-bonded, in particular electrical, connection between the upper side of the second circuit carrier and the lower side of the first circuit carrier, or via the first connecting element, establishes a material-bonded, in particular electrical connection between the upper side of the second circuit carrier and the lower side of the first circuit carrier. The upper side of the second semiconductor component abuts against the lower side of the first circuit carrier and is electrically connected to the first printed conductor or the second printed conductor.

[0007] Here, the electronic circuit has a third circuit carrier. The bottom side of the second semiconductor component abuts against the top side of the third circuit carrier. In particular, the bottom side of the second semiconductor component is electrically connected to the top side of the third circuit carrier.

[0008] The above explanations with regard to the second circuit carrier and, if applicable, further explanations apply analogously to the third circuit carrier.

[0009] In accordance with at least one embodiment, the second circuit carrier and the third circuit carrier are arranged in one plane, ie in particular at the same distance from the first circuit carrier.

[0010] The top side of the circuit carrier or the semiconductor component is opposite to the corresponding bottom side of the circuit carrier or the semiconductor component. Furthermore, the terms "top side" and "bottom side" do not represent any restriction with regard to the possible spatial orientation of the corresponding components. These terms are selected schematically and are based on an arrangement in which, from top to bottom, first the first circuit carrier is arranged, then the semiconductor component and then the second circuit carrier and optionally further circuit carriers.

[0011] A side of a semiconductor component rests against a side of a circuit carrier, which can be understood to mean that the respective side of the semiconductor component is oriented plane-parallel or substantially plane-parallel to the side in a contact region of the respective side of the circuit carrier and rests against the side in a plane. A planar connecting material, such as an adhesive, solder or sintering material, can be located between the respective side of the semiconductor component and the respective side of the circuit carrier, or the two sides are directly connected to one another, such as eutectic. In particular, there are no bonding wires between the respective semiconductor component and the associated circuit carrier.

[0012] The semiconductor component can be connected to the first circuit carrier, in particular by means of chip bonding, which can also be referred to as die bonding. Chip bonding is to be understood in particular as the opposite of wire bonding and can be, for example, a connection that is realized by means of a soldering or sintering connection, an adhesive connection and / or a eutectic connection. For example, a eutectic connection can also be referred to as eutectic welding or alloying. The same applies to the connection of the first semiconductor component to the second circuit carrier and, if appropriate, to the connection of the second semiconductor component to the third circuit carrier.

[0013] The first semiconductor component being a power electronics semiconductor component can be understood to mean, for example, that the first semiconductor component is a semiconductor component suitable for use in power electronics applications, in particular for converting electrical energy using switching electronics.

[0014] For example, the second semiconductor component can likewise be a power electronic semiconductor component.

[0015] Examples of semiconductor components for power electronics are bidirectional trigger diodes, triacs, power transistors, in particular bipolar power transistors, power MOSFETs (metal oxide semiconductor field effect transistors) or IGBTs (insulated gate bipolar transistors), thyristors, for example GTO thyristors (gate turn-off thyristors), power diodes or power capacitors.

[0016] The first circuit carrier can in particular be a multilayer circuit carrier, i.e. in particular a circuit carrier having two, three or more conductive layers. The first conductor track and the second conductor track are galvanically separated from one another, in particular in the first circuit carrier. This means that when the first circuit carrier is considered alone, i.e. in particular without an installed component, the first conductor track and the second conductor track are galvanically separated from one another. In this case, the first conductor track and the second conductor track can be part of the same conductive layer or respectively part of different conductive layers.

[0017] The first connecting element is in particular an electrically conductive connecting body, for example a connecting body for a soldering or sintering connection. Here, the connecting body is composed of a soldering material or a sintering material, for example. In particular, the first connecting element does not contain a bonding wire.

[0018] By combining at least two circuit carriers with at least two semiconductor components in this manner, a modular design of the package in the power electronics circuit can be avoided.

[0019] A power module usually contains a circuit carrier and a plurality of power semiconductors arranged on the circuit carrier. The individual power semiconductors are also electrically connected to each other by means of bonding wires. The circuit carrier and the power semiconductors are located in a closed housing, which can be coupled to another circuit carrier or a busbar via contact elements.

[0020] According to the improved concept, in particular such a bond wire connection and a separate contact element between the housing of the power module and the further circuit carrier are avoided.

[0021] As a result, parasitic inductances caused by the bonding wires are avoided and the performance potential of the available semiconductor components, in particular the electrical load capacity and the switching speed, can be fully utilized. In particular, the maximum available current density is no longer limited by the relatively small wire cross section of the bonding wires. This also prevents the switching times from being limited by parasitic inductances.

[0022] In particular, a higher current carrying capacity is achieved by the direct and planar connection of the chip surface to the circuit carrier. For the same reason, a better thermal connection and correspondingly improved heat dissipation result.

[0023] In this case, the lateral coefficient of thermal expansion of the first circuit carrier is greater than the lateral coefficient of thermal expansion of the second circuit carrier and greater than the lateral coefficient of thermal expansion of the third circuit carrier.

[0024] In this case, the lateral thermal expansion coefficient of the circuit carrier may be understood to mean a change in the lateral expansion, ie a change in the length and / or width of the respective circuit carrier, in the case of a predetermined temperature change, in particular as a function of a predetermined starting temperature.

[0025] Since the transverse thermal expansion coefficient of the second circuit carrier is smaller than that of the first circuit carrier and the operating temperature of the electronic circuit is always below the joint temperature at which the circuit carriers are connected to one another via the connecting element, a convex curvature of the second circuit carrier towards the cooling body is obtained by cooling. Accordingly, the thermal contact of the second circuit carrier with the cooling body is best in the central region of the second circuit carrier and is additionally improved with increasing operating temperature, since the convex curvature decreases until the joining temperature is reached. This corresponds to an optimal thermal connection.

[0026] The arrangement according to the improved concept also enables a particularly compact design of the electronic circuit and thus better integration, in particular a smaller space requirement.

[0027] According to at least one embodiment, the electronic circuit is a power electronic circuit, ie an electronic circuit used in the field of power electronics.

[0028] In accordance with at least one embodiment, the first semiconductor component and the second semiconductor component are present on separate semiconductor chips.

[0029] According to at least one embodiment, the first circuit carrier completely covers the first semiconductor component and the second semiconductor component and completely covers the second circuit carrier. In other words, the lateral dimensions of the second circuit carrier are larger than the lateral dimensions of the first semiconductor component and smaller than the lateral dimensions of the first circuit carrier.

[0030] Here and hereinafter, a lateral direction is referred to as a spatial direction which is parallel to the layer planes of the semiconductor component and the circuit carrier.

[0031] In accordance with at least one embodiment, the second circuit carrier completely covers the first semiconductor component.

[0032] In accordance with at least one embodiment, the bottom side of the first semiconductor component is electrically connected to the top side of the second circuit carrier.

[0033] In accordance with at least one embodiment, the first connecting element produces an electrical connection between the top side of the second circuit carrier and the bottom side of the first circuit carrier.

[0034] According to at least one embodiment, the first circuit carrier comprises a multilayer circuit board. Here, a circuit board can be understood as a structure consisting of one or more molding compounds, one or more cores and one or more conductor layers, such as copper layers. In particular, the circuit board can be a circuit board based on FR2, FR3, FR4 or FR5 or a circuit board based on CEM1 or CEM3. In particular, the circuit board or the first circuit carrier does not include a flexible circuit board, a soft circuit board, a rigid-flexible circuit board or a semi-flexible circuit board, in particular in the area overlapping with the second circuit carrier.

[0035] In accordance with at least one embodiment, the first circuit carrier comprises a third via which electrically connects the top side of the second semiconductor component to the second conductor track.

[0036] According to at least one embodiment, the first circuit carrier has a fourth through-hole, which electrically connects a second connecting element arranged between the bottom side of the first circuit carrier and the top side of the third circuit carrier to the first conductor track or the third conductor track of the first circuit carrier. A material-bonded, in particular electrical, connection is established between the top side of the third circuit carrier and the bottom side of the first circuit carrier via the second connecting element.

[0037] The above descriptions with regard to the first connecting element apply analogously to the second connecting element.

[0038] In accordance with at least one embodiment, the bottom side of the second semiconductor component is electrically connected to the top side of the third circuit carrier.

[0039] In accordance with at least one embodiment, the electrical circuit comprises a heat sink on which the second circuit carrier is arranged.

[0040] In accordance with at least one embodiment, the third circuit carrier is arranged on the heat sink.

[0041] The second circuit carrier and optionally the third circuit carrier are in particular fixed to the heat sink and in particular directly connected to the heat sink. Direct connection here includes cases in which a connecting material (e.g. an adhesive, solder or sintering material) and / or a medium for improving thermal conductivity (e.g. a thermally conductive paste) is located between the respective circuit carrier and the heat sink.

[0042] In such an embodiment, a common heat sink is used for both semiconductor components and for the second circuit carrier and the third circuit carrier. The common heat sink can also be used to dissipate heat for further circuit carriers and / or semiconductor components of the circuit.

[0043] In accordance with at least one embodiment, the circuit has a clamping device in order to press the second circuit carrier and, if appropriate, the third circuit carrier onto the heat sink via an action of force exerted on the first circuit carrier.

[0044] This achieves an improved mechanical contact and thus also an improved thermal contact between the heat sink and the second circuit carrier or between the heat sink and the third circuit carrier and thus between the heat sink and the semiconductor component.

[0045] Better thermal contact results in improved heat dissipation. Improved mechanical contact also results in improved reliability of the electronic circuit, since mechanical movements or stresses occurring during operation can be better compensated.

[0046] According to at least one embodiment, the clamping device comprises a clamping element, for example a clamping plate, which is arranged on an upper side of the first circuit carrier facing away from the first and second semiconductor components and is placed, for example, on the first circuit carrier. The clamping element is mechanically connected to the heat sink.

[0047] In accordance with at least one embodiment, the clamping element is designed as a plate which is placed on the top side of the first circuit carrier.

[0048] According to at least one embodiment, the heat sink has at least one thread, for example an internal thread or an undercut. The clamping device has at least one screw and / or at least one supporting element. The first circuit carrier has at least one through-hole.

[0049] For example, the clamping device can have at least one screw and the clamping element can also have at least one through-hole. The at least one screw is guided through the at least one through-hole of the clamping element.

[0050] For example, the holding device can have at least one supporting element and the at least one supporting element can be connected to the holding element.

[0051] At least one screw or at least one supporting element is guided through at least one through-hole of the first circuit carrier and is mechanically connected to the heat sink by means of at least one thread of the heat sink.

[0052] By means of the clamping device, the clamping elements can exert a force on the first circuit carrier and thus on the semiconductor component by means of screws or supporting elements, so that the semiconductor component and the second circuit carrier and optionally the third circuit carrier are pressed onto the heat sink.

[0053] In accordance with at least one embodiment, the first semiconductor component is designed as a switching element of power electronics.

[0054] In accordance with at least one embodiment, the second semiconductor component is designed as a switching element of power electronics.

[0055] The power electronic switching element can include, for example, a power transistor, such as a wide bandgap transistor, an IGBT, a bipolar power transistor or a power MOSFET.

[0056] Wide bandgap power transistors are in particular power transistors based on gallium nitride or silicon carbide.

[0057] According to at least one embodiment, the first semiconductor component and the second semiconductor component are connected by means of the first circuit carrier, in particular by means of the first and second conductor tracks and optionally by means of the third conductor track, to form a half-bridge circuit or as part of another bridge circuit, for example a full-bridge circuit.

[0058] The half-bridge circuit has a first DC voltage interface, a second DC voltage interface and an AC voltage interface. The first conductor track is electrically connected to the first DC voltage interface, for example. The second conductor track is electrically connected to the AC voltage interface, for example. The third conductor track is electrically connected to the second DC voltage interface, for example.

[0059] According to at least one embodiment, the second circuit carrier comprises a first electrically conductive layer, in particular a metal layer, forming the upper side of the second circuit carrier. The second circuit carrier also comprises an electrically insulating layer, in particular a ceramic layer or a ceramic body, arranged on a side of the first electrically conductive layer facing away from the first circuit carrier.

[0060] In particular, the third circuit carrier can be designed identically or similarly to the second circuit carrier.

[0061] The use of an electrically insulating layer achieves electrical insulation of the semiconductor component relative to the cooling body. By using a ceramic layer, good heat conduction can be ensured at the same time. This arrangement is also characterized by good resistance to temperature cycles.

[0062] In accordance with at least one embodiment, the ceramic layer contains aluminum oxide, aluminum nitride or silicon nitride or consists of one of the compounds mentioned.

[0063] In accordance with at least one embodiment, the second circuit carrier comprises a second electrically conductive layer, in particular a metal layer, which is arranged on a side of the electrically insulating layer facing away from the first electrically conductive layer.

[0064] The “conductive layer-insulating layer-conductive layer” arrangement can in particular achieve an increased robustness against thermal deformations of the second circuit carrier. This applies in particular when the first conductive layer and the second conductive layer are made of the same material and the second conductive layer has a larger or at least the same volume as the first conductive layer.

[0065] For example, the second circuit carrier can be designed as a DBC substrate or a DCB substrate. In this case, DBC stands for “direct bonded copper” and DCB stands for “direct copper bonded”.

[0066] According to at least one embodiment, the first electrically conductive layer and / or the second electrically conductive layer consists of copper or a copper alloy.

[0067] According to a further independent aspect of the improved concept, a converter is proposed which has an electronic circuit according to the improved concept.

[0068] In this case, the electronic circuit is designed in particular such that the first semiconductor component and the second semiconductor component are interconnected by means of the first circuit carrier to form part of a half-bridge circuit or another bridge circuit.

[0069] A power converter can be understood as a device for converting a first type of electrical energy into a second type of electrical energy.

[0070] The converter can be designed in particular as a frequency converter, an inverter, in particular a multilevel inverter, a rectifier or a DC converter.

[0071] Here, a frequency converter can be understood as a converter that converts a first AC voltage into a second AC voltage, in particular with a different frequency and / or phase. An inverter can be understood as a converter that converts a DC voltage into an AC voltage. A rectifier can be understood as a converter that converts an AC voltage into a DC voltage. A DC voltage converter can be understood as a converter that converts a first DC voltage into a second DC voltage.

[0072] According to at least one embodiment, the converter has a common circuit carrier and two or more electronic circuits, wherein each of the electronic circuits is designed according to an improved concept. Here, the common circuit carrier forms a respective first circuit carrier for each of the electronic circuits. In other words, the first circuit carrier of each of the electronic circuits is provided by the common circuit carrier of the converter.

[0073] The converter according to the improved concept can save bonding wires or other wire connections or plug connections. In particular, it is not necessary to provide a power module to construct the converter. Corresponding advantages derive from the above advantages of the electronic circuit according to the improved concept.

[0074] According to at least one embodiment of the converter, the electronic circuits are each designed in such a way that they have a corresponding heat sink, on which the second circuit carrier and, if appropriate, the third circuit carrier are arranged.

[0075] According to at least one embodiment, the converter has a common cooling body. Here, the common cooling body forms a corresponding cooling body for each of the electronic circuits. In other words, the cooling body of each of the electronic circuits is provided by the common cooling body of the converter.

[0076] According to at least one embodiment, the converter has a common clamping device or a plurality of clamping devices. Here, as described above, the common clamping device forms a corresponding clamping device for each of the electronic circuits, or a plurality of clamping devices form a corresponding clamping device for an electronic circuit.

[0077] According to another independent aspect of the improved concept, a method for manufacturing an electronic circuit, in particular an electronic circuit according to the improved concept, is proposed. In this case, a first circuit carrier and a second circuit carrier are provided. A first semiconductor component of the power electronics is fixed to the second circuit carrier by means of chip bonding. A first connecting element is mounted on the first circuit carrier or the second circuit carrier. The first connecting element is connected to the first circuit carrier and the second circuit carrier by material bonding, so that the first connecting element is electrically connected to the second printed conductor of the first circuit carrier via the second through-hole of the first circuit carrier. The first semiconductor component and the second semiconductor component are fixed to the first circuit carrier by means of chip bonding, so that the upper side of the first semiconductor component is connected to the first printed conductor of the first circuit carrier via the first through-hole of the first circuit carrier, and the upper side of the second semiconductor component is electrically connected to the second printed conductor.

[0078] Possible sequences of the steps of the method are obvious to those skilled in the art. In particular, the steps of the method do not necessarily have to be implemented in the order in which they are described here.

[0079] According to at least one embodiment of the method for producing an electronic circuit, the second semiconductor component is fixed to the first circuit carrier by means of chip bonding such that the top side of the second semiconductor component is electrically connected to the second conductor track via a third through-hole of the first circuit carrier.

[0080] In accordance with at least one embodiment, the second semiconductor component is fixed to the third circuit carrier by means of chip bonding.

[0081] According to at least one embodiment, a second connecting element is mounted on the first circuit carrier or the third circuit carrier. The second connecting element is materially connected to the first circuit carrier and the third circuit carrier, so that the second connecting element is electrically connected to the third printed conductor of the first circuit carrier or to the first printed conductor via the fourth through-hole of the first circuit carrier.

[0082] In accordance with at least one embodiment, the heat sink is mechanically connected to the second circuit carrier and, if applicable, to the third circuit carrier.

[0083] In particular, the heat sink is connected to the second and optionally the third circuit carrier after the first connecting element is cohesively connected to the first and second circuit carriers or, if applicable, after the second connecting element is cohesively connected to the first and third circuit carriers.

[0084] In particular, the first circuit carrier and the second circuit carrier and the third circuit carrier are cooled between a cohesive connection of one or more connecting elements to the respective circuit carrier and a connection of the heat sink to the respective circuit carrier.

[0085] This results in a convex curvature of the second circuit carrier and of the third circuit carrier towards the heat sink, which improves the thermal connection of the circuit carrier to the heat sink.

[0086] Further embodiments of the method according to the improved concept are directly derived from the respective embodiments of the electronic circuit or the converter according to the improved concept, and vice versa.

[0087] Directly corresponding embodiments of the method for producing a current transformer according to the further development result from the configuration of the method for producing an electronic circuit according to the further development. BRIEF DESCRIPTION OF THE DRAWINGS

[0088] The invention is explained in more detail below with reference to specific embodiments and associated schematic diagrams. Identical or functionally identical elements can be provided with the same reference numerals in the figures. The description of identical or functionally identical elements need not be repeated for different figures if necessary.

[0089] The figure shows:

[0090] Figure 1 shows a schematic cross-sectional view of a power module;

[0091] Figure 2 shows a schematic cross-sectional view of an exemplary embodiment of an electronic circuit according to the improved concept;

[0092] Figure 3 shows a schematic cross-sectional view of another exemplary embodiment of an electronic circuit according to the improved concept;

[0093] Figure 4 shows a schematic cross-sectional view of another exemplary embodiment of an electronic circuit according to the improved concept;

[0094] Figure 5 shows a schematic cross-sectional view of another exemplary embodiment of an electronic circuit according to the improved concept;

[0095] Figure 6 shows a schematic cross-sectional view of another exemplary embodiment of an electronic circuit according to the improved concept;

[0096] Figure 7 A schematic diagram showing an exemplary embodiment of a method according to the improved concept;

[0097] Figure 8 A schematic diagram showing an exemplary embodiment of a converter according to the improved concept;

[0098] Fig. 9 Shows Figure 8 Alternative diagrams of the converters; and

[0099] Fig.10 A schematic cross-sectional view of another exemplary embodiment of an electronic circuit according to the improved concept is shown. DETAILED DESCRIPTION

[0100] Figure 1 A power module 1 is shown in which a plurality of power electronic switching elements 2 are electrically connected to metallic connecting elements 4 by means of bonding wires 3. The power module 1 is connected to a printed circuit board 5 by means of the connecting elements 4.

[0101] Figure 2 A cross-sectional view of an exemplary embodiment of an electronic circuit 7 according to the improved concept is shown.

[0102] The electronic circuit 7 has a first circuit carrier 6, which is designed as a multilayer circuit board, for example. The circuit 7 also has a second circuit carrier 8 and a third circuit carrier 17, which are each designed as a DCB substrate, for example. The DCB substrate has, for example, a first copper layer 25, 25', a ceramic body or a ceramic layer 26, 26' and a second copper layer 27, 27'. In this case, the ceramic layers 26, 26' are arranged between the copper layers 25, 25', 27, 27', respectively. In other embodiments, other metal layers can be used instead of the copper layers 25, 25', 27, 27'.

[0103] The circuit 7 has a first power transistor 9 which is connected to the first copper layer 25 of the second circuit carrier 8 by means of a chip bond and is also connected to the outer layer 33 , ie the outer conductor layer, of the first circuit carrier 6 by means of a chip bond.

[0104] In particular, a connecting material 30 , such as an adhesive layer or a solder or sintering material, can be located between the first power transistor 9 and the first copper layer 25 or between the first power transistor 9 and the outer layer 33 , which material is used for chip bonding.

[0105] The circuit 7 furthermore has a second power transistor 10 which is connected to the first circuit carrier 6 , in particular the outer layer 33 , and to the first copper layer 25 ′ of the third circuit carrier 17 by die bonding and, if appropriate, using a corresponding connecting material 30 ′.

[0106] The selection of power transistors 9 , 10 here and below is always merely exemplary. In other embodiments, other power electronic semiconductor components can be used instead of one of the power transistors 9 , 10 or instead of both power transistors 9 , 10 .

[0107] For the sake of clarity, only two of the three corresponding connections of the power transistors 9, 10 are shown as being contacted. Figure 3 .

[0108] The power transistors 9 , 10 face the second circuit carrier 8 or the third circuit carrier 17 , for example, with the respective gate side of the power transistor.

[0109] The circuit has a first connection element 14 and a second connection element 20. The connection elements 14, 20 are formed, for example, from solder or sintered material. The connection elements 14, 20 each establish a material-bonded connection between the first copper layer 25, 25' and the outer layer 33. The connection elements 14, 20 can also be constructed in multiple parts in the form of different layers or as a composite.

[0110] The first circuit carrier 6 has, for example, a first insulating layer 29 on the side of the outer layer 33 facing away from the power transistors 9, 10. On the side of the insulating layer 29 facing away from the outer layer 33, for example, the electrically conductive inner layer 15 of the circuit carrier 6 is arranged. For example, a further insulating layer 29' of the first circuit carrier 6 is arranged on the side of the inner layer 15 facing away from the insulating layer 29, and a further outer layer 12 of the first circuit carrier 6 is arranged on the side of the further insulating layer 29' facing away from the inner layer 15.

[0111] The first through-hole 11 of the first circuit carrier 6 penetrates the insulating layers 29 , 29 ′ and the inner layer 15 and connects the outer layer 33 to the outer layer 12 , in particular the first power transistor 9 to a conductor track of the outer layer 12 .

[0112] The second through-hole 13 of the first circuit carrier 6 penetrates the insulating layer 29 and connects the outer layer 33 to the inner layer 15, in particular the connecting element 14 to the conductor track of the inner layer 15. The third through-hole 16 also penetrates the insulating layer 29 and connects the outer layer 33, in particular the second power transistor 10, to the conductor track of the inner layer 15.

[0113] Fourth via 18 penetrates insulating layer 29 , inner layer 15 and further insulating layer 29 ′ and connects outer layer 33 to outer layer 12 , in particular second connecting element 20 to a conductor track of further outer layer 12 or to a further conductor track of further outer layer 12 .

[0114] The circuit 7 can have a potting material 34 in which the first power transistor 9 and the first connecting element 14 are embedded and which is produced, for example, by means of an underfill. Correspondingly, the circuit 7 can contain a further potting material 34' in which the further power transistor 10 and the second connecting element 20 are embedded and which can also be produced, for example, by means of an underfill.

[0115] The insulating body of the second and third circuit carrier 8 , 17 can, for example, surround and overlap the respective electrically conductive structures and in particular the structures carrying the semiconductor chip on all sides, for example by 0.5 mm or more.

[0116] Figure 2 A series circuit of power transistors 9, 10 is shown. In alternative embodiments, the power transistors 9, 10 or corresponding other power electronic components can be connected in parallel.

[0117] Figure 3 A further cross-sectional view of a further exemplary embodiment of an electronic circuit 7 according to the improved concept is shown. Figure 3 Circuit 7 in is similar to Figure 2 For the sake of clarity, the third circuit carrier 17, the second power transistor 10, the second connecting element 20 and the corresponding through-holes 16, 18 are not shown in FIG. Figure 3 Shown in.

[0118] Figure 3 The circuit 7 has a diode 9 ′ which is connected in particular in antiparallel to the first power transistor 9 .

[0119] exist Figure 3In the circuit 7 of FIG. 1 , both through-holes 11, 13 are connected to corresponding conductor tracks on the other outer layer 12. In addition, the circuit 7 has a third connecting element 37, which connects the first copper layer 25 to the other outer layer 12 via a fifth through-hole 35. With regard to the third connecting element 37, the above-mentioned embodiment with regard to the first connecting element 14 applies analogously. Now, a third contact of the power transistor 9 is also shown via the third connecting element 37 and the fifth through-hole 35. Figure 2 Corresponding contacts can also be provided in the circuit 7 .

[0120] The through-openings 11 , 13 and 35 can in particular be guided on different or the same outer or inner layers.

[0121] Furthermore, the circuit 7 has a further electronic component 32 which can be designed, for example, as a surface-mounted component and can in particular be arranged on a side of the first circuit carrier 6 facing away from the power transistor 9 , for example electrically connected to the outer layer 12 .

[0122] exist Figure 3 In the circuit 7 of FIG. 1 , a solder resist structure 19 is also shown at various locations. For example, the solder resist structure can be used to position the power transistor 9, the diode 9' and / or the electronic component 32 and / or to avoid uncontrolled wetting or distribution of the solder paste.

[0123] Figure 4 A cross-sectional view of another exemplary embodiment of a circuit 7 according to the improved concept is shown. Figure 2 and Figure 3 , so only the differences are discussed in more detail. Here too, for the sake of clarity, the third circuit carrier 17 and the second power transistor 10 etc. are not shown. Figure 2 Again, for clarity, Figure 4 The contact of the third contact element of the power transistor 9 is not shown.

[0124] and Figure 2 Different, in Figure 4 In the embodiment, the first through hole 11 connects the power transistor 9 to the inner layer 15 .

[0125] Figure 5 A further cross-sectional view of a further exemplary embodiment of an electronic circuit 7 according to the improved concept is shown. Figure 5 The circuit 7 is based on Figure 4 circuit.

[0126] and Figure 2 , Figure 3 and Figure 4 different, Figure 5The second circuit carrier 8 in FIG. 8 is designed to have only one copper layer 25 . In particular, the second circuit carrier 8 here has only a first copper layer 25 and a ceramic layer 26 , but no second copper layer 27 .

[0127] Figure 6 A cross-sectional view of another exemplary embodiment of an electronic circuit 7 according to the improved concept is shown. Figure 6 The implementation method is based on Figure 4 implementation method.

[0128] and Figure 4 In contrast, the further electronic component 32 is designed as a component for push-through installation.

[0129] In addition, compared with Figure 4 , the second circuit carrier 8 is modified. Figure 4 The copper layers 25, 27 and the ceramic layer 26 are planar layers oriented parallel to each other. Figure 6 This is not the case. Figure 4 In contrast, the second copper layer 27 is unchanged. However, in a side view, the ceramic layer 26 has a sawtooth or pot-shaped profile. The copper layer 25 is formed with an approximately uniform thickness so that the copper layer matches the profile of the ceramic layer 26 and has a sawtooth or pot-shaped profile at the same time.

[0130] This forms a cavity, within which the first power transistor 9 is at least partially arranged. Therefore, assuming that the spacing between the first copper layer 25 and the first circuit carrier 6 is less than 100 mm in the case of identical power transistors 9, Figure 4 Accordingly, the dimensions of the connecting element 14, in particular the height of the connecting element 14 required for bridging the distance between the copper layer 25 and the outer layer 33, can be reduced, which can offer advantages in terms of production technology. For example, in the case of a corresponding design of the pot-shaped profile, the connecting material 30 between the outer layer 33 and the power transistor 9 can be produced in a process step simultaneously with the connecting element 14, in particular if the corresponding layer thicknesses can be selected to be identical.

[0131] Figure 7 A flow chart of a method for producing an electronic circuit according to an improved concept is schematically shown in FIG.

[0132] In step a) of the method, a first circuit carrier 6 and a second circuit carrier 8 are provided. In step b), for example, a power transistor 9 and a further semiconductor component 9' are fixed to the second circuit carrier 8 by means of chip bonding. In step c), connecting elements 14, 37 are applied to the second circuit carrier 8 in the form of solder or solder paste together with a connecting material 30 for contacting the first power transistor 9 and the semiconductor component 9'. For example, the material of the connecting elements 14, 37 is the same as the connecting material 30 on the semiconductor components 9 and 9'. In step d), the connecting elements 14, 37 are connected to the first circuit carrier 6 by material fit, and the semiconductor component 9' and the power transistor 9 are likewise connected to the first circuit carrier 6 by means of the connecting material 30. The process for the third circuit carrier 17 and the second power transistor 10 is similar.

[0133] Fig.10 A further cross-sectional view of a further exemplary embodiment of a circuit 7 according to the improved concept is shown.

[0134] Fig.10 The implementation method is based on Figure 2 implementation scheme, and therefore only the differences are discussed in more detail.

[0135] Fig.10 The circuit 7 in the embodiment of the present invention has a clamping plate 22 and a common heat sink 21. The second and third circuit carriers 8, 17 are arranged on the heat sink 21, and the clamping plate 22 is placed directly or indirectly, for example in an insulating manner, on the first circuit carrier 6. The heat sink 21 has bores 24, 24' with internal threads, which are arranged to align with through-openings through the first circuit carrier 6 and through the clamping plate 22. The first circuit carrier 6, the second circuit carrier and the third circuit carrier 8, 17 and the corresponding power transistors 9, 10 are clamped or pressed between the heat sink 21 and the clamping plate 22 by means of screws 23, 23' which pass through the through-openings and the clamping plate 22 and also the first circuit carrier 6 and engage in the bores 24, 24'. As a result, particularly good thermal and mechanical contact is achieved.

[0136] Alternatively, instead of two bore holes 24 , 24 ′ and two screws 23 , 23 ′, the clamping plate 22 can contain only one bore hole and one screw, which engages in a corresponding thread of the heat sink 21 .

[0137] Alternatively, instead of one or more screws, the clamping plate 22 can also be fixed by means of a supporting element, wherein the supporting element engages in an undercut in the heat sink 21 .

[0138] Figure 8 A schematic diagram of an exemplary embodiment of a portion of a converter 28 (eg, a frequency converter) according to the improved concept is shown. Fig. 9, wherein the first circuit carrier 6 is not shown.

[0139] An electronic circuit 7 and a further electronic circuit 7 ′ are arranged on one side of the first circuit carrier 6 , each of which is designed according to an improved concept. Various electronic components 32 are arranged on the opposite side of the first circuit carrier 6 .

[0140] The circuits 7 and 7 ′ do not necessarily have to be designed separately. In alternative embodiments, they can also be partially connected in parallel, for example when the same intermediate circuit is used via a direct current interface (DC interface) and different phase outputs (AC interface).

[0141] like Figure 8 and Fig. 9 As shown, the converter 28 according to the improved concept does not require a power module.

[0142] With the improved concept, a flexible means for providing an electronic circuit with power electronic components and a converter is proposed, which makes it possible to have a particularly low inductance of the entire system by omitting bonding wires. By directly building the second circuit carrier and the third circuit carrier on the first circuit carrier, for example in an SMT (surface mount technology) process, a module-free, quasi-ideal integration can be achieved, thereby providing an economical way to fully utilize the electrical properties of fast-switching power semiconductors.

[0143] In addition to electrically connecting the individual circuit carriers to one another, the planar connecting element can also have good thermal conductivity, so that by increasing the thermal capacity of the power semiconductor or the connecting element, the heat dissipation or buffering effect is further improved.

[0144] The improved concept allows converter manufacturers in particular to implement a planar construction technology and dispense with the special technologies required for classic power module construction, such as wire bonding.

Claims

1. An electronic circuit having: A first circuit carrier and a second circuit carrier (6, 8); a first semiconductor component (9) of power electronics having an upper side abutting against the lower side of the first circuit carrier (6) and having a lower side abutting against the upper side of the second circuit carrier (8); and a second semiconductor component (10); It is characterized in that The first circuit carrier (6) has a first through-hole (11), which electrically connects the top side of the first semiconductor component (9) to a first conductor track of the first circuit carrier (6); The first circuit carrier (6) has a second through-hole (13), which electrically connects a first connecting element (14) arranged between the bottom side of the first circuit carrier (6) and the top side of the second circuit carrier (8) to a second printed conductor of the first circuit carrier (6); Via the first connecting element (14), a material-fit connection is established between the upper side of the second circuit carrier (8) and the lower side of the first circuit carrier (6); The upper side of the second semiconductor component (10) abuts against the lower side of the first circuit carrier (6) and is electrically connected to the first conductor track or to the second conductor track; The circuit (7) has a third circuit carrier (17); The lower side of the second semiconductor component (10) abuts against the upper side of the third circuit carrier (17); and the lateral thermal expansion coefficient of the first circuit carrier (6) is greater than the lateral thermal expansion coefficient of the second circuit carrier (8) and greater than the lateral thermal expansion coefficient of the third circuit carrier (17).

2. The electronic circuit according to claim 1, It is characterized in that The first circuit carrier (6) has a third through-hole (16) which electrically connects the top side of the second semiconductor component (10) to the second conductor track.

3. The electronic circuit according to claim 1 or 2, It is characterized in that The first circuit carrier (6) has a fourth through-hole (18) which electrically connects a second connecting element (20) arranged between the bottom side of the first circuit carrier (6) and the top side of the third circuit carrier (17) to the first printed conductor or the third printed conductor of the first circuit carrier (6); and Via the second connecting element (20), a cohesive connection is established between the top side of the third circuit carrier (17) and the bottom side of the first circuit carrier (6).

4. The electronic circuit according to claim 1 or 2, It is characterized in that The circuit (7) has a heat sink (21) on which the second circuit carrier (8) is arranged.

5. The electronic circuit according to claim 4, It is characterized in that The circuit (7) has a clamping device (22, 23, 23') in order to press the second circuit carrier (8) onto the heat sink (21) by means of a force acting on the first circuit carrier (6).

6. The electronic circuit according to claim 1 or 2, It is characterized in that The first semiconductor component (9) and / or the second semiconductor component (10) is designed as a power electronic switching element.

7. The electronic circuit according to claim 1 or 2, It is characterized in that The first semiconductor component and the second semiconductor component (9, 10) are interconnected by means of the first circuit carrier (6) to form part of a half-bridge circuit or another bridge circuit.

8. The electronic circuit according to claim 1 or 2, It is characterized in that The second circuit carrier (8) has a first electrically conductive layer (25) which forms the upper side of the second circuit carrier (8), and an electrically insulating layer (26) which is arranged on a side of the first electrically conductive layer (25) which faces away from the first circuit carrier (6).

9. The electronic circuit according to claim 8, It is characterized in that The second circuit carrier (8) has a second electrically conductive layer (27) arranged on a side of the electrically insulating layer (26) facing away from the first electrically conductive layer (25).

10. A converter comprising the electronic circuit (7) according to any one of claims 1 to 9.

11. The converter according to claim 10, It is characterized in that The converter (28) has a common circuit carrier (6); The converter (28) comprises two or more electronic circuits (7, 7'), each of which is designed according to any one of claims 1 to 9; The common circuit carrier (6) for each of the electronic circuits (7, 7') forms the respective first circuit carrier (6).

12. The converter according to claim 11, It is characterized in that The converter (28) has a common cooling body (21); The electronic circuits (7, 7') are respectively designed according to claim 4; and The common cooling body (21) for each of the electronic circuits (7, 7') forms a respective cooling body (21).

13. A method for manufacturing an electronic circuit (7), the method comprising the following steps: A first circuit carrier, a second circuit carrier and a third circuit carrier (6, 8, 17) are provided, wherein: The lateral thermal expansion coefficient of the first circuit carrier (6) is greater than the lateral thermal expansion coefficient of the second circuit carrier (8) and greater than the lateral thermal expansion coefficient of the third circuit carrier (17); Fixing a first semiconductor component (9) of power electronics on the second circuit carrier (8) by means of chip bonding; Fixing the second semiconductor component (10) on the third circuit carrier (17) by means of chip bonding; Mounting a first connecting element (14) on the first circuit carrier (6) or the second circuit carrier (8); Connecting the first connecting element (14) to the first circuit carrier (6) and the second circuit carrier (8) in a materially bonded manner, so that the first connecting element (14) is electrically connected to the second conductor track of the first circuit carrier (6) via the second through-hole (13) of the first circuit carrier (6); and The first semiconductor component (9) and the second semiconductor component (10) are fixed to the first circuit carrier (6) by means of chip bonding, so that the upper side of the first semiconductor component (9) is connected to the first printed conductor of the first circuit carrier (6) via the first through hole (11) of the first circuit carrier (6), and the upper side of the second semiconductor component (10) is electrically connected to the second printed conductor.

Citation Information

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