Quantum computing task processing method, system and computer equipment

Abstract

The present application discloses a quantum computing task processing method, system, and computer device, relating to the field of quantum technology. The quantum computing task processing method includes: transforming the input quantum state of n+m quantum bits through a parameterized quantum circuit; the n+m quantum bits include n task bits and m auxiliary bits; measuring the output quantum state of the n+m quantum bits to obtain a bit string of n+m quantum bits; when the substring of the m auxiliary bits meets the post-selection condition and the parameterized quantum circuit has not converged, updating the parameters of the parameterized quantum circuit based on the output quantum state of the n task bits; when the substring meets the post-selection condition and the circuit converges, obtaining the calculation result based on the output quantum state of the n task bits. The above scheme improves the expressive power of the PQC of the variational task, thereby improving the execution effect of the variational task.

Description

Technical Field

[0001] The embodiments of the present application relate to the field of quantum technology, and in particular to a method, system, and computer device for processing quantum computing tasks. Background Art

[0002] The variational quantum algorithm is an algorithm that uses a quantum computer to calculate the cost function and uses a classical computer to adjust the parameters according to the value of the cost function until the cost function is minimized.

[0003] Variational quantum algorithms rely on parameterized quantum circuits (PQCs) for implementation. In related art, variational tasks typically use PQCs containing a certain number of bits to simulate quantum systems with the same physical quantum bit scale.

[0004] However, considering the influence of noise and decoherence of quantum systems, the depth of PQC will be subject to certain limitations, resulting in insufficient expressive power of PQC for variational tasks and affecting the execution effect of variational tasks. Summary of the Invention

[0005] The embodiments of the present application provide a quantum computing task processing method, system, and computer device that can improve the expressive power of the PQC of variational tasks and improve the execution effect of variational tasks. The technical solution is as follows:

[0006] According to one aspect of an embodiment of the present application, a method for processing a quantum computing task is provided, the method comprising:

[0007] Transform the input quantum state of n+m qubits using a parameterized quantum circuit corresponding to a target quantum computing task; the n+m qubits include n task bits and m auxiliary bits; n and m are positive integers;

[0008] Measuring the output quantum states of the n+m qubits to obtain a bit string of the n+m qubits;

[0009] When a substring corresponding to the m auxiliary bits in the bit string satisfies a post-selection condition and the parameterized quantum circuit has not converged, updating the parameters of the parameterized quantum circuit based on the output quantum states of the n task bits;

[0010] When a substring corresponding to the m auxiliary bits in the bit string satisfies a post-selection condition and the parameterized quantum circuit converges, a calculation result of the target quantum computing task is obtained based on the output quantum state of the n task bits.

[0011] According to one aspect of an embodiment of the present application, a quantum computing task processing system is provided, the system comprising: a parameterized quantum circuit, a measurement module, an optimizer, and a task processing module;

[0012] The parameterized quantum circuit is used to transform the input quantum state of n+m quantum bits; the n+m quantum bits include n task bits and m auxiliary bits; n and m are positive integers;

[0013] The measurement module is used to measure the output quantum state of the n+m qubits to obtain a bit string of the n+m qubits;

[0014] The optimizer is configured to update the parameters of the parameterized quantum circuit based on the output quantum states of the n task bits when a substring corresponding to the m auxiliary bits in the bit string satisfies a post-selection condition and the parameterized quantum circuit has not converged;

[0015] The task processing module is configured to obtain a calculation result of the target quantum computing task based on the output quantum state of the n task bits when a substring corresponding to the m auxiliary bits in the bit string meets a post-selection condition and the parameterized quantum circuit converges.

[0016] In a possible implementation, the parameterized quantum circuit includes parameterized entanglement gates between the n task bits and the m auxiliary bits respectively.

[0017] In a possible implementation, the m auxiliary bits include at least one first auxiliary bit; the physical quantum bits corresponding to the first auxiliary bit and the n task bits respectively form a one-dimensional ring connection topology structure;

[0018] The first auxiliary bit is connected to the n task bits via a first two-bit gate layer;

[0019] The first two-bit gate layer includes a parameterized SWAP gate between each adjacent two quantum bits in the first auxiliary bit and the n task bits; the parameterized SWAP gates between each adjacent two quantum bits in the first auxiliary bit and the n task bits are arranged in a stepped manner.

[0020] In a possible implementation, the m auxiliary bits further include at least one second auxiliary bit; the second auxiliary bit is connected to the first auxiliary bit via two SWAP gates; and a second dibit gate layer is included between the two SWAP gates;

[0021] The second two-bit gate layer includes the first auxiliary bit and a parameterized SWAP gate between every two adjacent quantum bits in the n task bits.

[0022] In a possible implementation, the input quantum state of the parameterized quantum circuit and the quantum gates in the parameterized quantum circuit have symmetry.

[0023] In a possible implementation, when the target quantum computing task is a task with symmetry requirements, the m auxiliary bits include at least two pairs of auxiliary bits, and m is an even number;

[0024] The total spin of the output quantum state of each pair of auxiliary bits in the at least two pairs of auxiliary bits is 0.

[0025] According to one aspect of an embodiment of the present application, a computer device is provided, wherein the computer device is used to execute the quantum computing task processing method as described above.

[0026] The technical solutions provided by the embodiments of the present application include at least the following beneficial effects:

[0027] For the PQC corresponding to the variational task, m auxiliary bits are added on the basis of n task bits. During the variational task processing, the measurement results of the output quantum states of the m auxiliary bits are post-selected to select the output quantum states that meet the conditions on the n task bits to update the PQC or obtain the task results. In other words, the above scheme can simulate a quantum system with a physical quantum bit scale of n through m+n quantum bits, thereby improving the simulation effect of PQC on the quantum system, thereby improving the expressive ability of PQC of the variational task, and further improving the execution effect of the variational task. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without any creative work.

[0029] Figure 1 This is a schematic diagram of an application scenario of a solution provided by an embodiment of the present application;

[0030] Figure 2 This is a flowchart of a method for processing quantum computing tasks provided by one embodiment of the present application;

[0031] Figure 3 yes Figure 2 A framework diagram of quantum computing task processing involved in the illustrated embodiment;

[0032] Figure 4 This is a flowchart of a method for processing quantum computing tasks provided by one embodiment of the present application;

[0033] Figure 5 yes Figure 4 A circuit structure framework diagram of a parameterized quantum circuit according to the embodiment shown;

[0034] Figure 6 yes Figure 4 A diagram of a variational circuit structure for maintaining symmetry according to the illustrated embodiment;

[0035] Figure 7 yes Figure 4 A schematic diagram of a VQE circuit according to the embodiment shown;

[0036] Figure 8 A block diagram of a quantum computing task processing system provided by one embodiment of the present application. DETAILED DESCRIPTION

[0037] In order to make the objectives, technical solutions and advantages of this application clearer, the implementation methods of this application will be further described in detail below with reference to the accompanying drawings.

[0038] Before introducing the embodiments of the present application, some terms involved in the present application are first explained.

[0039] 1) Quantum computing: A method based on quantum logic that exploits the superposition and entanglement of quantum states to rapidly complete computational tasks. The fundamental unit of data storage in quantum computing is the qubit.

[0040] 2) Qubit: This is the carrier of quantum information and the basic unit of quantum computing. Traditional computers use 0 and 1 as the basic units of binary. However, quantum computing can process both 0 and 1 simultaneously, allowing the system to be in a linear superposition of 0 and 1: |ψ>=α|0>+β|1>, where α and β represent the complex probability amplitude of the system at 0 and 1. Their squared modulus |α| 2 ,|β| 2 represent the probabilities of being 0 and 1 respectively.

[0041] 3) Quantum Operation: Manipulate the quantum bits to process the quantum information carried by the quantum bits. Common quantum operations include Pauli X, Y, and Z transformations (or σ x , σ y , σ z), Hadamard transform (H), controlled Pauli X transform, i.e. controlled NOT gate CNOT, etc. Using only single-bit and two-bit operations, arbitrary quantum computations can be performed. Some positions are abbreviated as operations below.

[0042] 4) Quantum Circuit: A model describing quantum computing, consisting of qubits and quantum operations on them, representing the hardware implementation of a corresponding quantum algorithm or program within the quantum gate model. A quantum circuit consists of a sequence of quantum gates, which perform computations. If a quantum circuit includes adjustable parameters to control the quantum gates, it is called a parameterized quantum circuit.

[0043] 5) Quantum Computing Device: A physical device that performs quantum computing.

[0044] 6) Hamiltonian: A Hermitian matrix that describes the total energy of a quantum system. Hamiltonian is a physics term and an operator that describes the total energy of a system, denoted by H.

[0045] 7) Eigenstate: For a Hamiltonian matrix H, the solution that satisfies the equation: H|ψ>=E|ψ> is called an eigenstate of H |ψ>, with an eigenenergy E. The ground state corresponds to the lowest energy eigenstate of the quantum system.

[0046] 8) Quantum-classical hybrid computing: A computational paradigm that uses PQC quantum circuits to calculate corresponding physical quantities or loss functions on the inner layer, and uses traditional classical optimizers to adjust the variational parameters of quantum circuits on the outer layer. This paradigm can maximize the advantages of quantum computing on small-scale quantum hardware and is believed to be one of the important directions with the potential to demonstrate quantum advantage.

[0047] 9) Noisy Intermediate-Scale Quantum (NISQ): This represents the current stage of quantum computing development and a key research focus. While limited by scale and noise, quantum computing at this stage cannot be used as a general-purpose computing engine, it can already achieve results that surpass the most powerful classical computers for some problems. This is often referred to as quantum supremacy or quantum advantage.

[0048] 10) Variational Quantum Eigensolver (VQE): This approach estimates the ground-state energy of a given quantum system through variational circuits. It is a typical quantum-classical hybrid computing paradigm with extensive applications in quantum chemistry.

[0049] 11) Post-selection: Post-selection is the process of selecting which bits of a quantum computer's output to retain or discard based on the values ​​of the corresponding bitstrings (also known as classical bitstrings). Post-selection is a key area of ​​current research, including but not limited to the implementation of linear unitary matrix combinations (LCUs) and measurement-induced entanglement entropy phase transitions.

[0050] 12) Pauli string: A term consisting of the direct product of multiple Pauli matrices at different lattice points. A typical Hamiltonian can be decomposed into the sum of a set of Pauli strings. VQE measurements are typically performed item by item, following the Pauli string decomposition.

[0051] 13) Non-unitary: The so-called unitary matrix is ​​one that satisfies U \dagger All matrices with U = I, and all evolutionary processes directly permitted by quantum mechanics, can be described by unitary matrices. Matrices that do not meet this condition are non-unitary, requiring auxiliary means or even exponentially more resources to be experimentally realized. However, non-unitary matrices often have stronger expressive power and faster ground state projection effects.

[0052] 14) Classical bitstring: A string of digits consisting of 0s and 1s. The classical result of each measurement of a quantum circuit can be represented by 0s or 1s, respectively, depending on the spin configuration on the measurement basis, so that the total result of a measurement corresponds to a bitstring.

[0053] 15) Pauli matrices: Three commonly used 2*2 Hermitian matrices (also known as unitary matrices) in quantum mechanics, also known as Pauli operators, are generally represented by the Greek letter σ (sigma). Among them, the Pauli X operator is The Pauli Y operator is The Pauli Z operator is

[0054] Please refer to Figure 1 , which shows a schematic diagram of an application scenario of a solution provided by an embodiment of the present application. Figure 1 As shown, the application scenario may be a superconducting quantum computing platform, which includes: a quantum computing device 11 , a dilution refrigerator 12 , a control device 13 and a computer 14 .

[0055] The quantum computing device 11 is a circuit that acts on a physical quantum bit. The quantum computing device 11 can be implemented as a quantum chip, such as a superconducting quantum chip at near absolute zero. The dilution refrigerator 12 is used to provide an absolute zero environment for the superconducting quantum chip.

[0056] Control device 13 controls quantum computing device 11, and computer 14 controls control device 13. For example, a pre-written quantum program is compiled into instructions by software in computer 14 and sent to control device 13 (e.g., an electronic / microwave control system). Control device 13 converts these instructions into electronic / microwave control signals, which are then input into dilution refrigerator 12 to control the superconducting qubits, which are kept at a temperature below 10 mK. The reading process is the opposite, with the read waveform being transmitted to quantum computing device 11.

[0057] Before introducing the embodiment of the method of the present application, the operating environment of the method is first introduced. The method provided in the embodiment of the present application can be executed in a hybrid device environment of a classical computer and a quantum computer.

[0058] In the following method embodiments, for ease of description, only a computer device is used as the execution subject of each step. It should be understood that the computer device may include a hybrid execution environment of a classical computer and a quantum computer, and the embodiments of the present application are not limited to this.

[0059] Please refer to Figure 2 , which shows a flow chart of a method for processing quantum computing tasks provided by one embodiment of the present application. The execution subject of each step of the method may be a computer device. The method may include the following steps:

[0060] Step 21, transforming the input quantum state of n+m quantum bits through a parameterized quantum circuit corresponding to the target quantum computing task; the n+m quantum bits include n task bits and m auxiliary bits; n and m are positive integers.

[0061] In an embodiment of the present application, a parameterized quantum circuit includes a quantum gate with parameters, and the parameters of the quantum gate with parameters can be adjusted during the execution of a target quantum computing task.

[0062] The above parameterized quantum circuit contains n+m quantum bits, and the quantum gates in the parameterized quantum circuit act on the n+m quantum bits.

[0063] Among them, the above-mentioned n task bits are quantum bits used to perform the target quantum computing task and are used to simulate the quantum system composed of n quantum bits; and the above-mentioned m auxiliary bits are used to expand the expression ability of the parameterized quantum circuit PQC when simulating the quantum system.

[0064] Among them, the above-mentioned transformation processing of the input quantum state of n+m quantum bits through the parameterized quantum circuit corresponding to the target quantum computing task may refer to inputting the above-mentioned input quantum state into a quantum system composed of physical quantum bits in the quantum computing device, and then executing the quantum operation corresponding to the quantum gate in the above-mentioned parameterized quantum circuit on the quantum system through the measurement and control system, thereby transforming the quantum state on the corresponding physical quantum bit.

[0065] Step 22: Measure the output quantum state of the n+m quantum bits to obtain a bit string of n+m quantum bits.

[0066] Among them, after completing a round of execution of the above-mentioned parameterized quantum circuit, the computer equipment can measure the quantum state of each physical quantum bit in the above-mentioned quantum system through the measurement and control system to obtain a bit string corresponding to n+m quantum bits.

[0067] Step 23: When the substring corresponding to the m auxiliary bits in the bit string meets the post-selection condition and the parameterized quantum circuit has not converged, the parameters of the parameterized quantum circuit are updated based on the output quantum states of the n task bits.

[0068] Step 24: When the substring corresponding to the m auxiliary bits in the bit string meets the post-selection condition and the parameterized quantum circuit converges, the calculation result of the target quantum computing task is obtained based on the output quantum state of the n task bits.

[0069] In an embodiment of the present application, the bit string corresponding to the above-mentioned n+m quantum bits includes sub-bit strings corresponding to n task bits and sub-bit strings corresponding to m auxiliary bits; among which, the sub-bit strings corresponding to m auxiliary bits are used for post-selection operations.

[0070] That is to say, if the character string corresponding to the m auxiliary bits in the above bit string meets the post-selection condition, the computer device believes that in this measurement, the quantum state corresponding to the n task bits meets the task execution condition and can be used for the execution of subsequent target quantum computing tasks; optionally, if the character string corresponding to the m auxiliary bits in the above bit string does not meet the post-selection condition, the computer device believes that in this measurement, the quantum state corresponding to the n task bits does not meet the task execution condition and the measurement result can be excluded.

[0071] Please refer to Figure 3 , which shows a framework diagram of quantum computing task processing involved in the embodiment of this application. Figure 3As shown, after executing the parameterized quantum circuit 31 on the quantum computer device, the computer device measures the parameterized quantum circuit 31 to obtain a bit string 32, wherein the bit string 32 includes a substring 32a corresponding to m auxiliary bits; if the substring 32a does not meet the post-selection condition, the computer device excludes the measurement result; if the substring 32a meets the post-selection condition, the computer device obtains the quantum state 33 of the n task bits corresponding to the measurement result; if the parameterized quantum circuit 31 has not converged at this time, the computer device updates the parameters of the parameterized quantum circuit 31 according to the quantum state 33 of the n task bits; if the parameterized quantum circuit 31 has converged at this time, the computer device obtains the calculation result of the target quantum computing task according to the quantum state 33 of the n task bits.

[0072] To summarize, through the scheme shown in the embodiment of the present application, for the PQC corresponding to the variational task, m auxiliary bits are added on the basis of n task bits. During the variational task processing, the measurement results of the output quantum states of the m auxiliary bits are post-selected to select the output quantum states that meet the conditions on the n task bits to update the PQC or obtain the task results; that is, the above scheme can simulate a quantum system with a physical quantum bit scale of n through m+n quantum bits, thereby improving the simulation effect of PQC on the quantum system, thereby improving the expression ability of PQC of the variational task, and then improving the execution effect of the variational task.

[0073] In the NISQ era, the typical disadvantages of quantum hardware are short coherence time and large quantum noise. The enhanced scheme of post-variational selection proposed in each embodiment of this application fully takes into account the characteristics of quantum hardware in the NISQ era. The schemes proposed in each embodiment of this application are perfectly compatible with other post-variational processing schemes, such as the Variational Quantum Neural Network Hybrid Eigensolver (VQNHE), and can be used in combination to further improve the effect of VQE. The schemes shown in each embodiment of this application can lay the foundation for demonstrating effective quantum advantages on NISQ hardware and accelerate the possibility of commercial applications of quantum computers.

[0074] The solutions shown in the various embodiments of this application can be easily applied to quantum hardware evaluation and testing, scientific research, and actual production. Applications include simulating and solving the ground state of the Hamiltonian of systems from condensed matter physics and quantum chemistry problems. As the scale of quantum computers further expands, more efficient variational tasks such as VQE are also expected to play a practical role in fields such as drug design, macromolecular simulation, and new material screening. For example, approximating the ground state of chemical macromolecules or estimating the physicochemical properties of complex systems can be used.

[0075] Please refer to Figure 4 , which shows a flow chart of a quantum computing task processing method provided by an embodiment of the present application. The execution subject of each step of the method can be a computer device. Figure 4 As shown, the method may include the following steps:

[0076] Step 401 , transforming the input quantum state of n+m quantum bits through a parameterized quantum circuit corresponding to a target quantum computing task; the n+m quantum bits include n task bits and m auxiliary bits.

[0077] In the embodiment of the present application, the above n and m are positive integers.

[0078] In one possible implementation, the parameters of the parameterized quantum circuit include parameters for performing a variational transformation on the quantum state of n+m quantum bits.

[0079] In an embodiment of the present application, in addition to a parameterized bit gate that performs a variational transformation on n task bits, the parameterized quantum circuit also includes a parameterized bit gate that performs a variational transformation on m auxiliary bits. Therefore, in the variational task, a suitable measurement result can be screened out by performing a post-selection operation on the substring corresponding to the m auxiliary bits in the measured bit string.

[0080] In a possible implementation, the parameterized quantum circuit includes parameterized entanglement gates between n task bits and m auxiliary bits.

[0081] Please refer to Figure 5 , which shows a circuit structure framework diagram of the parameterized quantum circuit involved in the embodiment of the present application, such as Figure 5 As shown, in addition to the traditional quantum gate acting on the task bit, the circuit of the U(θ) part also adds an entanglement gate that connects the task bit and the auxiliary bit. Figure 5 The parameterized quantum circuit in [ ] performs a transformation V(φ) on the auxiliary bit before postselection, which is equivalent to finding the most suitable postselection measurement basis for the auxiliary bit. θ and φ are the parameters of the parameterized quantum circuit. During the processing of the target quantum computation task, θ and φ can be updated until the parameterized quantum circuit converges. This variational transformation V greatly increases the flexibility of the framework, allowing for automatic trials of optimal measurement bases and postselection results.

[0082] Step 402: Measure the output quantum state of the n+m qubits to obtain a bit string of n+m qubits.

[0083] Step 403 : When the substring corresponding to the m auxiliary bits in the bit string is the target string, it is determined whether the substring corresponding to the m auxiliary bits in the bit string satisfies a post-selection condition.

[0084] In the embodiments of this application, Figure 5 As shown, due to the existence of the variational transformation V, it is equivalent to automatically finding the most suitable post-selection measurement basis of the auxiliary bit during the execution of the target quantum computing task. Therefore, the embodiment of the present application does not need to specifically select the post-selected bitstring. It only needs to set a target string at the initial stage. Without loss of generality, an all-0 string can be used as the above-mentioned target string (an all-1 string or other combination of 0 and 1 can also be used). In subsequent target quantum computing tasks, the target string is maintained as the post-selection condition for post-selection of measurement results. When the parameterized quantum circuit converges, the measurement result selected after passing the target string is the accurate measurement result.

[0085] Step 404 : When the substring corresponding to the m auxiliary bits in the bit string satisfies the post-selection condition and the parameterized quantum circuit has not converged, the parameters of the parameterized quantum circuit are updated based on the output quantum states of the n task bits.

[0086] Step 405 : When the substring corresponding to the m auxiliary bits in the bit string satisfies the post-selection condition and the parameterized quantum circuit converges, the calculation result of the target quantum computing task is obtained based on the output quantum state of the n task bits.

[0087] In one possible implementation, taking the target quantum computing task including the ground state energy solution task as an example, when the substring corresponding to the m auxiliary bits in the bit string meets the post-selection condition and the parameterized quantum circuit has not converged, the parameters of the parameterized quantum circuit are updated based on the output quantum states of the n task bits, including:

[0088] When the substring corresponding to the m auxiliary bits in the bit string satisfies the post-selection condition and the parameterized quantum circuit has not converged, the parameters of the parameterized quantum circuit are updated according to the energy expectation value of the Hamiltonian of the target quantum system under the output quantum state of the n task bits;

[0089] Accordingly, when the substring corresponding to the m auxiliary bits in the bit string satisfies the post-selection condition and the parameterized quantum circuit converges, the calculation result of the target quantum computing task is obtained based on the output quantum state of the n task bits, including:

[0090] When the substring corresponding to the m auxiliary bits in the bit string meets the post-selection condition and the parameterized quantum circuit converges, the energy expectation value of the Hamiltonian is obtained as the ground state energy of the target quantum system.

[0091] In the embodiment of the present application, in the VQE task, it is possible to construct a similar Figure 5 The parameterized quantum circuit is used to measure the output results multiple times (for example, 81921 or 81920 measurements), and by post-selection, the results in which the auxiliary bits in the measurement results are all 0 are retained. The energy expectation value of the Pauli string contained in the Hamiltonian is estimated by the results of the bitstring obtained from these measurements on the task bit, and the energy expectation value of the Hamiltonian is obtained. Subsequently, the parameters θ and φ in the parameterized quantum circuit are updated by the energy expectation value of the Hamiltonian. The above process is iteratively performed until the parameterized quantum circuit converges, and the energy expectation value of the Hamiltonian is obtained as the ground state energy of the quantum system corresponding to the task bit.

[0092] The solution shown in the embodiment of the present application improves the expressiveness of PQC in the variational task by introducing auxiliary bits and performing post-variation selection. Taking the VQE task as an example, the principle of improving the PQC expressiveness can be referred to in the subsequent introduction.

[0093] First, we consider the comparison between the VQE without auxiliary bits and the VQE including auxiliary bits. Then, we analyze the output processing methods of the auxiliary bits including the auxiliary bit VQE, which mainly include no processing (equivalent to taking the Hilbert space trace of the auxiliary bits) and selecting two methods after measuring the auxiliary bits.

[0094] For a VQE system with an auxiliary bit, if the basic PQC structure is the same, then the expressive power of its variational circuit is strictly no less than that of a VQE system without an auxiliary bit. Specifically, by taking the circuit portion on the auxiliary bit as the identity transformation and disabling the associated quantum gates on the auxiliary bit and task bit, the system is reduced back to a VQE system without an auxiliary bit. This rigorously proves that the VQE of the unprocessed auxiliary bit is stronger than a VQE algorithm for a typical physical system size.

[0095] For the auxiliary bit VQE without post-processing, the corresponding wave function is:

[0096]

[0097] Where c is the complex probability amplitude of the wave function, i and j represent the bitstrings corresponding to the measurement basis, s and a represent the physical system bits and auxiliary bits, respectively. For the case where the auxiliary bit is selected to correspond to a bitstring k, the wave function corresponding to the physical system becomes:

[0098]

[0099] The system energy estimates corresponding to not processing and post-selecting auxiliary bits are:

[0100]

[0101]

[0102] Among them, H ii′ is the matrix element corresponding to the Hamiltonian matrix H. From this, we can see that the energy estimate without post-processing can be expressed as the average of the energy estimates of different bitstrings after selection, that is:

[0103]

[0104] in, can be viewed as probability weights, since the normalization of the wave function requires ∑ j w j =1.

[0105] Since the average value of the energy of different post-selections is the same as the energy estimate without processing, there must be some task bits corresponding to the post-selected bitstring k whose system energy estimate is smaller than the energy estimate without post-processing. This is also the theoretical basis for introducing post-selection auxiliary bits in this application to enhance the accuracy of VQE energy estimation.

[0106] In a possible implementation, the input quantum state of the parameterized quantum circuit and the quantum gates in the parameterized quantum circuit have symmetry.

[0107] In one possible implementation, when the target quantum computing task is a task with symmetry requirements, the m auxiliary bits include at least two pairs of auxiliary bits, where m is an even number; and the total spin of the output quantum state of each pair of auxiliary bits in the at least two pairs of auxiliary bits is 0.

[0108] Taking the VQE task as an example, for specific system energy estimation problems, sometimes additional consideration of the symmetry of the system Hamiltonian itself and maintaining it in the circuit assumption will greatly improve the approximation effect. This requires that the input state of the VQE and the quantum gate of the VQE circuit itself have corresponding symmetries. For systems that introduce auxiliary bits and variational post-selection, the following takes the isotropic Heisenberg model with SU(2) symmetry as an example to introduce that the scheme shown in this application can still maintain the corresponding symmetry in the post-selection scheme, that is, maintain the total spin quantum number Conservation.

[0109] When ordinary VQE solves the Heisenberg model problem, its input initial state that keeps the total spin at 0 is a series of Bell pairs:

[0110]

[0111] Accordingly, the variational circuit structure that maintains SU(2) symmetry is a series of parameterized SWAP layers, namely:

[0112]

[0113] Where U is the variational circuit, P is the number of SWAP layers, n is the number of grid points in the physical system, and θ is a series of circuit parameters. The definition of the SWAP two-bit gate is:

[0114]

[0115] For the post-selection case of introducing auxiliary bits, it is necessary to introduce an extra even number of auxiliary bits for the system with an even number of lattice points. The reason is that the total number of spin 1 / 2 degrees of freedom, which is an odd number, does not contain a representation subspace with a total spin of 0. The circuit part can use a parameterized SWAP layer to maintain the symmetry. When post-selecting, it is necessary to post-select Bell pairs with a total spin of 0 on the auxiliary bits so that the remaining physical system still has a total spin of 0. Please refer to Figure 6 , which shows a variational circuit structure diagram for maintaining symmetry involved in an embodiment of the present application, such as Figure 6 As shown, X is the Pauli X gate, H is the Hadamard gate, and the two two-bit gates are the CNOT gate and the parameterized SWAP gate.

[0116] It should be noted that the above embodiments of the present application Figure 6 The variational circuit structure shown is an exemplary circuit structure provided under the condition that the target quantum computing task has symmetry requirements. Optionally, under the condition that the target quantum computing task has symmetry requirements, other circuit structures that meet symmetry requirements can also be used.

[0117] In addition, in the variational circuit structure of the PQC provided in the embodiment of the present application, the number of auxiliary bits is not limited to an even number. For example, in a target quantum computing task that does not require symmetry, the number of auxiliary bits can be an even number or an odd number. Accordingly, the variational circuit structure is not limited to a circuit structure with symmetry.

[0118] In a possible implementation, the m auxiliary bits include at least one first auxiliary bit; the physical quantum bits corresponding to the first auxiliary bit and the n task bits respectively form a one-dimensional ring connection topology structure;

[0119] The first auxiliary bit is connected to the n task bits via a first two-bit gate layer;

[0120] The first two-bit gate layer includes a parameterized SWAP gate between each two adjacent quantum bits in the first auxiliary bit and the n task bits; the parameterized SWAP gates between each two adjacent quantum bits in the first auxiliary bit and the n task bits are arranged in a stepped manner.

[0121] In one possible implementation, the m auxiliary bits further include at least one second auxiliary bit; the second auxiliary bit is connected to the first auxiliary bit via two SWAP gates; and a second dibit gate layer is included between the two SWAP gates;

[0122] The second two-bit gate layer includes the first auxiliary bit and a parameterized SWAP gate between every two adjacent quantum bits in the n task bits.

[0123] This example considers the connection of quantum hardware bits in a one-dimensional ring topology to illustrate the resource utilization of the post-selection scheme in real hardware topology connections. This situation is very common when selecting a well-performing one-dimensional subsystem from a two-dimensional superconducting qubit array for experimentation.

[0124] For traditional VQE schemes, consider a staircase-like arrangement of two-bit gates, where the two-bit gate legs are (1, 2), (2, 3), (3, 4), and so on. The two-bit quantum gate resources consumed by each two-bit gate layer are exactly the same as the size n of the quantum system. For post-selection-enhanced VQE, which introduces an auxiliary bit, the corresponding two-bit gate connection connects all task bits to the auxiliary bit. This connection might seem to require a significant number of additional quantum gates, considering the bit topology of the quantum hardware. However, in reality, under a one-dimensional ring connection topology, the number of two-bit quantum gates required by the post-selection scheme is the same as for traditional VQE. The basic approach is: after the auxiliary bit and the first task bit are entangled via a parameterized two-bit gate, a swap gate (SWAP) is applied to both the auxiliary bit and the first task bit, effectively shifting the auxiliary bit backward by one position. At this time, the auxiliary bit is naturally adjacent to the second task bit. Accordingly, a parameterized two-bit gate and a swap gate can be used between the auxiliary bit and the second task bit. This process is repeated until a whole layer of VQE circuits is completed and the auxiliary bit returns to its original position.

[0125] Please refer to Figure 7 , which shows a schematic diagram of the VQE circuit involved in the embodiment of the present application. Figure 7 As shown, the bold lines indicate the positions of the auxiliary bits. During the execution of the VQE circuit of the entire layer above, since the bit pins of the parameterized two-bit gate and the corresponding exchange gate are consistent, they can be combined and compiled into a universal two-bit gate to act. Therefore, the number of two-bit quantum gates consumed by each layer of VQE circuit is still N, and the quantum resource requirements are the same as those of general VQE. For the VQE case that requires symmetry protection of an even number of auxiliary bits, according to Figure 6 In the N-to-1 connection method, it is only necessary to swap the first auxiliary bit once, and the second auxiliary bit can remain in place.

[0126] It should be noted that the above-described embodiments of the present application illustrate the implementation of quantum bits using only a one-dimensional ring-shaped topology structure consisting of physical quantum bits corresponding to the first auxiliary bit and the n task bits. Alternatively, the quantum circuits described in the embodiments of the present application may also be implemented on quantum computing devices with other connection topologies (e.g., mesh topology).

[0127] The key point of the embodiment of the present application is to introduce auxiliary bits and variational post-selection modules to exchange space (number of bits) for time (circuit depth), thereby increasing the expressive power of the PQC hypothesis and making it have better expressive power and approximation effect in variational tasks. Taking the VQE task as an example, for the traditional VQE scheme, the number of quantum bits used is the same as the scale of the quantum system to be simulated. The variational post-selection enhanced VQE constructed by the embodiment of the present application uses more quantum bits than the quantum system corresponding to the task bit to construct the PQC, and post-selects the excess auxiliary bits at the time of output. Since there is a variational circuit module on the auxiliary bit before post-selection, the post-selected bitstring can be selected as all 0 auxiliary bits without loss of generality. The result of the measurement result that satisfies the post-selection corresponding to the task bit will be used as an estimate of the system energy. The energy result optimized in this way is usually lower than (that is, better than) the result of the traditional VQE.

[0128] Taking the application of the scheme shown in the embodiment of the present application in the post-selection enhanced VQE scheme as an example, the embodiment of the present application applies the above scheme to the ground state energy solution of the two-dimensional transverse field Ising model and the two-dimensional Heisenberg model, and obtains better energy estimates than the general VQE using almost the same number of quantum gates. The values ​​are as follows.

[0129] Case 1: The effect of the two-dimensional square lattice transverse field Ising model.

[0130] Consider the transverse field Ising model with periodic boundary conditions on a 4*3 two-dimensional square grid. Its Hamiltonian is:

[0131]

[0132] in, <ij>Represents the nearest neighbor grid point pair ij on the square grid. i represents the Pauli Z matrix at lattice point i, X i represents the Pauli X matrix at lattice point i; the strict ground state energy of the above model is: -18.914.

[0133] Using a one-dimensional ring quantum hardware topology, the corresponding circuit is assumed to be a Hadamard gate layer plus a ZZ layer and an RX layer with a total of P layers. The two-bit gates contained in the ZZ layer are arranged in a nearest neighbor staircase (1, 2), (2, 3), ... . The mathematical expression of the corresponding variational circuit U is:

[0134]

[0135] Among them, H i is the Hadamard gate acting on the i-th quantum bit, and the matrix is ​​expressed as:

[0136]

[0137] For the general VQE with P=2, 3, and 4 layers, the energy estimates given are: -14.81, -15.41, and -15.62, respectively.

[0138] For the case where an auxiliary bit is introduced and the dual-bit ZZ layer is arranged as a connection between all task bits and the auxiliary bit, the results for P = 2, 3, and 4 layers are -18.59, -18.67, and -18.80, respectively. In this case, the circuit assumes that the variational post-processing part V is a parameterized single-bit rotation. The results are summarized in Table 1.

[0139] Table 1: Comparison of the effects of the transverse field Ising model

[0140] Line depth (number of layers) 2 3 4 Ordinary VQE -14.81 -15.41 -15.62 Post-selection enhanced VQE -18.59 -18.67 -18.80

[0141] Case 2: Effect on the two-dimensional lattice Heisenberg model.

[0142] Consider the Heisenberg model with periodic boundary conditions on a two-dimensional 4*3 square grid. The corresponding system Hamiltonian is:

[0143]

[0144] in, <ij>represents the adjacent grid points on the grid, Y i represents the Pauli Y matrix at lattice point i. This model has SU(2) symmetry. Therefore, the variational circuit assumption used is the input of the initial Bell pair and the P-layer parameterized SWAP layer. In other words, the symmetry-preserving postselection scheme and circuit assumption of this scheme are applied to the Heisenberg model. The strict ground state energy of this model is -29.473.

[0145] If the SWAP layer of the two-bit gate is arranged in a one-dimensional periodic staircase, corresponding to P = 2, 3, and 4 layers, the energy given by the ordinary VQE that maintains symmetry is: -25.57, -28.29, and -28.85.

[0146] If a post-selection scheme with two auxiliary bits is used, which can also maintain symmetry, the energy estimates for line depths P = 2, 3, and 4 are: -25.80, -28.36, and -29.05, respectively. Note that the energy surface corresponding to the Heisenberg model optimization problem is relatively irregular. Both general VQE and post-selection enhanced VQE usually require dozens or even hundreds of independent optimizations with different initialization parameters to find a set of relatively ideal solutions. This application further compares the VQE results without post-selection and with symmetry-breaking post-selection, as summarized in Table 2. Among them, the results in Table 2 fully illustrate the importance of symmetry-preserving post-selection schemes.

[0147] Table 2: Energy estimation of different VQE schemes for the Heisenberg model

[0148]

[0149]

[0150] In summary, the solutions shown in the embodiments of this application have abundant examples that can demonstrate from theoretical and practical problems that post-selection enhanced VQE will give better energy estimates than general VQE, and the consumed quantum hardware resources are basically the same.

[0151] Among them, the above examples of the embodiments of the present application are only illustrated by taking the VQE task as an example, and the optional solutions shown in the embodiments of the present application can also be applied to other variational tasks.

[0152] To summarize, through the scheme shown in the embodiment of the present application, for the PQC corresponding to the variational task, m auxiliary bits are added on the basis of n task bits. During the variational task processing, the measurement results of the output quantum states of the m auxiliary bits are post-selected to select the output quantum states that meet the conditions on the n task bits to update the PQC or obtain the task results; that is, the above scheme can simulate a quantum system with a physical quantum bit scale of n through m+n quantum bits, thereby improving the simulation effect of PQC on the quantum system, thereby improving the expression ability of PQC of the variational task, and then improving the execution effect of the variational task.

[0153] Please refer to Figure 8 , which shows a block diagram of a quantum computing task processing system provided by an embodiment of the present application. The system has the function of implementing the above-mentioned quantum computing task processing method example. Figure 8 As shown, the system may include: a parameterized quantum circuit 801, a measurement module 802, an optimizer 803 and a task processing module 804;

[0154] The parameterized quantum circuit 801 is used to transform the input quantum state of n+m quantum bits; the n+m quantum bits include n task bits and m auxiliary bits; n and m are positive integers;

[0155] The measurement module 802 is configured to measure the output quantum states of the n+m qubits to obtain a bit string of the n+m qubits;

[0156] The optimizer 803 is configured to update the parameters of the parameterized quantum circuit based on the output quantum states of the n task bits when the substring corresponding to the m auxiliary bits in the bit string meets the post-selection condition and the parameterized quantum circuit has not converged;

[0157] The task processing module 804 is configured to obtain a computation result of the target quantum computing task based on the output quantum states of the n task bits when a substring corresponding to the m auxiliary bits in the bit string satisfies a post-selection condition and the parameterized quantum circuit converges.

[0158] In a possible implementation, the system further includes:

[0159] A post-selection module is configured to determine, when the substring corresponding to the m auxiliary bits in the bit string is a target string, whether the substring corresponding to the m auxiliary bits in the bit string satisfies the post-selection condition.

[0160] In a possible implementation, the parameters of the parameterized quantum circuit include parameters for performing a variational transformation on the quantum state of the n+m quantum bits.

[0161] In a possible implementation, the target quantum computing task includes a ground state energy solution task;

[0162] The optimizer is configured to update the parameters of the parameterized quantum circuit according to the energy expectation value of the Hamiltonian of the target quantum system under the output quantum state of the n task bits when the substring corresponding to the m auxiliary bits in the bit string meets the post-selection condition and the parameterized quantum circuit has not converged;

[0163] The task processing module is configured to obtain the energy expectation value of the Hamiltonian as the ground state energy of the target quantum system when a substring corresponding to the m auxiliary bits in the bit string satisfies a post-selection condition and the parameterized quantum circuit converges.

[0164] In a possible implementation, the parameterized quantum circuit includes parameterized entanglement gates between the n task bits and the m auxiliary bits respectively.

[0165] In a possible implementation, the m auxiliary bits include at least one first auxiliary bit; the physical quantum bits corresponding to the first auxiliary bit and the n task bits respectively form a one-dimensional ring connection topology structure;

[0166] The first auxiliary bit is connected to the n task bits via a first two-bit gate layer;

[0167] The first two-bit gate layer includes a parameterized SWAP gate between each adjacent two quantum bits in the first auxiliary bit and the n task bits; the parameterized SWAP gates between each adjacent two quantum bits in the first auxiliary bit and the n task bits are arranged in a stepped manner.

[0168] In a possible implementation, the m auxiliary bits further include at least one second auxiliary bit; the second auxiliary bit is connected to the first auxiliary bit via two SWAP gates; and a second dibit gate layer is included between the two SWAP gates;

[0169] The second two-bit gate layer includes the first auxiliary bit and a parameterized SWAP gate between every two adjacent quantum bits in the n task bits.

[0170] In a possible implementation, the input quantum state of the parameterized quantum circuit and the quantum gates in the parameterized quantum circuit have symmetry.

[0171] In a possible implementation, when the target quantum computing task is a task with symmetry requirements, the m auxiliary bits include at least two pairs of auxiliary bits, and m is an even number;

[0172] The total spin of the output quantum state of each pair of auxiliary bits in the at least two pairs of auxiliary bits is 0.

[0173] According to one aspect of an embodiment of the present application, a computer device is provided, wherein the computer device is used to execute the quantum computing task processing method as described above.

[0174] To summarize, through the scheme shown in the embodiment of the present application, for the PQC corresponding to the variational task, m auxiliary bits are added on the basis of n task bits. During the variational task processing, the measurement results of the output quantum states of the m auxiliary bits are post-selected to select the output quantum states that meet the conditions on the n task bits to update the PQC or obtain the task results; that is, the above scheme can simulate a quantum system with a physical quantum bit scale of n through m+n quantum bits, thereby improving the simulation effect of PQC on the quantum system, thereby improving the expression ability of PQC of the variational task, and then improving the execution effect of the variational task.

[0175] It should be noted that the systems provided in the above embodiments are merely illustrated by the division of the above functional modules when implementing their functions. In actual applications, the above functions can be assigned to different functional modules as needed, that is, the internal structure of the device can be divided into different functional modules to complete all or part of the functions described above. In addition, the systems and method embodiments provided in the above embodiments are based on the same concept. The specific implementation process is detailed in the method embodiment and will not be repeated here.

[0176] In an exemplary embodiment of the present application, a computer device is also provided, which can be used to execute the above-mentioned Figure 2 or Figure 4 The illustrated embodiment provides a method for processing quantum computing tasks.

[0177] It should be understood that the "multiple" mentioned in this article refers to two or more. "And / or" describes the association relationship of associated objects, indicating that three relationships may exist. For example, A and / or B can represent three situations: A exists alone, A and B exist at the same time, and B exists alone. The character " / " generally indicates that the previous and subsequent associated objects are in an "or" relationship. In addition, the step numbers described in this article only exemplify a possible execution sequence between the steps. In some other embodiments, the above steps may also be executed in a non-numbered order, such as two steps with different numbers are executed at the same time, or two steps with different numbers are executed in the opposite order of the diagram. The embodiments of the present application are not limited to this.

[0178] The above description is merely an exemplary embodiment of the present application and is not intended to limit the present application. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present application shall be included in the scope of protection of the present application.< / ij> < / ij>

Claims

1. A method for processing quantum computing tasks, characterized in that: The method comprises: The input quantum state of n+m qubits is transformed and processed by a parameterized quantum circuit corresponding to a target quantum computing task; the n+m qubits include n task bits and m auxiliary bits; n and m are positive integers; the parameterized quantum circuit includes the n+m qubits, and the quantum gate in the parameterized quantum circuit acts on the n+m qubits; the parameters of the parameterized quantum circuit include parameters for performing a variational transformation on the quantum state of the n+m qubits; the parameterized quantum circuit includes parameterized entanglement gates between the n task bits and the m auxiliary bits respectively; the m auxiliary bits include at least one first auxiliary bit; the physical qubits corresponding to the first auxiliary bit and the n task bits respectively form a one-dimensional ring connection topology structure; the first auxiliary bit and the n task bits are connected via a first two-bit gate layer; the first two-bit gate layer includes a parameterized SWAP gate between the first auxiliary bit and each adjacent two qubits in the n task bits; the parameterized SWAP gates between the first auxiliary bit and each adjacent two qubits in the n task bits are arranged in a step-like manner; Measuring the output quantum states of the n+m qubits to obtain a bit string of the n+m qubits; the bit string corresponding to the n+m qubits includes a sub-bit string corresponding to the n task bits and a sub-bit string corresponding to the m auxiliary bits; When the substring corresponding to the m auxiliary bits in the bit string is the target string initially set and the parameterized quantum circuit has not converged, updating the parameters of the parameterized quantum circuit based on the output quantum states of the n task bits; When the substring corresponding to the m auxiliary bits in the bit string is the target string initially set and the parameterized quantum circuit converges, a calculation result of the target quantum computing task is obtained based on the output quantum state of the n task bits.

2. The method according to claim 1, characterized in that The target quantum computing task includes a ground state energy solution task; When a substring corresponding to the m auxiliary bits in the bit string satisfies an initially set target string and the parameterized quantum circuit has not converged, updating the parameters of the parameterized quantum circuit based on the output quantum states of the n task bits includes: When the substring corresponding to the m auxiliary bits in the bit string is a target string initially set and the parameterized quantum circuit has not converged, updating the parameters of the parameterized quantum circuit according to the energy expectation value of the Hamiltonian of the target quantum system under the output quantum state of the n task bits; The method includes, when a substring corresponding to the m auxiliary bits in the bit string is a target string initially set and the parameterized quantum circuit converges, obtaining a calculation result of the target quantum computing task based on the output quantum state of the n task bits, including: When the substring corresponding to the m auxiliary bits in the bit string is the target string initially set and the parameterized quantum circuit converges, the energy expectation value of the Hamiltonian is obtained as the ground state energy of the target quantum system.

3. The method according to claim 1, characterized in that The m auxiliary bits further include at least one second auxiliary bit; the second auxiliary bit is connected to the first auxiliary bit via two SWAP gates; and a second dibit gate layer is included between the two SWAP gates; The second two-bit gate layer includes the first auxiliary bit and a parameterized SWAP gate between every two adjacent quantum bits in the n task bits.

4. The method according to claim 1 or 2, characterized in that In the case that the target quantum computing task is a task with symmetry requirements, the input quantum state of the parameterized quantum circuit and the quantum gates in the parameterized quantum circuit have symmetry.

5. The method according to claim 4, characterized in that The m auxiliary bits include at least two pairs of auxiliary bits, and m is an even number; The total spin of the output quantum state of each pair of auxiliary bits in the at least two pairs of auxiliary bits is 0.

6. A quantum computing task processing system, characterized in that: The system includes: a parameterized quantum circuit, a measurement module, an optimizer, and a task processing module; The parameterized quantum circuit is used to transform the input quantum state of n+m quantum bits; the n+m quantum bits include n task bits and m auxiliary bits; n and m are positive integers; the parameterized quantum circuit includes the n+m quantum bits, and the quantum gate in the parameterized quantum circuit acts on the n+m quantum bits; the parameters of the parameterized quantum circuit include parameters for performing variational transformation on the quantum state of the n+m quantum bits; the parameterized quantum circuit includes parameterized entanglement gates between the n task bits and the m auxiliary bits respectively; the m auxiliary bits include at least one first auxiliary bit; the physical quantum bits corresponding to the first auxiliary bit and the n task bits respectively form a one-dimensional ring connection topology structure; the first auxiliary bit and the n task bits are connected via a first two-bit gate layer; the first two-bit gate layer includes a parameterized SWAP gate between the first auxiliary bit and each adjacent two quantum bits in the n task bits; the parameterized SWAP gates between each adjacent two quantum bits in the first auxiliary bit and the n task bits are arranged in a step-like manner; The measurement module is configured to measure the output quantum state of the n+m qubits to obtain a bit string of the n+m qubits; the bit string corresponding to the n+m qubits includes a sub-bit string corresponding to the n task bits and a sub-bit string corresponding to the m auxiliary bits; The optimizer is configured to update the parameters of the parameterized quantum circuit based on the output quantum states of the n task bits when the substring corresponding to the m auxiliary bits in the bit string is the target string initially set and the parameterized quantum circuit has not converged; The task processing module is configured to obtain a calculation result of a target quantum computing task based on the output quantum state of the n task bits when the substring corresponding to the m auxiliary bits in the bit string is a target string initially set and the parameterized quantum circuit converges.

7. The system according to claim 6, characterized in that The target quantum computing task includes a ground state energy solution task; The optimizer is configured to update the parameters of the parameterized quantum circuit according to the energy expectation value of the Hamiltonian of the target quantum system under the output quantum state of the n task bits when the substring corresponding to the m auxiliary bits in the bit string is the target string initially set and the parameterized quantum circuit has not converged; The task processing module is configured to obtain the energy expectation value of the Hamiltonian as the ground state energy of the target quantum system when the substring corresponding to the m auxiliary bits in the bit string is the target string initially set and the parameterized quantum circuit converges.

8. A computer device, characterized in that: The computer device is used to execute the quantum computing task processing method according to any one of claims 1 to 5.

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