A multi-channel SSPC emergency control circuit based on CPLD

Abstract

The present invention relates to a multi-channel SSPC emergency control circuit based on CPLD, comprising an optocoupler isolation circuit and a CPLD control circuit; the optocoupler isolation circuit converts N-channel external emergency control discrete quantity signals into internal CPLD control signals; the CPLD receives the internal CPLD control signals, expands them into 2^N-channel selection signals through a decoder, and the selection signals are combined with multi-channel programmable NAND gate circuits to output 2^N-channel emergency override signals to control the on / off states of 2^N-channel SSPCs, thereby realizing SSPC emergency logic control. The circuit of the present invention realizes multi-channel SSPC emergency control logic, and solves the problems of slow response speed of SSPC emergency control and inconvenience of logic change.

Description

Technical Field

[0001] The invention relates to the technical field of integrated circuit design, and in particular to a multi-channel SSPC emergency control circuit based on CPLD. Background Art

[0002] At present, complex programmable logic devices (CPLDs) are widely used in the control field of solid-state power controllers (SSPCs) due to their rich resources and flexible use. CPLDs work in conjunction with CPU processors to achieve on / off control, logic control, over-current and short-circuit protection functions of single-channel SSPCs.

[0003] At present, the emergency control of multiple SSPCs is mainly realized by the software program of the CPU processor module and the software program of the processor module of the single SSPC. When the SSPC emergency control signal is collected, the CPU processor sends the SSPC control signal through the internal communication bus to realize the on / off state control of multiple SSPCs. However, in the case of CPU failure or internal communication failure, this control method will fail; in addition, since the control method involves software programs, the response speed is slow; and changing the emergency state of each SSPC requires updating the software program, which is not convenient for adjustment. Summary of the invention

[0004] The purpose of the present invention is to provide a multi-channel SSPC emergency control circuit based on CPLD in response to the above technical problems. By configuring the number of external emergency override discrete quantity signals and CPLD logic output signals, multiple modes of emergency override logic for any SSPC can be realized with fast response speed and high reliability.

[0005] Technical solution of the present invention:

[0006] A multi-channel SSPC emergency control circuit based on CPLD, comprising an optocoupler isolation circuit and a CPLD control circuit;

[0007] The optical coupler isolation circuit converts N external emergency control discrete quantity signals into internal CPLD control signals; the CPLD receives the internal CPLD control signals and expands them into 2 N The selection signal is combined with multiple programmable NAND gate circuits to output 2 N Road emergency override signal, control 2 N The on / off status of the SSPC can be checked to realize the emergency logic control of SSPC.

[0008] It is characterized in that the optocoupler isolation circuit includes a unidirectional optocoupler U1 and multiple current-limiting resistors; the positive electrode of the transmitting end of the unidirectional optocoupler U1 is connected to 28VCC through a current-limiting resistor; the negative electrode of the transmitting end is connected to an external emergency control discrete quantity signal, and the positive electrode of the receiving end is connected to +3.3V; the negative electrode of the receiving end outputs an emergency logic signal, which is connected to the internal ground AGND through a current-limiting resistor.

[0009] The CPLD control circuit is used to embed the SSPC emergency control logic to realize the emergency control of multiple SSPCs, select N IO ports as the input of the emergency logic signal, select 2 N+1 An IO port is used as the output of a single-channel emergency control signal of SSPC, and two IO port outputs are connected to one SSPC to realize the control of two IO ports corresponding to one SSPC.

[0010] The characteristic is that the specification of the CPLD chip is EPM7128AETC100-5N.

[0011] Characterized in that, the N is 4.

[0012] It is characterized in that the optocoupler isolation circuit is composed of a unidirectional optocoupler U1 and current limiting resistors R1, R2, R3, R4, R5, R6, R7, and R8; the four positive electrodes of the transmitting ends of U1 are connected to 28VCC after passing through current limiting resistors R1, R2, R3, and R4 respectively; the negative electrodes of the four transmitting ends are respectively connected to four external emergency control discrete quantity signals E / K_IN1, E / K_IN2, E / K_IN3, and E / K_IN4; the positive electrodes of the four receiving ends are connected to +3.3V; the negative electrodes of the four receiving ends respectively output emergency logic signals YJ1, YJ2, YJ3, and YJ4, and are connected to the internal ground AGND through R5, R6, R7, and R8.

[0013] It is characterized in that the specification of the same-direction optical coupler U1 is (G)HRG3105M-4.

[0014] The invention is characterized in that the CPLD chip is internally composed of a 4-line-16-line decoder, 16 NOT gates and a 16-line-32-line decoder, 4 emergency logic signals YJ1, YJ2, YJ3 and YJ4 are used as 4 inputs of the 4-line-16-line decoder, 16 outputs of the 4-line-16-line decoder are respectively connected to the input of the 16-line-32-line decoder through a NOT gate, the internal logic of the 16-line-32-line decoder realizes the control of 32-line SSPC emergency state discrete quantity signals, every 2 outputs of the 16-line-32-line decoder control 1 SSPC, 2 SSPC emergency state discrete quantity signals are divided into 4 states of "00", "01", "10" and "11", for emergency control configuration of the CPU processor of the single SSPC, and the CPLD chip realizes emergency control of 16 SSPCs in total.

[0015] The optical coupling isolation circuit converts the external emergency control discrete quantity signal into an emergency logic signal that can be collected by the CPLD, thereby achieving complete electrical isolation of the signal.

[0016] It is characterized in that the external emergency control discrete quantity signal is a 28V ground open signal, and the emergency logic signal is a 3.3V high level or a 3.3V ground signal.

[0017] Beneficial effects of the invention:

[0018] The present invention provides a method for realizing multi-channel SSPC emergency control logic by using CPLD and peripheral hardware circuits. The circuit solves the problem that the SSPC emergency control has a slow response speed and is inconvenient for logic change. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] Figure 1 This is the optocoupler isolation circuit diagram;

[0020] Figure 2 It is the CPLD control circuit diagram;

[0021] Figure 3 It is the internal logic diagram of CPLD. DETAILED DESCRIPTION

[0022] The connection structure of the present invention is described in detail below with reference to the accompanying drawings and embodiments.

[0023] Example 1, such as Figure 1 , 2 As shown in FIG. 3 , a CPLD-based multi-channel SSPC emergency control circuit according to an embodiment of the present invention is specifically as follows:

[0024] like Figure 1The optical coupler isolation circuit is shown, which is used to realize the electrical isolation between the external emergency control discrete quantity signal and the internal CPLD interface signal to protect the internal circuit. It is composed of the same-direction optical coupler U1 (specification is (G)HRG3105M-4), current limiting resistors R1, R2, R3, R4, R5, R6, R7, R8; the 4 positive poles of the transmitting end of U1 are connected to 28VCC through R1, R2, R3, R4 respectively; the negative pole of the transmitting end is connected to 4 external emergency control discrete quantity signals E / K_IN1, E / K_IN2, E / K_IN3, E / K_IN4 respectively; the positive poles of the 4 receiving ends are connected to +3.3V; the output emergency logic signals YJ1, YJ2, YJ3, YJ4 of the negative poles of the 4 receiving ends are connected to the internal ground AGND through R5, R6, R7, R8 respectively.

[0025] The resistors R1, R2, R3, and R4 are 5.1 kΩ, and the resistors R5, R6, R7, and R8 are 2 kΩ.

[0026] When the external discrete signal E / K_IN1 is open, the optocoupler is not conducting and the signal YJ1 is AGND; when the external discrete signal E / K_IN1 is the external ground PGND, the optocoupler is conducting and the signal YJ1 is 3.3V.

[0027] like Figure 2 The CPLD control circuit is shown in the figure. It is used to embed the SSPC emergency control logic to realize the emergency control of multiple SSPCs. N IO ports are selected as the emergency logic signal input. In the figure, 4 IO ports of the device are selected. Pins 21, 22, 23, and 24 are connected to signals YJ1, YJ2, YJ3, and YJ4 respectively as 4 emergency logic signal inputs. Select 2 N+1 IO ports are used as emergency logic signal outputs. In the example, select any 32 IO ports, connect signals TTLIN1_1~TTLIN1_16, TTLIN2_1~TTLIN2_16 as emergency logic signal outputs, and every two IO ports correspond to one SSPC control.

[0028] U2 is a CPLD chip with specification EPM7128AETC100-5N.

[0029] like Figure 3This is the internal logic diagram of CPLD, which consists of a 4-line to 16-line decoder (74154), 16 NOT gates and a 16-line to 32-line decoder (self-programming). The 4-way emergency logic signal input YJ1, YJ2, YJ3, and YJ4 are used as the 4-way inputs of A, B, C, and D of the 4-line to 16-line decoder. The 16-way outputs of the 4-line to 16-line decoder are connected to the inputs of the 16-line to 32-line decoder through the NOT gates. The 16-line to 32-line decoder outputs 32-way SSPC emergency state discrete quantity signals through the IO port of the CPLD. Every 2-way SSPC emergency state discrete quantity signals correspond to 1-way SSPC. The 2-way SSPC emergency state discrete quantity signals are divided into 4 states of "00", "01", "10", and "11", which can be used for the CPU processor of a single-way SSPC to perform emergency control configuration, thereby realizing emergency control of 16-way SSPC.

Claims

1. A multi-channel SSPC emergency control circuit based on CPLD, including an optocoupler isolation circuit and a CPLD control circuit; It is characterized in that The optocoupler isolation circuit converts N external emergency control discrete quantity signals into internal CPLD control signals; the CPLD receives the internal CPLD control signals and expands them into 2 N The selection signal is combined with multiple programmable NAND gate circuits to output 2 N Road emergency override signal, control 2 N The on / off status of the SSPC can be checked to realize the emergency logic control of SSPC; The optocoupler isolation circuit includes a unidirectional optocoupler U1 and a plurality of current-limiting resistors; the positive electrode of the transmitting end of the unidirectional optocoupler U1 is connected to 28VCC through a current-limiting resistor; the negative electrode of the transmitting end is connected to an external emergency control discrete quantity signal, and the positive electrode of the receiving end is connected to +3.3V; the negative electrode of the receiving end outputs an emergency logic signal, and is connected to an internal ground AGND through a current-limiting resistor; The CPLD control circuit is used to embed the SSPC emergency control logic to realize the emergency control of multiple SSPCs, select N IO ports as the input of the emergency logic signal, and select 2 N+1 An IO port is used as the output of a single-channel emergency control signal of SSPC, and two IO port outputs are connected to one SSPC to realize the control of two IO ports corresponding to one SSPC.

2. A CPLD-based multi-channel SSPC emergency control circuit as claimed in claim 1, characterized in that: The specification of the CPLD chip is EPM7128AETC100-5N.

3. A CPLD-based multi-channel SSPC emergency control circuit as claimed in claim 2, characterized in that: The N is 4.

4. A CPLD-based multi-channel SSPC emergency control circuit as claimed in claim 3, characterized in that: The optocoupler isolation circuit is composed of a unidirectional optocoupler U1 and current limiting resistors R1, R2, R3, R4, R5, R6, R7, and R8; the four positive electrodes of the transmitting terminals of U1 are connected to 28VCC after passing through current limiting resistors R1, R2, R3, and R4 respectively; the negative electrodes of the four transmitting terminals are respectively connected to four external emergency control discrete signals E / K_IN1, E / K_IN2, E / K_IN3, and E / K_IN4; the positive electrodes of the four receiving terminals are connected to +3.3V; the negative electrodes of the four receiving terminals output emergency logic signals YJ1, YJ2, YJ3, and YJ4 respectively, and are connected to the internal ground AGND through R5, R6, R7, and R8.

5. A CPLD-based multi-channel SSPC emergency control circuit as claimed in claim 4, characterized in that: The specification of the same-direction optical coupler U1 is (G)HRG3105M-4.

6. A CPLD-based multi-channel SSPC emergency control circuit as claimed in claim 5, characterized in that: The CPLD chip is internally composed of a 4-line-16-line decoder, 16 NOT gates and a 16-line-32-line decoder. The 4 emergency logic signals YJ1, YJ2, YJ3 and YJ4 are used as the 4 inputs of the 4-line-16-line decoder. The 16 outputs of the 4-line-16-line decoder are respectively connected to the inputs of the 16-line-32-line decoder through a NOT gate. The internal logic of the 16-line-32-line decoder realizes the control of 32 SSPC emergency state discrete quantity signals. Every 2 outputs of the 16-line-32-line decoder control 1 SSPC. The 2 SSPC emergency state discrete quantity signals are divided into 4 states of "00", "01", "10" and "11", which are used for the CPU processor of the single SSPC to perform emergency control configuration. The CPLD chip realizes emergency control of 16 SSPCs in total.

7. A CPLD-based multi-channel SSPC emergency control circuit as claimed in claim 6, characterized in that: The external emergency control discrete quantity signal is a 28V ground open signal, and the emergency logic signal is a 3.3V high level or a 3.3V ground signal.

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