Test system

Abstract

The present application discloses a test system for testing a device under test, which comprises a test device and a noise generating module. The test device is coupled to the device under test to form a coupling path and to output a test signal to the device under test through the coupling path. The noise generating module is coupled to the coupling path between the device under test and the test device and is used to selectively interfere with the test signal. The test system of the present application can first screen out the device under test that will fail to operate due to noise interference during testing to avoid the device under test from failing to operate due to noise interference in actual application, and can also perform customized testing according to the application status of the device under test in different products.

Description

Technical Field

[0001] The present invention relates to a testing system, and more particularly to a testing system for a dynamic random access memory. Background Technology

[0002] Generally, the signals received by dynamic random access memory (DRAM) in practical applications are somewhat affected by noise, while the test signals used to test DRAM are more perfect. As a result, it becomes difficult to filter out products that will fail due to noise interference during testing. Products that fail in practical applications may be returned or give the impression of poor quality. Therefore, it is necessary to solve this problem. Summary of the Invention

[0003] The purpose of this invention is to provide a testing system that can pre-screen out devices under test (DUTs) that are likely to fail due to noise interference during testing, thus preventing the DUTs from failing due to noise interference in actual applications. Furthermore, it can perform customized testing based on the application status of the DUTs in different products.

[0004] One aspect of this invention is to provide a test system. This test system is used to test a device under test (DUT) and includes a test device and a noise generation module. The test device is coupled to the DUT to form a coupling path and is used to output a test signal to the DUT through the coupling path. The noise generation module is coupled to the coupling path between the DUT and the test device and is used to selectively interfere with the test signal.

[0005] In another embodiment, the noise generation module includes a switching element and at least one passive element, the switching element being connected in series with the at least one passive element, and the switching element being used to turn the noise generation module on or off from the coupling path.

[0006] In another embodiment, at least one passive element includes a resistor, with the two ends of the switching element coupled to the coupling path and the resistor, respectively. The resistor receives a supply voltage, half of the supply voltage, or a ground voltage, and the noise generation module determines the degree of interference to the test signal based on the resistance value of the resistor.

[0007] In another embodiment, at least one passive element further includes a capacitor coupled between the switching element and the resistor, the capacitor being used to isolate the resistor when the test system is in a DC test state.

[0008] In another embodiment, when the switching element is on, the test signal is transmitted to the device under test after being interfered with by the noise generation module.

[0009] In another embodiment, the test signal outputted from the test device is directly transmitted to the device under test when the switch element is open.

[0010] In another embodiment, the test system further comprises a connection module and a carrier module, wherein the carrier module is connected to the connection module, the device under test is placed on the carrier module, and the test device is coupled to the device under test through the connection module and the carrier module.

[0011] In another embodiment, the noise generation module is disposed on the connection module and located between the carrier module and the connection module.

[0012] In another embodiment, the connection module comprises a first circuit board unit and a connection unit, the noise generation module and the connection unit are disposed on opposite sides of the first circuit board unit, and the connection unit is used to receive the test signal.

[0013] In another embodiment, the carrier module comprises a second circuit board unit and a slot unit, the second circuit board unit is connected to the first circuit board unit so that the noise generation module is located between the carrier module and the connection module, and the slot unit is disposed on the second circuit board unit and used to accommodate the device under test.

[0014] By the design of the noise generation module, when testing the device under test, the test signal outputted from the test device is disturbed by the noise generation module, so that the tester can test with the test signal as if disturbed by noise. In this way, the device under test that will fail to operate due to noise interference can be screened out first during testing, avoiding the device under test from being required to be returned or having a poor quality perception due to failure caused by noise interference in actual application. In addition, the tester can not only select to disturb part or all of the noise generation modules, but also individually adjust the disturbance degree of each test signal to simulate the situation faced by the device under test in different products (or commercial devices). In short, the test system of the present application can be customized according to the application status of the device under test in different products. BRIEF DESCRIPTION OF DRAWINGS

[0015] Figure 1 is a schematic diagram of a test system according to some embodiments of the present application.

[0016] Figure 2 is a schematic diagram of a test system according to some embodiments of the present application. Figure 1 is an equivalent circuit schematic diagram of the test system in

[0017] Figure 3 is an equivalent circuit schematic diagram of the test system according to other embodiments of the present application.

[0018] Figure 4is a schematic diagram of an equivalent circuit of a test system according to another embodiment of the present invention.

[0019] Figure 5 is a schematic diagram of an equivalent circuit of a test system according to another embodiment of the present invention.

[0020] Explanation of Reference Numerals:

[0021] 10 - device under test; 100 - test system; 110 - test device; 120 - connection module; 121 - first circuit board unit; 122 - connection unit; 130 - noise generation module; 140 - support module; 141 - second circuit board unit; 142 - slot unit; SW, SW1 ~ SWN - switching element; C, C1 ~ CN - capacitor; R, R1 ~ RN - resistor; VDD - power supply voltage; GND - ground voltage; COM, COM1 ~ COMX - control signal; ADD, ADD1 ~ ADDY - position signal; DQ, DQ1 ~ DQZ - data signal. DETAILED DESCRIPTION

[0022] The following detailed description is made with reference to the accompanying drawings, of which specific embodiments are described in order to explain the present invention, and is not intended to limit the present invention, and the description of the structure and operation is not intended to limit the order of execution, and any structure obtained by recombining the elements, resulting in a device having equivalent efficiency, is within the scope of the present invention.

[0023] The terms used throughout the specification and claims, unless otherwise specifically noted, generally have their ordinary meanings in the field, in the context of the disclosure, and in the context of the specific terms.

[0024] As to "first", "second", and so on used herein, it is not intended to particularly specify the order or sequence of the elements, and is not intended to limit the present invention, but merely to distinguish the elements or operations described with the same technical terms.

[0025] The English index of the element numbers and signal numbers used in the specification and drawings of the present invention is only for the convenience of referring to individual elements and signals, and is not intended to limit the number of the aforementioned elements and signals to a specific number.

[0026] In addition, as to "coupled" or "connected" used herein, it can mean that two or more elements are directly in physical or electrical contact with each other, or indirectly in physical or electrical contact with each other through other elements, or can mean that two or more elements operate or act with each other.

[0027] Please refer to Figure 1One embodiment of the present disclosure is directed to a test system 100. The test system 100 includes a test device 110, a connection module 120, a noise generation module 130, and a carrier module 140. The test system 100 is used to test a device under test 10. During testing, the device under test 10 is placed on the carrier module 140. The test device 110 is coupled to the device under test 10 through the connection module 120 and the carrier module 140 to output test signals to the device under test 10. The noise generation module 130 is coupled to a coupling path between the device under test 10 and the test device 110 to selectively interfere with the test signals to simulate signals that the device under test 10 can receive in actual applications.

[0028] Structurally, the noise generation module 130 is disposed on the connection module 120, and the carrier module 140 is connected to the connection module 120. Specifically, the connection module 120 includes a first circuit board unit 121 and a connection unit 122. The noise generation module 130 and the connection unit 122 are disposed on opposite sides of the first circuit board unit 121. The connection unit 122 is used to receive test signals from the test device 110. In this embodiment, the test device 110 is an automatic test equipment (ATE). The carrier module 140 includes a second circuit board unit 141 and a slot unit 142. The second circuit board unit 141 is connected to the first circuit board unit 121, so that the noise generation module 130 is located between the carrier module 140 and the connection module 120. The slot unit 142 is disposed on the second circuit board unit 141 and is used to accommodate the device under test 10. The device under test 10 is placed on the carrier module 140 by being inserted into the slot unit 142.

[0029] In other embodiments, the number of the device under test 10, the slot unit 142, and the noise generation module 130 is not limited to one. For example, sixty-four slot units 142 can be disposed on the second circuit board unit 141, and the test device 110 can output test signals to sixty-four devices under test 10 installed on the slot units 142 (i.e., there can be sixty-four groups of test signals transmitted to the devices under test 10). Sixty-four noise generation modules 130 can be disposed on the first circuit board unit 121 to selectively interfere with the test signals transmitted to the devices under test 10. In other words, the noise generation modules 130 can selectively interfere with part (e.g., twenty-six groups out of the sixty-four groups) or all (e.g., the sixty-four groups) of the test signals.

[0030] Please refer to Figure 1 , Figure 2 , Figure 2 Description Figure 1Figure 1 shows an equivalent circuit of the test system 100. The DUT 10 on the carrier module 140 receives a supply voltage VDD and a ground voltage GND. The test device 110 is coupled to the DUT 10 through the connection unit 122 to form three coupling paths as shown in Figure 1. These coupling paths are respectively used to pass the test signals from the test device 110 to the DUT 10. The noise generation module 130 is coupled to one of the coupling paths between the DUT 10 and the test device 110. Figure 2

[0031] In particular, the noise generation module 130 includes a switching element SW and at least one passive element, wherein the at least one passive element includes a capacitor C and a resistor R. The switching element SW is coupled to the coupling path and the capacitor C respectively, and the capacitor C is coupled to the switching element SW and the resistor R respectively. In other words, the switching element SW, the capacitor C and the resistor R are connected in series.

[0032] The switching element SW is used to selectively turn on or turn off the noise generation module 130 and the coupling path to which the noise generation module 130 is connected. By turning on or turning off the switching element SW, the noise generation module 130 can selectively interfere with the test signals. In the present embodiment, the switching element SW is a thumbwheel switch or a programmable controlled switch (e.g. a relay), wherein if the switching element SW is a thumbwheel switch, the footprint of the noise generation module 130 on the first circuit board unit 121 can be reduced to save space.

[0033] The capacitor C is used to isolate the resistor R when the test system 100 is in a DC test state, so that the noise generation module 130 can only interfere with the test signals when the test system 100 is in a high frequency test state. In the present embodiment, the capacitance value of the capacitor C ranges from 0.0001 to 0.1 microfarad (μF).

[0034] It is noted that the resistor R receives a corresponding voltage value according to the type of the DUT 10. In the present embodiment, the DUT 10 is a double-data-rate fourth generation synchronous DRAM (DDR4 SDRAM), and to meet the conditions for testing the DDR4 SDRAM, the resistor R receives the supply voltage VDD. For example, the supply voltage VDD can be approximately 1.2 volts (V).

[0035] In operation, by Figure 2 ​The coupling paths shown allow the test device 110 to output the control signal COM, the address signal ADD, and the data signal DQ to the device under test 10. At this time, the noise generation module 130 coupled to the coupling path for transmitting the data signal DQ selectively interferes with the data signal DQ according to the state of the switch element SW. When the switch element SW is open, the data signal DQ is directly transmitted to the device under test 10 to test the device under test 10.

[0036] When the switch element SW is closed, the data signal DQ is reflected by the noise generation module 130 so that the data signal DQ is attenuated or boosted as if it is interfered with noise before being transmitted to the device under test 10 to test the device under test 10. For example, assuming that the data signal DQ encounters 20% noise under real transmission conditions, the ideal voltage value of the data signal DQ transmitted by the test device 110 to the device under test 10 can be set to 5V, and the noise generation module 130 can be set to reflect 20% of the data signal DQ. In this way, the noise generation module 130 can reflect 20% of the data signal DQ and feed it back to the coupling path for transmitting the data signal DQ, so that the voltage value of the data signal DQ input to the device under test 10 is reduced from 5V to 4V. Or for another example, the noise generation module 130 can reflect 20% of the data signal DQ and feed it back to the coupling path for transmitting the data signal DQ, so that the voltage value of the data signal DQ input to the device under test 10 is boosted from 5V to 6V.

[0037] In addition, assuming that the data signal DQ encounters 30% or 40% noise under real transmission conditions. At this time, as long as the resistance value of the resistor R is changed, the noise generation module 130 can be set to reflect 30% or 40% of the data signal DQ to adjust the degree of attenuation or boosting of the data signal DQ. In short, by changing the resistance value of the resistor R, the degree of interference of the noise generation module 130 to the test signal can be determined. In the present embodiment, the resistance value of the resistor R can range from 3 to 120 ohms (Ω).

[0038] In some embodiments of the present disclosure, the device under test 10 is a low-power double-data-rate third generation synchronous DRAM (LPDDR3 SDRAM). To meet the conditions for testing the LPDDR3 SDRAM, the resistor R is set to receive half of the supply voltage VDD / 2. The rest of the settings and operations are similar to those described in relation to Figure 1 、 Figure 2 and will not be described again here.

[0039] In some embodiments of the present disclosure, the device under test 10 is a low-power double-data-rate fourth generation synchronous dynamic random access memory (LPDDR4 SDRAM). Please refer to Figure 3 To meet the testing conditions of the LPDDR4 SDRAM, the resistor R is set to receive the ground voltage GND. The rest of the settings and operations are similar to those described in Figure 1 , Figure 2 and will not be repeated here.

[0040] It can be understood that, although in the embodiment of Figure 2 , only three coupling paths are formed between the testing device 110 and the device under test 10, this is only a convenient example for illustration and is not intended to limit the present disclosure.

[0041] In other embodiments, the coupling paths formed between the testing device 110 and the device under test 10 are not limited to three. Please refer to Figure 4 , six coupling paths are formed between the testing device 110 and the device under test 10 to transmit the control signal COM, the address signal ADD, and the data signals DQ1-DQ4 from the testing device 110 to the device under test 10. If, in actual applications, the data signals DQ1-DQ4 are often subject to noise interference more than the control signal COM and the address signal ADD, at this time, the testing system 100 can correspondingly include four noise generation modules 130, which are respectively coupled to the coupling paths transmitting the data signals DQ1-DQ4 to respectively interfere with the data signals DQ1-DQ4. In this way, the conditions that the device under test 10 may face in actual applications can be simulated.

[0042] In yet other embodiments, the noise generation modules 130 are not limited to being coupled to the coupling paths transmitting the data signals DQ, but can also be used for coupling paths transmitting the address signal ADD or the control signal COM. Please refer to Figure 5 , a plurality of coupling paths are formed between the testing device 110 and the device under test 10 to transmit the control signals COM1-COMX, the address signals ADD1-ADDY, and the data signals DQ1-DQZ from the testing device 110 to the device under test 10. In addition, each coupling path is coupled with a noise generation module 130 to selectively interfere with the control signals COM1-COMX, the address signals ADD1-ADDY, and the data signals DQ1-DQZ during testing.

[0043] It can be understood that, according to the real conditions that the tester wants to simulate, Figure 5The resistance values of the resistors R1-RN in the noise generation module 130 are not limited to being the same. In other words, the resistors R1-RN can have different resistance values. For example, in a commercial device (not shown in the figure), the signal source of the position signal ADD1 comes from a position control circuit (not shown in the figure) that is far away, and the signal source of the control signal COM1 comes from a control circuit (not shown in the figure) that is close. Therefore, the position signal ADD1 can be more affected by noise, and the control signal COM1 can be less affected by noise. In order to simulate the situation that the device under test 10 can encounter in the commercial device, the tester can increase the resistance value of the resistor R1 in the noise generation module 130 that is used to interfere with the position signal ADD1, and decrease the resistance value of the resistor R3 in the noise generation module 130 that is used to interfere with the control signal COM1. In this way, it can be determined whether the device under test 10 operates normally in the commercial device during testing.

[0044] It can also be understood that, according to the actual situation that the tester wants to simulate, Figure 5 It can also be understood that, according to the actual situation that the tester wants to simulate,

[0045] In summary, through the design of the noise generation module 130, the test signals output by the test device 110 are disturbed, so that the tester can test the device under test 10 with test signals that are disturbed by noise. In this way, it can be determined whether the device under test 10 operates normally in the commercial device during testing.

[0046] In addition, the tester can select some or all of the noise generation modules 130 to be disturbed by manipulating the switching elements SW of the noise generation modules 130 to simulate the situation that the device under test 10 is faced with in different products (or commercial devices). Alternatively, the tester can individually adjust the disturbance level of each test signal by individually adjusting the resistance value of the resistors R in the noise generation modules 130 to simulate the situation that the device under test 10 is faced with in different products (or commercial devices). In short, the test system 100 of the present application can perform customized testing according to the application status of the device under test 10 in different products.

[0047] Although the present application has been disclosed in connection with the preferred embodiments shown, it should be understood that certain modifications would occur to those skilled in the art and are intended to be within the scope of the application, which is to be limited only by the principles of the application and the appended claims.

Claims

1. A test system for testing a device under test, characterized by, The test system comprises: a test device coupled to the device under test to form a coupling path and configured to output a test signal to the device under test through the coupling path; and a noise generation module coupled to the coupling path between the device under test and the test device and configured to selectively reflect a proportion of the test signal to interfere with the test signal, the noise generation module comprising a switching element and at least one passive element, the switching element and the at least one passive element being connected in series, the switching element being configured to turn on or turn off the noise generation module from the coupling path, the at least one passive element comprising a resistor, the noise generation module being configured to determine the degree of interference with the test signal by changing the resistance value of the resistor, wherein when the switching element is turned off, the test signal is directly transmitted to the device under test, and when the switching element is turned on, the test signal is reflected by the resistor so that the test signal is transmitted to the device under test after the voltage value is reduced or increased.

2. The test system of claim 1, wherein, The switching element is coupled to the coupling path and the resistor at both ends, and the resistor receives a supply voltage, half of the supply voltage or a ground voltage.

3. The test system of claim 2, wherein, The at least one passive element further comprises a capacitor coupled between the switching element and the resistor, and the capacitor is configured to isolate the resistor when the test system is in a direct current test state.

4. The test system of claim 1, wherein, Further comprising a connection module and a carrying module, wherein the carrying module is connected to the connection module, the device under test is placed on the carrying module, and the test device is coupled to the device under test through the connection module and the carrying module.

5. The test system of claim 4, wherein, The noise generation module is arranged on the connection module and located between the carrying module and the connection module.

6. The test system of claim 4, wherein, The connection module comprises a first circuit board unit and a connection unit, the noise generation module and the connection unit are arranged on opposite sides of the first circuit board unit, and the connection unit is configured to receive the test signal.

7. The test system of claim 6, wherein, The carrying module comprises a second circuit board unit and a slot unit, the second circuit board unit is connected to the first circuit board unit, so that the noise generation module is located between the carrying module and the connection module, and the slot unit is arranged on the second circuit board unit and configured to accommodate the device under test.

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