Silicon carbide diode and preparation method thereof

Abstract

The present invention provides a silicon carbide diode and a preparation method thereof, comprising a silicon carbide substrate, a multi-layer epitaxial layer, a plurality of P-type voltage divider rings, a plurality of P-type diffusion regions, a Schottky barrier layer, an ohmic contact layer, a back metal electrode, a front metal electrode, a silicon dioxide film and a polyimide layer; the back metal electrode and the silicon carbide substrate are both arranged on the ohmic contact layer; the multi-layer epitaxial layer is arranged on the silicon carbide substrate; both ends of the multi-layer epitaxial layer are arranged with a silicon dioxide film; the polyimide layer is arranged on the silicon dioxide film; both ends of the front metal electrode are arranged on the silicon dioxide film; the Schottky barrier layer is arranged on the multi-layer epitaxial layer. The present invention generates a laser beam of specific energy through a laser device, which is directed toward the doped region to achieve selective regional activation, independent activation depth control, and meet the lattice repair and ion activation conditions in the implanted region.

Description

Technical Field

[0001] The present invention relates to the technical field of semiconductor devices, and in particular to a silicon carbide diode and a method for using the same, and in particular to a laser-activated and laser-ohmic-contact-prepared silicon carbide diode and a method for preparing the same. Background Art

[0002] SiC (Silicon Carbide) is also called wide bandgap semiconductor material because its bandgap width is three times that of Si, its high breakdown field strength (0.8E16~3E16V / cm) is 10 times that of Si, and its high thermal conductivity (4.9W / cm K) is about 3.2 times that of Si. In the industry, it is called the third-generation semiconductor material, which can perform the device performance normally under high temperature, high power and high frequency operating environment. Therefore, the third-generation semiconductor-SIC (Silicon Carbide) has become an ideal semiconductor material for making high temperature, high frequency, radiation-resistant and high-power power electronic devices due to its high bandgap width, high blocking voltage and high thermal conductivity.

[0003] For SiC devices, due to the characteristics of the material, ion implantation and activation annealing are recognized as key technologies in the SiC device process. Research on ion implantation and activation annealing of SiC materials has found that because SiC has a greater density than Si, the implantation depth that ions can form in SiC will be smaller under the same energy injection. If the implanted ions reach a deeper implantation area in the SiC material, the injection energy may need to reach the MeV level, so high temperature and multiple injections are used to form a box distribution during injection. However, high-energy ion implantation will cause damage to the material surface and interior of the implanted area. In order to solve the activation problem of the implanted ions and reduce the damage caused by the implantation, annealing after ion implantation is an important process step for activating the implanted ions in the SiC material.

[0004] Traditionally, silicon carbide devices are annealed and activated in an inert atmosphere at 1400-1800 degrees using a high-temperature furnace tube, which can achieve an activation rate greater than 80%. However, due to the high annealing activation temperature, new dislocations will be generated on the SiC surface, and existing dislocations inside will slip, thus causing other damage to the substrate due to the overall high temperature of the substrate.

[0005] SiC is a wide bandgap semiconductor material and is significantly different from traditional SI substrate materials. Metal is directly deposited on the front and back substrates, and a Schottky barrier will be directly established at the interface between the metal and SiC to form a Schottky contact, which will prevent the flow of charge from the metal to the SiC. Therefore, it is necessary to anneal the interface between the metal and SiC so that the metal and SiC react at a certain temperature to generate silicide, so that the metal and SiC form an ohmic contact and the specific contact resistance is reduced as much as possible. The lower the specific contact resistance, the lower the heat generation and power loss of the device during operation.

[0006] Patent document with publication number CN109979829A discloses a method for activation annealing of silicon carbide, comprising the following steps: forming a first protective layer on the surface of the side of the silicon carbide wafer after ion implantation; forming a second protective layer on the surface of the side of the silicon carbide wafer where the first protective layer is formed; annealing the silicon carbide wafer after the second protective layer is formed; during the annealing, the thermal stability of the second protective layer is better than that of the first protective layer. However, the patent document fails to effectively solve the defects of silicon carbide materials and the instability factors introduced by conventional high temperatures, and there is room for improvement.

[0007] The patent document with the publication number CN109509706A discloses a method for preparing a silicon carbide diode and a silicon carbide diode made by the preparation method, the silicon carbide diode comprises a silicon carbide substrate, a silicon carbide epitaxial layer, a patterned field plate dielectric layer, a patterned Schottky contact electrode and an ohmic contact electrode layer; the silicon carbide epitaxial layer is arranged on the front of the silicon carbide substrate; a patterned ion implantation region is arranged in the silicon carbide epitaxial layer and along the upper surface of the silicon carbide epitaxial layer; a patterned field plate dielectric layer is arranged on the upper surface of the silicon carbide epitaxial layer, and a patterned Schottky contact electrode is arranged in the area of ​​the upper surface of the silicon carbide epitaxial layer not covered by the patterned field plate dielectric layer; a part of the upper surface of the patterned field plate dielectric layer is covered by the patterned Schottky contact electrode, and the rest of the area is exposed; the ohmic contact electrode layer is arranged on the back of the silicon carbide substrate. However, the patent document still has the defect of the instability factor introduced by conventional high temperature. Summary of the invention

[0008] In view of the defects in the prior art, an object of the present invention is to provide a silicon carbide diode and a method for preparing the same.

[0009] A silicon carbide diode provided according to the present invention comprises a silicon carbide substrate, a multi-layer epitaxial layer, a plurality of P-type voltage divider rings, a plurality of P-type diffusion regions, a Schottky barrier layer, an ohmic contact layer, a back metal electrode, a front metal electrode, a silicon dioxide film and a polyimide layer;

[0010] The back metal electrode and the silicon carbide substrate are both disposed on the ohmic contact layer, and the ohmic contact layer is located between the back metal electrode and the silicon carbide substrate;

[0011] The multi-layer epitaxial layer is arranged on the silicon carbide substrate, and the silicon carbide substrate is located between the multi-layer epitaxial layer and the ohmic contact layer;

[0012] Both ends of the multi-layer epitaxial layer are provided with a silicon dioxide film, and the multi-layer epitaxial layer is located between the silicon dioxide film and the silicon carbide substrate;

[0013] The polyimide layer is disposed on the silicon dioxide film, and the silicon dioxide film is located between the polyimide layer and the multi-layer epitaxial layer;

[0014] Both ends of the front metal electrode are arranged on the silicon dioxide film, and both ends of the front metal electrode are located between the polyimide layer and the silicon dioxide film;

[0015] The Schottky barrier layer is arranged on the multi-layer epitaxial layer, the Schottky barrier layer is located between the silicon dioxide films at both ends of the multi-layer epitaxial layer, and the Schottky barrier layer is located between the multi-layer epitaxial layer and the front metal electrode.

[0016] Preferably, the multiple epitaxial layers include a first epitaxial layer, a second epitaxial layer and a silicon carbide isolation buffer layer;

[0017] The second epitaxial layer is disposed on the first epitaxial layer, and the first epitaxial layer is disposed on the silicon carbide isolation buffer layer;

[0018] The first epitaxial layer is located between the second epitaxial layer and the silicon carbide isolation buffer layer;

[0019] The silicon carbide isolation buffer layer is disposed on the silicon carbide substrate, and the silicon carbide isolation buffer layer is located between the silicon carbide substrate and the first epitaxial layer;

[0020] The silicon dioxide film and the Schottky barrier layer are both disposed on the second epitaxial layer.

[0021] Preferably, the silicon carbide substrate is an N-type conductive material with a thickness of 200um to 400um; and the silicon carbide isolation buffer layer is an N-type silicon carbide conductive material with a thickness of 0.5um to 1.5um.

[0022] Preferably, the first epitaxial layer is an N-type silicon carbide conductive material with a thickness of 0.5um to 5um and a resistivity of 10 16 ~10 17 The second epitaxial layer is an N-type silicon carbide conductive material with a thickness of 2-50um and a resistivity of 10 15 ~10 16 .

[0023] Preferably, the thickness of the front metal electrode is 1 um to 10 um; the thickness of the polyimide film is 1 um to 5 um; and the thickness of the back metal electrode is 1 um to 10 um.

[0024] The present invention also provides a method for preparing the above-mentioned silicon carbide diode, comprising the following steps:

[0025] Step 1: growing the silicon carbide isolation buffer layer on the upper surface of the silicon carbide substrate;

[0026] Step 2: forming a plurality of epitaxial layers by growing and depositing on the silicon carbide isolation buffer layer in multiple steps;

[0027] Step 3: growing and depositing the silicon dioxide film on the epitaxial layer;

[0028] Step 4: etching the epitaxial layer by a photoresist coating, exposure and development process to form a P-type voltage divider ring window and a P-type diffusion area window in the active area on the epitaxial layer, and finally forming the P-type voltage divider ring and the P-type diffusion area by multiple P-type ion implantations;

[0029] Step 5: depositing the Schottky barrier layer on the epitaxial layer;

[0030] Step 6: depositing metal or composite metal on the Schottky barrier layer, and etching to form the front metal electrode through a photoresist coating, exposure and development process;

[0031] Step 7: depositing the polyimide layer on the front metal electrode, etching it through a photoresist coating, exposure and development process to form a metal passivation layer, and forming a terminal passivation layer with the silicon dioxide film;

[0032] Step 8: grinding and thinning the silicon carbide substrate, and depositing or sputtering metal on the back side of the silicon carbide substrate as the ohmic contact layer;

[0033] Step 9: Depositing metal on the ohmic contact layer to form the back metal electrode.

[0034] Preferably, in step 1, the oxide layer on the silicon carbide substrate is removed, and the specific process is: the silicon carbide substrate is cleaned with a cleaning solution, and then the silicon carbide substrate is repeatedly cleaned with deionized water, and the silicon carbide substrate is blown dry and dried with nitrogen.

[0035] Preferably, in the step 1, a carbon film is deposited on the silicon carbide substrate, and laser annealing is performed to activate the carbon film after the deposition, and the carbon film is removed by etching or debonding after the laser annealing;

[0036] The carbon film has a thickness of 10nm to 500nm and is realized by sputtering or coating PR glue; the laser uses an infrared and green light dual light source system to generate a wavelength in the range of 527nm to 980nm, a pulse width of 100ns to 500ns, and a pulse frequency of 1KHz to 10KHz.

[0037] Preferably, in step 4, the P-type ions implanted are Al ions or boron ions, the implantation temperature is 300-700 degrees, and the implantation energy is 30-800kev.

[0038] Preferably, in step 8, the ohmic contact is formed by laser annealing;

[0039] The laser uses a dual-light source system of ultraviolet light and green light to generate a wavelength of 355nm to 527nm, a spot size of 100um to 500um adjustable, a pulse width of 100ns to 300ns, and a pulse frequency of 1KHz to 10KHz.

[0040] Compared with the prior art, the present invention has the following beneficial effects:

[0041] 1. The present invention generates a laser beam of specific energy through a laser device, which is directed toward the implanted doped region, thereby heating the implanted doped region and a certain implanted doped depth range to a temperature of 1200° C. and 2000° C., thereby realizing selective regional activation and independent activation depth control, and satisfying the lattice repair and ion activation conditions in the implanted region;

[0042] 2. The present invention explores more suitable activation conditions by setting the conditions of laser wavelength, spot size, pulse width, energy, and frequency, and cooperates with the X\Y motion stage scanning scheme. A larger spot size can achieve high flat top uniformity, ensuring uniform microscopic morphology and complete splicing of the process treatment, significantly improving the activation rate of laser-activated ions, and improving uniformity;

[0043] 3. The present invention selects relatively suitable annealing conditions for different metals, controls the temperature field by adjusting laser parameters, and activates depth control, so that the interface temperature between the metal film and SiC meets the ohmic contact condition, achieving a very small specific contact resistance, thereby improving the performance of silicon carbide devices and enhancing device reliability;

[0044] 4. The present invention uses a method of forming ohmic contact by laser annealing, selects a dual light source system, and sets the conditions of laser wavelength, spot size, pulse width, energy, and frequency to find out more suitable activation conditions for different metals. By adjusting the laser parameters to control the temperature field and activation depth, the interface temperature between the metal film and SiC meets the ohmic contact condition, and other deep areas on the front or back of the wafer are not affected by high temperature. BRIEF DESCRIPTION OF THE DRAWINGS

[0045] Other features, objects and advantages of the present invention will become more apparent from the detailed description of non-limiting embodiments made with reference to the following drawings:

[0046] Figure 1 It is a schematic structural diagram of the silicon carbide diode of the present invention.

[0047] The figure shows:

[0048] Silicon carbide substrate 1 Ohmic contact layer 8

[0049] Silicon carbide isolation buffer layer 2 Back metal electrode 9

[0050] First epitaxial layer 3 Front metal electrode 10

[0051] Second epitaxial layer 4 Silicon dioxide film 11

[0052] P-type voltage divider ring 5 Polyimide layer 12

[0053] P-type diffusion region 6 Multi-layer epitaxial layer 13

[0054] Schottky barrier layer 7 DETAILED DESCRIPTION

[0055] The present invention is described in detail below in conjunction with specific embodiments. The following embodiments will help those skilled in the art to further understand the present invention, but are not intended to limit the present invention in any form. It should be noted that, for those of ordinary skill in the art, several changes and improvements can also be made without departing from the concept of the present invention. These all belong to the protection scope of the present invention.

[0056] Embodiment 1:

[0057] like Figure 1 As shown, this embodiment provides a silicon carbide diode, including a silicon carbide substrate 1, a multi-layer epitaxial layer, a plurality of P-type voltage divider rings 5, a plurality of P-type diffusion regions 6, a Schottky barrier layer 7, an ohmic contact layer 8, a back metal electrode 9, a front metal electrode 10, a silicon dioxide film 11, and a polyimide layer 12. The back metal electrode 9 and the silicon carbide substrate 1 are both arranged on the ohmic contact layer 8, and the ohmic contact layer 8 is located between the back metal electrode 9 and the silicon carbide substrate 1, the multi-layer epitaxial layer 13 is arranged on the silicon carbide substrate 1, and the silicon carbide substrate 1 is located between the multi-layer epitaxial layer 13 and the ohmic contact layer 8, both ends of the multi-layer epitaxial layer 13 are provided with a silicon dioxide film 11, and the multi-layer epitaxial layer 13 is located between the silicon dioxide film 11 and the silicon carbide substrate 1, and the polyimide layer 12 is arranged on the silicon dioxide film 11 The silicon dioxide film 11 is located between the polyimide layer 12 and the multilayer epitaxial layer 13, both ends of the front metal electrode 10 are arranged on the silicon dioxide film 11, both ends of the front metal electrode 10 are located between the polyimide layer 12 and the silicon dioxide film 11, the Schottky barrier layer 7 is arranged on the multilayer epitaxial layer 13, the Schottky barrier layer 7 is located between the silicon dioxide film 11 at both ends of the multilayer epitaxial layer 13, and the Schottky barrier layer 7 is located between the multilayer epitaxial layer 13 and the front metal electrode 10.

[0058] The silicon carbide substrate 1 is an N-type conductive material with a thickness of 200um to 400um, and the silicon carbide isolation buffer layer 2 is an N-type silicon carbide conductive material with a thickness of 0.5um to 1.5um. The thickness of the front metal electrode 10 is 1um to 10um; the thickness of the polyimide film is 1um to 5um; and the thickness of the back metal electrode 9 is 1um to 10um.

[0059] The multilayer epitaxial layer includes a first epitaxial layer 3, a second epitaxial layer 4 and a silicon carbide isolation buffer layer 2. The second epitaxial layer 4 is arranged on the first epitaxial layer 3, the first epitaxial layer 3 is arranged on the silicon carbide isolation buffer layer 2, the first epitaxial layer 4 is located between the second epitaxial layer 3 and the silicon carbide isolation buffer layer 2, the silicon carbide isolation buffer layer 2 is arranged on the silicon carbide substrate 1, the silicon carbide isolation buffer layer 2 is located between the silicon carbide substrate 1 and the first epitaxial layer 3, and the silicon dioxide film 11 and the Schottky barrier layer 7 are both arranged on the second epitaxial layer 3.

[0060] The first epitaxial layer 3 is an N-type silicon carbide conductive material with a thickness of 0.5um to 5um and a resistivity of 10 16 ~10 17 The second epitaxial layer 4 is an N-type silicon carbide conductive material with a thickness of 2-50um and a resistivity of 10 15 ~10 16 .

[0061] This embodiment also provides a method for preparing the above-mentioned silicon carbide diode, comprising the following steps:

[0062] Step 1: growing a silicon carbide isolation buffer layer 2 on the upper surface of the silicon carbide substrate 1; removing the oxide layer on the silicon carbide substrate 1, the specific process is: using a cleaning solution to clean the silicon carbide substrate 1, and then using deionized water to repeatedly clean the silicon carbide substrate 1, and blowing and drying the silicon carbide substrate 1 with nitrogen; depositing a carbon film on the silicon carbide substrate 1, and performing laser annealing activation after the carbon film is deposited, and removing the carbon film by etching or debonding after laser annealing, the carbon film thickness is 10nm ~ 500nm, and the carbon film is realized by sputtering or coating PR glue; the laser uses an infrared and green light dual light source system to generate a wavelength in the range of 527nm ~ 980nm, a pulse width of 100ns ~ 500ns, and a pulse frequency of 1KHz ~ 10KHz.

[0063] Step 2: Form a multi-layer epitaxial layer by multiple growth and deposition on the silicon carbide isolation buffer layer 2.

[0064] Step 3: Deposit a silicon dioxide film 11 on the epitaxial layer.

[0065] Step 4: Etch the epitaxial layer through the photoresist coating, exposure and development process to form a P-type voltage divider ring window and a P-type diffusion area window in the active area on the epitaxial layer, and finally form a P-type voltage divider ring 5 and a P-type diffusion area 6 by multiple P-type ion implantations; the P-type ion implantation is Al ions or boron ions, the implantation temperature is 300-700 degrees, and the implantation energy is 30-800kev.

[0066] Step 5: Deposit a Schottky barrier layer 7 on the epitaxial layer.

[0067] Step 6: depositing metal or composite metal on the Schottky barrier layer 7, and etching to form a front metal electrode 10 through a photoresist coating, exposure and development process.

[0068] Step 7: deposit a polyimide layer 12 on the front metal electrode 10 , and perform etching through a photoresist coating, exposure and development process to form a metal passivation layer, and form a terminal passivation layer with the silicon dioxide film 11 .

[0069] Step 8: Grind and thin the silicon carbide substrate 1, and deposit or sputter metal on the back side of the silicon carbide substrate 1 as an ohmic contact layer 8; the ohmic contact is annealed by laser, and the laser uses a dual light source system of ultraviolet light and green light to generate a wavelength of 355nm to 527nm, a spot size of 100um to 500um adjustable, a pulse width of 100ns to 300ns, and a pulse frequency of 1KHz to 10KHz.

[0070] Embodiment 2:

[0071] Those skilled in the art may understand this embodiment as a more specific description of Embodiment 1.

[0072] like Figure 1 As shown, this embodiment provides a silicon carbide diode prepared by laser activation and laser ohmic contact and a preparation method thereof, a silicon carbide diode, a silicon carbide substrate 1, a silicon carbide isolation buffer layer 2, a multi-layer epitaxial layer, a plurality of P-type voltage divider rings 5, a plurality of P-type diffusion regions 6, a Schottky barrier layer 7, an ohmic contact layer 8, a back metal electrode 9, a front metal electrode 10, a silicon dioxide film 11 and a polyimide layer 12.

[0073] A silicon carbide isolation buffer layer 2 is grown on a silicon carbide substrate 1, and a first epitaxial layer 3 and a second epitaxial layer 4 are grown on the silicon carbide isolation buffer layer 2 (the silicon carbide isolation buffer layer 2, the first epitaxial layer 3, and the second epitaxial layer 4 form a multi-layer epitaxial layer), a plurality of P-type voltage divider rings 5, a P-type diffusion region 6, and a Schottky barrier layer 7 are generated on the second epitaxial layer, an ohmic contact layer 8 and a back metal electrode 9 are generated on the silicon carbide substrate 1, a silicon dioxide film 11 and a front metal electrode 10 are grown or deposited on the silicon carbide substrate 1, and a polyimide layer 12 is deposited on the front electrode metal 10 to form a passivation layer.

[0074] The specific steps are as follows:

[0075] First, a silicon carbide isolation buffer layer 2 is grown on the upper surface of the silicon carbide substrate 1, and on this basis, a first epitaxial layer 3 and a second epitaxial layer 4 are grown (but not limited to the first epitaxial layer and the second epitaxial layer, and a third epitaxial layer, a fourth epitaxial layer, etc. can also be added) and deposited twice or more times to form a multi-layer epitaxial layer.

[0076] The silicon carbide substrate 1 is an N-type conductive material with a thickness of 200 to 400 um; the silicon carbide isolation buffer layer 2 is an N-type silicon carbide conductive material with a thickness of 0.5 to 1.5 um; the first epitaxial layer 3 is an N-type silicon carbide conductive material with a thickness of 0.5 to 5 um and a resistivity of 10 16 ~10 17 The second epitaxial layer 4 is an N-type silicon carbide conductive material with a thickness of 2 to 50 um and a resistivity of 10 15 ~10 16 .

[0077] A protective layer silicon dioxide film 11 is grown on the second epitaxial layer 4. The silicon dioxide film 11 is realized by deposition, and is etched by a photoresist coating, exposure and development process to form a P-type voltage divider ring window and a P-type diffusion area window in the active area. Through multiple P-type ion implantations, a P-type voltage divider ring 5 and a P-type diffusion area 6 are finally formed in stages. The P-type ion implantation is Al ions or boron ions, the implantation temperature is 300 to 700 degrees, and the implantation energy is 30 to 800 keV.

[0078] To remove the oxide layer from the silicon carbide substrate 1, a cleaning solution can be used for cleaning, and deionized water can be used for repeated cleaning, nitrogen drying, and drying. In order to avoid carbonization of the surface of the silicon carbide substrate 1 after high-temperature annealing of the silicon carbide substrate 1, a carbon film is deposited on the silicon carbide substrate 1, and laser annealing activation is performed after the carbon film is deposited. The thickness of the carbon film is 10 to 500 nm, and the carbon film can be achieved by sputtering or coating PR glue. The laser uses an infrared and green light dual light source system to generate a wavelength in the range of 527nm to 980nm, a pulse width of 100ns to 500ns, a pulse frequency of 1 to 10KHz, and a spot size of 100 to 1000um that can be adjusted and configured, and the activation depth is independently controlled within the range of 8 microns. The activation temperature is configured within the range of 1200 to 2000 degrees, and the maximum energy density can reach 18J / cm 2 , X\Y motion stage scanning scheme, one or more scans parallel to the X axis and / or Y axis. Removal of the carbon film after laser annealing can be achieved by etching or debonding.

[0079] Sacrificial oxidation is performed on the second epitaxial layer 4, 100 to 200 angstroms of silicon dioxide is grown using thermal oxygen and removed, and then oxidation is performed to grow a silicon dioxide film 11, which is achieved by deposition and has a thickness of 8000 to 20000 angstroms. The silicon dioxide film 11 is etched by a photoresist coating, exposure and development process to form an electrode window.

[0080] The metal deposited on the second epitaxial layer 4 is not limited to TI, NI, MO and the like. The deposited metal and the N-type silicon atomic layer are alloyed to form a Schottky barrier layer 7. The alloying temperature of the deposited metal and the N-type silicon atomic layer of the Schottky barrier layer 7 is 400-600 degrees.

[0081] Metals, but not limited to TI, NI, AG, AL, CU, or composite metals, are deposited on the Schottky barrier layer 7 and etched through a photoresist coating, exposure, and development process to form a front metal electrode 10, the thickness of which is 1 to 10 um.

[0082] A polyimide layer 12 is deposited on the front metal electrode 10, and is etched through a photoresist coating, exposure and development process to form a metal upper passivation layer, and forms a terminal passivation layer with the silicon dioxide film 11 under the metal. The thickness of the polyimide film is 1um to 5um.

[0083] A method for preparing a silicon carbide diode prepared by laser activation and laser ohmic contact, further comprising the following steps: grinding and thinning the silicon wafer of the silicon carbide substrate 1, thinning the silicon wafer to a thickness of 100 to 300 um, and depositing or sputtering (TI, NI, MO, etc. but not limited to) on the back of the silicon wafer as an ohmic contact layer 8 with a thickness of 10nm to 200nm. The back ohmic contact uses laser annealing, and the laser uses an ultraviolet light source and a green light dual light source system to generate a wavelength of 355nm to 527nm, a spot size of 100 to 500um adjustable, a pulse width of 100ns to 300ns, a pulse frequency of 1 to 10KHz, and realizes independent control of the annealing depth within a range of 2 microns, and the annealing temperature is configured within a range of 800 to 1200 degrees, wherein the maximum energy density can reach 3J / cm 2 The energy at the surface is preferably 2.4 J / cm 2 , X\Y motion stage scanning scheme, one or more scans parallel to the X-axis and / or Y-axis.

[0084] The back metal electrode 9 is subjected to metal deposition but is not limited to TI, Ni metal layer and Ag metal layer or continuous multi-layer metal, and the thickness of the back metal electrode is 1-10 um.

[0085] This embodiment can perform ohmic contact laser annealing for different metal types and different film thicknesses by adjusting the dual light source system and pulse width of the laser.

[0086] The present invention generates a laser beam of specific energy through a laser device, which is directed toward the implanted doped region to achieve selective region activation and independent activation depth control to meet the lattice repair and ion activation conditions in the implanted region.

[0087] In the description of the present application, it should be understood that the terms "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", etc., indicating orientations or positional relationships, are based on the orientations or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present application and simplifying the description, and do not indicate or imply that the referred device or element must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be understood as a limitation on the present application.

[0088] The above describes the specific embodiments of the present invention. It should be understood that the present invention is not limited to the above specific embodiments, and those skilled in the art can make various changes or modifications within the scope of the claims, which does not affect the essence of the present invention. In the absence of conflict, the embodiments of the present application and the features in the embodiments can be combined with each other arbitrarily.

Claims

1. A method for preparing a silicon carbide diode, characterized in that: The silicon carbide diode comprises a silicon carbide substrate (1), a plurality of epitaxial layers, a plurality of P-type voltage divider rings (5), a plurality of P-type diffusion regions (6), a Schottky barrier layer (7), an ohmic contact layer (8), a back metal electrode (9), a front metal electrode (10), a silicon dioxide film (11), and a polyimide layer (12); The back metal electrode (9) and the silicon carbide substrate (1) are both arranged on the ohmic contact layer (8), and the ohmic contact layer (8) is located between the back metal electrode (9) and the silicon carbide substrate (1); The multi-layer epitaxial layer (13) is arranged on the silicon carbide substrate (1), and the silicon carbide substrate (1) is located between the multi-layer epitaxial layer (13) and the ohmic contact layer (8); Silicon dioxide films (11) are provided at both ends of the multi-layer epitaxial layer (13), and the multi-layer epitaxial layer (13) is located between the silicon dioxide film (11) and the silicon carbide substrate (1); The polyimide layer (12) is arranged on the silicon dioxide film (11), and the silicon dioxide film (11) is located between the polyimide layer (12) and the multi-layer epitaxial layer (13); Both ends of the front metal electrode (10) are arranged on the silicon dioxide film (11), and both ends of the front metal electrode (10) are located between the polyimide layer (12) and the silicon dioxide film (11); The Schottky barrier layer (7) is arranged on the multi-layer epitaxial layer (13), the Schottky barrier layer (7) is located between the silicon dioxide films (11) at both ends of the multi-layer epitaxial layer (13), and the Schottky barrier layer (7) is located between the multi-layer epitaxial layer (13) and the front metal electrode (10); The steps include: Step 1: growing a silicon carbide isolation buffer layer (2) on the upper surface of the silicon carbide substrate (1); Step 2: forming a plurality of epitaxial layers by growing and depositing the epitaxial layers on the silicon carbide isolation buffer layer (2) in multiple steps; Step 3: growing and depositing the silicon dioxide film (11) on the epitaxial layer; Step 4: etching the epitaxial layer through a photoresist coating, exposure and development process to form a P-type voltage divider ring window and a P-type diffusion region window in the active region on the epitaxial layer, and finally forming the P-type voltage divider ring (5) and the P-type diffusion region (6) in stages through multiple P-type ion implantations; Step 5: depositing the Schottky barrier layer (7) on the epitaxial layer; Step 6: depositing a metal or a composite metal on the Schottky barrier layer (7), and etching through a photoresist coating, exposure and development process to form the front metal electrode (10); Step 7: depositing the polyimide layer (12) on the front metal electrode (10), etching through a photoresist coating, exposure and development process to form a metal passivation layer, and forming a terminal passivation layer with the silicon dioxide film (11); Step 8: grinding and thinning the silicon carbide substrate (1), and depositing or sputtering metal on the back side of the silicon carbide substrate (1) as the ohmic contact layer (8); Step 9: performing metal deposition on the ohmic contact layer (8) to form the back metal electrode (9); In the step 1, a carbon film is deposited on the silicon carbide substrate (1), and laser annealing is performed to activate the carbon film after the carbon film is deposited, and the carbon film is removed by etching or debonding after the laser annealing; The carbon film has a thickness of 10 nm to 500 nm, and is formed by sputtering or coating PR glue; the laser uses an infrared and green light dual light source system to generate a wavelength in the range of 527 nm to 980 nm, a pulse width of 100 ns to 500 ns, and a pulse frequency of 1 KHz to 10 KHz; In the step 8, the ohmic contact is laser annealed; The laser uses a dual-light source system of ultraviolet light and green light to generate a wavelength of 355nm~527nm, a spot size of 100um~500um adjustable, a pulse width of 100ns~300ns, and a pulse frequency of 1 KHz~10KHz.

2. The method for preparing a silicon carbide diode according to claim 1, characterized in that: In the step 1, the oxide layer on the silicon carbide substrate (1) is removed. The specific process is: the silicon carbide substrate (1) is cleaned with a cleaning liquid, and then the silicon carbide substrate (1) is repeatedly cleaned with deionized water, and the silicon carbide substrate (1) is dried and baked with nitrogen.

3. The method for preparing a silicon carbide diode according to claim 1, characterized in that: In step 4, the P-type ion implantation is Al ion or boron ion, the implantation temperature is 300-700 degrees, and the implantation energy is 30-800kev.

4. The method for preparing a silicon carbide diode according to claim 1, characterized in that: The multiple epitaxial layers include a first epitaxial layer (3), a second epitaxial layer (4) and a silicon carbide isolation buffer layer (2); The second epitaxial layer (4) is arranged on the first epitaxial layer (3), and the first epitaxial layer (3) is arranged on the silicon carbide isolation buffer layer (2); The first epitaxial layer (3) is located between the second epitaxial layer (4) and the silicon carbide isolation buffer layer (2); The silicon carbide isolation buffer layer (2) is arranged on the silicon carbide substrate (1), and the silicon carbide isolation buffer layer (2) is located between the silicon carbide substrate (1) and the first epitaxial layer (3); The silicon dioxide film (11) and the Schottky barrier layer (7) are both arranged on the second epitaxial layer (4).

5. The method for preparing a silicon carbide diode according to claim 4, characterized in that: The silicon carbide substrate (1) is an N-type conductive material with a thickness of 200 um to 400 um; the silicon carbide isolation buffer layer (2) is an N-type silicon carbide conductive material with a thickness of 0.5 um to 1.5 um.

6. The method for preparing a silicon carbide diode according to claim 4, characterized in that: The first epitaxial layer (3) is an N-type silicon carbide conductive material with a thickness of 0.5 um to 5 um and a resistivity of 10 16 ~10 17 The second epitaxial layer (4) is an N-type silicon carbide conductive material with a thickness of 2-50 um and a resistivity of 10 15 ~10 16 .

7. The method for preparing a silicon carbide diode according to claim 1, characterized in that: The thickness of the front metal electrode (10) is 1 um to 10 um; the thickness of the polyimide layer is 1 um to 5 um; and the thickness of the back metal electrode (9) is 1 um to 10 um.

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