A special frequency sweeper for debugging digital radio

Abstract

The present invention specifically discloses a special frequency sweeper for debugging a digital radio, including a liquid crystal display, a microcontroller, a touch keyboard, a DDS signal source, a broadband amplifier, a first attenuation network, a first isolation amplifier, a true effective value conversion circuit, a comparison attenuation circuit, a logarithmic detector, a low-pass filter and an A / D sampling circuit; it also includes a second isolation amplifier, a second attenuation network and a third isolation amplifier connected in sequence, and a relay. The present invention uses a microprocessor to control a direct frequency synthesis (DDS) chip to generate a frequency sweep signal required for debugging a radio, and the frequency sweep range is 100KHz-3MHz, and the frequency characteristic curve is displayed on an LCD screen. The digital function makes debugging and reading values ​​very convenient.

Description

Technical Field

[0001] The invention relates to the field of electronic technology, in particular to a special frequency sweeper for debugging a digital radio. Background Art

[0002] Radio assembly and tuning is an important basic practical course for most college students majoring in electronics and communications. It enables students to better master the working principles and debugging process of communication receiving equipment.

[0003] At present, the practical training part of the electronic circuit course in colleges and universities basically requires students to assemble and adjust a 6-transistor superheterodyne radio. However, most colleges and universities are limited by the conditions of experimental instruments and rarely have dedicated frequency sweepers for radio debugging. As a result, most students only solder the components and receive the broadcast signal, and they consider the experimental task completed. Since the performance indicators of the radio are not debugged, it is difficult to better understand and master the principles and concepts described in the textbook. In order for students to truly master the debugging of radio technical indicators, a dedicated frequency sweeper must be used. At present, there is no cost-effective dedicated frequency sweeper for college teaching on the market, and the factory-specific radio debugging frequency sweepers are mostly imported from Japan, which are expensive and not suitable for teaching and training.

[0004] Aiming at the actual needs of colleges and universities, a cost-effective digital radio debugging special frequency sweeper is developed, which has high application value. Summary of the invention

[0005] The purpose of the present invention is to utilize a microprocessor to control a direct frequency synthesis (DDS) chip to generate a frequency signal required for debugging a radio, and to develop a special frequency sweeper for debugging a digital radio.

[0006] In order to achieve the above-mentioned object, the present invention provides a special frequency sweeper for debugging a digital radio, comprising a liquid crystal display, a microcontroller, a touch keyboard, a DDS signal source, a broadband amplifier, a first attenuation network, a first isolation network, a true effective value conversion circuit, a comparison attenuation circuit, a logarithmic detector, a low-pass filter and an A / D sampling circuit;

[0007] The microcontroller is used to read the state of the touch keyboard, set the working mode according to the state, and control the DDS signal source to generate a corresponding sine wave signal; it is also used to control the liquid crystal display to display the amplitude-frequency characteristics of the network under test in the form of an amplitude-frequency curve;

[0008] The DDS signal source, broadband amplifier, first attenuation network, first isolation network, true effective value conversion circuit, comparison attenuation circuit, and logarithmic detector are connected in sequence, and the logarithmic detector is used to perform 20log(Va / Vb)dB operation on the voltage value output by the network under test and the voltage value input to the network under test and detect it into a DC signal. The magnitude of the DC signal represents the dB value of the ratio of the output voltage value of the network under test to the input voltage value under the current input frequency value state, Va is the output voltage of the network under test, and Vb is the input voltage of the network under test; the network under test is connected between the first isolation network and the true effective value conversion circuit;

[0009] The output end of the low-pass filter is connected to the microcontroller through an A / D sampling circuit.

[0010] Preferably, it also includes a second isolation amplifier, a second attenuation network and a third isolation amplifier connected in sequence, the input end of the second isolation amplifier is connected to the output end of the network under test, the output end of the third isolation amplifier is divided into two paths, one path is connected to the input end of the true effective value conversion circuit, and the other path is connected to the input end of the logarithmic detector via the normally closed contact of the relay; the input end of the second isolation amplifier is connected to the output end of the network under test, and its output end is divided into two paths, one path is connected to the audio modulation circuit, and the other path is connected to the input end of the second attenuation network.

[0011] Preferably, it is characterized in that the audio modulation circuit generates an amplitude modulated wave by amplitude modulating the 465KHz signal output by the DDS signal source through the output voltage of the 1KHz sine wave oscillation circuit without using a frequency sweep signal, and then amplifies the amplitude of the amplitude modulated wave through a low-frequency power amplifier circuit and outputs it, which can be directly connected to the intermediate frequency amplifier circuit of the network under test to adjust the 465KHz resonant circuit of the intermediate frequency amplifier of the radio.

[0012] Preferably, the logarithmic detector includes an AD8302 chip, the true effective value conversion circuit includes a true effective value conversion chip LTC1968, the comparison attenuation circuit includes a comparator LM339, and the true effective value conversion chip LTC1968 detects the effective value of the output voltage of the network under test. When the output voltage of the network under test is ≥0.17V (effective value), the comparator LM339 generates a control alarm output, emits an audible and visual alarm, and simultaneously disconnects the signal input to the AD8302 chip.

[0013] Preferably, the microcontroller includes an STM32 chip, the DDS signal source includes an AD9850 chip and a broadband low-pass filtering network, ports A11, A12, and A13 of the STM32 chip are connected to the display screen through plug J11, completing the reading of touch keyboard data and writing the amplitude-frequency characteristic curve data to be displayed to the liquid crystal screen, ports A0-A7 of the STM32 chip are connected to parallel data ports D0-D7 of the DDS chip, and write control words for generating sinusoidal wave signal frequency to the AD9850 chip.

[0014] Preferably, the A / D sampling circuit is composed of a 12-bit A / D converter provided by the STM32 chip.

[0015] Preferably, the first attenuation network is composed of a high-speed multiplier AD835 and a voltage-divider resistor network, the Y input terminal of the high-speed multiplier AD835 inputs a 0.1V sine wave, the X input terminal inputs the output voltage of the voltage-divider resistor network, and the output of the high-speed multiplier AD835 is equal to Ux*Uy; the second attenuation network is also composed of a high-speed multiplier AD835 and a voltage-divider resistor network.

[0016] The beneficial effects of the present invention are:

[0017] The present invention uses a microprocessor to control a direct frequency synthesis (DDS) chip to generate a sweeping signal required for debugging a radio, and the sweeping range is 100KHz-3MHz, and the frequency characteristic curve is displayed on an LCD screen. The digital function makes debugging and reading values ​​very convenient. Secondly, in order to more accurately debug the resonance characteristics of the radio intermediate frequency resonant circuit, a scanning frequency 450KHz-480KHz intermediate frequency sine wave scanning output mode is specially set. The special sweeping instrument for debugging a digital radio suitable for teaching in colleges and universities has the advantages of excellent performance, low cost, and easy operation, and is suitable for popularization and application. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings cannot be obtained based on these drawings without creative work.

[0019] Figure 1 It is a structural block diagram of the present invention;

[0020] Figure 2 This is the connection circuit diagram between the microcontroller STM32 and the DDS chip AD9850;

[0021] Figure 3It is the connection circuit diagram of the broadband amplifier and the output attenuation circuit;

[0022] Figure 4 It is the output attenuation circuit diagram of the network under test;

[0023] Figure 5 It is the effective value conversion, comparison protection alarm circuit diagram;

[0024] Figure 6 This is the logarithmic detection circuit diagram;

[0025] Figure 7 It is a circuit for generating sinusoidal wave amplitude modulation signal.

[0026] 1-microcontroller; 2-DDS signal source; 3-broadband amplifier; 4-first attenuation network; 5-first isolation network; 6-network under test; 7-second isolation amplifier; 8-second attenuation network; 9-third isolation amplifier; 10-audio modulation circuit; 11-true effective value conversion circuit; 12-comparison attenuation circuit; 13-relay; 14-logarithmic detector; 15-low-pass filter; 16-A / D sampling circuit; 17-LCD display; 18-touch keyboard. DETAILED DESCRIPTION

[0027] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the examples described are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0028] The present invention specifically provides a special frequency sweeper for debugging a digital radio, such as Figure 1 As shown, it includes a liquid crystal display 17, a microcontroller 1, a touch keyboard 18, a DDS signal source 2, a broadband amplifier 3, a first attenuation network 4, a first isolation amplifier 5, a second isolation amplifier 7, an audio modulation circuit 10, a second attenuation network 8 and a third isolation amplifier 9, a true effective value conversion circuit 11, a comparison attenuation circuit 12, a relay 13, a logarithmic detector 14, a low-pass filter 15 and an A / D sampling circuit 16.

[0029] 1. Connection circuit between microcontroller STM32 and DDS chip AD9850

[0030] like Figure 2As shown, ports A11, A12, and A13 of the microcontroller 1STM32 are connected to the LCD screen through a plug J11 to complete reading the data of the touch keyboard 18 and writing the amplitude-frequency characteristic curve data to be displayed to the LCD screen 17. After reading the state of the touch keyboard 18, the working mode is set according to the state, and the DDS signal source 3 is controlled to generate a corresponding sine wave signal. There are three specific working modes:

[0031] Method 1: Generate 450KHz~480KHz intermediate frequency sweep signal (sweeper signal step value is 50Hz);

[0032] Method 2: Generate a sweep frequency signal of 100KHz to 3MHz (the sweep frequency meter signal step value is 5KHz);

[0033] Method 3: Set any frequency point within the range of 100KHz to 3MHz.

[0034] 2. Ports A0-A7 of microcontroller 1STM32 are connected to the parallel data ports D0-D7 of AD9850 chip, and the control word for generating the frequency of sine wave signal is written to AD9850; B12, B13, B14, and B15 respectively control RST (AD9850 chip reset port, high level is valid), S-DATA (serial mode, data input port), FU-UP (data update control terminal, when the 40-bit frequency control word is written to AD9850, the level of this port changes from low to high, and the output frequency is updated), and W-CLK (write frequency control word clock, during its low level, STM32 changes the state of data port D0-D7, and during its high level, it writes to AD9850).

[0035] 3. When debugging and downloading the program, use a cable to connect the DB9 socket U11 to the RS-232 plug of the computer. The function of U31 is to convert the RS-232 level output by the computer into the TTL level accepted by the microcontroller 11STM32, and at the same time convert the TTL level sent by the microcontroller 1STM32 into the RS-232 level accepted by the computer.

[0036] 4. Another function of the microcontroller 1 is to read the dB value of the ratio of the output to the input generated by AD8302 into the A / D converter through the AD12 pin after low-pass filtering for calculation, and control the display screen 17 to display the amplitude-frequency characteristics of the measured network in the form of an amplitude-frequency curve.

[0037] 5. The sine wave output by the DDS chip AD9850 contains many high-order harmonics, so it must be filtered out through a broadband low-pass filter network. The broadband low-pass filter network and AD9850 are welded on a circuit board to form a small module.

[0038] 2. Broadband amplifier 3, first isolation amplifier 5, first attenuation network 4

[0039] 1. If Figure 3 As shown in the figure, since the amplitude of the sinusoidal signal generated by the DDS signal source 2 drops significantly when the frequency is greater than 1MHz, it does not meet the requirements of the swept frequency signal. Therefore, a compensation network is used in the broadband amplifier 3 to make the output signal flat within the bandwidth range of 100KHz to 3MHz. The compensation network consists of C22, C32, and R12. The values ​​of C22, C32, and R12 are appropriately changed to make the frequency response curve of the broadband amplifier 3 as flat as possible. The maximum output signal is set to 0.1V (effective value), and the maximum output value of the broadband amplifier 3 can be controlled to 0.1V effective value by adjusting W12. The broadband amplifier 3 uses the broadband low-noise operational amplifier ADI4798-1.

[0040] 2. The function of the first attenuation network 4 is to input sinusoidal voltage signals of different amplitudes to different networks under test to ensure that the active network under test (radio) works in a linear amplification state, even if its output waveform is still a sine wave. The output attenuation network is composed of a high-speed multiplier AD835 and a voltage-dividing resistor network. The Y input terminal of the AD835 inputs a 0.1V sine wave, while the X input terminal inputs the output voltage of the voltage-dividing resistor network. The output of the AD835 is equal to Ux multiplied by Uy, so Uy is fixed. Changing Ux can change the output voltage. The 1V DC reference voltage is generated by the precision voltage regulator TL431. 9 precision multi-turn potentiometers are connected in parallel at both ends of the 1V power supply. With the 1V voltage as the reference, the voltage of the sliding end of each potentiometer to the ground is fine-tuned to meet the attenuation requirements of -3dB, -10dB, -20dB, -30dB, -40dB, -50dB, -60dB, -70dB, and -80dB. This attenuation circuit is not affected by the output frequency and has a very good effect.

[0041] 3. The first isolation amplifier 5 is actually a follower with high input impedance, low output impedance and voltage amplification factor of 1, which is used to reduce the influence between the broadband amplifier and the network under test. The output of the isolation amplifier I is divided into two paths, one of which is connected to the Va terminal of AD8302 and the other is used as the output of the sweeper.

[0042] 4. The network under test 6 is a radio by default, but it can also be a low-pass, high-pass, band-pass or band-stop filter.

[0043] 3. Output attenuation circuit of the network under test (second attenuation network 8), second isolation amplifier 7, third isolation amplifier 9

[0044] 1. If Figure 4As shown, since the input impedance of the second attenuation network 8 is relatively small, if it is directly connected to the measured network, it will affect the frequency characteristics of the measured network. Therefore, the second isolation amplifier 7 is inserted between the measured input network and the second attenuation network. The second isolation amplifier 7 is actually an amplifier with a large input impedance, a small output impedance, and a voltage amplification factor of 1. Due to its large input impedance, it is connected to the output end of the measured network 6, and has little effect on the frequency characteristics of the measured network 6. Because its output impedance is very small, it is easy to match the second attenuation network 8 with low input impedance. Therefore, a high-speed operational amplifier is used to form a follower.

[0045] 2. The role of the second attenuation network 8. Since the maximum input voltage range of the logarithmic detector 14 chip AD8302 is 0.22V (effective value), when the voltage amplification factor of the measured network 6 is relatively large, its output voltage effective value is likely to greatly exceed 0.22V, which is easy to damage AD8302. Therefore, the second attenuation network 8 is connected before the logarithmic detector 14 chip AD8302 to ensure that the voltage input to AD8302 does not exceed its maximum input range.

[0046] When the network under test is a passive network, its gain is not greater than 1, but when the network under test is an active network, its gain may be hundreds to thousands of times, and its output voltage amplitude is likely to exceed the maximum input voltage value of AD8302. In order to prevent damage to AD8302, the second attenuation network is connected. The structure of the second attenuation network is the same as the first attenuation network. In order to prevent the output of the network under test from being too large and damaging the AD835 chip, a reverse parallel diode is connected to the ground at the output end of the second isolation amplifier. When the output voltage is too large, the diode is forward-conducted to limit the amplitude.

[0047] 3. Function of the third isolation amplifier 9. Since the input impedance of AD8302 is relatively low, if it is directly connected to the second attenuation network 8, it will affect the accuracy of the attenuation network. Therefore, the third isolation amplifier 9 is inserted between the second attenuation network 8 and AD8302. The function of the third isolation amplifier 9 is to reduce the impact of the subsequent circuit on the input attenuation circuit. Its output is sent to AD8302 in one way and to the effective value conversion circuit in the other way.

[0048] 4. True effective value conversion circuit 11, comparison attenuation circuit 12

[0049] 1. If Figure 5 As shown, the function of the true RMS conversion circuit 11. Since the input of AD8302 is not allowed to be greater than 0.2V (effective value), otherwise it will be burned out, but in practice it is very likely that the network under test is an active network with a large amplification factor, and the output voltage is much greater than 0.2V. In order to prevent damage to AD8302, the user must be reminded in time to select a reasonable output attenuation gear or input attenuation gear, so it is necessary to detect in real time whether the effective value of the output voltage of the output attenuation network is too large.

[0050] The true effective value conversion circuit 11 is composed of the LTC1968 chip, and the DC voltage it outputs is equal to the effective value of the AC voltage it inputs, with a very small error. In order to reduce the influence of clutter and interference on the comparator, an active second-order low-pass filter composed of an operational amplifier is connected behind the output of the LTC1968 to make the output signal cleaner.

[0051] 2. Function of comparison attenuation circuit 12. The comparator circuit is composed of four comparator chips LM339. The output voltage of the active second-order low-pass filter is sent to the non-inverting input terminal IN1+ (pin 5) of the first comparator. The reference voltage UR1 is obtained by voltage division of potentiometer W24. By adjusting the sliding end position of W24, the value of reference voltage UR1 can be set. For reliability, the reference voltage UR1 is set to 0.17V. The output end (pin 2) of the first comparator is connected to the non-inverting input terminal IN2+ (pin 7) of the second comparator, and the inverting input terminal IN2- (pin 6) of the second comparator is connected to the sliding end of W44. W44 provides reference voltage UR2 for the inverting input terminal IN2- (pin 6) of the second comparator, the non-inverting terminal pin 9 of the third comparator, and the non-inverting terminal pin 11 of the fourth comparator.

[0052] The output end of the third attenuation network is divided into two paths, one of which is connected to the input end of the AD8302 chip through the normally closed contact of the relay, and the other is connected to the input end of the LTC1968 chip. The LTC1968 chip converts the input AC voltage into a DC voltage equal to its effective value. The DC voltage output by the LTC1968 chip is filtered by a low-pass filter and sent to the first comparator of the four-way comparator LM339. The inverting input terminal IN1- (pin 4) of the first comparator is connected to the sliding end of the potentiometer W24 to adjust the position of the sliding end so that the voltage of the inverting input terminal IN1- (pin 4) is set to 0.17V as the reference voltage UR1. When the effective value of the output voltage of the second attenuation network is less than 0. When 17V, that is, Vin1+ is less than UR1, the output voltage Vo1 of the output terminal (pin 2) of the first comparator is low level, Vo1 is used as the input voltage of the in-phase input terminal IN2+ (pin 7) of the second comparator, and the inverting input terminal IN2- (pin 6) of the second comparator is connected to a reference voltage of 2.5V. When the effective value of the output voltage of the second attenuation network is less than 0.17V, the output of the first comparator is much less than 2.5V, then Vo2 is low level, the transistor T14 is in the cut-off state, the normally closed contact of the relay is closed, and the output signal of the second attenuation network is sent to the input terminal of AD8302 after passing through the normally closed contact of the relay, the normally closed contact of relay 13 is not disconnected, and the output signal of the attenuation network is sent to the Vb input terminal of AD8302. At the same time, because the third and fourth comparators output high level, the light-emitting diode is not lit, and the buzzer does not make a sound.

[0053] When the output voltage of the network under test is too large, and the attenuation value of the second attenuation network is small, so that the effective value of its output voltage is ≥0.17V, the second pin of the output terminal of the first comparator outputs a high level, which is greater than the reference voltage UR2 of the inverting input terminal of the second comparator. The second comparator outputs a high level, the transistor T14 is saturated, the normally closed contact of the relay J14 is disconnected, and the signal is not input to the Vb terminal of AD8302. Since the output level is lower than that of the third and fourth comparators, the light-emitting diode lights up and the buzzer sounds, reminding the user to increase the attenuation of the output signal or input signal. 5. Logarithmic detector circuit

[0054] like Figure 6 As shown, the logarithmic detector 14 is implemented by using the AD8302 chip, which performs 20log(Va / Vb) operation on the input signals Va (Va is the voltage value output by the measured network) and (Vb is the voltage value input to the measured network) and detects the output DC voltage. Due to various reasons, the output DC voltage contains noise components, so two low-pass filters composed of operational amplifiers are added to improve the signal quality.

[0055] 6. Sine amplitude modulation auxiliary test circuit

[0056] 1. If Figure 7 As shown, the composition of the 1KHz sine wave oscillation circuit. Due to the low oscillation frequency, a Wien bridge oscillation circuit is used. W16, C16, W26, and C26 form a frequency selection network and produce positive feedback. W36, R16, and T16 form a negative feedback network to control the gain of the stable oscillation circuit. D16, R36, C26, and W46 form a negative rectifier filter circuit to generate a negative voltage at both ends of C36. When the output amplitude of the operational amplifier U16 increases, the voltage value at both ends of C36 becomes negative, and the voltage is divided by the sliding end of W46 to control the gate of the junction field effect transistor T16, so that the internal resistance rds between D and S of T16 increases, and the gain of the entire oscillator decreases, thereby reducing the output amplitude of the oscillator. Conversely, when the output amplitude decreases, the negative voltage value at both ends of C36 decreases, controlling the rds of T16 to decrease, increasing the gain of the entire oscillator, and increasing the output voltage of the oscillator. Since the field effect transistor works in the linear resistance area, it is equivalent to a variable resistor controlled by the output voltage, which better achieves amplitude stabilization. Adjusting the values ​​of W16 and W26 can make the oscillation frequency 1KHz.

[0057] 2. AM circuit. If only a 1KHz sine wave oscillation circuit is used to modulate the output signal of the DDS signal source, an orthogonal AM wave is generated. To generate a normal AM wave, the 1KHz sine wave must be superimposed on a certain DC level. The DC voltage is input to the in-phase terminal of the op amp U26. The 1KHz sine wave signal is input to the inverting terminal, and AC and DC superposition is achieved through U26. W56 and W76 control the AC and DC levels respectively, which can easily change the modulation degree.

[0058] The 100KHz-3MHz sine wave signal is modulated by multiplier U36. U46 and two triodes form a power amplifier circuit. The carrier of the AM wave is selected at 465KHz, and the AM wave is injected into the intermediate frequency amplifier circuit of the radio. The change of the position of the intermediate frequency core of the radio can be felt by the human ear, which has a great influence on the output of the radio. At the same time, the quality of the low-frequency amplifier circuit of the radio can also be checked.

[0059] 7. Test results show

[0060] 1. The LCD screen 17 uses a 7.0-inch 800×480 graphic dot matrix 65K color DGUS screen of model DMT80480L070_02W. The horizontal dot matrix of the screen is 800, and the vertical dot matrix is ​​480. When in use, the screen is divided into two parts. The 200*480 dot matrix area on the right side of the screen is used as the touch screen and the amplitude-frequency curve parameter display area. The remaining 600*480 dot matrix area on the left is used to display the amplitude-frequency characteristic curve.

[0061] 2. Read the amplitude-frequency characteristic curve data of the network under test, scroll the cursor wheel, and the frequency value and dB value corresponding to the cursor will be displayed in the upper right corner of the screen. Finally, the total gain value of the network under test at a certain frequency point is equal to the dB value at that frequency point on the curve plus the attenuation dB value of the attenuation network II.

[0062] The principles and implementation methods of the present invention are described in this article using specific examples. The description of the above embodiments is only used to help understand the method and core idea of ​​the present invention. At the same time, for those skilled in the art, according to the idea of ​​the present invention, there will be changes in the specific implementation methods and application scope. In summary, the content of this specification should not be understood as limiting the present invention.

Claims

1. A special frequency sweeper for debugging a digital radio, characterized in that: It includes a liquid crystal display, a microcontroller, a touch keyboard, a DDS signal source, a broadband amplifier, a first attenuation network, a first isolation network, a true effective value conversion circuit, a comparison attenuation circuit, a logarithmic detector, a low-pass filter and an A / D sampling circuit; The microcontroller is used to read the state of the touch keyboard, set the working mode according to the state, and control the DDS signal source to generate a corresponding sine wave signal; it is also used to control the liquid crystal display to display the amplitude-frequency characteristics of the network under test in the form of an amplitude-frequency curve; The DDS signal source, broadband amplifier, first attenuation network, and first isolation network are connected in sequence, and the first isolation network is respectively connected to the true effective value conversion circuit and the logarithmic detector, the true effective value conversion circuit is connected to the comparison attenuation circuit, the logarithmic detector is used to perform 20log (Va / Vb) dB operation on the voltage value output by the measured network and the voltage value input to the measured network and detect it into a DC signal, the magnitude of the DC signal represents the dB value of the ratio of the output voltage value of the measured network to the input voltage value under the current input frequency value state, Va is the output voltage of the measured network, and Vb is the input voltage of the measured network; the measured network is connected between the first isolation network and the true effective value conversion circuit; The output end of the low-pass filter is connected to the microcontroller through an A / D sampling circuit; It also includes a second isolation amplifier, a second attenuation network and a third isolation amplifier connected in sequence, the input end of the second isolation amplifier is connected to the output end of the network under test, the output end of the third isolation amplifier is divided into two paths, one path is connected to the input end of the true effective value conversion circuit, and the other path is connected to the input end of the logarithmic detector through the normally closed contact of the relay; the input end of the second isolation amplifier is connected to the output end of the network under test, and its output end is divided into two paths, one path is connected to the audio modulation circuit, and the other path is connected to the input end of the second attenuation network.

2. A digital radio debugging dedicated frequency sweeper according to claim 1, characterized in that: Without using a frequency sweep signal, the audio modulation circuit generates an AM wave by amplitude modulating the 465KHz signal output by the DDS signal source through the output voltage of the 1KHz sine wave oscillation circuit. The AM wave is then amplified by a low-frequency power amplifier circuit and then output. It can be directly connected to the IF amplifier circuit of the network under test to adjust the 465KHz resonant circuit of the IF amplifier of the radio.

3. A digital radio debugging dedicated frequency sweeper according to claim 1, characterized in that: The logarithmic detector includes an AD8302 chip, the true effective value conversion circuit includes a true effective value conversion chip LTC1968, and the comparison attenuation circuit includes a comparator LM339. The true effective value conversion chip LTC1968 detects the effective value of the output voltage of the measured network. When the effective value of the output voltage of the measured network is ≥0.17V, the comparator LM339 generates a control alarm output, emits an audible and visual alarm, and simultaneously disconnects the signal input to the AD8302 chip.

4. A digital radio debugging dedicated frequency sweeper according to claim 1, characterized in that: The microcontroller includes an STM32 chip, the DDS signal source includes an AD9850 chip and a broadband low-pass filter network, ports A11, A12, and A13 of the STM32 chip are connected to the display screen through a plug J11, and read touch keyboard data and write amplitude-frequency characteristic curve data to be displayed to the liquid crystal screen. Ports A0-A7 of the STM32 chip are connected to parallel data ports D0-D7 of the DDS chip, and control words for generating sinusoidal wave signal frequencies are written to the AD9850 chip.

5. A frequency sweeper for debugging a digital radio according to claim 4, characterized in that: The A / D sampling circuit is composed of a 12-bit A / D converter provided by the STM32 chip.

6. A digital radio debugging dedicated frequency sweeper according to claim 1, characterized in that: The first attenuation network is composed of a high-speed multiplier AD835 and a voltage-divider resistor network. A 0.1V sine wave is input to the Y input terminal of the high-speed multiplier AD835, and the output voltage of the voltage-divider resistor network is input to the X input terminal. The output of the high-speed multiplier AD835 is equal to Ux*Uy. The second attenuation network is also composed of a high-speed multiplier AD835 and a voltage-divider resistor network.

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