memory selector

Abstract

The present disclosure relates to a selector (33) for a memory cell (3) intended to pass from a resistive state to a conductive state to respectively inhibit or authorize access to the memory cell, characterized in that it is made of an alloy consisting of germanium, selenium, arsenic and tellurium.

Description

[0001] This patent application claims priority to French patent application FR19 / 04900, which should be considered as part of this disclosure. Technical Field

[0002] This disclosure generally relates to electronic devices, and more specifically, to resistive memories and selectors thereof. More specifically, this disclosure applies to the configuration of a given selector. Background Technology

[0003] Resistive random access memory integrated in "1T1R" type arrays is known. These arrays consist of a structure containing a transistor and a resistor cell. In this structure, the transistor acts as a selector. The selector enables access to the resistive memory cell to perform read, write, erase, or program operations (programming = write and erase) on a given memory cell, while limiting unwanted leakage current in the rest of the memory array.

[0004] Compared to selectors with resistor cells, selectors currently used in memory arrays are much larger. This, in turn, affects the density of the memory array. Summary of the Invention

[0005] The current selector element needs to be optimized.

[0006] One embodiment addresses all or part of the defects of known selector elements.

[0007] One embodiment provides a selector for a memory cell, designed to switch from a resistive state to a conducting state to respectively disable or enable access to the memory cell, characterized in that it is made of a GS-AT alloy composed of germanium, selenium, arsenic and tellurium.

[0008] According to one embodiment, the GS-AT alloy is Ge3Se7As2Te3.

[0009] According to one embodiment, the GS-AT alloy has an arsenic tellurium (AT) compound content between 20% and 80%.

[0010] According to one embodiment, the GS-AT alloy has a 40% arsenic tellurium (AT) compound content.

[0011] According to one embodiment, the GS-AT alloy is obtained by physical vapor deposition.

[0012] According to one embodiment, the selector is a bidirectional threshold switch.

[0013] One embodiment provides a storage point, including:

[0014] Resistive memory elements; and

[0015] The selector switch mentioned above.

[0016] According to one embodiment, the ratio of arsenic, tellurium, germanium, and selenium is such that the threshold voltage (Vth) of the selector is greater than or equal to the programming voltage of the resistive memory element.

[0017] According to one embodiment, the content of arsenic tellurium (AT) compound and germanium selenium (GS) compound makes the threshold voltage of the selector greater than or equal to the programming voltage of the resistive memory element.

[0018] According to one embodiment, the content of arsenic tellurium (AT) compound and germanium selenium (GS) compound is such that the threshold current of the selector is less than or equal to the state switching current of the resistive memory element.

[0019] One embodiment provides a memory having a plurality of the above-described storage points.

[0020] According to one embodiment, the memory is a resistive oxide memory or a conductive link random access memory.

[0021] According to one embodiment, each storage point comprises, in series:

[0022] The selector;

[0023] The resistive storage element; and

[0024] A conductive layer between the selector and the resistive storage element.

[0025] According to one embodiment, the storage points are organized as an array.

[0026] According to one embodiment, each storage point is located between a first conductor and a second conductor.

[0027] One embodiment provides a memory comprising a three-dimensional stack of storage points separated by the conductor.

[0028] One embodiment provides a method for manufacturing a memory, comprising the following steps:

[0029] Fabricate at least one resistive memory element; and

[0030] At least one selector is manufactured in connection with the resistive memory element, and is made of an alloy of germanium, selenium, arsenic and tellurium. Attached Figure Description

[0031] The above and other features and advantages will be described in detail in the following description of specific embodiments, which are given by way of example and not limitation, with reference to the accompanying drawings, wherein:

[0032] Figure 1 This is a simplified perspective view of one embodiment of the memory;

[0033] Figure 2 An embodiment of a storage point array is schematically illustrated;

[0034] Figure 3 The current / voltage characteristics of one embodiment of the storage point are shown;

[0035] Figure 4 The figure shows a curve illustrating the variation of a characteristic quantity of one embodiment of the selector element;

[0036] Figure 5 Another variation curve of the characteristic quantity of one embodiment of the selector element is shown; and

[0037] Figure 6 Views A and B show another variation curve of the characteristic quantity of an embodiment of the selector element. Detailed Implementation

[0038] In the various figures, similar features are designated by similar reference numerals. In particular, common structural and / or functional features in various embodiments may have the same reference numerals and may have the same structure, dimensions, and material properties.

[0039] For clarity, only operations and elements useful for understanding the embodiments described herein are described in detail. In particular, storage points may include elements not described, such as electrical connections.

[0040] Unless otherwise stated, when referring to two elements connected together, it means that there is no direct connection between them except for the conductor, and when referring to two elements coupled together, it means that the two elements can be connected or can be coupled via one or more other elements.

[0041] In the following disclosure, unless otherwise stated, when referring to absolute position qualifiers, such as the terms “front,” “back,” “top,” “bottom,” “left,” “right,” etc., or relative position qualifiers, such as the terms “above,” “below,” “higher,” “lower,” etc., or orientation qualifiers, such as “horizontal,” “vertical,” etc., refer to the orientation shown in the figure, such as the orientation during normal use.

[0042] Unless otherwise stated, the expressions “approximately,” “about,” “substantially,” and “about” indicate within 10%, preferably within 5%.

[0043] Figure 1 This is a simplified perspective view of one embodiment of memory 1.

[0044] According to this embodiment, the memory 1 includes storage points or cells 3 capable of storing all or part of data items. The memory 1 also has electrical conductors 50, 51, 52, 53, 54, and 55. These conductors 50, 51, 52, 53, 54, and 55 are made of a conductive metallic material such as copper.

[0045] Figure 1 Conductors 50, 51, 52, 53, 54, and 55 are arranged in an array when viewed from above, with each intersection or crossroads corresponding to a storage point location. Among conductors 50, 51, 52, 53, 54, and 55, the first conductors 50, 52, and 54 form parallel and regularly spaced straight lines. Among conductors 50, 51, 52, 53, 54, and 55, the second conductors 51, 53, and 55 also form parallel and evenly spaced straight lines. When viewed from above, the first conductors 50, 52, and 54 are arranged perpendicular to the second conductors 51, 53, and 55. However, conductors 50, 51, 52, 53, 54, and 55 are not directly connected to each other.

[0046] exist Figure 1 In this memory, the first conductors 50, 52, and 54 on one side and the second conductors 51, 53, and 55 on the other side are not coplanar, but are separated by a distance corresponding to the height (denoted as H) of the storage point 3. Each storage point 3 of the memory 1 is therefore located between the following conductors:

[0047] The first conductor in the first conductors 50, 52 and 54; and

[0048] The second conductors in the second conductors 51, 53 and 55.

[0049] exist Figure 1 Viewed from above, each storage point 3 has a square shape with one side measuring P / 2. This measurement P / 2 corresponds to half the amount called the "pitch" P of the array formed by the conductors 50, 51, 52, 53, 54, and 55 of the memory 1. Storage points 3 that are regularly spaced apart from each other in contact with the same conductor 50, 51, 52, 53, 54, or 55 also correspond to a distance of P / 2, which is half the array pitch. Still in Figure 1 In the diagram, conductors 50, 51, 52, 53, 54 and 55 have a rectangular shape, where the shorter side is equal to half the spacing, P / 2.

[0050] According to one embodiment, memory 1 has a three-dimensional structure comprising a stack of storage point layers separated by conductors. Figure 1In the example shown, storage points 3 are arranged below the second conductors 51, 53, and 55. The bottoms of these storage points 3 are in contact with conductors (not shown) that are arranged orthogonally to the second conductors 51, 53, and 55 (such as the first conductors 50, 52, and 54).

[0051] According to a preferred embodiment, each storage point 3 includes a stack that defines, in series, electrical connections for the following:

[0052] Resistive storage element 31;

[0053] Conductive material layer 35, such as metal layer 35; and

[0054] Selector element 33 or selector 33.

[0055] exist Figure 1 In the memory 1, the selector element 33 of storage point 3 is in contact with the first conductor among the first conductors 50, 52, and 54. The resistive storage element 31 is then in contact with the second conductor among the second conductors 51, 53, and 55. A metal layer 35 is interposed between the resistive storage element 31 and the selector element 33. Each storage point 3 of the memory 1, together with the first and second conductors in contact with it, thus forms a structure stacked along the same axis, including:

[0056] The first structure is constituted by selector element 33, first conductor 50, 52 or 54 and a portion of metal layer 35; and

[0057] The second structure consists of a resistive storage element 31, a second conductor 51, 53 or 55, and another part of a metal layer 35.

[0058] Conductors 50, 51, 52, 53, 54, and 55 enable addressing of memory point 3 in memory 1. In practice, each memory point 3 is connected to its own pair of conductors, including the first and second conductors.

[0059] To read or write to the resistive storage element 31 at storage point 3 of memory 1, the storage point 3 under consideration is first selected. This selection is achieved, for example, by applying a potential difference between two conductors forming a conductor pair dedicated to the storage point 3 under consideration. This potential difference is sufficiently large to modify the state of the selector element 33 so that current can flow through the storage point 3 under consideration. Reading or writing to the storage point 3 can then be performed based on the current intensity.

[0060] Once a read or write operation is complete, a potential difference is no longer applied between the two conductors forming the conductor pair dedicated to the considered storage point 3. This has the effect of returning selector element 33 to its initial or quiescent state.

[0061] During a read or write operation at storage point 3, a leakage current, labeled Ileak, parasitizes other storage points that come into contact with one of the two conductors in the conductor pair dedicated to storage point 3 under consideration. This leakage current Ileak originates from the fact that the virtually stationary selector element 33 does not have infinite resistance.

[0062] In the oxide-based resistive RAM (OxRAM) 1, the resistive memory element 31 is preferably composed of hafnium dioxide (HfO2) and titanium (Ti). For example, hafnium dioxide (HfO2) and titanium (Ti) form a bilayer. In the previously described stacked structure, the titanium layer forming the resistive memory element 31 may optionally be positioned in contact with the metal layer 35 of the storage point 3 or the second conductor 51, 53 or 55.

[0063] The metal layer 35 between the storage element 31 and the selector element 33 is made of titanium nitride (TiN), for example.

[0064] In one variant, memory 1 is a bridged random access memory (CBRAM).

[0065] Selector element 33 is a bidirectional threshold switch (OTS). For example, selector element 33 is made of an amorphous chalcogenide material. A characteristic of amorphous chalcogenide materials is that when a voltage greater than a threshold voltage (Vth) is applied to them, they change from a high resistance level to a high conductivity level. This high conductivity level has a lower resistance than the high resistance level. Typically, a high resistance (or low conductivity) level corresponds to a blocking state, preventing access to memory element 31, while a high conductivity (or low resistance) level corresponds to an "on" or conductive state, allowing access to memory element 31.

[0066] The “on” state is called volatile (or temporary, or non-permanent) because the “on” state can be maintained as long as the current flowing through the selector element 33 is higher than the holding current (denoted as Ih). When the current flowing through the selector element 33 becomes lower than the holding current Ih, the selector element 33 returns to the blocking state.

[0067] Utilizing this property of amorphous chalcogenide materials is useful for fabricating the selector element 33 of memory 1. The "on" state allows current to flow so that reading or programming can be performed in memory element 31. The blocking state with high resistance prevents access to memory element 31 and limits leakage current Ileak in unselected or unaddressed storage points 3 of memory 1.

[0068] Figure 2 An embodiment of the storage point array 5 is illustrated schematically.

[0069] according to Figure 2In one embodiment, array 5 is a two-dimensional storage point array. Figure 2 A top view corresponding to storage point 3 of layer 1 of memory, for example ( Figure 1 These storage points are located between the first conductors 50, 52, and 54 on one side and the second conductors 51, 53, and 55 on the other side. Except for the conductor pairs to which they are connected, all storage points 3 in array 5 are identical.

[0070] Each storage point 3 of array 5 has a relationship with about Figure 1 The storage point 3 shown has a similar structure. Therefore, each storage point 3 includes, in series:

[0071] Selector element 33, in Figure 2 The middle is represented by the first rectangle;

[0072] Conductive metal layer 35, in Figure 2 The middle part is represented by a wire; and

[0073] Resistive storage element 31, in Figure 2 The middle part is represented by the second rectangle.

[0074] exist Figure 2 The example considers a specific storage point, but everything described applies to all storage points in the array. Figure 2 In the circuit, selector element 33 is connected to conductor 52 (point 523) on one side and to metal layer 35 on the other. Resistive storage element 31 is connected to conductor 53 (point 533) on one side and to metal layer 35 on the other.

[0075] Suppose we wish to perform a read or write operation at storage point 3 of array 5. A voltage, denoted as V, is applied between the two conductors 52 and 53 connected on either side of storage point 3. This voltage V is obtained, for example, by placing conductor 52 at a potential of -V / 2 and conductor 53 at a higher potential of V / 2. All other conductors 50, 51, 54, and 55 maintain a potential of approximately zero volts (0V). Therefore, a potential difference is applied between points 533 and 523, where storage point 3 contacts conductors 53 and 52, respectively, which is approximately equal to the voltage V.

[0076] When the voltage V reaches a value greater than or equal to the threshold voltage Vth of selector element 33, selector element 33 then becomes conductive, and a current labeled I flows in a portion of storage point 3 and conductors 52 and 53 under the influence of the voltage applied to storage point 3 (dashed arrow). Storage element 31 at storage point 3 is then considered to be selected by selector element 33. The value of current I is adjusted based on the desired read or write operation.

[0077] It is recommended to ensure that selector element 33 has the lowest possible leakage current (Ileak) in the blocking state. This leakage current is detrimental to the operating performance of array 5.

[0078] It is also desirable that selector element 33 is non-linear, i.e., has the maximum possible conductivity difference between the conductive and blocking states. This prevents adjacent memory points (e.g., ...) from being blocked. Figure 2 The storage points on the left and right sides (detailed in the text) were unintentionally activated by the leakage current Ileak.

[0079] Figure 3 The current / voltage characteristics of one embodiment of the storage point are shown.

[0080] exist Figure 3 In the diagram, the x-axis corresponds to the voltage applied to the terminals of the storage element or storage point. The voltage V applied between the terminals of storage element 31 is individually related to... Figure 2 The curves 20 and 22 of the graph are related, while the voltage V applied between terminals 533 and 523 at storage point 3 is related to... Figure 2 The graphs 24 and 26 are related. The y-axis, which uses a logarithmic scale, corresponds to the current flowing through the resistive storage element 31 or storage point 3, depending on the curve under consideration.

[0081] Suppose that resistive storage element 31 at storage point 3 stores a binary value. Typically, the high-order state of this binary value is designated "ON," while the low-order state of the same binary value is designated "OFF." In this example, the ON state is considered to correspond to the low-resistance state (LRS), and the OFF state is considered to correspond to the high-resistance state (HRS). The resistance of the low-resistance state ON is lower than the resistance of the high-resistance state OFF.

[0082] Figure 3 The left side (curves 20 and 22) shows the behavior of the resistive storage element 31 separately. Figure 3 The right side (curves 24 and 26) shows the behavior of storage point 3 (series selector element 33, conductive metal layer 35 and resistive storage element 31) in the high state ON (curve 26) and the behavior of storage point 3 in the low state OFF (curve 24).

[0083] By allowing a current I to flow through storage point 3 at an intensity greater than the switching threshold (denoted as IHRS), the resistive storage element 31 switches from the OFF state to the ON state. Figure 3 In the diagram, curve 20 (MEM OFF) is shown as a solid line, and curve 22 (MEM ON) is shown as a dashed line. To avoid any untimely state transitions when selecting the resistive storage element 31 at storage point 3, the transition threshold IHRS is ensured to be greater than or equal to the threshold current Ith of the selector element 33.

[0084] For the read operation in storage point 3, at its terminals 533 and 523 ( Figure 2 A voltage denoted as VREAD is applied between ( ). Figure 3 In this context, the voltage VREAD is located within the voltage range ΔVth between the threshold voltage Vth1 (curve 26 in dashed form, SEL+MEMON) of selector element 33 and another voltage Vth2 (curve 24 in solid form, SEL+MEM OFF).

[0085] The value of the current flowing in storage point 3 is then measured. If the resistive storage element 31 is in a low state (OFF) (curve 24), the current with a value of IOFF is measured by applying a voltage VREAD. On the other hand, if the resistive storage element 31 is in a high state (ON) (curve 26), the current with a value of ION (greater than the value IOFF) is measured by applying a voltage VREAD. When a voltage VREAD within the voltage range ΔVth is applied to the terminal of storage point 3, the measurement of the current flowing through storage point 3 thus provides a binary value stored or recorded by the resistive storage element 31.

[0086] The resistive storage element 31 is initially in the ON state. A reset voltage marked VRESET is applied to storage point 3. Figure 3 (Not shown in the image), the resistive storage element 31 transitions from the ON state to the OFF state. Then, by applying a programming voltage VSET lower than the reset voltage VRESET at storage point 3, the resistive storage element 31 transitions from the OFF state to the ON state. To enable operation of storage point 3, the programming voltage VSET is ensured to be less than or equal to the threshold voltage Vth of the selector element 33.

[0087] Figure 4 The curves showing the variation of characteristic quantities of one embodiment of the selector element are illustrated.

[0088] exist Figure 4 In the diagram, the x-axis corresponds to the voltage applied to the terminals of selector element 33 (curve 4) or storage element (points 41, 43), in volts. The y-axis, using a logarithmic scale, corresponds to the current flowing through selector element 33 (curve 4) or storage element (points 41, 43), in amperes.

[0089] The selector element 33 of storage point 3 is made of an alloy based on germanium (Ge), selenium (Se), arsenic (As), and tellurium (Te). Again, according to this embodiment, the selector element 33 is a bidirectional threshold switch. Selenium-rich germanium-selenium alloys or GS compounds have good thermal stability. This facilitates the realization of features such as memory 1 ( Figure 1The manufacturing steps of storage point 3 of a memory such as ) in which the GS material is not very sensitive to temperatures below about 400°C.

[0090] However, the GS alloy used in selector element 33 is characterized by poor switching characteristics, particularly due to its excessively high threshold voltage Vth. It also exhibits poor switching durability when continuous switching cycles between its high resistance level (blocking state) and its high conductivity level (conducting state) are applied to the GS alloy-based selector element 33.

[0091] According to the described embodiments, the switching characteristics of selector elements made of GS alloys can be improved by adding materials known as dopants. Specifically, adding arsenic-tellurium-based materials or AT compounds to the GS alloy of selector element 33 can reduce the threshold voltage Vth of selector element 33 while improving its switching durability. By adjusting the AT content (or AT ratio) in the GS alloy used to make selector element 33, a balance can be achieved between the alloy's thermal stability and the switching characteristics of selector element 33.

[0092] According to a preferred embodiment, the selector element 33 is made of a GS / AT pseudo-binary system, more preferably of an alloy formed from Ge3Se7As2Te3. For example, the selector element 33 is manufactured by physical vapor deposition (PVD). The Ge3Se7As2Te3 alloy therefore comprises:

[0093] The first Ge3Se7 compound, which here corresponds to the GS alloy, or is composed of germanium selenium; and

[0094] The second compound, As2Te3, corresponds here to AT alloy, or is composed of arsenic and tellurium.

[0095] exist Figure 4 In Figure 4, curve 4 illustrates the variation of the leakage current Ileak (in amperes, logarithmically scaled) at the terminals of selector element 33 based on its threshold voltage Vth (in volts) for different AT alloy (As2Te3) contents in the GS / AT alloy used to fabricate selector element 33. The leakage current Ileak of selector element 33 is typically measured at a voltage equal to half the threshold voltage Vth. In this example, the AT alloy content is measured as an atomic percentage. The alloy preferably has an arsenic tellurium compound content between about 20% and about 80%, preferably between 20% and 80%.

[0096] Curve 4 has six points, each corresponding to a different AT alloy content in the GS-AT alloy:

[0097] The first point 400 corresponds to zero AT content, that is, GS alloy consisting only of GS alloy (Ge3Se7);

[0098] The second point, 420, corresponds to an AT content of 20%, which is a GS-AT alloy consisting of 80% GS alloy and 20% AT alloy (As2Te3).

[0099] The third point, 440, corresponds to an AT content of 40%, which is a GS-AT alloy consisting of 60% GS alloy and 40% AT alloy.

[0100] The fourth point, 450, corresponds to a 50% AT content, which is a GS-AT alloy (a stoichiometric mixture of GS alloy and AT alloy) consisting of 50% GS alloy and 50% AT alloy.

[0101] Point 5, 460, corresponds to a 60% AT content, i.e., a GS-AT alloy consisting of 40% GS alloy and 60% AT alloy; and

[0102] Point 6, 480, corresponds to an AT content of 80%, which is a GS-AT alloy consisting of 20% GS alloy and 80% AT alloy.

[0103] It is meaningful to seek adjustments to the threshold voltage Vth, threshold current Ith, and / or leakage current Ileak of selector element 33, particularly in associating selector element 33 with resistive memory element 31 to make them compatible. In this example, it is assumed that the programming voltage VSET of resistive memory element 31 is approximately equal to 1.5V (point 41, VSET x IHRS). Again, in this example, it is assumed that the reset voltage VRESET of resistive memory element 31 is approximately equal to 2V (point 43, VRESET x ILRS).

[0104] As discussed in conjunction with the preceding figures, a selector element 33 is then sought that has a threshold voltage Vth greater than or equal to the programming voltage VSET of the resistive storage element 31. This ensures that the selector element 33 is compatible with the resistive storage element 31.

[0105] Furthermore, it is desirable to make the threshold current Ith of the selector element 33 less than or equal to the switching threshold current IHRS of the resistive storage element 31. The closer the threshold current Ith of the selector element 33 is to the switching threshold current IHRS of the resistive storage element 31, the larger the programming window. Therefore, ideally, Ith should equal IHRS.

[0106] In addition, efforts can be made to ensure that the leakage current (Ileak) is as low as possible. The lower the Ileak leakage current, the larger the envisioned memory array can be.

[0107] Therefore, according to Figure 4The example characteristics (41, 43) of the resistive storage element 31 shown are equivalent to selecting one with approximately 40%, preferably 40%. Figure 4 The GS-AT alloy has an arsenic tellurium compound (As2Te3) content at point 440. This results in selector element 33 having the following characteristics:

[0108] The leakage current Ileak is about 1 nA, which is low enough to ensure nonlinearity, thereby limiting the leakage current in an array 5 of 1 MB (in other words, a memory 1 consisting of an array 5 containing one million storage points 3).

[0109] The threshold voltage Vth is approximately 2.4V; and

[0110] The threshold current Ith is approximately 5 μA.

[0111] Therefore, for any memory type (OxRAM, CBRAM, or PCM), the proportion of either the GS or AT compound in the composition of a selector made of GS-AT alloy gives it the following priority order of characteristics, which can be used individually or in combination:

[0112] Vth (selector) ≥ VSET (storage element 31);

[0113] Ith (selector) ≤ IHRS (storage element 31); and / or

[0114] Ileak (selector) is the minimum possible leakage current, taking into account the two priority inequalities mentioned above.

[0115] If it is desired to manufacture a selector element 33 for a memory element 31 with known characteristics (VSET, IHRS), it can be done by means of Figure 4 Curve 4 in the figure is used to adjust the GS-AT alloy composition. This makes it possible to adjust the threshold voltage Vth and leakage current Ileak based on the resistive storage element 31.

[0116] Therefore, memory 1 is manufactured according to a method including, for example, the following steps. Figure 1 ):

[0117] Manufacturing resistive memory element 31; and

[0118] At least one selector 33, composed of a GS-AT alloy based on germanium, selenium, arsenic, and tellurium, is manufactured in relation to the resistive memory element 31. The composition of the GS-AT alloy is then optimized based on the electrical characteristics of the resistive memory element 31.

[0119] Figure 5 Another variation curve of the characteristic quantity of one embodiment of selector element 33 is shown.

[0120] exist Figure 5 In the diagram, the x-axis corresponds to the leakage current Ileak in amperes, while the y-axis corresponds to the threshold current Ith in amperes.

[0121] Such as combination Figure 4 The discussion assumes that selector element 33 is a bidirectional threshold switch made of GS-AT alloy, preferably Ge3Se7As2Te3. The focus here is on the variation of leakage current Ileak and threshold current Ith based on the content of arsenic-tellurium composition (i.e., the AT alloy in selector element 33).

[0122] exist Figure 5 In the example shown, the AT alloy content is varied to achieve an operating region compatible with resistive memory element 31. Starting with zero AT alloy content (triangle 62), increasing the AT alloy content (arrow 63) results in a simultaneous increase in leakage current Ileak and threshold current Ith values ​​to increase the AT alloy content (pentagons 64 to 67, corresponding to 20%, 40%, 50%, and 60% AT alloy content, respectively).

[0123] To manufacture a selector element 33 that provides the maximum possible programming window in relation to the resistive memory element 31, a GS-AT alloy with an AT content is selected. This allows for a threshold current value Ith that is as close as possible to the switching threshold current IHRS of the memory element 31, while limiting the leakage current Ileak according to the desired array size. Specifically, this... Figure 5 The threshold current Ith and leakage current Ileak of selector 33 are shown to vary based on the amount of AT or GS compound present in the GS-AT alloy.

[0124] Figure 6 Views A and B show additional variation curves of the characteristic quantity of one embodiment of selector element 33.

[0125] Such as combination Figure 4 and 5 The discussion assumes that the selector element 33 is a bidirectional threshold switch made of GS-AT alloy, preferably Ge3Se7As2Te3.

[0126] View A shows the variation of the threshold voltage Vth (y-axis in volts) of selector element 33 based on the AT alloy content or proportion (x-axis in atomic percentage) in its GS-AT mixture. It can be seen that the threshold voltage Vth decreases with increasing AT alloy content (As2Te3 in this example). The As2Te3 content or concentration is denoted as CAT, and the thickness of selector element 33 as tOTS, taking advantage of the fact that the value of the threshold voltage Vth of selector element 33 is related to the atomic percentage of arsenic tellurium compounds in the GS-AT alloy (specifically in Ge3Se7As2Te3) through a relationship of the following type:

[0127] [Mathematical Formula 1]

[0128] Vth=(-1.5×10 -3 ×CAT+0.13)×tOTS+( -4 ×10 -4 ×CAT+0.7)

[0129] View B shows the leakage current Ileak of selector element 33 (y-axis in amperes) based on the variation of AT alloy content (x-axis in atomic percentage) in the GS-AT alloy (i.e., Ge3Se7As2Te3). It can be seen that as the AT alloy content (As2Te3 in this example) increases, the Ileak leakage current also increases. Let the As2Te3 content or concentration still be denoted as CAT, and the thickness of selector element 33 as tOTS, and the exponential function as exp, utilizing the fact that the value of the leakage current Ileak is related to the atomic percentage of arsenic tellurium compounds in the GS-AT alloy (specifically in Ge3Se7As2Te3) through a relationship of the following type:

[0130] [Mathematical Formula 2]

[0131] Ileak=exp(0.09×CAT)×exp((75.8 / tOTS)-27)

[0132] Various embodiments and variations have been described. Those skilled in the art will understand that certain features of these embodiments can be combined and other variations will be readily apparent to them. In particular, the arsenic-tellurium content (CAT) in the GS-AT alloy of element 33 can be adjusted based on other characteristic properties of the resistive memory element 31.

[0133] Finally, based on the functional descriptions provided above, the actual implementation of the embodiments and variations described herein is within the capabilities of those skilled in the art.

Claims

1. A selector (33) for a memory cell (3), designed to change from a resistive state to a conducting state to respectively disable or enable access to the memory cell, characterized in that... The GS-AT alloy is made of germanium, selenium, arsenic and tellurium; wherein the GS-AT alloy is composed of Ge3Se7 and As2Te3; wherein the GS-AT alloy has a 40% arsenic tellurium AT compound content; Here, the Ge3Se7 compound corresponds to the GS compound; and the As2Te3 compound corresponds to the AT compound.

2. The selector of claim 1, wherein the GS-AT alloy is obtained by physical vapor deposition.

3. The selector according to claim 1, wherein the selector is a bidirectional threshold switch.

4. A storage point (3), comprising: Resistive storage element (31); as well as The selector (33) according to any one of claims 1 to 3.

5. The storage point according to claim 4, wherein the ratio of arsenic, tellurium, germanium and selenium is such that the threshold voltage (Vth) of the selector (33) is greater than or equal to the programming voltage (VSET) of the resistive storage element (31).

6. The storage point according to claim 4 or 5, wherein the content of arsenic tellurium AT compound and germanium selenide GS compound makes the threshold voltage (Vth) of the selector (33) greater than or equal to the programming voltage (VSET) of the resistive storage element (31).

7. The storage point according to claim 4 or 5, wherein the content of arsenic tellurium AT compound and germanium selenium GS compound makes the threshold current (Ith) of the selector (33) less than or equal to the state switching current (IHRS) of the resistive storage element (31).

8. A memory (1) having a plurality of storage points (3) according to any one of claims 4 to 7.

9. The memory according to claim 8 is composed of a resistive oxide memory or a conductive link random access memory.

10. The memory according to claim 8 or 9, wherein each storage point (3) comprises, in series: The selector (33); The resistive storage element (31); as well as A conductive layer (35) is located between the selector (33) and the resistive storage element (31).

11. A method for manufacturing a memory (1), comprising the following steps: Fabricate at least one resistive memory element (31); and At least one selector (33) is manufactured in connection with the resistive memory element (31) as a GS-AT alloy composed of germanium, selenium, arsenic and tellurium; wherein the GS-AT alloy is composed of Ge3Se7 and As2Te3; wherein the GS-AT alloy has a 40% arsenic tellurium AT compound content; Here, the Ge3Se7 compound corresponds to the GS compound; and the As2Te3 compound corresponds to the AT compound.

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