Data protection method for memory and storage device thereof

Abstract

The present invention discloses a method and a storage device capable of recovering lost data of a storage block in a memory based on RAID, wherein the memory includes multiple storage blocks, and the method includes: generating check code data of a check factor based on storage data of multiple valid storage blocks among the multiple storage blocks; configuring a first plurality of address pointers for the multiple storage blocks in the check factor; and setting a second plurality of address pointers in each of the valid storage blocks, wherein each of the second plurality of address pointers in each of the valid storage blocks points to a corresponding other valid storage block, and the first plurality of address pointers and the second plurality of address pointers of the multiple valid storage blocks can together form an address chain covering all valid storage blocks of the multiple valid storage blocks.

Description

Technical Field

[0001] The present disclosure generally relates to the field of data storage, and more particularly, to a method capable of recovering data lost in a storage block in a storage device based on RAID and a storage device thereof. Background Art

[0002] RAID (Redundant Array of Independent Disks) is a disk array formed by combining multiple independent disks in different combinations. Since RAID can provide fault tolerance through data verification / mirroring functions, it enhances the security of data storage. Therefore, RAID has been widely used in various fields of data storage and data protection.

[0003] In recent years, in order to further improve the bit density of flash memory devices and reduce their costs, three-dimensional (3D) NAND flash memory devices have been developed. However, in the process of writing to a certain storage block of the 3D NAND flash memory, due to various reasons (such as power failure, write failure, etc.), the data to be written cannot be successfully written to this storage block. At this time, the writing of this storage block is not completed, so part of the data written to this storage block will be unavailable. When restarting the writing, this storage block will also be skipped and the writing will start from the adjacent storage block. In order to be able to use RAID technology to recover the lost data in a "successfully written" storage block after writing is completed, the unusable data in those "unsuccessfully written" storage blocks will be skipped when calculating the check code data based on the storage data in multiple "successfully written" storage blocks, and when using the check code data to recover the data that was later lost in the "successfully written" storage block, it is also necessary to skip the unusable data in those "unsuccessfully written" storage blocks. Therefore, when calculating the check code data, additional data for recording which data has been skipped needs to be generated, wherein the check code data and the additional data together form a check factor for recovering the data that was later lost in a certain "successfully written" storage block.

[0004] Therefore, there is a need for a data protection method for a memory and a storage device thereof, which can greatly reduce the space requirement for additional data of the check factor, maintain the ECC error correction capability of the system, and greatly reduce the space waste of the memory. Summary of the invention

[0005] According to an embodiment of the present disclosure, a data protection method for a memory is provided, wherein the memory includes multiple memory blocks, and the method includes: generating check code data of a check factor based on storage data of multiple valid memory blocks among the multiple memory blocks; configuring a first plurality of address pointers for the multiple memory blocks in the check factor; and setting a second plurality of address pointers in each of the valid memory blocks, wherein each of the second plurality of address pointers in each of the valid memory blocks points to a corresponding other valid memory block, and the first plurality of address pointers and the second plurality of address pointers of the multiple valid memory blocks can together form an address chain covering all valid memory blocks of the multiple valid memory blocks.

[0006] In some embodiments, the first plurality of address pointers are 2 address pointers, and the second plurality of address pointers are 2 address pointers. In the event that data of one of the multiple valid storage blocks is lost and its corresponding second plurality of address pointers are lost, the first plurality of address pointers and the second plurality of address pointers of other valid storage blocks of the multiple valid storage blocks can together form an address chain covering all valid storage blocks of other valid storage blocks of the multiple valid storage blocks.

[0007] In some embodiments, the method further includes the step of: when data of a certain valid storage block among the multiple valid storage blocks is lost, reading the storage data of a corresponding valid storage block of the multiple valid storage blocks based on the check code data of the check factor and an address chain formed by the first multiple address pointers and the second multiple address pointers of other valid storage blocks of the multiple valid storage blocks to recover the lost data of the certain valid storage block.

[0008] In some embodiments, the first plurality of address pointers are N address pointers, the second plurality of address pointers are N address pointers, N is an integer greater than or equal to 2; the N address pointers set for a certain valid storage block respectively point to one of the N valid storage blocks that were most recently successfully written before the certain valid storage block was successfully written; the N address pointers of the check factor respectively point to one of the last N valid storage blocks that were successfully written among the valid storage blocks.

[0009] In some embodiments, the N address pointers of the first valid storage block of the multiple valid storage blocks of the multiple storage blocks that are successfully written point to null, and among the N address pointers of the (NM)th valid storage block that is successfully written to the multiple storage blocks, the (M+1)th address pointer points to null, where M is an integer greater than or equal to 0 and less than N.

[0010] In some embodiments, the address chain automatically skips invalid memory blocks among the plurality of memory blocks.

[0011] In some embodiments, the check code data of the check factor is generated based on storage data of all valid storage blocks in the plurality of storage blocks.

[0012] In some embodiments, an exclusive OR operation is performed on the storage data of the plurality of valid storage blocks among the plurality of storage blocks to generate the check code data of the check factor.

[0013] In some embodiments, an XOR operation is performed on the verification code data and the storage data of the corresponding valid storage block read through the address chain to recover the lost data of the certain valid storage block.

[0014] In some embodiments, the memory is 3D NAND flash memory.

[0015] According to another embodiment of the present disclosure, a data recovery method for a memory is provided, the memory comprising a plurality of memory blocks, the method comprising: determining that data of a certain valid memory block of a plurality of valid memory blocks among the plurality of memory blocks is lost; and recovering the lost data of the certain valid memory block by reading the storage data of the corresponding valid memory block of the plurality of valid memory blocks through an address chain based on check code data of a check factor; wherein the check factor comprises the check code data and a first plurality of address pointers configured for the plurality of memory blocks, the address chain is formed by the first plurality of address pointers and a second plurality of address pointers set in each of the valid memory blocks, each of the second plurality of address pointers in each of the valid memory blocks respectively points to a corresponding other valid memory block, so that the address chain can cover all valid memory blocks of the plurality of valid memory blocks.

[0016] In some embodiments, the first plurality of address pointers are 2 address pointers, and the second plurality of address pointers are 2 address pointers. In the event that data of one of the multiple valid storage blocks is lost and its corresponding second plurality of address pointers are lost, the first plurality of address pointers and the second plurality of address pointers of other valid storage blocks of the multiple valid storage blocks can together form an address chain covering all valid storage blocks of other valid storage blocks of the multiple valid storage blocks.

[0017] In some embodiments, when reading the storage data of a certain valid storage block, a second plurality of address pointers stored in the certain valid storage block are also read, and a corresponding valid storage block to be read next is determined based on the second plurality of address pointers.

[0018] In some embodiments, the first plurality of address pointers are N address pointers, the second plurality of address pointers are N address pointers, N is an integer greater than or equal to 2; the N address pointers set for a certain valid storage block respectively point to one of the N valid storage blocks that were most recently successfully written before the certain valid storage block was successfully written; the N address pointers of the check factor respectively point to one of the last N valid storage blocks that were successfully written among the valid storage blocks.

[0019] In some embodiments, an XOR operation is performed on the verification code data and the storage data of the corresponding valid storage block read through the address chain to recover the lost data of the certain valid storage block.

[0020] According to another embodiment of the present disclosure, a memory system is provided, comprising: a memory, the memory comprising a plurality of memory blocks; and a memory controller, the memory controller being coupled to the memory and configured to: generate check code data of a check factor based on storage data of a plurality of valid memory blocks among the plurality of memory blocks; configure a first plurality of address pointers for the plurality of memory blocks in the check factor; and set a second plurality of address pointers in each of the valid memory blocks, wherein each of the second plurality of address pointers in each of the valid memory blocks points to a corresponding other valid memory block, and the first plurality of address pointers and the second plurality of address pointers of the plurality of valid memory blocks can together form an address chain covering all valid memory blocks of the plurality of valid memory blocks.

[0021] In some embodiments, the first plurality of address pointers are 2 address pointers, and the second plurality of address pointers are 2 address pointers. In the event that data of one of the multiple valid storage blocks is lost and its corresponding second plurality of address pointers are lost, the first plurality of address pointers and the second plurality of address pointers of other valid storage blocks of the multiple valid storage blocks can together form an address chain covering all valid storage blocks of other valid storage blocks of the multiple valid storage blocks.

[0022] In some embodiments, the controller is also configured to, when data of one of the multiple valid storage blocks is lost, recover the lost data of the one valid storage block by reading the storage data of a corresponding valid storage block of the multiple valid storage blocks based on the check code data of the check factor and an address chain formed by the first multiple address pointers and the second multiple address pointers of other valid storage blocks of the multiple valid storage blocks.

[0023] In some embodiments, the first plurality of address pointers are N address pointers, the second plurality of address pointers are N address pointers, N is an integer greater than or equal to 2; the N address pointers set for a certain valid storage block respectively point to one of the N valid storage blocks that were most recently successfully written before the certain valid storage block was successfully written; the N address pointers of the check factor respectively point to one of the last N valid storage blocks that were successfully written among the valid storage blocks.

[0024] In some embodiments, the N address pointers of the first valid storage block of the multiple valid storage blocks of the multiple storage blocks that are successfully written point to null, and among the N address pointers of the (NM)th valid storage block that is successfully written to the multiple storage blocks, the (M+1)th address pointer points to null, where M is an integer greater than or equal to 0 and less than N.

[0025] In some embodiments, the address chain automatically skips invalid memory blocks among the plurality of memory blocks.

[0026] In some embodiments, the controller is configured to generate check code data of the check factor based on storage data of all valid storage blocks among the plurality of storage blocks.

[0027] In some embodiments, the controller is configured to perform an exclusive OR operation on storage data of the plurality of valid storage blocks among the plurality of storage blocks to generate check code data of the check factor.

[0028] In some embodiments, the controller is configured to perform an exclusive OR operation on the verification code data and storage data of a corresponding valid storage block read through the address chain to recover the lost data of the certain valid storage block.

[0029] In some embodiments, the memory is 3D NAND flash memory.

[0030] According to another embodiment of the present disclosure, a memory system is provided, comprising: a memory, the memory comprising a plurality of memory blocks; and a memory controller, the memory controller being coupled to the memory and configured to: determine data loss of a certain valid memory block of a plurality of valid memory blocks among the plurality of memory blocks; and recover the lost data of the certain valid memory block by reading the storage data of the corresponding valid memory blocks of the plurality of valid memory blocks based on check code data of a check factor and through an address chain; wherein the check factor comprises check code data and a first plurality of address pointers configured for the plurality of memory blocks, the address chain is formed by the first plurality of address pointers and a second plurality of address pointers set in each of the valid memory blocks, each of the second plurality of address pointers in each of the valid memory blocks respectively points to a corresponding other valid memory block, so that the address chain can cover all valid memory blocks of the plurality of valid memory blocks.

[0031] In some embodiments, the first plurality of address pointers are 2 address pointers, and the second plurality of address pointers are 2 address pointers. In the event that data of one of the multiple valid storage blocks is lost and its corresponding second plurality of address pointers are lost, the first plurality of address pointers and the second plurality of address pointers of other valid storage blocks of the multiple valid storage blocks can together form an address chain covering all valid storage blocks of other valid storage blocks of the multiple valid storage blocks.

[0032] In some embodiments, the memory controller is configured to read a second plurality of address pointers stored in a valid storage block when reading storage data of the valid storage block, and determine the corresponding valid storage block to be read next based on the second plurality of address pointers.

[0033] In some embodiments, the first plurality of address pointers are N address pointers, the second plurality of address pointers are N address pointers, N is an integer greater than or equal to 2; the N address pointers set for a certain valid storage block respectively point to one of the N valid storage blocks that were most recently successfully written before the certain valid storage block was successfully written; the N address pointers of the check factor respectively point to one of the last N valid storage blocks that were successfully written among the valid storage blocks.

[0034] In some embodiments, the memory controller is configured to perform an exclusive OR operation on the check code data and storage data of a corresponding valid storage block read through the address chain to recover the lost data of the certain valid storage block.

[0035] According to another embodiment of the present disclosure, a memory system is provided, comprising: a memory, the memory comprising a verification storage area and a plurality of storage blocks; and a memory controller, the memory controller being coupled to the memory; the verification storage area stores verification factors of a plurality of valid storage blocks corresponding to the plurality of storage blocks, the verification factors comprising verification code data and a first plurality of address pointers configured for the plurality of storage blocks; a second plurality of address pointers are arranged in each of the valid storage blocks, each of the second plurality of address pointers in each of the valid storage blocks respectively pointing to a corresponding other valid storage block; wherein the first plurality of address pointers and the second plurality of address pointers of the plurality of valid storage blocks can together form an address chain covering all valid storage blocks of the plurality of valid storage blocks. BRIEF DESCRIPTION OF THE DRAWINGS

[0036] The accompanying drawings, which are incorporated herein and form a part of the specification, illustrate embodiments of the present disclosure and, together with the description, further serve to explain the principles of the present disclosure and enable those skilled in the relevant art to make and use the present disclosure.

[0037] Figure 1 A schematic diagram of a data protection method for a memory according to an embodiment of the present disclosure is shown.

[0038] Figure 2 A schematic diagram of a data protection method for a memory according to yet another embodiment of the present disclosure is shown.

[0039] Figure 3 A flow chart of a method for protecting data in a memory according to an embodiment of the present disclosure is shown;

[0040] Figure 4 A flow chart showing a method for recovering data from a memory device according to an embodiment of the present disclosure is shown; and

[0041] Figure 5 A schematic diagram of a memory system according to an embodiment of the present disclosure is shown. DETAILED DESCRIPTION

[0042] The subject matter described herein will now be discussed with reference to example embodiments. It should be understood that the discussion of these embodiments is only to enable those skilled in the art to better understand and implement the subject matter described herein, and is not a limitation of the scope of protection, applicability or examples set forth in the claims. The functions and arrangements of the elements discussed can be changed without departing from the scope of protection of the contents of this specification. Various examples can omit, replace or add various processes or components as needed. For example, the described method can be performed in an order different from the described order, and various steps can be added, omitted or combined. In addition, the features described relative to some examples can also be combined in other examples.

[0043] It should be noted that the references to "one embodiment", "embodiment", "some embodiments" and the like in the specification indicate that the described embodiments may include specific features, structures or characteristics, but not every embodiment may include the specific features, structures or characteristics. In addition, such expressions do not necessarily refer to the same embodiment. In addition, when specific features, structures or characteristics are described in conjunction with an embodiment, it should be within the knowledge of technicians in the relevant field to implement such features, structures or characteristics in conjunction with other embodiments that are explicitly or not explicitly described.

[0044] Although the embodiments of the present disclosure will be described with reference to 3D NAND flash memory, it should be understood that the embodiments of the inventive concepts of the present disclosure are not limited to this configuration. For example, the present disclosure is applicable to other non-volatile memory devices, such as electrically erasable programmable ROM (EEPROM), NOR flash memory, phase change RAM (PRAM), magnetic RAM (MRAM), resistive RAM (RRAM), ferroelectric RAM (FRAM), etc., without departing from the scope of the present disclosure.

[0045] Figure 1 FIG. 1 is a schematic diagram of a data protection method for a memory according to an embodiment of the present disclosure, wherein which data is skipped is recorded in a bitmap form. That is, the bitmap data is used as additional data of the check factor F. Figure 1As shown in , the 3D NAND flash memory 100 includes storage block D0, storage block D1, storage block D2, ..., storage block Dn. During the writing process, the storage block that has completed the writing is marked as "valid" and represented by "0" in the bitmap, and the storage block that has not completed the writing and caused part of its written data to be unavailable is marked as "skipped" and represented by "1" in the bitmap. In order to use RAID technology to recover data that has been successfully written in a valid storage block and lost after the writing is completed, the unavailable data in these storage blocks marked as "1" will be skipped when calculating the check code data based on the storage data in multiple valid storage blocks, and when using the check code data to recover the lost data in the storage block, it is also necessary to skip the unavailable data in these storage blocks marked as "1".

[0046] However, even if compressed in bitmap form, it still takes up a lot of memory space. Figure 1 In the data protection method for storage shown, when the RAID ratio (the amount of protected data and the amount of check factor) is 127:1, the bitmap needs to occupy 16 bytes; when the RAID ratio is 255:1, the bitmap needs to occupy 32 bytes. In the case where the bitmap as additional data of the check factor F needs to occupy 16 bytes or 32 bytes, this will result in 16 bytes or 32 bytes of space of each valid storage block being wasted and cannot be used to store data, because even if data is written in these spaces of each valid storage block, it is impossible to use RAID technology to recover the data that was successfully written in the space of a valid storage block and was later lost after the writing is completed. Therefore, in addition to the need to reserve a large space in the check factor F for additional data (for example, bitmap), thereby greatly reducing the ECC error correction capability of the system, each valid storage block also wastes space of the same size as the additional data.

[0047] Figure 2 FIG. 2 is a schematic diagram showing a data protection method for a memory according to another embodiment of the present disclosure. Figure 2 As shown in , the 3D NAND flash memory 200 includes a memory block D0, a memory block D1, a memory block D2, . . . , a memory block D126.

[0048] like Figure 2As shown in , during the writing process of the 3D NAND flash memory 200, the successfully written storage blocks D are marked as "valid", such as storage blocks D0, storage blocks D2, ... storage blocks D123, storage blocks D125, and storage blocks D126. During the writing process, the storage blocks D that fail to write all data successfully due to some reasons (e.g., power failure, write failure, etc.) are marked as "skipped", such as storage blocks D1, storage blocks D3, ... storage blocks D124, and the data in the storage blocks marked as "skipped" are unavailable. That is, after the writing of the memory 200 is completed, if the data stored in a valid storage block D is lost, if the RAID technology is used to recover the lost data in the valid storage block D, the data written in the storage blocks D marked as "skipped" cannot be used when calculating the check code data P used to recover the lost data in the valid storage block D.

[0049] like Figure 2 As shown in , the check code data P can be generated by performing an "exclusive OR" (XOR) operation on the data stored in multiple valid storage blocks D in all the storage blocks of the 3D NAND flash memory 200. In one embodiment, the check code data P can be generated by performing an "exclusive OR" (XOR) operation on the data stored in all the valid storage blocks D of the 3D NAND flash memory 200. XOR is a logical operation on two operands. If the two values ​​subjected to "exclusive OR" are different, it produces a logical value "1"; if the two values ​​subjected to "exclusive OR" are the same, it produces a logical value "0". For example, if the data stored in the valid storage block D0 is "11001010", and the data stored in the valid storage block D2 is "10000011", the result after "exclusive OR" is "01001001". Next, the above result is subjected to an "exclusive OR" operation with the data stored in the next valid storage block D again, until the data stored in all the valid storage blocks D are subjected to an "exclusive OR" operation, thereby obtaining the check code data P.

[0050] and Figure 1 As shown in FIG. 1 , the check factor F used to recover the data lost after writing a valid storage block D also includes additional data in addition to the check code data P. Figure 1 The difference between using a bitmap as additional data for the check factor F is that Figure 2 In , the address chain is used as additional data of the check factor F. For example, Figure 2As shown in , the check factor F includes two address pointers L1 and L2 in addition to the check code data P obtained by performing an "exclusive OR" operation on the data stored in multiple valid storage blocks D. The two address pointers L1 and L2 point to a corresponding valid storage block D of the 3D NAND flash memory 200. In one embodiment, the two address pointers L1 and L2 respectively record the number of the corresponding valid storage block D. In this case, if the RAID ratio is 127:1, the two address pointers L1 and L2 may only occupy two bytes of space; if the RAID ratio is 255:1, the two address pointers L1 and L2 may only occupy four bytes of space.

[0051] like Figure 2 As shown in FIG. 1 , the two address pointers L1 and L2 as the additional data of the check factor F can point to one of the two valid storage blocks that are last successfully written in time in the 3D NAND flash memory 200. For example, the address pointer L2 points to the valid storage block D126 that is last successfully written, and the address pointer L1 points to the valid storage block D125 that is second to last successfully written. It should be understood that Figure 2 The situation shown in is exemplary. If the last storage block D126 is marked as "skipped", the last valid storage block successfully written in time is D125, and the second to last valid storage block successfully written in time is D124, then the address pointer L2 of the additional data serving as the check factor F points to the valid storage block D125, and the address pointer L1 points to the valid storage block D124.

[0052] and Figure 1 The median image is used as additional data for the check factor F. Figure 2 In the case where the two address pointers L1 and L2 of the check factor F occupy two bytes of space, each valid storage block D, in addition to the written storage data, also occupies two bytes of space to store the two address pointers D. L1 , D L2 , these two address pointers D L1 , D L2 Point to one of the two valid storage blocks D that were successfully written to most recently before the writing to the valid storage block D is completed. Figure 2 As shown in FIG. 1 , in addition to the stored data, the effective storage block D126 also stores two address pointers D126. L1 、D126 L2 , where address pointer D126 L2 Points to the valid storage block that was successfully written most recently before the valid storage block D126 was successfully written, for example, D125, and the address pointer D126 L1Points to the valid storage block D123, which is the second last successfully written before the valid storage block D126 is successfully written. Because the storage block D124 is marked as "skipped", although the storage block D124 is closer to the valid storage block D126 than the storage block D123, the address pointer D126 L1 Similarly, in addition to the stored data, the valid storage block D125 also stores two address pointers D125. L1 、D125 L2 , where address pointer D125 L2 Points to the valid memory block that was most recently successfully written before the valid memory block D125 was successfully written, for example, D123, and the address pointer D125 L1 Points to the valid storage block that is successfully written to the second last before the valid storage block D125 is successfully written, for example, D122 ( Figure 2 Because the memory block D124 is marked as "skipped", although the memory block D124 is closer to the valid memory block D125 than the memory block D123, the two address pointers D125 in the valid memory block D125 are L1 、D125 L2 Neither will point to storage block D124. By analogy, the two address pointers D stored in each valid storage block D can be determined. L1 , D L2 The storage blocks they point to respectively.

[0053] like Figure 2 As shown in FIG. 1 , the writing process of the 3D NAND flash memory 200 is as follows: first, the memory block D0 is written. If the writing to the memory block D0 is successful (marked as “valid”), because no memory block D is successfully written before the successful writing to the memory block D0, the two address pointers D0 in the valid memory block D0 are L1 、D0 L2 Points to null; Next, write to storage block D1. During the writing process, storage block D1 fails to be written successfully (marked as "skipped") due to some reason (for example, power failure); Next, after resuming the writing process, write to storage block D2. If storage block D2 is successfully written (marked as "valid"), because only storage block D0 is successfully written before storage block D2 is successfully written, the address pointer D2 in the valid storage block D2 is L2 Points to the valid storage block D0, and the address pointer D2 of the valid storage block D2 L1 Points to null; Next, write to storage block D3. During the writing process, storage block D3 fails to be written successfully (marked as "skipped") due to some reason (for example, power failure); Next, after resuming the writing process, write to storage block D4 ( Figure 2 If the memory block D4 is successfully written, because the memory blocks D0 and D2 are successfully written before the memory block D4 is successfully written, the address pointer D4 in the effective memory block D4 is L2 Points to the valid storage block D2 that was most recently successfully written before the valid storage block D4 was successfully written, and the address pointer D4 in the valid storage block D4 L1 Point to the valid storage block D0 that is the second to last successfully written before the valid storage block D4 is successfully written, ..., and so on, until the writing of all storage blocks D is completed.

[0054] After the writing of the 3D NAND flash memory 200 is completed, if the data stored in a certain valid storage block D is lost, the RAID technology can be used to recover the lost data in the valid storage block D. Specifically, in order to recover the lost data of a certain valid storage block D, in addition to the check code data P obtained based on the stored data in the valid storage blocks D that are all successfully written in the multiple storage blocks of the 3D NAND flash memory 200 during the writing process, it is also necessary to read the stored data in other valid storage blocks D of the multiple storage blocks D of the 3D NAND flash memory 200 except the valid storage block D where the data is lost. In order to read the stored data in other valid storage blocks D except the valid storage block D where the data is lost, the data stored in the corresponding valid storage block D can be read through the address chain formed by the address pointer in the check factor F and the address pointers in other valid storage blocks D except the valid storage block D where the data is lost. For example, after the writing to the 3D NAND flash memory 200 is completed, assuming that the data stored in the valid storage block D123 is lost, in order to recover the lost data in the valid storage block D123, according to the address pointer L2 in the check factor F, it is known that the storage block D126 is successfully written, so it is necessary to read the storage data in the valid storage block D126; next, according to the address pointer D126 in the valid storage block D126, L2 , knowing that the storage block D125 is successfully written, it is necessary to read the storage data in the valid storage block D125; next, because the address pointer D125 in the valid storage block D125 L2 Points to storage block D123, but the data in storage block D123 is lost and cannot be read. At this time, the address pointer D125 in the valid storage block D125 is used. L1 , knowing that storage block D122 ( Figure 2 (not shown) is successfully written, so it is necessary to read the storage data in the valid storage block D122; then, according to the address pointer D122 in the valid storage block D122 L2, ...; and so on, until the storage data in the valid storage block D0 is also read. It can be seen that the address chain formed by the address pointer in the check factor F and the address pointers in other valid storage blocks D except the valid storage block D123 of the lost data can automatically skip the storage block D marked as "skipped" in the 3D NAND flash memory 200 and the valid storage block D123 of the lost data. In other words, the address chain automatically skips the invalid storage blocks among the multiple storage blocks D of the 3D NAND flash memory 200. After obtaining the check code data P obtained based on the storage data in all the valid storage blocks D of the 3D NAND flash memory 200 during the writing process and the storage data in other valid storage blocks D except the valid storage block D123 of the lost data, the check code data P and the storage data in the corresponding valid storage block D read by the address chain formed by the address pointer in the check factor F and the address pointer in other valid storage blocks D except the valid storage block D123 of the lost data can be performed to recover the lost data in the storage block D123.

[0055] exist Figure 2 In the embodiment shown, if the data stored in the valid storage block D126 is lost after the writing to the 3D NAND flash memory 200 is completed, in order to use the RAID technology to recover the data that is subsequently lost in the valid storage block D126, it is necessary to read the data stored in other valid storage blocks D except the valid storage block D126. The address pointer L2 of the check factor F points to the storage block D126. Since the data stored in the storage block D126 cannot be read at this time, the address pointer L1 of the check factor F can be used to point to the valid storage block D125, and the data stored in the valid storage block D125 can be read first. Next, according to the address pointer D125 in the valid storage block D125, the data stored in the valid storage block D125 is read. L2 , knowing that the storage block D123 is successfully written, it is necessary to read the storage data in the valid storage block D123; then, according to the address pointer D123 in the valid storage block D123 L2 , ...; and so on, until the storage data in the valid storage block D0 is also read. Similarly, after obtaining the check code data P obtained based on the storage data in all valid storage blocks D of the 3D NAND flash memory 200 during the writing process and the storage data in other valid storage blocks D except the valid storage block D126 of the lost data read through the address chain formed by the address pointer in the check factor F and the address pointer in other valid storage blocks D except the valid storage block D126 of the lost data, an "XOR" operation can be performed on the check code data P and the storage data in the corresponding valid storage block D read to recover the lost data in the storage block D126.

[0056] In one embodiment, an "XOR" operation can be performed on the generated check code data P and the storage data of the corresponding valid storage block read through the address chain to recover the data lost in a valid storage block D after the writing process. Figure 2 Taking the method shown in the figure as an example, it is assumed that the data stored in the valid storage block D123 is lost after the writing process. In order to recover the lost data in the valid storage block D123, the generated additional check code P can be firstly subjected to an "exclusive OR" operation with the storage data in the valid storage block D126 read through the address pointer L2 in the check factor F, and then the obtained result can be subjected to an "exclusive OR" operation with the storage data in the valid storage block D125 read through the address pointer L2 in the valid storage block D126, and then the obtained result can be subjected to an "exclusive OR" operation with the storage data in the valid storage block D122 ( Figure 2 The storage data in the valid storage block D0 (not shown) is subjected to an "exclusive OR" operation again, ..., until the obtained result is subjected to an "exclusive OR" operation with the storage data in the valid storage block D2 read, thereby obtaining the final result of the above-mentioned multiple "exclusive OR" operations, which is also the result of performing an "exclusive OR" operation on the data stored in the valid storage block D0 and the data originally stored in the valid storage block 123. Therefore, by performing an "exclusive OR" operation on the generated check code data P and the storage data of the corresponding valid storage block read through the address chain, the data lost in the valid storage block D123 after the writing process can be restored.

[0057] exist Figure 2In the illustrated embodiment, because the two address pointers L1 and L2 of the check factor F point to one of the two valid storage blocks that were last successfully written in the valid storage block D of the 3D NAND flash memory 200, respectively, when the data stored in the valid storage block D that was not last successfully written is lost later, the address pointer L2 of the check factor F and the address chain formed by the address pointers in the other valid storage blocks D except the valid storage block D where the data was lost are used to read the data stored in the other valid storage blocks D except the valid storage block D where the data was lost. In addition, even if the data stored in the valid storage block D (for example, the storage block D126) that was last successfully written is lost later, the address chain formed by the address pointer L1 of the check factor F and the address pointers in the other valid storage blocks D except the last successfully written is used to read the data stored in the other valid storage blocks D except the last successfully written. Since one of the two address pointers L1 and L2 of the check factor F can be selectively used as the address chain with the head of the chain to read the data stored in the corresponding valid storage block D according to the position of the valid storage block D where the data is lost, the chain will not be broken. On the contrary, if the check factor F has only one address pointer L and the address pointer L points to the valid storage block D that is last successfully written in the valid storage blocks, such as the valid storage block D126, when the data stored in the valid storage block D126 is lost, the data stored in other valid storage blocks D except the valid storage block D126 cannot be read. In other words, a link break will occur at this time, and the lost data in the storage block D126 cannot be recovered by using the RAID technology.

[0058] In addition, when the RAID ratio is 127:1, if Figure 1 As shown in FIG. 1 , which data is skipped is recorded in the form of a bitmap. The bitmap of the additional data of the check factor F needs to occupy 16 bytes of space, and each valid storage block D also wastes 16 bytes of space accordingly. Figure 2 As shown, which storage blocks store valid data in the form of an address chain, the address chain as additional data of the check factor F only needs to occupy 2 bytes of space, and each valid storage block D also correspondingly only wastes, for example, 2 bytes of space, thereby greatly saving memory space.

[0059] It should be understood that Figure 2The check factor F shown in FIG. 1 includes two address pointers L1 and L2, and each valid storage block D includes two address pointers, which are merely exemplary. In one embodiment, the check factor F may include N address pointers (N is an integer greater than or equal to 2), which respectively point to one of the last N valid storage blocks successfully written in the valid storage blocks D of the 3D NAND flash memory 200. In this case, each valid storage block D, in addition to the written storage data, also includes N address pointers (N is an integer greater than or equal to 2), which respectively point to one of the N valid storage blocks D that were successfully written most recently before the corresponding valid storage block D was successfully written. For example, the check factor F may include three address pointers L1, L2, and L3, and each valid storage block D may include three address pointers, the address pointer L3 of the check factor F points to the last valid storage block successfully written in the valid storage block D, the address pointer L2 points to the second to last valid storage block successfully written in the valid storage block D, and the address pointer L1 points to the third to last valid storage block successfully written in the valid storage block D. Correspondingly, the three address pointers of each valid storage block D respectively point to one of the three valid storage blocks that were most recently successfully written before the valid storage block D was successfully written.

[0060] Figure 3 A flow chart of a data protection method for a memory according to an embodiment of the present disclosure is shown, wherein the memory includes a plurality of memory blocks. Figure 3 As shown in , the method 300 includes: generating check code data of a check factor based on the storage data of multiple valid storage blocks among the multiple storage blocks (step S310); configuring a first plurality of address pointers for the multiple storage blocks in the check factor (step S320); and setting a second plurality of address pointers in each of the valid storage blocks, wherein each of the second plurality of address pointers in each of the valid storage blocks points to a corresponding other valid storage block, and the first plurality of address pointers and the second plurality of address pointers of the multiple valid storage blocks can together form an address chain covering all valid storage blocks of the multiple valid storage blocks (step S330). Steps S310-S330 are described as follows:

[0061] Step S310: Generate check code data of the check factor based on the storage data of multiple valid storage blocks among the multiple storage blocks. Figure 2 Taking the method shown as an example, during the writing process of the 3D NAND flash memory, an "XOR" operation can be performed on the data stored in all valid storage blocks D to generate the check code data P of the check factor F.

[0062] Step S320: configuring a first plurality of address pointers for the plurality of storage blocks in the check factor. Figure 2As shown in, in addition to the check code data P obtained in step S310, the check factor F also includes two address pointers L1 and L2 as additional data configured for the multiple storage blocks, and the two address pointers L1 and L2 respectively point to one of the two valid storage blocks that were last successfully written among the multiple valid storage blocks.

[0063] Step S330: setting a second plurality of address pointers in each of the valid storage blocks, wherein each of the second plurality of address pointers in each of the valid storage blocks points to a corresponding other valid storage block, and the first plurality of address pointers and the second plurality of address pointers of the plurality of valid storage blocks can together form an address chain covering all valid storage blocks of the plurality of valid storage blocks. Figure 2 Taking the method shown as an example, in addition to the written storage data, each valid storage block D is also provided with two address pointers, and the two address pointers respectively point to one of the two valid storage blocks that were successfully written most recently before the successful writing of the valid storage block D. The two address pointers L1 and L2 of the check factor F and the two address pointers of each valid storage block D can together form an address chain covering all valid storage blocks D.

[0064] Figure 4 A flow chart of a method for recovering data from a memory according to an embodiment of the present disclosure is shown, wherein the memory includes a plurality of memory blocks. Figure 4 As shown in , method 400 includes: determining that data of a certain valid storage block of a plurality of valid storage blocks among the plurality of storage blocks is lost (step S410); and recovering the lost data of the certain valid storage block based on check code data of a check factor and reading the storage data of a corresponding valid storage block of the plurality of valid storage blocks through an address chain, wherein the check factor includes the check code data and a first plurality of address pointers configured for the plurality of storage blocks, the address chain is formed by the first plurality of address pointers and a second plurality of address pointers set in each of the valid storage blocks, each of the second plurality of address pointers in each of the valid storage blocks points to a corresponding other valid storage block, so that the address chain can cover all valid storage blocks of the plurality of valid storage blocks (step S420).

[0065] Still Figure 2Taking the method shown as an example, first, it is determined that data is lost in a certain valid storage block D of multiple valid storage blocks. For example, after the writing process, it is determined that the data stored in the storage block D123 is lost; then, the storage data in other valid storage blocks D except the valid storage block D123 where the data is lost is read. In order to read the storage data in other valid storage blocks D, the data stored in all valid storage blocks D except the valid storage block D123 can be read through the address chain formed by the two address pointers in the check factor F and the address pointers in the other valid storage blocks D; finally, an "exclusive OR" operation can be performed on the check code data P obtained based on the storage data in all valid storage blocks D of the 3D NAND flash memory 200 during the writing process and the storage data in all valid storage blocks D except the valid storage block D123 read through the address chain to recover the lost data in the storage block D123.

[0066] Figure 5 Schematic diagram of a system 500 with a memory according to an embodiment of the present disclosure is shown. The system 500 may be a mobile phone, a desktop computer, a laptop computer, a tablet computer, a game console, a printer, a positioning device, a wearable electronic device, a smart sensor, a virtual reality (VR) device, an augmented reality (AR) device, or any other suitable electronic device with a memory. Figure 5 As shown in FIG. 5 , system 500 may include a host 510 and a memory system 520 having one or more memories 501 and a memory controller 502. Host 510 may be configured to send data to memory 501 or receive data from memory 501.

[0067] The memory 501 may be any memory disclosed herein, such as a 3D NAND flash memory, which includes a verification storage area 5011 and a plurality of storage blocks, such as storage block 0, storage block 1, storage block 2, ..., storage block n. The verification storage area 5011 stores verification factors of a plurality of valid storage blocks corresponding to the plurality of storage blocks, and the verification factors include verification code data and a first plurality of address pointers configured for the plurality of storage blocks. In addition, a second plurality of address pointers are provided in each of the plurality of storage blocks of the memory 501, and each of the second plurality of address pointers of each valid storage block points to a corresponding other valid storage block. The first plurality of address pointers and the second plurality of address pointers of the plurality of valid storage blocks can together form an address chain covering all valid storage blocks of the plurality of valid storage blocks.

[0068] like Figure 5As shown in , the memory controller 502 includes a front-end interface 5021 and a back-end interface 5022, the front-end interface 5021 is coupled to the host 510 through channels Lane 0, Lane 1, Lane 2, and Lane 3, and the back-end interface 5022 is coupled to the inspection storage area 5011 and the corresponding storage block of the memory 501 through channels CH0, CH1, ..., CHn, wherein the front-end interface 5021 can communicate with the host 510 according to a specific communication protocol (e.g., PCIe, NVMe); the back-end interface 5022 includes a RAID module. The RAID module can be specifically implemented by, for example, firmware written in the controller of the back-end interface 5022, or by a dedicated hardware engine circuit.

[0069] In one embodiment, the RAID module can be configured to generate check code data of a check factor based on the storage data of multiple valid storage blocks among the multiple storage blocks of the memory 501; configure a first plurality of address pointers for the multiple storage blocks in the check factor; and set a second plurality of address pointers in each of the valid storage blocks for the storage data stored therein, wherein each of the second plurality of address pointers in each of the valid storage blocks points to a corresponding other valid storage block, and the first plurality of address pointers and the second plurality of address pointers of the multiple valid storage blocks can together form an address chain covering all the valid storage blocks of the multiple valid storage blocks. In another embodiment, the RAID module can be configured to determine data loss of a certain valid storage block among multiple valid storage blocks in the multiple storage blocks of the memory 501; and to recover the lost data of the certain valid storage block by reading the storage data of the corresponding valid storage block of the multiple valid storage blocks through an address chain based on the check code data of the check factor; wherein the check factor includes the check code data and a first plurality of address pointers configured for the multiple storage blocks, the address chain is formed by the first plurality of address pointers and a second plurality of address pointers set in each of the valid storage blocks for the storage data stored therein, and each of the second plurality of address pointers in each of the valid storage blocks points to a corresponding other valid storage block, so that the address chain can cover all valid storage blocks of the multiple valid storage blocks.

[0070] The memory controller 502 also includes a processing module 5023 having a processing unit 1, a processing unit 2, ..., a processing unit n. The corresponding processing unit can be configured with a corresponding firmware, for example, a firmware that implements the FTL (Flash to Logic) function. The corresponding firmware running on the processing unit can control the operation of the memory 501 based on the instructions received from the host 510, for example, read, erase and program operations. The memory controller 502 also includes a static random access memory (SRAM) 5024, a dynamic random access memory (DRAM) controller 5025, and a dynamic random access memory (DRAM) interface 5026, wherein the dynamic random access memory (DRAM) interface 5026 is coupled to the dynamic random access memory (DRAM) 503. Figure 5 As shown in , the various components of the memory controller 502 can be connected to the bus & bridge 5027.

[0071] As described above, according to an embodiment of the present disclosure, the memory system 520 can utilize the address chain as additional data of the check factor, thereby greatly reducing the space requirement for the additional data of the check factor, maintaining the ECC error correction capability of the system, and greatly reducing the space waste of the memory.

[0072] According to one embodiment, a computer-readable storage medium is provided, on which a program code is stored. When the program code is executed by a processor, the processor is enabled to perform the Figure 1-4 Specifically, a system or device equipped with a readable storage medium may be provided, on which a software program code for implementing the functions of any of the above-mentioned embodiments is stored, and a computer or processor of the system or device reads and executes the instructions stored in the readable storage medium.

[0073] Examples of readable storage media include nonvolatile memory cards and ROMs, etc. Alternatively, the program code may be downloaded from a server computer or a cloud via a communication network.

[0074] It should be noted that not all steps and units in the above-mentioned processes and system structure diagrams are necessary, and some steps or units can be ignored according to actual needs. The execution order of each step is not fixed and can be determined as needed. The device structure described in the above-mentioned embodiments can be a physical structure or a logical structure, that is, some units may be implemented by the same physical entity, or some units may be implemented by multiple physical entities, or some components in multiple independent devices may be implemented together.

[0075] Controllers have been described in conjunction with various devices and methods. The controller can be implemented using electronic hardware, computer software or any combination thereof. Whether the controller is implemented as hardware or software will depend on specific applications and the overall design constraints imposed on the system. As an example, the controller provided in the present disclosure, any part of the controller or any combination of controllers can be implemented as a microprocessor, a microcontroller, a digital signal processor (DSP), a field programmable gate array (FPGA), a programmable logic device (PLD), a state machine, a gate logic, a discrete hardware circuit, and other suitable processing components configured to perform the various functions described in the present disclosure. The function of the controller provided in the present disclosure, any part of the controller or any combination of controllers can be implemented as software executed by a microprocessor, a microcontroller, a DSP or other suitable platforms.

[0076] The above description of the present disclosure is provided to enable any person of ordinary skill in the art to implement or use the present disclosure. Various modifications to the present disclosure will be apparent to those of ordinary skill in the art, and the general principles defined herein may be applied to other variations without departing from the scope of protection of the present disclosure. Therefore, the present disclosure is not limited to the examples and designs described herein, but is consistent with the widest range of principles and novel features disclosed herein.

Claims

1. A data protection method for a memory, wherein the memory comprises a plurality of memory blocks, wherein the method include: Generate check code data of a check factor based on storage data of a plurality of valid storage blocks among the plurality of storage blocks; configuring a first plurality of address pointers for the plurality of storage blocks in the check factor; as well as A second plurality of address pointers are set in each of the valid storage blocks, wherein each of the second plurality of address pointers in each of the valid storage blocks points to a corresponding other valid storage block, and the first plurality of address pointers and the second plurality of address pointers of the multiple valid storage blocks can together form an address chain covering all the valid storage blocks of the multiple valid storage blocks.

2. The method according to claim 1, in, The first plurality of address pointers are 2 address pointers, and the second plurality of address pointers are 2 address pointers. In the event that data of one of the multiple valid storage blocks is lost and the corresponding second plurality of address pointers are lost, the first plurality of address pointers and the second plurality of address pointers of other valid storage blocks of the multiple valid storage blocks can together form an address chain covering all valid storage blocks of the other valid storage blocks of the multiple valid storage blocks.

3. The method according to claim 1, in, Also includes the steps: When data of one of the multiple valid storage blocks is lost, the lost data of the one valid storage block is recovered by reading the storage data of the corresponding valid storage blocks of the multiple valid storage blocks based on the check code data of the check factor and the address chain formed by the first multiple address pointers and the second multiple address pointers of other valid storage blocks of the multiple valid storage blocks.

4. The method according to claim 1, in, The first plurality of address pointers is N address pointers, the second plurality of address pointers is N address pointers, and N is an integer greater than or equal to 2; The N address pointers set for a certain valid storage block respectively point to one of the N valid storage blocks that were successfully written most recently before the certain valid storage block was successfully written; The N address pointers of the check factor respectively point to one of the last N valid storage blocks successfully written in the valid storage blocks.

5. The method according to claim 4, in, The N address pointers of the first valid storage block successfully written among the multiple valid storage blocks of the multiple storage blocks point to null, and among the N address pointers of the (NM)th valid storage block successfully written among the multiple storage blocks, the (M+1)th address pointer points to null, where M is an integer greater than or equal to 0 and less than N.

6. The method according to claim 1, in, The address chain automatically skips invalid memory blocks among the plurality of memory blocks.

7. The method according to claim 1, in, The check code data of the check factor is generated based on the storage data of all valid storage blocks among the plurality of storage blocks.

8. The method according to claim 1, in, An exclusive OR operation is performed on the storage data of the plurality of valid storage blocks among the plurality of storage blocks to generate check code data of the check factor.

9. The method according to claim 3, in, An exclusive OR operation is performed on the check code data and the storage data of the corresponding valid storage block read through the address chain to recover the lost data of the certain valid storage block.

10. The method according to claim 1, in, The memory is a 3D NAND flash memory.

11. A data recovery method for a memory, wherein the memory comprises a plurality of memory blocks, wherein the method include: Determining that data of a valid storage block of a plurality of valid storage blocks among the plurality of storage blocks is lost; as well as Recovering the lost data of the one valid storage block based on the check code data of the check factor and reading the storage data of the corresponding valid storage block of the plurality of valid storage blocks through the address chain; Among them, the check factor includes the check code data and a first plurality of address pointers configured for the multiple storage blocks, the address chain is formed by the first plurality of address pointers and a second plurality of address pointers set in each of the valid storage blocks, and each of the second plurality of address pointers in each of the valid storage blocks points to a corresponding other valid storage block, so that the address chain can cover all valid storage blocks of the multiple valid storage blocks.

12. The method according to claim 11, in, The first plurality of address pointers are 2 address pointers, and the second plurality of address pointers are 2 address pointers. In the event that data of one of the multiple valid storage blocks is lost and the corresponding second plurality of address pointers are lost, the first plurality of address pointers and the second plurality of address pointers of other valid storage blocks of the multiple valid storage blocks can together form an address chain covering all valid storage blocks of the other valid storage blocks of the multiple valid storage blocks.

13. The method according to claim 11, in, When reading the storage data of a certain valid storage block, a second plurality of address pointers stored in the certain valid storage block are also read, and a corresponding valid storage block to be read next is determined based on the second plurality of address pointers.

14. The method according to claim 11, in, The first plurality of address pointers is N address pointers, the second plurality of address pointers is N address pointers, and N is an integer greater than or equal to 2; The N address pointers set for a certain valid storage block respectively point to one of the N valid storage blocks that were successfully written most recently before the certain valid storage block was successfully written; The N address pointers of the check factor respectively point to one of the last N valid storage blocks successfully written in the valid storage blocks.

15. The method according to claim 11, in, An exclusive OR operation is performed on the check code data and the storage data of the corresponding valid storage block read through the address chain to recover the lost data of the certain valid storage block.

16. A memory system, include: A memory, the memory comprising a plurality of storage blocks; as well as a memory controller coupled to the memory and configured to: generate check code data of a check factor based on storage data of a plurality of valid storage blocks among the plurality of storage blocks; configuring a first plurality of address pointers for the plurality of storage blocks in the check factor; And a second plurality of address pointers are set in each of the valid storage blocks, wherein each of the second plurality of address pointers in each of the valid storage blocks points to a corresponding other valid storage block, and the first plurality of address pointers and the second plurality of address pointers of the multiple valid storage blocks can together form an address chain covering all the valid storage blocks of the multiple valid storage blocks.

17. The memory system according to claim 16, in, The first plurality of address pointers are 2 address pointers, and the second plurality of address pointers are 2 address pointers. In the event that data of one of the multiple valid storage blocks is lost and the corresponding second plurality of address pointers are lost, the first plurality of address pointers and the second plurality of address pointers of other valid storage blocks of the multiple valid storage blocks can together form an address chain covering all valid storage blocks of the other valid storage blocks of the multiple valid storage blocks.

18. The memory system according to claim 16, in, The controller is also configured to, when data of one of the multiple valid storage blocks is lost, recover the lost data of the one valid storage block by reading the storage data of a corresponding valid storage block of the multiple valid storage blocks based on the check code data of the check factor and an address chain formed by the first multiple address pointers and the second multiple address pointers of other valid storage blocks of the multiple valid storage blocks.

19. The memory system according to claim 16, in, The first plurality of address pointers is N address pointers, the second plurality of address pointers is N address pointers, and N is an integer greater than or equal to 2; The N address pointers set for a certain valid storage block respectively point to one of the N valid storage blocks that were successfully written most recently before the certain valid storage block was successfully written; The N address pointers of the check factor respectively point to one of the last N valid storage blocks successfully written in the valid storage blocks.

20. The memory system according to claim 19, in, The N address pointers of the first valid storage block successfully written among the multiple valid storage blocks of the multiple storage blocks point to null, and among the N address pointers of the (NM)th valid storage block successfully written among the multiple storage blocks, the (M+1)th address pointer points to null, where M is an integer greater than or equal to 0 and less than N.

21. The memory system according to claim 16, in, The address chain automatically skips invalid memory blocks among the plurality of memory blocks. 22 . The memory system according to claim 16 , wherein the controller is configured to generate check code data of the check factor based on storage data of all valid memory blocks among the plurality of memory blocks. 23 . The memory system according to claim 16 , wherein the controller is configured to perform an exclusive OR operation on storage data of the plurality of valid storage blocks among the plurality of storage blocks to generate check code data of the check factor.

24. The memory system according to claim 18, wherein the controller is configured to perform an XOR operation on the check code data and storage data of a corresponding valid storage block read through the address chain to recover lost data of the certain valid storage block.

25. The memory system according to claim 16, in, The memory is a 3D NAND flash memory.

26. A memory system, include: A memory, the memory comprising a plurality of storage blocks; as well as a memory controller coupled to the memory and configured to: determine that data of a valid memory block of a plurality of valid memory blocks among the plurality of memory blocks is lost; And based on the check code data of the check factor and the storage data of the corresponding valid storage blocks of the multiple valid storage blocks read through the address chain, to recover the lost data of the one valid storage block; wherein, the check factor includes the check code data and the first plurality of address pointers configured for the multiple storage blocks, the address chain is formed by the first plurality of address pointers and the second plurality of address pointers set in each of the valid storage blocks, each of the second plurality of address pointers in each of the valid storage blocks points to a corresponding other valid storage block, so that the address chain can cover all the valid storage blocks of the multiple valid storage blocks.

27. The memory system according to claim 26, in, The first plurality of address pointers are 2 address pointers, and the second plurality of address pointers are 2 address pointers. In the event that data of one of the multiple valid storage blocks is lost and the corresponding second plurality of address pointers are lost, the first plurality of address pointers and the second plurality of address pointers of other valid storage blocks of the multiple valid storage blocks can together form an address chain covering all valid storage blocks of the other valid storage blocks of the multiple valid storage blocks.

28. According to the memory system of claim 26, the memory controller is configured to, when reading the storage data of a certain valid storage block, also read a second plurality of address pointers stored in the certain valid storage block, and determine the corresponding valid storage block to be read next based on the second plurality of address pointers.

29. The memory system according to claim 26, in, The first plurality of address pointers is N address pointers, the second plurality of address pointers is N address pointers, and N is an integer greater than or equal to 2; The N address pointers set for a certain valid storage block respectively point to one of the N valid storage blocks that were successfully written most recently before the certain valid storage block was successfully written; The N address pointers of the check factor respectively point to one of the last N valid storage blocks successfully written in the valid storage blocks.

30. The memory system according to claim 26, wherein the memory controller is configured to perform an XOR operation on the check code data and storage data of a corresponding valid storage block read through the address chain to recover lost data of the certain valid storage block.

31. A memory system, include: A memory, the memory comprising a verification storage area and a plurality of storage blocks; as well as a memory controller coupled to the memory; The verification storage area stores verification factors of a plurality of valid storage blocks corresponding to the plurality of storage blocks, the verification factors including verification code data and a first plurality of address pointers configured for the plurality of storage blocks; A second plurality of address pointers are provided in each of the valid storage blocks, and each of the second plurality of address pointers in each of the valid storage blocks points to a corresponding other valid storage block; The first plurality of address pointers and the second plurality of address pointers of the plurality of valid storage blocks can together form an address chain covering all valid storage blocks of the plurality of valid storage blocks.

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