Method, device, equipment and storage medium for executing engineering change order

Abstract

An embodiment of the present application proposes a method, apparatus, device and storage medium for executing an engineering change instruction, wherein the test circuit includes a scan compression circuit and a scan chain circuit, and at least one scan chain to be modified is reserved in the scan chain circuit. The method includes: obtaining a first script file; the first script file includes a first script program corresponding to the scan chain circuit and a second script program corresponding to the scan compression circuit; in response to an update operation corresponding to an engineering design change requirement, the first script program in the first script file is updated to obtain a second script file; obtaining and responding to the engineering change instruction, running the second script file to insert a target scan unit into the reserved position of the at least one scan chain to be modified, thereby implementing the execution operation of the engineering change instruction.

Description

Technical Field

[0001] The present application relates to Design For Test (DFT) technology, and in particular to a method, apparatus, device, and storage medium for executing an engineering change instruction. Background Art

[0002] In the related art, when it is necessary to perform engineering modifications on an integrated circuit that has already been wired and includes a test circuit, in order to ensure the test quality of DFT, an additional DFT engineering change order (ECO) operation is required for the register of this integrated circuit, and the register inside the chip corresponding to the integrated circuit is replaced with a scan unit and connected in series to the existing scan chain or removed from the existing scan chain; because the inserted scan unit may not be in the same instance layer, when the scan unit is not in the same instance layer, many pins need to be added, and the pin names may be changed due to optimization, which increases the difficulty of systematizing the engineering change order and is less efficient. Summary of the Invention

[0003] Embodiments of the present application are intended to provide a method, apparatus, device, and storage medium for executing an engineering change order.

[0004] In a first aspect, an embodiment of the present application provides a method for executing an engineering change instruction, wherein the test circuit includes a scan compression circuit and a scan chain circuit, wherein the scan chain circuit has at least one scan chain reserved for modification, and the method includes:

[0005] Obtaining a first script file; the first script file includes a first script program corresponding to the scan chain circuit and a second script program corresponding to the scan compression circuit;

[0006] In response to an update operation corresponding to an engineering design change requirement, updating the first script program in the first script file to obtain a second script file;

[0007] The engineering change instruction is acquired and responded to, and the second script file is run to insert a target scan unit into a reserved position of the at least one scan chain to be modified, thereby implementing an execution operation of the engineering change instruction.

[0008] In a second aspect, an embodiment of the present application provides a device for executing an engineering change order, the device comprising:

[0009] an acquisition module, configured to acquire a first script file; the first script file comprising a first script program corresponding to a scan chain circuit of the detection circuit and a second script program corresponding to a scan compression circuit of the detection circuit; wherein the scan chain circuit has at least one scan chain reserved for modification;

[0010] A response module, configured to update the first script program in the first script file in response to an update operation corresponding to an engineering design change requirement to obtain a second script file;

[0011] The insertion module is used to obtain and respond to the engineering change instruction, run the second script file, and insert the target scan unit into the reserved position of the at least one scan chain to be modified to implement the execution operation of the engineering change instruction.

[0012] In a third aspect, an embodiment of the present application further provides an electronic device comprising a memory and a processor, wherein the memory stores a computer program that can be run on the processor, and when the processor executes the program, the steps in the above-mentioned method for executing an engineering change instruction are implemented.

[0013] In a fourth aspect, an embodiment of the present application provides a computer-readable storage medium having a computer program stored thereon, which performs the steps in the above-mentioned method of executing an engineering change instruction when the computer program is executed by a processor.

[0014] In an embodiment of the present application, a first script program in a first script file is updated in response to an update operation corresponding to an engineering design change requirement to obtain a second script file. The second script file is then executed in response to an engineering change instruction to insert a target scan unit into a reserved position in a scan chain circuit that includes at least one scan chain to be modified. Because the target scan unit is inserted into the reserved position in the scan chain circuit of the at least one scan chain to be modified, the inserted target scan unit is located in the same instance layer, eliminating the need for adding numerous pins. This reduces the complexity of systematizing the engineering change instruction and improves efficiency.

[0015] It is to be understood that the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the present application. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] The drawings herein are incorporated into and constitute a part of the specification. These drawings illustrate embodiments consistent with the present application and, together with the specification, are used to illustrate the technical solutions of the present application.

[0017] Figure 1 A schematic diagram of the composition structure of the test circuit of an integrated circuit after considering the generation standard of the Embedded Deterministic Test Intellectual Property (EDT IP) and the clock domain design in the related art;

[0018] Figure 2A schematic diagram of the composition structure of a test circuit for an integrated circuit in the related art, in which a wiring netlist in the clock domain clkA module A / module A ECO area requires 100 new scan units to be added to the internal scan chain;

[0019] Figure 3 Schematic diagram of the structure of the test circuit after ECO is performed on the module A / module AECO area in the related art;

[0020] Figure 4 A schematic diagram of a process flow for implementing a method for executing an engineering change order provided in an embodiment of the present application;

[0021] Figure 5 A schematic diagram of a circuit structure for reserving at least one scan chain for a scan chain circuit provided in an embodiment of the present application;

[0022] Figure 6 A schematic diagram illustrating the effect of executing an engineering change order according to an embodiment of the present application;

[0023] Figure 7 A schematic diagram of the structure of a device for executing an engineering change order provided in an embodiment of the present application;

[0024] Figure 8 A schematic diagram of the structure of an electronic device provided in an embodiment of the present application. DETAILED DESCRIPTION

[0025] The present application will be further described in detail below in conjunction with the accompanying drawings and examples. It should be understood that the embodiments provided herein are merely intended to explain the present application and are not intended to limit the present application. In addition, the embodiments provided below are partial embodiments for implementing the present application, rather than providing all embodiments for implementing the present application. In the absence of conflict, the technical solutions described in the embodiments of the present application may be implemented in any combination.

[0026] It should be noted that, in the embodiments of the present application, the terms "comprise", "include" or any other variants thereof are intended to cover non-exclusive inclusion, so that a method or apparatus comprising a series of elements includes not only the elements explicitly stated, but also other elements not explicitly listed, or also includes elements inherent to the implementation of the method or apparatus. In the absence of further restrictions, an element defined by the sentence "comprises a ..." does not exclude the presence of other related elements (such as steps in the method or units in the apparatus, for example, a unit may be a portion of a circuit, a portion of a processor, a portion of a program or software, etc.) in the method or apparatus comprising the element.

[0027] The term "and / or" herein simply describes an association relationship between associated objects, indicating that three possible relationships exist. For example, "U and / or W" can represent three situations: the existence of U alone, the existence of both U and W, and the existence of W alone. Furthermore, the term "at least one" herein represents any combination of at least two of any one or more of a plurality of items. For example, "at least one of U, W, and V" can represent any one or more elements selected from the set consisting of U, W, and V.

[0028] During the routing phase of the system-on-chip (SoC), ECO design requires adding or removing functional registers. At this point, tools cannot be used to insert scan chains or scan compression circuits (including decompression and compression circuits). To ensure DFT test quality, additional DFT ECO operations are required for the registers of the chip corresponding to the integrated circuit. The chip's internal registers are replaced with scan units and then inserted into or removed from the existing scan chain circuit. The DFT ECO operation must overcome the following issues:

[0029] 1. Ensure that there are no cross-power domain or cross-clock domain movement paths to avoid affecting the time convergence of the routing stage and affecting the low power design rule checks;

[0030] 2. To ensure a balanced length of the internal scan chain, newly added ECO registers must be evenly distributed across the internal scan chain to avoid wasting test time due to excessive increases in the Embedded Deterministic Test (EDT) shift length.

[0031] 3. The netlist may have been scan-rearranged. DFT needs to run Automatic Test Pattern Generation (ATPG) to generate a scan path report, which is used to determine which scan chains to insert or connect.

[0032] 4. The clock domains, instance hierarchy, and number of Design ECO functional registers cannot be predicted in advance.

[0033] 5. If ECO is performed manually based on the netlist, ATPG and formal verification must be run after completion to ensure correctness. The probability of errors causing rework is extremely high.

[0034] 6. The process is not systematic, affecting the lower limit deadline (the final step of integrated circuit or printed circuit board design (submission for manufacturing)).

[0035] It is understandable that the principle of on-chip system DFT testing can be briefly described as replacing the internal registers of the chip with scan units and connecting them in series to the scan chain, generating scan vectors through ATPG for structural scan testing, and the test time of the structural scan test is positively correlated with the length of the scan chain.

[0036] Scan compression circuits are a widely used compression technology that reduces the test time of structural scan tests by reducing the length of internal scan chains, such as EDT intellectual property (IP) widely used in the industry.

[0037] Users can customize the generation criteria for the EDT IP, such as setting the maximum internal scan chain length to 300 as described in this article. The tool calculates the maximum number of internal scan chains based on the total number of scan cells and creates scan_in and scan_out pins at the decompressor / compressor interface to connect to the beginning and end of the internal scan chain, respectively.

[0038] Since the decompressor / compressor contains compression and decompression technology, its ATPG design rule check requires that the routing netlist cannot increase or decrease the number of internal scan chains, where the internal scan chain contains at least one scan unit.

[0039] Figure 1 The following is a schematic diagram of the structure of the test circuit of the integrated circuit after considering the EDT IP generation standard and clock domain design in the related art, as shown in FIG. Figure 1 As shown, the test circuit includes a decompressor 101, a scan chain circuit 102 and a compressor 103; the input end of the decompressor 101 is connected to the output end scan_in* of the first combinational logic circuit; the input end of the first combinational logic is connected to the output pad of the general purpose input output (GPIO) interface; the edt_clk of the decompressor 101 is connected to the EDT clock signal; the output and input ends of the decompressor 101 are connected to the input end of the scan chain circuit 102; the output end of the scan chain circuit 103 is connected to the input end of the compressor 103; the output end scan_out* of the compressor 103 is connected to the input end of the second combinational logic circuit, so that the detection signal is converted by the second combinational logic circuit and output to the output pad of the GPIO.

[0040] The output terminal chainX_scan_inX of the decompressor 101 corresponds to the input terminal of the Xth scan chain of the scan chain circuit 102; X ranges from 1 to N, i.e., the number of internal scan chains is set to N; the output terminal of the Xth scan chain is connected to the input terminal chainX_scan_outX of the compressor 103; the scan chain circuit 102 includes at least three clock domains, clkA, clkB, and clkTop, clkA corresponds to module A, module A includes the first scan chain and the second scan chain, i.e., the clock signal pin CK of each scan unit in the first scan chain and the second scan chain is connected to clkA; clkB corresponds to module B; module B includes the Mth scan chain; the clock signal pin CK of each scan unit in the Mth scan chain is connected to clkB; the clock signal pin CK of each scan unit in the Nth scan chain is connected to clkTop; it can be seen that there is no cross-linking of scan chains between clock domains, thus avoiding the occurrence of cross-clock domain movement paths; the maximum chain length of the internal scan chain is set to 300.

[0041] Furthermore, the scan data (SD) pins of the non-first scan units in the X-th scan chain are connected to the Q pin of the previous scan unit; the Q pin of the last scan unit is connected to the input terminal chainX_scan_outX of the compressor 103; and the scan data pin of the first scan unit is connected to the output terminal chainX_scan_inX of the decompressor 101.

[0042] Figure 2 The schematic diagram of the structure of the test circuit of the integrated circuit in the related art is as follows: Figure 2 shown, and Figure 1 compared to, Figure 2 A new module A ECO region, moduleAECORegion, has been added to the module A region of clock domain clkA. ModuleAECORegion includes 100 scan units, ECO_Areg_000 to ECO_Areg_099. It's understandable that both clock domains clkB and clkTop may require ECO. The region corresponding to clock domain clkB is module B ECO region, moduleBECORegion; the region corresponding to clock domain clkTop is Top ECO region, TopECORegion.

[0043] Figure 3 This is a schematic diagram of the composition structure of the test circuit after ECO is performed on the module A / module AECO area in the related art, as shown in FIG. Figure 3 shown, and Figure 2In comparison, the 100 scan units ECO_Areg_000 to ECO_Areg_099 in moduleAECORegion are connected between the Q end of the last scan unit of the second scan chain of the scan chain circuit 302 and the input end chain2_scan_out2 of the compressor 303; wherein, since ECO_Areg_000 to ECO_Areg_099 may be in different instance layers (different scan chains in the 1st to Nth scan chains), the connection between ECO_Areg_000 and the Q end of the last scan unit of the second scan chain, the connection between two adjacent scan units in ECO_Areg_000 to ECO_Areg_099, and the connection between the Q end of ECO_Areg_099 and chain2_scan_out2 are all provided with pins.

[0044] Here, the connection between ECO_Areg_000 and the Q end of the last scan unit of the second scan chain is set with pin 1; the connection between the Q end of ECO_Areg_099 and chain2_scan_out2 is set with pins 2 and pin 3; pin 2 is related to the module AECO area, and pin 3 is related to the module A area; the connection between two adjacent scan units from ECO_Areg_000 to ECO_Areg_099 is set with pin N.

[0045] By Figure 3 From the analysis, we can see that the relevant ECO implementation schemes have the following non-negligible shortcomings:

[0046] 1. Module A / module AECO area / ECO_Areg_000~ECO_Areg_099 may not be in the same instance layer. Cross-border generation of ports will increase the difficulty of ECO;

[0047] 2. The internal scan chain lengths of the scan chain circuit cannot be balanced. The length of the second scan chain will increase from 300 to 400, while the lengths of the remaining scan chains remain at 300. This will result in a waste of about 100 / 300 test time. If the 100 newly added scan units are distributed among the 100 internal scan chains, the impact on test time can be reduced, but the disadvantage described in 1 will occur.

[0048] 3. It is necessary to create Module A / Module AECO area / Pin 1, Pin 2, Pin 3 in the routing netlist stage and connect them to Compressor / chain2_scan_out2. The names of these pins may change due to optimization, which increases the difficulty of ECO.

[0049] 4. After ECO is completed, ATPG needs to be run to ensure that ECO_Areg_000 to ECO_Areg_099 have indeed been connected to the scan chain circuit and other checks need to be performed, such as verification and low power verification.

[0050] 5. If a new ECO needs to be added to the module BECO area or TopECO area, the above process needs to be repeated. The efficiency and correctness of the ECO cannot be guaranteed.

[0051] Based on the above technical problems, an embodiment of the present application provides a method for executing an engineering change instruction, which can be applied to electronic design automation (EDA) software. The test circuit includes a scan compression circuit and a scan chain circuit. The scan chain circuit reserves at least one scan chain to be modified, such as Figure 4 As shown, the method includes:

[0052] Step 401: Obtain a first script file; the first script file includes a first script program corresponding to the scan chain circuit and a second script program corresponding to the scan compression circuit;

[0053] It can be understood that there is a correspondence between the first script file and the test circuit; the scan compression circuit and the scan chain circuit in the test circuit correspond to the first script program and the second script program in the first script file respectively.

[0054] In some possible implementations, obtaining the first script file may be that a developer inputs the first script file through an input operation (program writing), and the EDA obtains the first script file in response to the input operation.

[0055] Step 402: In response to an update operation corresponding to an engineering design change requirement, the first script program in the first script file is updated to obtain a second script file;

[0056] It is understandable that the engineering design change requirement corresponds to the actual application requirements; the engineering change requirement can be the requirement to modify the detection circuit, for example, the engineering change requirement is to add 100 scan units in series into the internal scan chain in the clock domain clkA module A / module A ECO area.

[0057] In some possible implementations, in response to an update operation corresponding to an engineering design change requirement, the first script program in the first script file is updated to obtain a second script file. This may be in response to an update operation corresponding to an engineering design change requirement, by adding a program corresponding to the engineering design change requirement to the first script program in the first script file, and determining the obtained added first script program as the second script file.

[0058] Step 403: Acquire and respond to the engineering change instruction, run the second script file to insert a target scan unit into the reserved position of the at least one scan chain to be modified, and implement the execution operation of the engineering change instruction.

[0059] In some possible implementations, the target scan units correspond to an engineering change instruction. When the engineering change instruction is to add 100 scan units in series to the internal scan chain in the clock domain clkA module A / module A ECO region, the target scan units are the 100 scan units to be added.

[0060] In one possible implementation, the engineering change instruction is obtained and responded to, and the second script file is run to insert the target scan unit into the reserved position of the at least one scan chain to be modified, thereby implementing the execution operation of the engineering change instruction. The engineering change instruction may be triggered by a R&D personnel, and the EDA responds to the triggering operation of the R&D personnel, obtains the engineering programming instruction, and responds to the engineering change instruction, and runs the second script file. The target scan unit is automatically inserted into the reserved position of the at least one scan chain to be modified through TCLscripts in the logic synthesis tool, thereby implementing the execution operation of the engineering change instruction.

[0061] In an embodiment of the present application, a first script program in a first script file is updated in response to an update operation corresponding to an engineering design change requirement to obtain a second script file. The second script file is then executed in response to an engineering change instruction to insert a target scan unit into a reserved position in a scan chain circuit that includes at least one scan chain to be modified. Because the target scan unit is inserted into the reserved position in the scan chain circuit of the at least one scan chain to be modified, the inserted target scan unit is located in the same instance layer, eliminating the need for adding numerous pins. This reduces the complexity of systematizing the engineering change instruction and improves efficiency.

[0062] Another method for executing an engineering change order provided in an embodiment of the present application includes:

[0063] Step S501: obtaining a generation operation of a first script program corresponding to the scan chain circuit and a second script program corresponding to the scan compression circuit;

[0064] In some possible implementations, obtaining the generation operation of the first script program corresponding to the scan chain circuit and the second script program corresponding to the scan compression circuit may be that the R&D personnel input the first script program corresponding to the scan chain circuit and the second script program corresponding to the scan compression circuit into the EDA through an input operation, and the EDA receives the input operation to obtain the generation operation of the first script program corresponding to the scan chain circuit and the second script program corresponding to the scan compression circuit.

[0065] Step S502: In response to the generating operation, generating the first script program and the second script program;

[0066] Step S503: obtaining a first script file including a first script program and a second script program;

[0067] Step S504: in response to an update operation corresponding to the engineering design change requirement, updating the first script program in the first script file to obtain a second script file;

[0068] Step S505: Acquire and respond to the engineering change instruction, run the second script file to insert a target scan unit into the reserved position of the at least one scan chain to be modified, and implement the execution operation of the engineering change instruction.

[0069] In an embodiment of the present application, a first script program and a second script program are generated by acquiring and responding to generation operations of a first script program corresponding to a scan chain circuit and a second script program corresponding to a scan compression circuit. Thus, a first script file can be acquired based on the generated first script program and second script program.

[0070] Another method for executing an engineering change order provided in an embodiment of the present application includes:

[0071] Step S601: obtaining generation operations of a first subroutine and a second subroutine; the first subroutine corresponds to a first scan chain circuit in the first script program; the second subroutine corresponds to a second scan chain circuit in the first script program; the first scan chain circuit corresponds to an initial design requirement of the test circuit; and the second scan chain circuit corresponds to a predictable engineering modification requirement of the test circuit;

[0072] It can be understood that the second scan chain circuit refers to at least one scan chain to be modified that is reserved in the scan chain circuit, corresponding to a predictable engineering modification requirement of the test circuit.

[0073] Step S602: obtaining a generation operation of a second script program corresponding to the scan compression circuit;

[0074] Step S603: generating the first subprogram and the second subprogram in response to the generation operation of the first subprogram and the second subprogram;

[0075] Step S604: generating the second script program in response to the generating operation of the second script program;

[0076] Step S605: obtaining a first script file including a first script program and a second script program;

[0077] Step S606: in response to an update operation corresponding to the engineering design change requirement, updating the first script program in the first script file to obtain a second script file;

[0078] Step S607: Acquire and respond to the engineering change instruction, run the second script file to insert a target scan unit into the reserved position of the at least one scan chain to be modified, and implement the execution operation of the engineering change instruction.

[0079] In an embodiment of the present application, the first subprogram and the second subprogram are generated by obtaining and responding to the generation operations of the first subprogram and the second subprogram. In this way, the first script program can be obtained based on the first subprogram and the second subprogram, and the first script file can be obtained based on the first script program and the second script program.

[0080] Another method for executing an engineering change order provided in an embodiment of the present application includes:

[0081] Step S701: obtaining a generation operation of a first subroutine; the first subroutine corresponds to a first scan chain circuit in the first script program; the first scan chain circuit corresponds to an initial design requirement of the test circuit;

[0082] Step S702: obtaining an operation of reserving at least one scan chain to be modified for each clock domain in the first scan chain circuit; the second subroutine corresponds to the second scan chain circuit in the first script program; the second scan circuit corresponds to a predictable engineering modification requirement of the test circuit;

[0083] It can be understood that the scan chain to be modified refers to the scan chain into which a scan unit corresponding to the engineering design change requirement is to be inserted.

[0084] Step S703: obtaining a generation operation of a second script program corresponding to the scan compression circuit;

[0085] Step S704: generating the first subroutine in response to the generating operation of the first subroutine;

[0086] Step S705: In response to the operation of reserving at least one scan chain to be modified for each clock domain in the first scan chain circuit, generating a program for reserving at least one scan chain to be modified for each clock domain in the first scan chain circuit;

[0087] Step S706: In response to the generation operation of the second script program, generate the second script program;

[0088] Step S707: obtaining a first script file including a first script program and a second script program; the first script file includes a first subroutine and a program for reserving at least one scan chain to be modified for each clock domain in the first scan chain circuit;

[0089] Step S708: in response to an update operation corresponding to the engineering design change requirement, updating the first script program in the first script file to obtain a second script file;

[0090] Step S709: Acquire and respond to the engineering change instruction, run the second script file to insert a target scan unit into the reserved position of the at least one scan chain to be modified, and implement the execution operation of the engineering change instruction.

[0091] In an embodiment of the present application, by obtaining and responding to the operation of reserving at least one scan chain to be modified for each clock domain in the first scan chain circuit, a program for reserving at least one scan chain to be modified for each clock domain in the first scan chain circuit is generated as a second subroutine. In this way, a first script program can be obtained based on the first subroutine and the second subroutine.

[0092] Another method for executing an engineering change order provided in an embodiment of the present application includes:

[0093] Step S801: obtaining a generation operation of a first subroutine; the first subroutine corresponds to a first scan chain circuit in the first script program; the first scan chain circuit corresponds to an initial design requirement of the test circuit;

[0094] Step S802: obtaining an operation of reserving at least one scan chain to be modified for each clock domain in the first scan chain circuit;

[0095] Step S803: obtaining an operation of reserving a scan chain to be modified for each clock domain in the first scan chain circuit when the number of scan units to be inserted corresponding to the predictable engineering modification requirements of the test circuit is less than or equal to a first difference; the first difference is the difference between the maximum scan chain length and N;

[0096] Step S804: When the number of scan units to be inserted corresponding to the predictable engineering modification requirement of the detection circuit is greater than the first difference but less than M times the first difference, obtaining an operation of reserving M scan chains to be modified for each clock domain in the first scan chain circuit;

[0097] Step S805: obtaining a generation operation of a second script program corresponding to the scan compression circuit;

[0098] Step S806: generating the first subroutine in response to the generating operation of the first subroutine;

[0099] Step S807: In response to the operation of reserving at least one scan chain to be modified for each clock domain in the first scan chain circuit, generating a program for reserving at least one scan chain to be modified for each clock domain in the first scan chain circuit;

[0100] Step S808: In response to the generation operation of the second script program, generate the second script program;

[0101] Step S809: obtaining a first script file including a first script program and a second script program; the first script file includes a first subroutine and a program for reserving at least one scan chain to be modified for each clock domain in the first scan chain circuit;

[0102] Step S810: in response to an update operation corresponding to an engineering design change requirement, updating the first script program in the first script file to obtain a second script file;

[0103] Step S811: Acquire and respond to the engineering change instruction, run the second script file to insert a target scan unit into the reserved position of the at least one scan chain to be modified, and implement the execution operation of the engineering change instruction.

[0104] In an embodiment of the present application, when the number of scan units to be inserted corresponding to the predictable engineering modification requirements of the test circuit is less than or equal to the first difference, an operation of reserving one scan chain to be modified for each clock domain in the first scan chain circuit is obtained; when the number of scan units to be inserted corresponding to the predictable engineering modification requirements of the detection circuit is greater than the first difference and less than M times the first difference, an operation of reserving M scan chains to be modified for each clock domain in the first scan chain circuit is obtained. In this way, the corresponding number of scan chains to be modified can be reserved according to the specific predictable engineering modification requirements to meet the needs of users.

[0105] An embodiment of the present application also provides a method for executing an engineering change order, the method comprising:

[0106] Step S901: obtaining a first script file; the first script file includes a first script program corresponding to the scan chain circuit and a second script program corresponding to the scan compression circuit;

[0107] Step S902: obtaining a program modification operation of inserting a target scan unit corresponding to the engineering change requirement into a target scan chain to be modified in the at least one scan chain to be modified;

[0108] Step S903: In response to the program modification operation, modify the first script program in the first script file to obtain a second script file;

[0109] Step S904: Obtain and respond to the engineering change instruction, run the second script file, interrupt the connection lines between the scan data in the scan chain to be modified through the logic synthesis tool, automatically insert the target scan unit in the reserved position of at least one scan chain to be modified, and implement the execution operation of the engineering change instruction.

[0110] In an embodiment of the present application, a program modification operation for inserting a target scan unit corresponding to the engineering change requirement into a target scan chain to be modified in the at least one scan chain to be modified is obtained and responded to, and a first script program in the first script file is modified. Thus, a second script file corresponding to the engineering change requirement is obtained. The execution operation of the engineering change instruction can be achieved by obtaining and responding to the engineering change instruction, running the second script file, and using a logic synthesis tool to interrupt the connection lines between the scan data in the scan chain to be modified, thereby automatically inserting the target scan unit into the reserved position of the at least one scan chain to be modified.

[0111] Figure 5 A schematic diagram of a circuit structure for reserving at least one scan chain for a scan chain circuit is provided in an embodiment of the present application, such as Figure 5 As shown, during the EDT IP insertion phase, one or more ECO scan chains can be reserved for each clock domain. Each of the reserved one or more ECO scan chains contains only two scan units. After the engineering change instruction is executed, the routing netlist needs to have the scan unit gates connected in series with the corresponding reserved ECO scan chain.

[0112] Scan chain ECO0 is an ECO scan chain reserved for clock domain clkA. The two scan units in scan chain ECO0 are named RSV_ECO_Ahead_reg and RSV_ECO_Atail_reg. RSV_ECO_Ahead_reg and RSV_ECO_Atail_reg are not optimized during the synthesis and routing stages. The clock source of scan chain ECO0 is connected to clkA to avoid cross-clock domain issues with later added ECO registers. The D pins of the RSV_ECO_Ahead_reg and RSV_ECO_Atail_reg scan units in scan chain ECO0 can both be connected to the low-voltage 1'b0 (tie0), and the scan enable pins are connected to the module A / scan_en pin. Without affecting the internal scan chain length balance, one reserved scan chain can accommodate 298 ECO registers. If the number of ECO registers is expected to exceed this range, multiple ECO scan chains can be reserved, but the connection method remains the same.

[0113] Furthermore, chainECO1_scan_in1 and chainECO2_scan_in2 are the ECO scan chains reserved for clkB and clkTop respectively. The difference lies in the clock source. The RSV_ECO_*_reg layer should be placed under the corresponding instance.

[0114] After modifying the script file, the EDA can automatically connect the ECO registers to the ECO scan chain circuit by obtaining and responding to engineering change instructions. In one embodiment, the EDA can use the following logic synthesis tool TCLscripts (DFT_reserved_eco_chain.tcl) to interrupt the existing scan data SD wiring of the ECO register before reconnecting it to the scan chain. This can also be used to implement manual scan reordering.

[0115] Examples of logic synthesis tool TCL scripts (DFT_reserved_eco_chain.tcl) are:

[0116]

[0117] Figure 6 A schematic diagram of the execution effect of an engineering change instruction provided in an embodiment of the present application is shown as follows: Figure 6As shown, scanning units ECO_Areg_000 to ECO_Areg_099 in the module AECO area are located between scanning units RSV_ECO_Ahead_reg and RSV_ECO_Atail_reg. Among them, the scan data SD input terminal of ECO_Areg_000 is connected to the Q output terminal of RSV_ECO_Ahead_reg; the Q output terminal of ECO_Areg_099 is connected to the scan data SD input terminal of RSV_ECO_Atail_reg; the scan enable SE terminal of ECO_Areg_000 to ECO_Areg_099 is connected to the SE terminal of RSV_ECO_Ahead_reg and RSV_ECO_Atail_reg; the D pins of ECO_Areg_000 to ECO_Areg_099 are connected to the low voltage 1'b0 (tie0); the clock signal terminal ck of ECO_Areg_000 to ECO_Areg_099 is connected to the clock source of RSV_ECO_Ahead_reg and RSV_ECO_Atail_reg.

[0118] Module BReservedECOChains and TopReservedECOChains are the ECO scan chains reserved for module B and module TOP respectively, and both can be connected to the newly added ECO registers through the logic synthesis tool TCL script.

[0119] Based on the foregoing embodiments, an embodiment of the present application provides a device for executing engineering change instructions, which includes the various units included and the modules included in each unit, and can be implemented by a processor in an electronic device; of course, it can also be implemented by a specific logic circuit; in the implementation process, the processor can be a central processing unit (CPU), a microprocessor (Microprocessor Unit, MPU), a digital signal processor (DSP) or a field programmable gate array (FPGA), etc.

[0120] Figure 7 A schematic diagram of the structure of a device for executing an engineering change instruction provided in an embodiment of the present application is shown in FIG. Figure 7 As shown, the device 700 for executing an engineering change order includes:

[0121] An acquisition module 701 is configured to acquire a first script file; the first script file includes a first script program corresponding to a scan chain circuit of the detection circuit and a second script program corresponding to a scan compression circuit of the detection circuit; wherein the scan chain circuit has at least one scan chain reserved for modification;

[0122] A response module 702 is configured to update the first script program in the first script file in response to an update operation corresponding to an engineering design change requirement to obtain a second script file;

[0123] The insertion module 703 is used to obtain and respond to the engineering change instruction, run the second script file, and insert the target scan unit into the reserved position of the at least one scan chain to be modified to implement the execution operation of the engineering change instruction.

[0124] In some embodiments, the device further includes: a generation module for obtaining generation operations of a first script program corresponding to the scan chain circuit and a second script program corresponding to the scan compression circuit; and generating the first script program and the second script program in response to the generation operations.

[0125] In some implementations, the generating module is configured to obtain generating operations of the first subprogram and the second subprogram; and generate the first subprogram and the second subprogram in response to the generating operations of the first subprogram and the second subprogram.

[0126] In some embodiments, the generation module is used to obtain an operation of reserving at least one scan chain to be modified for each clock domain in the first scan chain circuit; in response to the operation of reserving at least one scan chain to be modified for each clock domain in the first scan chain circuit, generate a program for reserving at least one scan chain to be modified for each clock domain in the first scan chain circuit.

[0127] In some embodiments, the generation module is used to obtain an operation of reserving one scan chain to be modified for each clock domain in the first scan chain circuit when the number of scan units to be inserted corresponding to the predictable engineering modification requirements of the test circuit is less than or equal to a first difference; the first difference is the difference between the maximum scan chain length and N; and to obtain an operation of reserving M scan chains to be modified for each clock domain in the first scan chain circuit when the number of scan units to be inserted corresponding to the predictable engineering modification requirements of the detection circuit is greater than the first difference and less than M times the first difference.

[0128] In some embodiments, the response module 702 is used to obtain a program modification operation of inserting the target scanning unit corresponding to the engineering change requirement into the target scan chain to be modified in the at least one scan chain to be modified; in response to the program modification operation, the first script program in the first script file is modified to obtain a second script file.

[0129] In some embodiments, the insertion module 703 is used to obtain and respond to the engineering change instruction, run the second script file, interrupt the connection lines between the scan data in the scan chain to be modified through a logic synthesis tool, and automatically insert the target scan unit in the reserved position of at least one scan chain to be modified to implement the execution operation of the engineering change instruction.

[0130] In addition, the functional modules in this embodiment may be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit. The above-mentioned integrated units may be implemented in the form of hardware or software functional modules.

[0131] If the integrated unit is implemented as a software functional module and is not sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this embodiment, or the portion that contributes to the prior art, or all or part of the technical solution can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions for causing a computer device (which can be a personal computer, server, or network device, etc.) or a processor to execute all or part of the steps of the method described in this embodiment. The aforementioned storage medium includes various media that can store program code, such as a USB flash drive, a mobile hard drive, a read-only memory (ROM), a random access memory (RAM), a magnetic disk, or an optical disk.

[0132] Generally speaking, the computer program instructions corresponding to a method for executing an engineering change instruction in this embodiment can be stored on a storage medium such as a CD, a hard disk, or a USB flash drive. When the computer program instructions corresponding to a method for executing an engineering change instruction in the storage medium are read or executed by an electronic device, any one of the methods for executing an engineering change instruction in the aforementioned embodiments is implemented.

[0133] Based on the same technical concept as the above embodiment, see Figure 8 , which shows a schematic structural diagram of an electronic device provided in an embodiment of the present application, the electronic device 800 may include: a memory 801 and a processor 802; wherein,

[0134] The memory 801 is used to store computer programs and data;

[0135] The processor 802 is configured to execute the computer program stored in the memory to implement any one of the methods for executing an engineering change order in the aforementioned embodiments.

[0136] In practical applications, the memory 801 may be a volatile memory, such as RAM; or a non-volatile memory, such as ROM, flash memory, hard disk drive (HDD) or solid-state drive (SSD); or a combination of the above types of memory, and provide instructions and data to the processor 802.

[0137] The processor 802 may be at least one of an ASIC, a DSP, a DSPD, a PLD, an FPGA, a CPU, a controller, a microcontroller, and a microprocessor. It is understood that for different augmented reality cloud platforms, the electronic device used to implement the processor functions may also be other, and this embodiment of the application is not limited thereto.

[0138] In some embodiments, the functions or modules included in the device provided in the embodiments of the present application can be used to execute the method described in the above method embodiments. Its implementation can refer to the description of the above method embodiments. For the sake of brevity, it will not be repeated here.

[0139] Through the description of the above implementation methods, those skilled in the art can clearly understand that the above-mentioned embodiment methods can be implemented by means of software plus the necessary general hardware platform, and of course can also be implemented by hardware, but in many cases the former is a better implementation method. Based on this understanding, the technical solution of the present application is essentially or the part that contributes to the prior art can be embodied in the form of a software product, which is stored in a storage medium (such as ROM / RAM, magnetic disk, optical disk), including a number of instructions for enabling a terminal (which can be a mobile phone, computer, server, network equipment, etc.) to execute the methods described in each embodiment of the present application.

[0140] The embodiments of the present application are described above in conjunction with the accompanying drawings, but the present application is not limited to the above-mentioned implementation methods. The above-mentioned implementation methods are merely illustrative and not restrictive. Under the guidance of the present application, ordinary technicians in this field can also make many forms without departing from the purpose of the present application and the scope of protection of the claims, all of which are within the protection of the present application.

[0141] The methods disclosed in the various method embodiments provided in this application can be arbitrarily combined without conflict to obtain new method embodiments.

[0142] The features disclosed in the various product embodiments provided in this application can be arbitrarily combined without conflict to obtain new product embodiments.

[0143] The features disclosed in the various method or phase shifter embodiments provided in this application can be arbitrarily combined without conflict to obtain new method embodiments or device embodiments.

Claims

1. A method for executing an engineering change order, characterized in that: The test circuit includes a scan compression circuit and a scan chain circuit, wherein at least one scan chain to be modified is reserved in the scan chain circuit, and the method includes: Obtaining a first script file; the first script file includes a first script program corresponding to the scan chain circuit and a second script program corresponding to the scan compression circuit; In response to an update operation corresponding to an engineering design change requirement, updating the first script program in the first script file to obtain a second script file; Obtaining and responding to the engineering change instruction, running the second script file to insert a target scan unit into a reserved position of the at least one scan chain to be modified, thereby implementing an execution operation of the engineering change instruction; The scan chain to be modified only includes two scan units; The acquiring and responding to the engineering change instruction, running the second script file to insert a target scan unit into a reserved position of the at least one scan chain to be modified, and implementing the execution operation of the engineering change instruction, includes: Obtain and respond to the engineering change instruction, run the second script file, interrupt the connection lines between the scan data in the scan chain to be modified through a logic synthesis tool, insert the target scan unit in the reserved position of at least one scan chain to be modified, and implement the execution operation of the engineering change instruction.

2. The method according to claim 1, characterized in that The method further comprises: Obtaining a generation operation of a first script program corresponding to the scan chain circuit and a second script program corresponding to the scan compression circuit; In response to the generating operation, the first script program and the second script program are generated.

3. The method according to claim 2, characterized in that The scan chain circuit includes a first scan chain circuit corresponding to the initial design requirements of the test circuit and a second scan chain circuit corresponding to the predictable engineering modification requirements of the test circuit; the first script program includes a first subroutine corresponding to the first scan chain circuit and a second subroutine corresponding to the second scan chain circuit; and the generation operation of obtaining the first script program corresponding to the scan chain circuit includes: Obtaining generation operations of the first subroutine and the second subroutine; Correspondingly, in response to the generating operation, generating the first script program includes: In response to the generation operations of the first subprogram and the second subprogram, the first subprogram and the second subprogram are generated.

4. The method according to claim 3, characterized in that The length of each scan chain in the first scan chain circuit is a preset maximum scan chain length; the length of the scan chain to be modified is equal to the maximum scan chain length; Obtaining a generation operation of the second subroutine, including: obtaining an operation of reserving at least one scan chain to be modified for each clock domain in the first scan chain circuit; In response to the generating operation of the second subprogram, generating the second subprogram includes: In response to the operation of reserving at least one scan chain to be modified for each clock domain in the first scan chain circuit, a program for reserving at least one scan chain to be modified for each clock domain in the first scan chain circuit is generated.

5. The method according to claim 4, characterized in that The scan chain to be modified includes N reserved scan units; N is a positive integer greater than or equal to 1 and less than a preset maximum scan chain length; The operation of obtaining at least one scan chain to be modified reserved for each clock domain in the first scan chain circuit includes: When the number of scan units to be inserted corresponding to the predictable engineering modification requirements of the test circuit is less than or equal to a first difference, obtaining an operation of reserving a scan chain to be modified for each clock domain in the first scan chain circuit; the first difference is a difference between the maximum scan chain length and N; When the number of scan units to be inserted corresponding to the predictable engineering modification requirements of the test circuit is greater than the first difference and less than M times the first difference, an operation of reserving M scan chains to be modified for each clock domain in the first scan chain circuit is obtained.

6. The method according to any one of claims 1 to 5, characterized in that In response to the update operation corresponding to the engineering design change requirement, the first script program in the first script file is updated to obtain a second script file, including: Acquire a program modification operation of inserting a target scan unit corresponding to the engineering change instruction into a target scan chain to be modified in the at least one scan chain to be modified; In response to the program modification operation, the first script program in the first script file is modified to obtain a second script file.

7. A device for executing an engineering change order, characterized in that: The device comprises: an acquisition module, configured to acquire a first script file; the first script file comprising a first script program corresponding to a scan chain circuit of a test circuit and a second script program corresponding to a scan compression circuit of the test circuit; wherein the scan chain circuit has at least one scan chain to be modified reserved therein; A response module, configured to update the first script program in the first script file in response to an update operation corresponding to an engineering design change requirement to obtain a second script file; an insertion module, configured to obtain and respond to the engineering change instruction, and run the second script file to insert a target scan unit into a reserved position of the at least one scan chain to be modified, thereby implementing an execution operation of the engineering change instruction; The scan chain to be modified only includes two scan units; The insertion module comprises: By obtaining and responding to the engineering change instruction, running the second script file, interrupting the connection lines between the scan data in the scan chain to be modified through a logic synthesis tool, and inserting the target scan unit in the reserved position of at least one scan chain to be modified, the execution operation of the engineering change instruction is realized.

8. An electronic device comprising a memory and a processor, wherein the memory stores a computer program that can be run on the processor, characterized in that: When the processor executes the program, the steps of the method for executing an engineering change order according to any one of claims 1 to 6 are implemented.

9. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the steps of the method for executing an engineering change order according to any one of claims 1 to 6 are implemented.

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