Semiconductor device and method for manufacturing the same

Abstract

The present application provides a semiconductor device and a method for manufacturing the same. The semiconductor device may include a first substrate and a wiring layer located on one side of the first substrate. An isolation structure is formed in the first substrate and penetrates at least a portion of the first substrate. The isolation structure extends in a direction parallel to the surface of the first substrate. The isolation structure generally has poor mechanical strength. The wiring layer includes a plurality of reinforcement pads. The plurality of reinforcement pads are arranged at intervals. The projection of the reinforcement pads on the surface of the first substrate may be arranged to intersect with the location of the isolation structure, that is, a plurality of reinforcement pads may be arranged directly above the isolation structure. The reinforcement pads may enhance the mechanical strength of the area where the isolation structure is located, thereby enhancing the overall mechanical strength of the semiconductor device.

Description

Technical Field

[0001] The present application relates to the field of semiconductor technology, and in particular to a semiconductor device and a method for manufacturing the same. Background Art

[0002] The demand for high-capacity, ultra-thin chips in existing electronic products is growing. To meet these demands, chip manufacturing processes are constantly improving, increasing the number of chip stacking layers to meet these high-capacity requirements. At the same time, as the number of stacking layers increases, the thickness of each chip must also decrease. The thinned chips must possess sufficient strength to ensure reliable stacking. However, current chips have strength limitations. Summary of the Invention

[0003] In order to solve the above technical problems, the present application provides a semiconductor device and a manufacturing method thereof to improve the mechanical strength of the semiconductor device.

[0004] An embodiment of the present application provides a semiconductor device, including:

[0005] A first substrate; an isolation structure is formed in the first substrate and penetrates at least a portion of the first substrate, and the isolation structure extends in a direction parallel to a surface of the first substrate;

[0006] A wiring layer is located on one side of the first substrate, and the wiring layer includes a plurality of reinforcement pads, which are arranged at intervals; the projection of the reinforcement pads on the surface of the first substrate intersects with the location of the isolation structure.

[0007] Optionally, the semiconductor device further includes:

[0008] a functional layer located on one side of the first substrate, wherein the functional layer is provided with functional units;

[0009] The wiring layer further includes an interconnection structure connected to the functional unit; the interconnection structure includes connection lines and / or pads.

[0010] Optionally, the first substrate has an active area, and in a plane parallel to the surface of the first substrate, the isolation structure is ring-shaped and surrounds the active area, the projection of the functional unit on the first substrate belongs to the active area; the projection of the interconnection structure on the first substrate belongs to the active area.

[0011] Optionally, the material of the reinforcement pad is consistent with the material of the interconnection structure.

[0012] Optionally, an arrangement direction of the reinforcement pads is consistent with an extension direction of the isolation structure in a plane parallel to the surface of the first substrate.

[0013] Optionally, the functional layer is a third film layer between the first substrate and the reinforcement pad;

[0014] Alternatively, the functional layer includes a first film layer and a second film layer, the first film layer is located on the side of the first substrate facing away from the reinforcement pad, the second film layer is located on the side of the first film layer facing away from the reinforcement pad, and a bonding layer is arranged between the first film layer and the second film layer; a second substrate is arranged on the side of the second film layer facing away from the first substrate; the functional unit includes a first unit in the first film layer and a second unit in the second film layer.

[0015] Optionally, the isolation structure includes a conductor structure extending in a direction perpendicular to the surface of the first substrate and an insulating structure on a sidewall of the conductor structure; or the isolation structure is made of an insulating material.

[0016] An embodiment of the present application provides a method for manufacturing a semiconductor device, comprising:

[0017] forming an isolation structure in the first substrate; the isolation structure at least partially penetrates the first substrate, and the isolation structure extends in a direction parallel to the surface of the first substrate;

[0018] A wiring layer is formed on one side of the first substrate. The wiring layer includes a plurality of reinforcement pads that are arranged at intervals. The projections of the reinforcement pads on the surface of the first substrate intersect with the location of the isolation structure.

[0019] Optionally, forming a wiring layer on one side of the first substrate includes:

[0020] forming a conductor layer on one side of the first substrate, and etching the conductor layer to form a wiring layer;

[0021] Alternatively, a dielectric layer is formed on one side of the first substrate, the dielectric layer is etched to obtain a wiring groove, and a conductor material is formed in the wiring groove, and the conductor material serves as the wiring layer.

[0022] Optionally, before forming the wiring layer on one side of the first substrate, the method further includes:

[0023] A functional layer is formed on one side of the first substrate, wherein functional units are provided in the functional layer; the wiring layer further comprises an interconnection structure connected to the functional units; the interconnection structure comprises connecting lines and / or pads.

[0024] Optionally, the first substrate has an active area, and in a plane parallel to the surface of the first substrate, the isolation structure is ring-shaped and surrounds the active area, the projection of the functional unit on the first substrate belongs to the active area; the projection of the interconnection structure on the first substrate belongs to the active area.

[0025] Optionally, an arrangement direction of the reinforcement pads is consistent with an extension direction of the isolation structure in a plane parallel to the surface of the first substrate.

[0026] Optionally, the functional layer is a third film layer between the first substrate and the reinforcement pad;

[0027] Alternatively, the functional layer includes a first film layer and a second film layer, and the forming of the functional layer on one side of the first substrate includes:

[0028] forming a first film layer on one side of the first substrate and forming a second film layer on one side of the second substrate;

[0029] The first film layer and the second film layer are bonded together through a bonding layer between the first film layer and the second film layer by using a bonding process, and the second film layer and the wiring layer are located on different sides of the first substrate.

[0030] Optionally, the isolation structure is made of an insulating material; or the isolation structure includes a conductor structure extending in a direction perpendicular to the surface of the first substrate and an insulating structure on a sidewall of the conductor structure;

[0031] forming an isolation structure in a first substrate, comprising:

[0032] Etching the first substrate to obtain an isolation trench penetrating a portion of the first substrate in a direction perpendicular to a surface of the first substrate;

[0033] An isolation structure is formed in the isolation trench.

[0034] An embodiment of the present application provides a semiconductor device and a method for manufacturing the same. The semiconductor device may include a first substrate and a wiring layer located on one side of the first substrate. An isolation structure is formed in the first substrate and penetrates at least a portion of the first substrate. The isolation structure extends in a direction parallel to the surface of the first substrate. The isolation structure generally has poor mechanical strength. The wiring layer includes a plurality of reinforcement pads, which are arranged at intervals. The projection of the reinforcement pads on the surface of the first substrate may be arranged to intersect with the location of the isolation structure, that is, a plurality of reinforcement pads may be arranged directly above the isolation structure. The reinforcement pads may enhance the mechanical strength of the area where the isolation structure is located, thereby enhancing the overall mechanical strength of the semiconductor device. BRIEF DESCRIPTION OF THE DRAWINGS

[0035] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the following briefly introduces the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings described below are some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0036] Figure 1 Schematic diagram of the structure of a current semiconductor device;

[0037] Figure 2 This is a schematic diagram of the strength of a current semiconductor device;

[0038] Figure 3 A schematic structural diagram of a semiconductor device provided in an embodiment of the present application;

[0039] Figure 4 for Figure 3 A schematic cross-sectional view of the semiconductor device along the AA direction;

[0040] Figure 5 A schematic cross-sectional view of another semiconductor device provided in an embodiment of the present application;

[0041] Figure 6 A schematic flow chart of a method for manufacturing a semiconductor device provided in an embodiment of the present application. DETAILED DESCRIPTION

[0042] In order to make the above-mentioned purposes, features and advantages of the present application more obvious and easy to understand, the specific implementation methods of the present application are described in detail below with reference to the accompanying drawings.

[0043] In the following description, many specific details are set forth to facilitate a full understanding of the present application. However, the present application may also be implemented in other ways different from those described herein. Those skilled in the art may make similar generalizations without violating the connotation of the present application. Therefore, the present application is not limited to the specific embodiments disclosed below.

[0044] As described in the background technology, the current chip has strength defects. The inventors have found that in semiconductor devices, a circle of isolation structure is usually set around the active area, such as deep trench isolation (DTI) structure, to prevent some leakage and input and output capacitance (IO Capacitance) problems. Figure 1 Figure 1 is a schematic diagram of the structure of a current semiconductor device, in which trench isolation 1101 is provided around the first active area 110, and trench isolation 1201 is provided around the second active area 120. The portion of the isolation structure located on one side of the active area has a rectangular structure with a large aspect ratio and is generally filled with an insulating material. The material of the isolation structure is inconsistent with that of the surrounding areas, resulting in a weak point in strength at the location of the isolation structure, affecting the overall strength of the device.

[0045] refer to Figure 2As shown in the figure, it is a schematic diagram of the device strength in the embodiment of the present application, wherein the horizontal axis is the strength (Strength), the unit is MPa, and the vertical axis is the fracture probability (Probability). The curve composed of circles represents a device with an isolation structure, and the curve composed of squares represents a device without an isolation structure. It can be seen from the figure that the device with an isolation structure is more likely to break. In fact, the fracture position of the device with an isolation structure is often the position where the isolation structure is located.

[0046] In order to improve the strength of semiconductor devices, the depth of the isolation structure in the substrate can be reduced. Figure 2 The curve formed by the middle triangle points represents a device with a lower depth isolation structure. Reducing the depth of the isolation structure by 30% can increase the strength of the device by about 15%. However, as the depth of the isolation structure is reduced, the isolation effect also decreases.

[0047] In order to solve the above problems, an embodiment of the present application provides a semiconductor device and a manufacturing method thereof. The semiconductor device may include a first substrate and a wiring layer located on one side of the first substrate. An isolation structure is formed in the first substrate and penetrates at least a portion of the first substrate. The isolation structure extends in a direction parallel to the surface of the first substrate. The isolation structure generally has poor mechanical strength. The wiring layer includes a plurality of reinforcement pads, and the plurality of reinforcement pads are arranged at intervals. The projection of the reinforcement pad on the surface of the first substrate can be arranged to intersect with the location of the isolation structure, that is, a plurality of reinforcement pads can be arranged directly above the isolation structure. The reinforcement pads can enhance the mechanical strength of the area where the isolation structure is located, thereby enhancing the overall mechanical strength of the semiconductor device.

[0048] In order to better understand the technical solutions and technical effects of the present application, specific embodiments will be described in detail below with reference to the accompanying drawings.

[0049] refer to Figure 3 FIG. 1 is a schematic diagram of the structure of a semiconductor device provided in an embodiment of the present application, with reference to FIG. Figure 4 As shown, Figure 3 In a cross-sectional view of the semiconductor device along line AA in one embodiment, the semiconductor device may include a first substrate 20 and a wiring layer located on one side of the first substrate 20 .

[0050] In an embodiment of the present application, the semiconductor device may be a wafer, and the number of wafers may be one or more, and the multiple wafers are stacked in sequence along a direction perpendicular to the substrate surface (denoted as longitudinal direction), for example, the semiconductor device includes 2, 4, 8, or 16 wafers stacked longitudinally; the semiconductor device may also be a die, and the number of die may be one or more, and the multiple die are stacked along a direction perpendicular to the substrate surface (longitudinal direction), for example, the semiconductor device includes 2, 4, 8, or 16 die stacked longitudinally.

[0051] In the embodiment of the present application, the first substrate 20 is any substrate in the semiconductor device. When the semiconductor device includes multiple wafers or multiple grains, the first substrate 20 can be the substrate of the top layer of the device or the substrate of the bottom layer of the device. The first substrate 20 is a semiconductor substrate, for example, it can be a Si substrate, a Ge substrate, a SiGe substrate, SOI (Silicon On Insulator) or GOI (Germanium On Insulator). In other embodiments, the semiconductor substrate can also be a substrate including other element semiconductors or compound semiconductors, such as GaAs, InP or SiC, etc., and can also be a stacked structure, such as Si / SiGe, etc., and can also be other epitaxial structures, such as SGOI (Silicon Germanium on Insulator). In this embodiment, the first substrate 20 is a single crystal silicon substrate.

[0052] An isolation structure 241 may be formed in the first substrate 20 and penetrate at least a portion of the first substrate 20. The isolation structure 241 extends in a direction parallel to the surface of the first substrate 20. The isolation structure 241 may divide the first substrate 20 into multiple regions. Figure 3 As shown, in a plane parallel to the surface of the first substrate 20 , the isolation structure 241 may be ring-shaped, surrounding the active area 210 . The isolation structure 241 may be a DTI structure to prevent the performance of the active area 210 from being affected by the peripheral area.

[0053] A functional layer may be formed on one side of the first substrate 20. The functional layer may include functional units. The functional units may be storage units or logic computing units. The storage units may be NAND storage units or NOR storage units. The functional units may be stacked vertically to make the semiconductor device a three-dimensional storage device, such as a 3D NAND storage device or a 3D NOR storage device. Of course, the functional units may also be units with other functions, such as a switch unit. The semiconductor device may also be a memory device including a three-dimensional storage device and other electronic components. The three-dimensional storage device and other electronic components are arranged on the same substrate and can be interconnected to work together. For example, the semiconductor device includes a three-dimensional storage device and a storage controller. The number of the three-dimensional storage devices may be one or more. The storage controller is used to control the three-dimensional storage device. In the embodiment of the present application, the semiconductor device can be implemented and packaged into different types of electronic devices.

[0054] The functional units are located in the active area 210 of the first substrate 20. That is, the projection of the functional units on the first substrate 20 is located within the active area 210. The same active area 210 can have the same functional unit or multiple different functional units, and different active areas 210 can have the same functional unit or multiple different functional units. The isolation structure 241 surrounds the active area 210 and is located between the functional units in adjacent active areas 210, isolating the functional units in different active areas 210.

[0055] In the embodiment of the present application, the isolation structure 241 may include: a conductor structure extending in a direction perpendicular to the substrate surface and an insulating structure on the sidewalls of the conductor structure. The insulating structure can electrically isolate the conductor structure from the functional unit. The insulating structure material can be silicon oxide or an organic material such as silicone rubber or silane. The conductor structure can be metal tungsten or polysilicon. In the embodiment of the present application, the isolation structure 241 can be made of a single insulating material, such as silicon oxide, silicone rubber, or silane.

[0056] The partial isolation structure 241 located on one side of the active area is a rectangular structure with a generally large aspect ratio and a relatively diverse filling material, which is different from the material of the first substrate 20. Therefore, the mechanical strength of the contact position between the isolation structure 241 and the first substrate 20 is generally low, which is often the concentrated point of device cracking and is difficult to modify.

[0057] A wiring layer may be formed on one side of the first substrate 20. The wiring layer and the functional layer may be formed on the same side of the first substrate 20 or on different sides of the first substrate 20. For ease of explanation, the first substrate 20 may be regarded as a bottom support component, and the wiring layer is located above the first substrate 20. In this case, the functional layer may be located between the first substrate 20 and the wiring layer, or below the first substrate 20. Of course, the aforementioned "above" is defined to characterize the positional relationship between film layers. In practice, the upper and lower positional relationship between film layers is related to the placement of semiconductor devices. The first substrate 20 may be placed as a bottom support component or as a top component.

[0058] The wiring layer includes multiple reinforcement pads 251, which are arranged at intervals. The projections of the reinforcement pads 251 on the surface of the first substrate 20 intersect with the location of the isolation structure 241. That is, the reinforcement pads 251 can be placed at the location of the isolation structure 241. The reinforcement pads 251 can withstand stress from the surface, reinforce the isolation structure 241, and enhance the mechanical strength of the area where the isolation structure 241 is located, thereby enhancing the overall mechanical strength of the semiconductor device. The reinforcement pads 251 can be arranged across the isolation structure 241, that is, they can be arranged directly above the isolation structure 241 and on both sides of the isolation structure 241. In this case, the reinforcement pads 251 have projections on the substrate surface on both sides of the isolation structure 241.

[0059] The arrangement direction of the reinforcement pad 251 is consistent with the extension direction of the isolation structure 241 in a plane parallel to the surface of the first substrate 20. When the isolation structure 241 is set to surround the active area 210, the reinforcement pad 251 is also set on the periphery of the active area 210 and surrounds the active area 210. The setting of the reinforcement pad 251 does not affect the setting of other components in the active area 210.

[0060] The wiring layer may further include an interconnect structure 253, which is connected to the functional unit and is used to lead out the functional unit and connect the functional unit to the external circuit. The interconnect structure 253 includes connecting wires and / or pads. Specifically, the interconnect structure 253 may be disposed above the active area 210, that is, the projection of the interconnect structure 253 on the first substrate 20 belongs to the active area 210, thereby connecting to the functional unit below it through the interlayer interconnect structure 253.

[0061] That is to say, the wiring layer can include multiple reinforcement pads 251 and interconnection structures 253 at the same time. The reinforcement pad 251 does not require conductivity, and its material can be a conductor material or a dielectric material. That is, the material of the reinforcement pad 251 is consistent with the material of the interconnection structure 253, or it can be inconsistent with the material of the interconnection structure 253. When the material of the reinforcement pad 251 is consistent with the material of the interconnection structure 253, the reinforcement pad 251 and the interconnection structure 253 can be formed at the same time. For example, by adding a pattern of the reinforcement pad 251 to the original layout for forming the interconnection structure 253, the reinforcement pad 251 can be formed at the same time, thereby simplifying the process.

[0062] For example, the materials of the reinforcement pad 251 and the interconnection structure 253 can both be aluminum or other conductive materials. The connecting wire made of aluminum can be called an aluminum line (Al line), and the reinforcement pad 251 made of aluminum can be called an aluminum pad (AlPad).

[0063] When the semiconductor device includes a single-layer wafer or die, the functional layer may be the third film layer 220 between the first substrate 20 and the reinforcement pad 251. Figure 5 As shown in A.

[0064] When the semiconductor device includes a plurality of wafers or grains stacked vertically, the functional layer may include a first film layer 231 and a second film layer 232, the first film layer 231 is located on a side of the first film layer 231 away from the reinforcement pad 251, and the second film layer 232 is located on a side of the first film layer 231 away from the reinforcement pad 251. A bonding layer 233 may be provided between the first film layer 231 and the second film layer 232, and the bonding layer 233 may be used to bond the first film layer 231 and the second film layer 232 together. Figure 5B. Furthermore, a second substrate 30 may be provided on the side of the second film layer 232 facing away from the first substrate 20. Thus, from the second substrate 30 to the reinforcement pad 251, the semiconductor device sequentially includes the second substrate 30, the second film layer 232, the bonding layer 233, the first film layer 231, the first substrate 20, and the reinforcement pad 251. The functional unit includes a first unit in the first film layer 231 and a second unit in the second film layer 232. The first unit and the second unit may have the same or different structures, and the second substrate 30 may or may not have an isolation structure.

[0065] An embodiment of the present application provides a semiconductor device, which may include a first substrate and a wiring layer located on one side of the first substrate. An isolation structure is formed in the first substrate and penetrates at least a portion of the first substrate. The isolation structure extends in a direction parallel to the surface of the first substrate. The isolation structure generally has poor mechanical strength. The wiring layer includes a plurality of reinforcement pads, which are arranged at intervals. The projection of the reinforcement pads on the surface of the first substrate may be arranged to intersect with the location of the isolation structure, that is, a plurality of reinforcement pads may be arranged directly above the isolation structure. The reinforcement pads may enhance the mechanical strength of the area where the isolation structure is located, thereby enhancing the overall mechanical strength of the semiconductor device.

[0066] Based on the semiconductor device provided in the above embodiment, the present application also provides a method for manufacturing a semiconductor device, referring to Figure 5 FIG. 1 is a flow chart of a method for manufacturing a semiconductor device according to an embodiment of the present application. The method may include:

[0067] S101 , forming an isolation structure 241 in a first substrate 20 .

[0068] In an embodiment of the present application, the semiconductor device may be a wafer, and the number of wafers may be one or more, and the multiple wafers are stacked in sequence along a direction perpendicular to the substrate surface (denoted as longitudinal direction), for example, the semiconductor device includes 2, 4, 8, or 16 wafers stacked longitudinally; the semiconductor device may also be a die, and the number of die may be one or more, and the multiple die are stacked along a direction perpendicular to the substrate surface (longitudinal direction), for example, the semiconductor device includes 2, 4, 8, or 16 die stacked longitudinally.

[0069] In the embodiment of the present application, the first substrate 20 is any one of the substrates in the semiconductor device. When the semiconductor device includes multiple wafers or multiple grains, the first substrate 20 can be the substrate of the top layer of the device or the substrate of the bottom layer of the device. In the embodiment of the present application, the first substrate 20 is a semiconductor substrate, for example, it can be a Si substrate, a Ge substrate, a SiGe substrate, SOI (Silicon On Insulator) or GOI (Germanium On Insulator). In other embodiments, the semiconductor substrate can also be a substrate including other element semiconductors or compound semiconductors, such as GaAs, InP or SiC, etc., and can also be a stacked structure, such as Si / SiGe, etc., and can also be other epitaxial structures, such as SGOI (Silicon Germanium on Insulator). In this embodiment, the first substrate 20 is a single crystal silicon substrate.

[0070] An isolation structure 241 may be formed in the first substrate 20 and penetrate at least a portion of the first substrate 20. The isolation structure 241 extends in a direction parallel to the surface of the first substrate 20. The isolation structure 241 may divide the first substrate 20 into multiple regions. Figure 3 As shown, in a plane parallel to the surface of the first substrate 20 , the isolation structure 241 may be ring-shaped, surrounding the active area 210 . The isolation structure 241 may be a DTI structure to prevent the performance of the active area 210 from being affected by the peripheral area.

[0071] In the embodiment of the present application, the isolation structure 241 may include: a conductor structure extending in a direction perpendicular to the substrate surface and an insulating structure on the sidewalls of the conductor structure. The insulating structure can electrically isolate the conductor structure from the functional unit. The insulating structure material can be silicon oxide or an organic material such as silicone rubber or silane. The conductor structure can be metal tungsten or polysilicon. In the embodiment of the present application, the isolation structure 241 can be made of a single insulating material, such as silicon oxide, silicone rubber, or silane.

[0072] The isolation structure 241 may be formed in the first substrate 20 by etching the first substrate 20 to obtain an isolation trench penetrating a portion of the first substrate 20 in a direction perpendicular to the surface of the first substrate 20 , and forming the isolation structure 241 in the isolation trench.

[0073] A functional layer may be formed on one side of the first substrate 20. The functional layer may include functional units. The functional units may be memory cells or logic computing units. The memory cells may be NAND memory cells or NOR memory cells. The functional units may be stacked vertically to form a three-dimensional memory device, such as a 3D NAND memory device or a 3D NOR memory device. Of course, the functional units may also be units having other functions, such as switch units.

[0074] The functional units are located in the active area 210 of the first substrate 20. That is, the projection of the functional units on the first substrate 20 is located within the active area 210. The same active area 210 can have the same functional unit or multiple different functional units, and different active areas 210 can have the same functional unit or multiple different functional units. The isolation structure 241 surrounds the active area 210 and is located between the functional units in adjacent active areas 210, isolating the functional units in different active areas 210.

[0075] When the semiconductor device includes a single-layer wafer or die, the functional layer may be the third film layer 220 between the first substrate 20 and the reinforcing pad 251. In this case, the functional layer may be formed after the isolation structure 241.

[0076] When the semiconductor device includes multiple wafers or grains stacked vertically, the functional layer 11 may include a first film layer 231 and a second film layer 232. The first film layer 231 is located on the side of the first film layer 231 facing away from the reinforcement pad 251, and the second film layer 232 is located on the side of the first film layer 231 facing away from the reinforcement pad 251. A bonding layer 233 may be provided between the first film layer 231 and the second film layer 232, and the first film layer 231 and the second film layer 232 may be bonded together using the bonding layer 233. In addition, a second substrate 30 may be provided on the side of the second film layer 232 facing away from the first substrate 20. Then, in the direction from the second substrate 30 to the reinforcement pad 251, the semiconductor device includes, in order, the second substrate 30, the second film layer 232, the bonding layer 233, the first film layer 231, the first substrate 20, and the reinforcement pad 251. The functional unit includes a first unit in the first film layer 231 and a second unit in the second film layer 232. The first unit and the second unit may have the same structure or different structures. The second substrate 30 may have an isolation structure 241 or may not have an isolation structure 241.

[0077] When the functional layer includes a first film layer 231 and a second film layer 232, the functional layer can be formed before or after the isolation structure 241. Forming the functional layer on the first substrate 20 side can specifically involve forming the first film layer 231 on the first substrate 20 side and the second film layer 232 on the second substrate 30 side, and then bonding the first film layer 231 and the second film layer 232 together using a bonding process via a bonding layer 233 between the first film layer 231 and the second film layer 232. Subsequently, the first substrate 20 can be thinned.

[0078] S102 , forming a wiring layer on the first substrate 20 side.

[0079] A wiring layer may also be formed on one side of the first substrate 20. The wiring layer and the functional layer may be formed on the same side of the first substrate 20 or on different sides of the first substrate 20. For ease of explanation, the first substrate 20 may be regarded as a bottom support component, and the wiring layer is located above the first substrate 20. In this case, the functional layer may be located between the first substrate 20 and the wiring layer, or below the first substrate 20. Of course, the aforementioned "above" is defined to characterize the positional relationship between film layers. In practice, the upper and lower positional relationship between film layers is related to the placement of semiconductor devices. The first substrate 20 may be placed as a bottom support component or as a top component.

[0080] When forming the wiring layer on one side of the first substrate 20, the wiring layer is formed above the first substrate 20. When the first substrate 20 serves as a bottom supporting component, the wiring layer can be formed above the functional layer. When the first substrate 20 serves as a substrate in a wafer that is flipped during the bonding process, the wiring layer can be formed above the first substrate 20, and the functional layer is formed below the first substrate 20.

[0081] The wiring layer includes multiple reinforcement pads 251, which are arranged at intervals. The projections of the reinforcement pads 251 on the surface of the first substrate 20 intersect with the location of the isolation structure 241. That is, the reinforcement pads 251 can be placed at the location of the isolation structure 241. The reinforcement pads 251 can withstand stress from the surface, reinforce the isolation structure 241, and enhance the mechanical strength of the area where the isolation structure 241 is located, thereby enhancing the overall mechanical strength of the semiconductor device. The reinforcement pads 251 can be arranged across the isolation structure 241, that is, they can be arranged directly above the isolation structure 241 and on both sides of the isolation structure 241. In this case, the reinforcement pads 251 have projections on the substrate surface on both sides of the isolation structure 241.

[0082] The wiring layer is formed on one side of the first substrate 20. Specifically, a conductor layer is formed on one side of the first substrate 20 and the conductor layer is etched to form the wiring layer; or a dielectric layer is formed on one side of the first substrate 20, the dielectric layer is etched to obtain a wiring groove, and a conductor material is formed in the wiring groove, and the conductor material serves as the wiring layer.

[0083] The arrangement direction of the reinforcement pad 251 is consistent with the extension direction of the isolation structure 241 in a plane parallel to the surface of the first substrate 20. When the isolation structure 241 is set to surround the active area 210, the reinforcement pad 251 is also set on the periphery of the active area 210 and surrounds the active area 210. The setting of the reinforcement pad 251 does not affect the setting of other components in the active area 210.

[0084] The wiring layer may further include an interconnect structure 253, which is connected to the functional unit and is used to lead out the functional unit and connect the functional unit to the external circuit. The interconnect structure 253 includes connecting wires and / or pads. Specifically, the interconnect structure 253 may be disposed above the active area 210, that is, the projection of the interconnect structure 253 on the first substrate 20 belongs to the active area 210, thereby connecting to the functional unit below it through the interlayer interconnect structure 253.

[0085] That is to say, the wiring layer can include multiple reinforcement pads 251 and interconnection structures 253 at the same time. The reinforcement pad 251 does not require conductivity, and its material can be a conductor material or a dielectric material. That is, the material of the reinforcement pad 251 is consistent with the material of the interconnection structure 253, or it can be inconsistent with the material of the interconnection structure 253. When the material of the reinforcement pad 251 is consistent with the material of the interconnection structure 253, the reinforcement pad 251 and the interconnection structure 253 can be formed at the same time. For example, by adding a pattern of the reinforcement pad 251 to the original layout for forming the interconnection structure 253, the reinforcement pad 251 can be formed at the same time, thereby simplifying the process.

[0086] For example, the materials of the reinforcement pad 251 and the interconnection structure 253 can both be aluminum or other conductive materials. The connecting wire made of aluminum can be called an aluminum line (Al line), and the reinforcement pad 251 made of aluminum can be called an aluminum pad (AlPad).

[0087] An embodiment of the present application provides a method for manufacturing a semiconductor device, wherein an isolation structure is formed in a first substrate, and a wiring layer is formed on one side of the first substrate, wherein the isolation structure penetrates at least a portion of the first substrate, and the isolation structure extends in a direction parallel to the surface of the first substrate. The wiring layer includes a plurality of reinforcement pads, and the plurality of reinforcement pads are arranged at intervals. The isolation structure generally has poor mechanical strength, and therefore, the projection of the reinforcement pad on the surface of the first substrate can be arranged to intersect with the location of the isolation structure, that is, the reinforcement pad can be arranged directly above the isolation structure. The reinforcement pad can enhance the mechanical strength of the area where the isolation structure is located, thereby enhancing the overall mechanical strength of the semiconductor device.

[0088] The various embodiments in this specification are described in a progressive manner, and the same or similar parts between the various embodiments can be referred to each other. Each embodiment focuses on the differences from other embodiments.

[0089] The above is only a preferred embodiment of the present application. Although the present application has been disclosed as a preferred embodiment, it is not intended to limit the present application. Any technician familiar with the art can use the above-disclosed methods and technical contents to make many possible changes and modifications to the technical solution of the present application without departing from the scope of the technical solution of the present application, or modify it into an equivalent embodiment with equivalent changes. Therefore, any simple modifications, equivalent changes and modifications made to the above embodiments based on the technical essence of the present application without departing from the content of the technical solution of the present application are still within the scope of protection of the technical solution of the present application.

Claims

1. A semiconductor device, characterized in that: include: a first substrate; An isolation structure is formed in the first substrate and penetrates at least a portion of the first substrate, and the isolation structure extends in a direction parallel to a surface of the first substrate; a wiring layer located on one side of the first substrate, the wiring layer comprising a plurality of reinforcement pads, the plurality of reinforcement pads being arranged at intervals; a projection of the reinforcement pads on the surface of the first substrate intersecting with a location of the isolation structure; Also includes: a functional layer located on one side of the first substrate, wherein the functional layer is provided with functional units; The wiring layer further includes an interconnection structure connected to the functional unit; the interconnection structure includes connection lines and / or pads.

2. The semiconductor device according to claim 1, wherein The first substrate has an active area. In a plane parallel to the surface of the first substrate, the isolation structure is ring-shaped and surrounds the active area. The projection of the functional unit on the first substrate belongs to the active area; the projection of the interconnection structure on the first substrate belongs to the active area.

3. The semiconductor device according to claim 1, wherein The material of the reinforcing pad is consistent with the material of the interconnection structure.

4. The semiconductor device according to any one of claims 1 to 3, wherein: An arrangement direction of the reinforcement pads is consistent with an extension direction of the isolation structure in a plane parallel to the surface of the first substrate.

5. The semiconductor device according to any one of claims 1 to 3, wherein: The functional layer is a third film layer between the first substrate and the reinforcement pad; Alternatively, the functional layer includes a first film layer and a second film layer, the first film layer is located on the side of the first substrate facing away from the reinforcement pad, the second film layer is located on the side of the first film layer facing away from the reinforcement pad, and a bonding layer is arranged between the first film layer and the second film layer; a second substrate is arranged on the side of the second film layer facing away from the first substrate; the functional unit includes a first unit in the first film layer and a second unit in the second film layer.

6. The semiconductor device according to any one of claims 1 to 3, characterized in that The isolation structure includes a conductor structure extending in a direction perpendicular to the surface of the first substrate and an insulating structure on a sidewall of the conductor structure; or the isolation structure is made of an insulating material.

7. A method for manufacturing a semiconductor device, characterized in that: include: forming an isolation structure in the first substrate; The isolation structure penetrates at least a portion of the first substrate, and the isolation structure extends in a direction parallel to the surface of the first substrate; forming a wiring layer on one side of the first substrate, the wiring layer comprising a plurality of reinforcement pads, the plurality of reinforcement pads being arranged at intervals; the projection of the reinforcement pads on the surface of the first substrate intersecting with the location of the isolation structure; Before forming the wiring layer on the first substrate side, the method further includes: A functional layer is formed on one side of the first substrate, wherein functional units are provided in the functional layer; the wiring layer further comprises an interconnection structure connected to the functional units; the interconnection structure comprises connecting lines and / or pads.

8. The method according to claim 7, characterized in that The forming of a wiring layer on one side of the first substrate includes: forming a conductor layer on one side of the first substrate, and etching the conductor layer to form a wiring layer; Alternatively, a dielectric layer is formed on one side of the first substrate, the dielectric layer is etched to obtain a wiring groove, and a conductor material is formed in the wiring groove, and the conductor material serves as the wiring layer.

9. The method according to claim 8, characterized in that The first substrate has an active area. In a plane parallel to the surface of the first substrate, the isolation structure is ring-shaped and surrounds the active area. The projection of the functional unit on the first substrate belongs to the active area; the projection of the interconnection structure on the first substrate belongs to the active area.

10. The method according to any one of claims 7 to 9, characterized in that: An arrangement direction of the reinforcement pads is consistent with an extension direction of the isolation structure in a plane parallel to the surface of the first substrate.

11. The method according to any one of claims 8 to 9, characterized in that: The functional layer is a third film layer between the first substrate and the reinforcement pad; Alternatively, the functional layer includes a first film layer and a second film layer, and the forming of the functional layer on one side of the first substrate includes: forming a first film layer on one side of the first substrate and forming a second film layer on one side of the second substrate; The first film layer and the second film layer are bonded together through a bonding layer between the first film layer and the second film layer by using a bonding process, and the second film layer and the wiring layer are located on different sides of the first substrate.

12. The method according to any one of claims 7 to 9, characterized in that: The isolation structure is made of an insulating material; or the isolation structure includes a conductor structure extending in a direction perpendicular to the surface of the first substrate and an insulating structure on a sidewall of the conductor structure; An isolation structure is formed in a first substrate, comprising: Etching the first substrate to obtain an isolation trench penetrating a portion of the first substrate in a direction perpendicular to a surface of the first substrate; An isolation structure is formed in the isolation trench.

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