Method for manufacturing a memory

Abstract

The embodiment of the present disclosure discloses a manufacturing method of a memory, comprising: providing a structure to be processed, comprising a material layer, a device layer and an ion implantation region covered by the material layer which are arranged in a stack; after a first heat treatment on a first region of the material layer, performing a second heat treatment on the first region of the material layer to heat the first region of the material layer and the ion implantation region; the temperature range of the second heat treatment is greater than the temperature range of the first heat treatment; performing a first heat treatment on a second region of the material layer; the second region of the material layer comprises a first sub-region overlapping with the first region of the material layer and a second sub-region arranged in parallel with the first region; the first heat treatment performed on the second region is used to reduce the difference between the transmittance of the second sub-region and the transmittance of the first sub-region; after the first heat treatment on the second region of the material layer, performing a second heat treatment on the second region of the material layer to heat the second region of the material layer and the ion implantation region.

Description

TECHNICAL FIELD

[0001] Embodiments of the present disclosure relate to the technical field of semiconductor technology, and particularly relate to a manufacturing method of a memory. BACKGROUND

[0002] With the continuous improvement of semiconductor manufacturing process, the process feature size is getting smaller and smaller, and the storage density of memory devices is getting higher and higher. The 3D NAND architecture has been widely used due to its fast write speed, simple erase operation, and higher storage density.

[0003] The 3D NAND architecture can utilize Gate-Induced Drain Leakage (GIDL) current to achieve the erasing of the device. The formation of the Gate-Induced Drain Leakage current requires setting a polysilicon substrate as a conductive channel, and ion doping is performed on the Gate-Induced Drain Leakage region to achieve it. In the related art, the substrate is annealed by heat treatment, so that amorphous silicon is crystallized to form polysilicon, and at the same time, the doped ions in the Gate-Induced Drain Leakage region are activated by heat. However, uneven heating will cause inconsistent activation of doped ions, affecting the stability of the Gate-Induced Drain Leakage current. Therefore, how to improve the uniformity of heating in each region during the heat treatment of the substrate has become a problem to be solved in the field. SUMMARY

[0004] Embodiments of the present disclosure provide a manufacturing method of a memory, comprising:

[0005] providing a structure to be processed; wherein the structure to be processed comprises a material layer and a device layer stacked, and the device layer comprises an ion implantation region covered by the material layer;

[0006] performing first heat treatment on a first region of the material layer;

[0007] after the first heat treatment on the first region of the material layer, performing second heat treatment on the first region of the material layer to heat the first region of the material layer and the ion implantation region; wherein the temperature range of the second heat treatment is greater than the temperature range of the first heat treatment;

[0008] after the second heat treatment on the first region of the material layer, performing the first heat treatment on a second region of the material layer; wherein the second region of the material layer partially overlaps a first sub-region of the first region of the material layer, and a second sub-region arranged side by side with the first region; the first heat treatment performed on the second region is used to reduce the difference between the transmittance of the second sub-region and the transmittance of the first sub-region;

[0009] after the first heat treatment of the second region of the material layer, performing a second heat treatment on the second region of the material layer to heat the second region of the material layer and the ion implantation region.

[0010] In some embodiments, the first heat treatment of the first region of the material layer comprises applying a first laser pulse to the first region of the material layer.

[0011] The second heat treatment of the first region of the material layer comprises applying a second laser pulse to the first region of the material layer to heat the first region of the material layer and the ion implantation region, wherein an energy density of the second laser pulse is greater than an energy density of the first laser pulse.

[0012] Before the first heat treatment of the second region of the material layer, a transmittance of the first sub-region is greater than a transmittance of the second sub-region; the first heat treatment of the second region of the material layer comprises applying the first laser pulse to the first sub-region and the second sub-region of the second region of the material layer to reduce the transmittance of the first sub-region.

[0013] The second heat treatment of the second region of the material layer comprises applying the second laser pulse to the second region of the material layer.

[0014] In some embodiments, the method is applied to a laser processing device comprising a laser light source, and the first heat treatment of the second region of the material layer after the second heat treatment of the first region of the material layer comprises:

[0015] After applying the second laser pulse to the first region of the material layer, the laser light source is controlled to move from a first position to a second position; wherein a laser pulse emitted by the laser light source at the first position covers the first region of the material layer.

[0016] When the laser light source moves to the second position, the laser light source is controlled to emit the first laser pulse; wherein a laser pulse emitted by the laser light source at the second position covers the second region of the material layer.

[0017] In some embodiments, a light spot of the laser pulse emitted by the laser light source is square, and a distance between the first position and the second position is greater than zero and less than a side length of the light spot.

[0018] In some embodiments, a laser wavelength range of the first laser pulse is 308nm to 527nm.

[0019] The laser wavelength of the second laser pulse ranges from 308 nm to 527 nm.

[0020] In some embodiments, the energy density of the first laser pulse is less than or equal to 400 mJ / cm 2 ;

[0021] The energy density of the second laser pulse is greater than or equal to 650 mJ / cm 2 .

[0022] In some embodiments, the applying the first laser pulse to the first region of the material layer comprises: starting to apply the first laser pulse to the first region of the material layer upon receiving a first control signal;

[0023] The applying the second laser pulse to the first region of the material layer after applying the first laser pulse to the first region of the material layer comprises:

[0024] Starting to apply the second laser pulse to the first region of the material layer upon receiving a second control signal; wherein the time interval between the second control signal and the first control signal ranges from 0 μs to 1 μs.

[0025] In some embodiments, the constituent material of the material layer comprises amorphous silicon;

[0026] The bulk material of the ion implantation region comprises polysilicon;

[0027] The implanted ions of the ion implantation region comprise phosphorus ions or boron ions;

[0028] The temperature of the first heat treatment ranges from 600 °C to 1200 °C;

[0029] The temperature of the second heat treatment is greater than 1200 °C.

[0030] In some embodiments, the thickness of the material layer ranges from 50 nm to 500 nm.

[0031] In some embodiments, the providing a structure to be processed comprises:

[0032] Providing a substrate; wherein the substrate comprises a first surface and a second surface arranged oppositely;

[0033] Forming a stack structure covering the first surface of the substrate and a channel column penetrating through the stack structure to form the device layer; wherein the stack structure comprises insulating layers and conductive layers arranged alternately and sequentially, the bottom of the channel column extends into the substrate, along the radial direction of the channel column, the channel column comprises a channel layer and a functional layer, and the functional layer is located between the channel layer and the stack structure.

[0034] removing the substrate from the second surface of the substrate and exposing the bottom of the channel pillar and the stack structure;

[0035] removing the functional layer of the exposed bottom of the channel pillar to expose the channel layer;

[0036] performing ion implantation on the exposed channel layer to form the ion implantation region;

[0037] forming the material layer covering the ion implantation region and the stack structure.

[0038] In the related art, a laser pulse is used to heat treat a material layer to crystallize amorphous silicon into polycrystalline silicon and activate ions in the ion implantation region at the same time. Because the square spot of the laser pulse itself has energy difference, the temperature in the center region is higher than that in the edge region. Thus, it will cause the uneven heating of the treatment region of the material layer, resulting in uneven ion activation rate of the ion implantation region, and further affecting the stability of the device.

[0039] The embodiment of the present disclosure first performs first heat treatment on a first region, and then performs second heat treatment with a higher temperature than the first heat treatment on the region to crystallize the material layer and activate the ion implantation region, and then performs first heat treatment on a second region to reduce the difference between the transmittance of the overlapping part (i.e., a first sub-region) of the first region and the second region and the transmittance of the second sub-region, which can compensate for the insufficient heating of the edge region of the laser pulse spot, improve the heating uniformity of the material layer, thereby improving the heating uniformity of the ion implantation region, improving the uniformity of ion activation rate, and further improving the stability of the memory. BRIEF DESCRIPTION OF DRAWINGS

[0040] Figure 1 a and 1b is a schematic diagram of a manufacturing method of a memory according to an exemplary embodiment;

[0041] Figure 1 c is a schematic diagram of a laser pulse spot according to an exemplary embodiment;

[0042] Figure 2 is a flowchart of a manufacturing method of a memory according to an embodiment of the present disclosure;

[0043] Figures 3a to 3e is a schematic diagram of a manufacturing method of a memory according to an embodiment of the present disclosure;

[0044] Figures 4a to 4d is a schematic diagram of a manufacturing method of a memory according to an embodiment of the present disclosure;

[0045] Figures 5a to 5dis a schematic diagram of a method for manufacturing a memory according to an embodiment of the present disclosure. DETAILED DESCRIPTION

[0046] The technical solutions of the present disclosure are further described in detail below in combination with the drawings and specific embodiments of the present disclosure.

[0047] In the embodiments of the present disclosure, the terms "first", "second", and the like are used to distinguish similar objects, and are not used to describe a specific order or sequence.

[0048] In the embodiments of the present disclosure, the term "A is in contact with B" includes the case where A is in direct contact with B, or the case where A is indirectly in contact with B with other components interposed between A and B.

[0049] In the embodiments of the present disclosure, the term "layer" refers to a portion of material that includes a region having a thickness. The layer can extend over the entirety of the underlying or overlying structure, or can have a scope less than the scope of the underlying or overlying structure. Further, the layer can be a region of a homogeneous or inhomogeneous continuous structure having a thickness less than the thickness of the continuous structure. For example, the layer can be located between a top surface and a bottom surface of the continuous structure, or the layer can be between any horizontal pair of planes at the top surface and the bottom surface of the continuous structure. The layer can extend horizontally, vertically, and / or along an inclined surface. Also, the layer can include a plurality of sub-layers.

[0050] It can be understood that the meanings of "on", "over", and "above" in the present disclosure should be interpreted in the broadest way, such that "on" not only means "on" something with no intervening features or layers therebetween (i.e., directly on something), but also includes "on" something with intervening features or layers therebetween.

[0051] It should be noted that although the present specification is described in terms of embodiments, each embodiment does not necessarily contain only one independent technical solution, and the description manner of the specification is only for the sake of clarity. Those skilled in the art should consider the specification as a whole, and the technical solutions in each embodiment can be properly combined to form other embodiments that can be understood by those skilled in the art.

[0052] Figure 1 a and 1b is a schematic diagram of a method for manufacturing a memory according to an example embodiment, the method comprising the steps of:

[0053] Step one: referring to Figure 1 a , a structure to be processed is provided; wherein the structure to be processed includes a material layer 200 and a device layer 300 arranged in a stack, and the device layer 300 includes an ion implantation region covered by the material layer 200.

[0054] Exemplarily, the material layer 200 is composed of a material including an elemental semiconductor material (e.g., silicon, germanium), a group III-V compound semiconductor material, a group II-VI compound semiconductor material, an organic semiconductor material, or other semiconductor materials known in the art. In this embodiment, the material layer 200 is amorphous silicon.

[0055] Step two: referring to Figure 1 b As shown in the figure, a laser pulse is applied to the material layer 200 for heat treatment, so that the amorphous silicon in the material layer 200 is crystallized into polycrystalline silicon, and the doping ions in the ion implantation region are activated.

[0056] Figure 1 c is a schematic diagram of a laser pulse spot according to an exemplary embodiment. Referring to Figure 1 c As shown in the figure, the laser pulse irradiates the material layer in the form of a square spot for heat treatment. Because the square spot of the laser pulse itself has energy difference, the temperature of the central region of the spot is higher than that of the edge region, so that the material layer is unevenly heated, and the ion implantation region is unevenly heated, resulting in uneven ion activation rate of the ion implantation region, which further affects the stability of the memory.

[0057] Based on this, the present disclosure provides a manufacturing method of a memory.

[0058] Figure 2 is a flowchart of a manufacturing method of a memory according to an embodiment of the present disclosure, Figures 3a to 3e is a schematic diagram of a manufacturing method of a memory according to an embodiment of the present disclosure. Referring to Figure 2 , Figures 3a to 3e As shown in the figure, the method comprises the following steps:

[0059] S100: referring to Figure 3a As shown in the figure, a structure to be processed is provided; wherein the structure to be processed comprises a material layer 200 and a device layer 300 stacked, and the device layer 300 comprises an ion implantation region covered by the material layer 200;

[0060] S200: referring to Figure 3b As shown in the figure, a first region of the material layer 200 is subjected to a first heat treatment;

[0061] S300: referring to Figure 3c As shown in the figure, after the first heat treatment is performed on the first region of the material layer 200, a second heat treatment is performed on the first region of the material layer 200 to heat the first region of the material layer 200 and the ion implantation region; wherein the temperature range of the second heat treatment is greater than the temperature range of the first heat treatment;

[0062] S400: referring to Figure 3dAs shown, the second region of the material layer 200 is subjected to the first heat treatment after the first region of the material layer 200 is subjected to the second heat treatment; wherein the second region of the material layer 200 comprises a first sub-region overlapping the first region of the material layer 200, and a second sub-region arranged in parallel with the first region; the first heat treatment performed on the second region is used to reduce the difference between the transmittance of the second sub-region and the transmittance of the first sub-region.

[0063] S500: referring to Figure 3e As shown, the second region of the material layer 200 is subjected to the second heat treatment after the first region of the material layer 200 is subjected to the first heat treatment, so as to heat the second region of the material layer 200 and the ion implantation region.

[0064] Exemplarily, the material of the material layer 200 comprises: elemental semiconductor material (e.g. silicon, germanium), group III-V compound semiconductor material, group II-VI compound semiconductor material, organic semiconductor material, or other semiconductor material known in the art. In the embodiment, the material layer 200 is amorphous silicon material.

[0065] Exemplarily, the material layer 200 can be formed by using any deposition technique known in the art, such as Low Temperature Chemical Vapor Deposition (LTCVD) process, Low Pressure Chemical Vapor Deposition (LPCVD) process, Rapid Thermal Chemical Vapor Deposition (RTCVD) process, Atomic Layer Deposition (ALD) process, or Plasma Enhanced Chemical Vapor Deposition (PECVD) process, etc.

[0066] Exemplarily, the first heat treatment and the second heat treatment comprise: any one or combination of laser pulse heat treatment, furnace tube heat treatment.

[0067] Specifically, referring to Figure 3b and 3c As shown, the temperature of the first heat treatment is less than the crystallization temperature of the material layer, so as to heat the material layer 200 and the ion implantation region, and reduce the difference in transmittance of the material layer 200. The temperature of the second heat treatment is higher than the temperature of the first heat treatment, so as to crystallize the material layer and activate the ions in the ion implantation region.

[0068] Referring to Figure 3d and 3eAs shown, the second region has a first sub-region overlapping with the first region, and a second sub-region arranged in parallel with the first sub-region. The first sub-region is a part of the first region after step S300 is performed, and the second sub-region is a region without performing the heat treatment. Therefore, the material layer 200 in the first sub-region is a material layer that has been crystallized, and the material layer 200 in the second sub-region is a material layer that has not been crystallized. Thus, before step S400 is performed, the transmittance of the first sub-region and the second sub-region has a large difference, which will affect the uniformity of the material layer under heat.

[0069] Step S400 is performed to reduce the difference in transmittance between the first sub-region and the second sub-region, so that when the second heat treatment in step S500 is performed, the situation that the ion implantation region is not uniformly heated due to the difference in transmittance between the first sub-region and the second sub-region can be improved, the uniformity of the ion implantation region under heat is improved, the uniformity of the ion activation rate is improved, and the stability of the memory is improved.

[0070] The embodiments of the present disclosure first perform the first heat treatment on the first region, and then perform the second heat treatment with a higher temperature than the first heat treatment on the region to crystallize the material layer and activate the ion implantation region, and then perform the first heat treatment on the second region to reduce the difference between the transmittance of the overlapping part (i.e., the first sub-region) of the first region and the second region and the transmittance of the second sub-region, which can compensate for the insufficient heating of the edge region of the laser pulse spot, and improve the uniformity of the material layer under heat. Thereby, the uniformity of the ion implantation region under heat can be improved, the uniformity of the ion activation rate is improved, and the stability of the memory is improved.

[0071] In some embodiments, a laser pulse can be applied to the structure to be processed to perform the heat treatment.

[0072] Step S200 includes referring to Figure 3b and Figure 4a As shown, a first laser pulse is applied to the first region of the material layer 200;

[0073] Step S300 includes referring to Figure 3c and Figure 4a As shown, a second laser pulse is applied to the first region of the material layer 200 to heat the first region of the material layer 200 and the ion implantation region; the energy density of the second laser pulse is greater than the energy density of the first laser pulse in step S200;

[0074] Step S400 includes referring to Figure 3d and Figure 4a As shown, before the first heat treatment is performed on the second region, the transmittance of the first sub-region is greater than the transmittance of the second sub-region; a first laser pulse is applied to the first sub-region and the second sub-region of the second region of the material layer to reduce the transmittance of the first sub-region;

[0075] Step S500 comprises: referring to Figure 3e As shown in Figure 4a The second laser pulse is applied to the second region of the material layer 200.

[0076] The embodiments of the present disclosure use laser pulses to heat treat the material layer. Laser pulse heat treatment has the advantages of simple process, high efficiency, controllable treatment area, etc. It can heat treat specific regions to be treated without affecting other non-treatment regions by high temperature, reducing the probability of device failure.

[0077] Referring to Figures 3b to 3e The first laser pulse heat treats the material layer 200, which can reduce the difference in transmittance of the first and second sub-regions of the material layer to the laser, thereby improving the heating uniformity of different ion implantation regions and reducing the difference in ion activation rate.

[0078] Referring to Figure 4a As shown in On a wafer, multiple independent memories can be provided. The first and second regions can be set according to the distribution area of the memory. For example, the first region can include one memory or multiple memories, and the second region can be set parallel to the first region. The overlapping region of the second region and the first region is the first sub-region, and the non-overlapping region is the second sub-region.

[0079] Figure 4b It should be emphasized that, referring to The first and second regions in the embodiments of the present disclosure are only used to distinguish similar objects, and do not mean that the embodiments of the present disclosure only include two regions. Similarly, there can be a first region, a second region, an nth region, and an n+1th region, and the nth region and the n+1th region have an overlapping region, and n is a positive integer.

[0080] In some embodiments, the manufacturing method is applied to a laser processing device including a laser light source. After the second heat treatment of the first region of the material layer 200, the second region of the material layer 200 is subjected to the first heat treatment, comprising the following steps:

[0081] After the second laser pulse is applied to the first region of the material layer 200, the laser light source is controlled to move from the first position to the second position; wherein the laser light source at the first position emits a laser pulse covering the first region of the material layer 200.

[0082] When the laser light source moves to the second position, the laser light source is controlled to emit the first laser pulse; wherein the laser light source at the second position emits a laser pulse covering the second region of the material layer 200.

[0083] Figure 4a It should be emphasized that, referring to 4cAs shown, the laser pulse is in the form of a square spot, which covers the first region or the second region of the material layer 200. The first spot emitted from the first position and the second spot emitted from the second position of the laser source cover the first region and the second region of the material layer 200 respectively, so the first spot and the second spot also have a partially overlapped region. In this way, the overlapped region can compensate for the insufficient heating of the edge region of the spot, and improve the heating uniformity of the material layer. Thus, the heating uniformity of the ion implantation region can be improved, the ion activation rate uniformity can be improved, and the stability of the memory can be improved.

[0084] For example, referring to Figure 4b and 4d As shown, the first spot, the second spot, the first region and the second region in the embodiment of the present disclosure are only for distinguishing similar objects, and do not mean that the embodiment of the present disclosure only includes two spots and two regions. Similarly, there can be a third spot, a fourth spot and an nth spot, and the nth spot and the nth+1 spot have a partially overlapped region; similarly, there are a third region, a fourth region and an nth region, and the nth region and the nth+1 region have a partially overlapped region. The value of n is any positive integer.

[0085] In some embodiments, referring to Figure 4c As shown: the spot of the laser pulse emitted by the laser source is square, and the distance between the first position and the second position is greater than zero and less than the length of the side of the spot.

[0086] In the embodiment of the present disclosure, the spot position moves with the movement of the light source position, so the distance between the first position and the second position can be represented by the distance D1 between the boundaries of the first spot and the second spot. It can be understood that, in order to make the spot cover the material layer 200 completely, the range of D1 should be less than the length of the side of the spot.

[0087] In some embodiments,

[0088] The laser wavelength range of the first laser pulse is: 308nm to 527nm;

[0089] The laser wavelength range of the second laser pulse is: 308nm to 527nm.

[0090] The material layer 200 has different transmittances to different wavelengths of laser, so the absorption rates of the material layer 200 to different wavelengths of laser are different. The greater the transmittance is, the lower the energy absorbed by the corresponding material layer 200 is, and the lower the energy obtained by the corresponding ion implantation region is, which reduces the efficiency of heat treatment. In this way, the wavelength of the laser can be selected according to the transmittance of the material layer 200 itself to different wavelengths of laser.

[0091] The wavelength range of the first laser pulse and the second laser pulse in the embodiment is 308nm to 527nm. The material layer has a low transmittance and a high absorption rate to the laser pulse in the wavelength range, so that the material layer can obtain more heat during the heat treatment, and the heat treatment efficiency is improved.

[0092] In some embodiments, the energy density of the first laser pulse is less than or equal to 400mJ / cm 2 ;

[0093] The energy density of the second laser pulse is greater than or equal to 650mJ / cm 2 .

[0094] The first laser pulse is used to heat the first region or the second region to reduce the difference in transmittance between the second sub-region and the first sub-region. The second laser pulse is used for crystallization of the material layer 200 and activation of the ion implantation region. The first laser pulse adopts a small energy density, which is beneficial to control the temperature of the first heat treatment, and reduces the probability of crystallization of the second sub-region while reducing the difference in transmittance between the second sub-region and the first sub-region. The second pulse adopts an energy density greater than or equal to 650mJ / cm 2 , and a higher energy density can make the material layer crystallize faster and better.

[0095] In some embodiments, applying the first laser pulse to the first region of the material layer 200 comprises: starting to apply the first laser pulse to the first region of the material layer 200 upon receiving a first control signal.

[0096] After applying the first laser pulse to the first region of the material layer 200, a second laser pulse is applied to the first region of the material layer 200, comprising:

[0097] Starting to apply the second laser pulse to the first region of the material layer 200 upon receiving a second control signal; wherein the time interval between the second control signal and the first control signal ranges from 0μs to 1μs.

[0098] The light source wavelength of the first laser pulse and the second laser pulse can be the same or different. The energy density of the first laser pulse is smaller than that of the second laser pulse, and the control signal needs to be set to adjust the light source parameters.

[0099] In the embodiment of the present disclosure, the switching interval time of the first laser pulse and the second laser pulse is 0μs to 1μs, which can meet the switching of different laser pulses, prevent the temperature drop of the material layer caused by too long waiting time of the laser pulse, and reduce the increase of the transmittance difference between the second sub-region and the first sub-region caused by the temperature drop. It is beneficial to improve the heating uniformity of the ion implantation region, thereby improving the stability of the device.

[0100] In some embodiments, the material of the material layer 200 comprises amorphous silicon.

[0101] The main material of the ion implantation region comprises polysilicon.

[0102] The implantation ions of the ion implantation region comprise phosphorus ions or boron ions.

[0103] The temperature range of the first heat treatment is 600-1200℃.

[0104] The temperature of the second heat treatment is greater than 1200℃.

[0105] It is emphasized that the transmittance of amorphous silicon to laser does not change significantly in the temperature range below the crystallization temperature due to its amorphous form. For example, the transmittance of amorphous silicon to laser with a wavelength of 527 nm is close to 0 at 25-1200℃, while the transmittance of polysilicon to laser with a wavelength of 527 nm gradually decreases with the increase of temperature and reaches 0 at 600℃ and does not change thereafter.

[0106] The temperature range of the first heat treatment can be controlled to be 600-1200℃, in which the transmittance of polysilicon of the material layer 200 is close to 0, and the polysilicon has greater absorbance than that below 600℃, which is beneficial to the absorption of laser pulse energy. Moreover, the transmittance of amorphous silicon in the temperature range of 600-1200℃ is also close to 0, and thus the heating uniformity of the ion implantation region can be improved.

[0107] The crystallization temperature of amorphous silicon is 1200℃, and the temperature of the second heat treatment is greater than 1200℃, which can crystallize amorphous silicon into polysilicon and improve the conductivity.

[0108] In some embodiments, the thickness of the material layer 200 is in the range of 50-500 nm.

[0109] The thickness of the material layer in the embodiments of the present disclosure is in the range of 50-500 nm, which is beneficial to covering the ion implantation region and reducing the resistance to improve the conductivity. Moreover, the phenomenon of reducing the heat treatment efficiency due to the excessive thickness of the material layer can be reduced, the stress at the contact interface between the material layer and the device layer can be reduced, the bending phenomenon of the material layer can be reduced, and the stability of the device is beneficial.

[0110] In some embodiments, S100 comprises the following steps:

[0111] Referring to Figure 5aAs shown, a substrate 100 is provided, including a first surface and a second surface oppositely arranged; a stack structure 110 covering the first surface of the substrate 100 and a channel column 14 penetrating through the stack structure 110 are formed to form a device layer; the stack structure 110 includes insulating layers 112 and conductive layers 111 arranged alternately in sequence, the bottom of the channel column 14 extends into the substrate 100, and along the radial direction of the channel column 14, the channel column 14 includes a channel layer 141 and a functional layer 140, and the functional layer 140 is located between the channel layer 141 and the stack structure 110.

[0112] Exemplarily, the constituent material of the substrate 100 includes elemental semiconductor material (such as silicon, germanium), group III-V compound semiconductor material, group II-VI compound semiconductor material, organic semiconductor material, or other semiconductor material known in the art. In this embodiment, the substrate is a polysilicon material.

[0113] The constituent material of the insulating layer 112 includes silicon oxide, silicon nitride, silicon oxynitride, and the silicon oxide material is preferred in this embodiment of the present disclosure.

[0114] The constituent material of the conductive layer 111 includes monocrystalline silicon, polysilicon, tungsten metal, and the tungsten metal material is preferred in this embodiment of the present disclosure.

[0115] The constituent material of the channel layer 141 includes monocrystalline silicon and polysilicon, and the polysilicon material is preferred in this embodiment of the present disclosure.

[0116] The functional layer 140 is arranged around the channel layer 141, and the functional layer 140 can include a tunneling sublayer 142, a storage sublayer 143, and a barrier sublayer 144. The tunneling sublayer 142 can include silicon oxide, silicon oxynitride, or any combination thereof. The storage sublayer 143 can include silicon nitride, silicon oxynitride, silicon, or any combination thereof. The barrier sublayer 144 can include silicon oxide, silicon oxynitride, high dielectric, or any combination thereof. In this embodiment, the combination of the functional layer 140 is preferably an ONO composite layer of silicon oxide / silicon nitride / silicon oxide.

[0117] An isolation layer 120 can be formed between the stack structure 110 and the substrate 100, the isolation layer 120 is used to isolate the substrate 100 and the stack structure 110, the isolation layer 120 supports the stack structure 110, and can improve the stress distribution between the stack structure 110 and the substrate 100.

[0118] Referring to Figure 5b As shown, the substrate 100 is removed from the second surface of the substrate 100, and the bottom of the channel column 14 and the stack structure 110 are exposed.

[0119] Exemplarily, the removal process of the substrate 100 includes one or any combination of dry etching process, wet etching process, and chemical mechanical polishing process.

[0120] Referring to Figure 5c As shown, the functional layer 140 at the bottom of the exposed channel pillar 14 is removed to expose the channel layer 141; ion implantation is performed on the exposed channel layer 141 to form an ion implantation region.

[0121] For example, the removal process of the functional layer 140 includes one or any combination of dry etching process, wet etching process.

[0122] After the bottom functional layer 140 of the channel pillar 14 is removed, the remaining functional layer 140, the isolation layer 120, and the exposed channel layer 141 form a recess 15 opening to the first surface direction.

[0123] Referring to Figure 5d As shown, a material layer 200 is formed to cover the ion implantation region and the stack structure 110.

[0124] The material layer 200 is composed of amorphous silicon, monocrystalline silicon, or polycrystalline silicon. In the embodiment of the present disclosure, the material layer 200 is amorphous silicon material, which is crystallized into polycrystalline silicon by laser pulse heat treatment after covering the ion implantation region and the stack structure 110, and is electrically connected to the channel layer 141.

[0125] The above is only a specific embodiment of the present disclosure, but the protection scope of the present disclosure is not limited thereto, and any person skilled in the art can easily think of changes or replacements within the technical range disclosed by the present disclosure, which should be covered by the protection scope of the present disclosure. Therefore, the protection scope of the present disclosure should be subject to the protection scope of the claims.

Claims

1. A method for manufacturing a memory, characterized in that, include: A structure to be processed is provided; wherein the structure to be processed includes a material layer and a device layer stacked together, and the device layer includes an ion implantation region covered by the material layer; The first region of the material layer is subjected to a first heat treatment; After performing a first heat treatment on a first region of the material layer, a second heat treatment is performed on the first region of the material layer to heat the first region of the material layer and the ion implantation region; wherein the temperature range of the second heat treatment is greater than the temperature range of the first heat treatment; After performing a second heat treatment on the first region of the material layer, the first heat treatment is performed on the second region of the material layer; wherein, the second region of the material layer includes a first sub-region overlapping with the first region of the material layer, and a second sub-region arranged parallel to the first region; the first heat treatment performed on the second region is used to reduce the difference between the transmittance of the second sub-region and the transmittance of the first sub-region; After performing the first heat treatment on the second region of the material layer, a second heat treatment is performed on the second region of the material layer to heat the second region of the material layer and the ion implantation region.

2. The method according to claim 1, characterized in that, The first heat treatment of the first region of the material layer includes: applying a first laser pulse to the first region of the material layer; The second heat treatment of the first region of the material layer includes: applying a second laser pulse to the first region of the material layer to heat the first region of the material layer and the ion implantation region; wherein the energy density of the second laser pulse is greater than the energy density of the first laser pulse; Before the second region is subjected to the first heat treatment, the transmittance of the first sub-region is greater than that of the second sub-region; the first heat treatment of the second region of the material layer includes: applying the first laser pulse to the first sub-region and the second sub-region of the second region of the material layer to reduce the transmittance of the first sub-region; The second heat treatment of the second region of the material layer includes: applying the second laser pulse to the second region of the material layer.

3. The method according to claim 2, characterized in that, The method is applied to a laser processing device including a laser source, wherein after performing a second heat treatment on a first region of the material layer, performing the first heat treatment on a second region of the material layer includes: After applying the second laser pulse to a first region of the material layer, the laser source is controlled to move from a first position to a second position; wherein the laser pulse emitted by the laser source located at the first position covers the first region of the material layer; When the laser source moves to the second position, it is controlled to emit the first laser pulse; wherein the laser pulse emitted by the laser source located at the second position covers the second region of the material layer.

4. The method according to claim 3, characterized in that, The laser pulse emitted by the laser source has a square spot, and the distance between the first position and the second position is greater than zero and less than the side length of the spot.

5. The method according to claim 2, characterized in that, The wavelength range of the first laser pulse is 308nm to 527nm; The laser wavelength range of the second laser pulse is 308nm to 527nm.

6. The method according to claim 2, characterized in that, The energy density of the first laser pulse is less than or equal to 400 mJ / cm². 2 ; The energy density of the second laser pulse is greater than or equal to 650 mJ / cm². 2 .

7. The method according to claim 2, characterized in that, Applying a first laser pulse to a first region of the material layer includes: starting to apply the first laser pulse to the first region of the material layer upon receiving a first control signal; The step of applying a second laser pulse to the first region of the material layer after applying the first laser pulse includes: Upon receiving the second control signal, the second laser pulse is applied to the first region of the material layer; wherein the time interval between the second control signal and the first control signal is in the range of 0 μs to 1 μs.

8. The method according to claim 1, characterized in that, The material layer is composed of amorphous silicon; The bulk material of the ion implantation region includes polycrystalline silicon; The implanted ions in the ion implantation region include: phosphorus ions or boron ions; The temperature range for the first heat treatment is 600℃ to 1200℃; The temperature of the second heat treatment is greater than 1200℃.

9. The method according to claim 1, characterized in that, The thickness of the material layer ranges from 50 nm to 500 nm.

10. The method according to claim 1, characterized in that, The provided structure to be processed includes: A substrate is provided; wherein the substrate includes a first surface and a second surface disposed opposite to each other; A stacked structure covering the first surface of the substrate and a channel pillar penetrating the stacked structure are formed to form the device layer; wherein the stacked structure includes an insulating layer and a conductive layer alternately stacked in sequence, the bottom of the channel pillar extends into the substrate, and along the radial direction of the channel pillar, the channel pillar includes a channel layer and a functional layer, the functional layer being located between the channel layer and the stacked structure; Remove the substrate from the second surface of the substrate to expose the bottom of the channel pillars and the stacked structure; Remove the functional layer at the bottom of the exposed channel column to expose the channel layer; Ion implantation is performed on the exposed channel layer to form the ion implantation region; The material layer is formed covering the ion implantation region and the stacked structure.

Images