Variable gain power amplifier

Abstract

This invention relates to a variable gain power amplifier. In the described example, the variable gain power amplification technique includes: generating a first oscillation signal (400) using a network of one or more reactive components included in an oscillator; and outputting a second oscillation signal (402) via one or more taps included in the network of reactive components. The second oscillation signal has an amplitude that is proportional to and smaller than that of the first oscillation signal. The power amplification technique further includes selecting one of the first and second oscillation signals to generate a power-amplified output signal (404), and amplifying the selected one of the first and second oscillation signals to generate the power-amplified output signal (406).

Description

[0001] This application is a divisional application of Chinese Patent Application 201680038816.0, filed June 30, 2016, entitled "Variable Gain Power Amplifier." TECHNICAL FIELD

[0002] The present invention relates generally to circuits, and more specifically to power amplifiers. BACKGROUND

[0003] Transceivers are used in a wide variety of applications, such as, for example, mobile telephones, radios, and wireless communications. Transceivers can use power amplifiers to increase the power of signals driving an antenna so that the power of the signals is strong enough to reach relatively long distances. Many types of transceiver applications can be power-limited and / or area-limited. For example, mobile telephone radios can use batteries with a limited amount of power, and can have a limited amount of space for transceiver components. Designing power amplifiers for low-power, low-area transceivers can present significant challenges. SUMMARY

[0004] In described examples, an integrated circuit includes an oscillator and a power amplifier. The oscillator includes a first node, a second node, and a network of one or more reactive components coupled between the first node and the second node. The network of reactive components has at least one tap between the first node and the second node. The oscillator further includes a first output coupled to the network of reactive components via the second node, and a second output coupled to the network of reactive components via the tap. The power amplifier includes a first input coupled to the first output of the oscillator, a second input coupled to the second output of the oscillator, and an output.

[0005] According to further examples, an integrated circuit includes a voltage-controlled oscillator (VCO) having one or more reactive components. The integrated circuit further includes a programmable passive attenuation circuit coupled to the VCO. The programmable passive attenuation circuit includes at least a portion of the one or more reactive components included in the VCO. The integrated circuit further includes a power amplifier coupled to the programmable passive attenuation circuit.

[0006] According to additional examples, a method includes generating a first oscillation signal with a network of one or more reactive components included in a voltage controlled oscillator (VCO). The method further includes outputting a second oscillation signal via one or more taps included in the network of reactive components. The second oscillation signal has a magnitude that is proportional to and less than the first oscillation signal. The method further includes selecting one of the first oscillation signal and the second oscillation signal for use in generating a power amplified output signal based on a gain control. The method further includes generating the power amplified output signal based on the selected one of the first oscillation signal and the second oscillation signal. BRIEF DESCRIPTION OF DRAWINGS

[0007] Figure 1 is a block diagram illustrating an example transmitter according to the present disclosure.

[0008] Figure 2 and Figure 3 is an example transmitter according to the present disclosure. Figure 1 is a block diagram of an example transmitter according to the present disclosure in which an example power amplifier is shown in more detail.

[0009] Figure 4 and Figure 5 is an example transmitter according to the present disclosure. Figure 1 is a block diagram of an example transmitter according to the present disclosure in which an example power amplifier is shown in more detail.

[0010] Figure 6 is a schematic diagram illustrating an example network of reactive components that can be used in an example oscillator of the present disclosure.

[0011] Figure 7 is a schematic diagram illustrating an example oscillator according to the present disclosure incorporating Figure 6 an example network of reactive components.

[0012] Figure 8 is a schematic diagram illustrating another example network of reactive components that can be used in an example oscillator of the present disclosure.

[0013] Figure 9 is a schematic diagram of an example network of reactive components and switching circuitry that can be used in an example transmitter of the present disclosure.

[0014] Figure 10 is a schematic diagram illustrating another example network of reactive components that can be used in an example oscillator of the present disclosure.

[0015] Figure 11 is a schematic diagram illustrating an example oscillator according to the present disclosure incorporating Figure 10 an example network of reactive components.

[0016] Figure 12is a schematic diagram illustrating another example network of reactive components that can be used in an example oscillator of the present disclosure.

[0017] Figures 13-15 is a schematic diagram illustrating an example amplifier stage that can be used in a power amplifier of the present disclosure.

[0018] Figures 16-20 is a block diagram illustrating an additional example transmitter according to the present disclosure.

[0019] Figure 21 is a flowchart illustrating an example technique for amplifying signal power according to the present disclosure.

[0020] Figure 22 and Figure 23 is a schematic diagram illustrating an additional example network of reactive components that can be used in an example oscillator of the present disclosure. DETAILED DESCRIPTION

[0021] The present disclosure describes variable gain power amplifiers that can be used to amplify signals in a transmitter and / or transceiver. In some examples, a power amplifier can include an oscillator that includes a network of one or more reactive components. The network of reactive components can include one or more taps that allow different voltages to appear across different portions of the network of reactive components. The power amplifier can receive the different voltages and selectively amplify one or more of the different voltages to obtain an output signal of the power amplification.

[0022] Selectively amplifying different voltages that appear across different portions of a network of reactive components in an oscillator can allow the gain of a power amplifier to be adjusted, which in turn can allow the output power of the amplifier to be adjusted based on dynamic power requirements of a transmitter. Allowing the output power of the amplifier to be adjusted based on dynamic power requirements of a transmitter can allow the overall power consumption of the transmitter or transceiver to be reduced. By using one or more taps of a network of reactive components included in an oscillator to obtain the different voltages that are selectively amplified, the amount of components needed to obtain the different voltages can be reduced. In this way, a relatively low power amplifier with variable gain can be obtained with a relatively small number of components.

[0023] In some examples, the network of one or more reactive components can include one or more inductors coupled in series. In such examples, a first voltage can be obtained across a first portion of the inductors, and a second voltage can be obtained across a second portion of the inductors. The second portion can be a subset of the first portion. In further examples, the network of reactive components can include one or more capacitors coupled in series. Other examples are possible and within the scope of the present disclosure.

[0024] In some examples, to selectively amplify the plurality of voltages, the power amplifier can select one of the voltages based on the gain control and amplify the selected voltage using a plurality of amplifier stages. In further examples, to selectively amplify the plurality of voltages, the power amplifier can amplify each of the voltages in a separate amplifier signal chain and then select one of the amplified voltages based on the gain control.

[0025] In some examples, the power amplifier can include a plurality of gain controls. For example, the power amplifier can include a coarse gain control that controls which oscillator voltage is selected for use in generating the output signal of the power amplification and a fine gain control that controls the gain of one or both of the plurality of amplifier stages that amplify the selected oscillator voltage. In some examples, the fine gain control can provide a continuous gain control function, but where the range of gain values for which the gain control function is linear can be relatively small. Meanwhile, the coarse gain control function can be linear over a relatively large range of gain values, but can be a discrete function with discrete gain steps.

[0026] Providing both a coarse gain control and a fine gain control can allow the gain of the power amplifier to be finely tuned over a wide range of gain values. In this way, a power amplifier can be implemented that has relatively high precision gain control over a relatively large range of output power settings.

[0027] In some examples, one or more of the amplifier stages in the power amplifier can include a differential self-biased amplifier. The differential self-biased amplifier can include a first variable resistance coupled between a power supply and source terminals of one or more pull-up transistors and a second variable resistance coupled between a ground rail and source terminals of one or more pull-down transistors.

[0028] Increasing the variable resistance can increase the even harmonic rejection of the amplifier stage, but decrease the gain of the amplifier stage. Decreasing the variable resistance can have the opposite effect. Thus, by positioning the variable resistance at the above-described locations in the differential self-biased amplifier, the tradeoff between even harmonic rejection and amplifier gain can be dynamically adjusted and balanced in the power amplifier.

[0029] In further examples, one or more of the amplifier stages in the power amplifier can be configured to operate in a self-biased mode and a non-linear mode. The self-biased mode can provide greater linearity than the non-linear mode, but the self-biased mode can be less power efficient. On the other hand, the non-linear mode can be more power efficient, but provide less linearity. By providing amplifier stages that are configurable to operate in the self-biased mode and the non-linear mode, the tradeoff between linearity and power efficiency can be dynamically adjusted and balanced in the power amplifier.

[0030] In additional examples, the power amplifier can be a multi-stage amplifier, where each stage includes a single-ended or differential self-biased amplifier. Each stage can further include an independently adjustable power rail voltage. Adjusting the power rail voltage of a particular amplifier stage can cause the self-biased amplifier in that stage to be biased at a different bias current, which in turn can adjust the gain of the self-biased amplifier. Thus, by using independently adjustable power rail voltages for different self-biased amplifier stages, a multi-stage power amplifier with stage-independent gain adjustment can be implemented with a relatively small number of circuit components.

[0031] Figure 1 is a block diagram illustrating an example transmitter 10 according to the present disclosure. The transmitter 10 includes an oscillator 12, a power amplifier 14, a matching network 16, an antenna 18, connections 20, 22, 24, 28, and a gain control lead 26. A first output of the oscillator 12 is coupled to a first input of the power amplifier 14 by a connection 20. A second output of the oscillator 12 is coupled to a second input of the power amplifier 14 by a connection 22. A gain control input of the power amplifier 14 is coupled to the gain control lead 26. An output of the power amplifier 14 is coupled to an input of the matching network 16 by a connection 24. An output of the matching network 16 is coupled to an input of the antenna 18 by a connection 28.

[0032] Each of the connections 20, 22, 24, 28 can be a single-ended connection or a differential connection, and can include one or more leads forming the connection. A single-ended connection can be implemented as a single lead. A differential connection can be implemented with a pair of differential leads.

[0033] The oscillator 12 produces a first oscillating signal at a first output of the oscillator 12 and a second oscillating signal at a second output of the oscillator 12. The second oscillating signal can be an attenuated version of the first oscillating signal. The oscillating signals can be single-ended signals or differential signals. The power amplifier 14 receives the oscillating signals at first and second inputs of the power amplifier 14, respectively, and produces a power amplified output signal at an output of the power amplifier 14 based on the oscillating signals. To produce the power amplified output signal, the power amplifier 14 can select one of the oscillating signals, produce an amplified version of the selected one of the oscillating signals, and output the amplified version of the selected one of the oscillating signals as the power amplified output signal. The power amplifier 14 can produce the amplified version of the selected one of the oscillating signals with a gain that is determined based on a gain control signal received at a gain control input of the power amplifier 14. The matching network 16 receives the power amplified output signal at an input of the matching network 16 and converts the power amplified output signal to produce a converted power amplified output signal at an output of the matching network 16. The matching network 16 can have an input impedance designed to substantially match an output impedance of the power amplifier 14, and an output impedance that substantially matches an impedance of the antenna 18. The antenna 18 receives the converted power amplified output signal from the matching network 16 and radiates the signal as electromagnetic radiation.

[0034] To produce the oscillating signals at the first and second outputs of the oscillator 12, the oscillator 12 can include a network of one or more reactive components (referred to herein as a reactive component network). The reactive component network can have a first node connected to a first end of the network, a second node connected to a second end of the network, and one or more taps connected at respective locations between the first and second nodes.

[0035] In some examples, the oscillator 12 can produce the first oscillating signal based on a voltage at one or both of the first and second nodes, and produce the second oscillating signal based on a voltage at the one or more taps. In examples in which the oscillating signals are differential signals, the reactive component network can have at least two taps located at two different locations between the first and second nodes. In such examples, the first oscillating signal can correspond to a voltage between the first and second nodes, and the second oscillating signal can correspond to a voltage between the first and second taps.

[0036] A reactance component network may include one or more reactance components (e.g., inductors or capacitors). If the reactance component network includes more than one reactance component, the reactance components may be coupled in series. In either case, a portion of one or more reactance components between the first tap and the second tap may be a subset of the portion of the reactance components between the first node and the second node. Therefore, the reactance (e.g., inductance or capacitance) between the first tap and the second tap may be less than the reactance between the first node and the second node. Therefore, a second oscillation signal corresponding to the voltage obtained between the first tap and the second tap may be a decayed version of a first oscillation signal corresponding to the voltage obtained between the first node and the second node. The second oscillation signal may be a decayed form of the first oscillation signal in the sense that the amplitude of the second oscillation signal is proportional to but less than that of the first oscillation signal.

[0037] In examples where the oscillation signal is a single-ended signal, in some examples, the first oscillation signal may correspond to the voltage between one of the nodes of oscillator 12 and a reference voltage, and in such examples, the second oscillation signal may correspond to the voltage between one of the taps of oscillator 12 and a reference voltage. In some examples, the first node may be coupled to a ground rail or a power rail and used as a reference voltage. In such examples, the first oscillation signal may correspond to the voltage between the first node and a second node, and in such examples, the second oscillation signal may correspond to the voltage between one of the taps and the first node.

[0038] A portion of one or more reactive components between the tap and the first node can be a subset of the portion of the reactive components between the first node and the second node. Therefore, the reactance (e.g., inductance or capacitance) between the tap and the first node can be smaller than the reactance between the first node and the second node. Consequently, the second oscillation signal corresponding to the voltage obtained between the tap and the first node can be a damped version of the first oscillation signal corresponding to the voltage obtained between the first node and the second node.

[0039] Oscillator 12 can generate a first oscillation signal and a second oscillation signal based on a control signal. For example, oscillator 12 can be a voltage-controlled oscillator (VCO), and the control signal can be a voltage signal. In some cases, transmitter 10 can generate the control signal based on the data to be transmitted. In such examples, oscillator 12 can use the control signal to frequency modulate and / or phase modulate the oscillation signals at the first and second outputs of oscillator 12 based on the data to be transmitted. In other words, in such examples, each oscillation signal can be a frequency-modulated (FM) or phase-modulated (PM) signal. In some examples, the oscillation signal can be a voltage signal.

[0040] In some examples, power amplifier 14 may include a single amplifier signal chain. In such examples, in order to generate a power-amplified output signal, power amplifier 14 may select one of the oscillating signals, amplify the selected signal in the oscillating signals through a single amplifier signal chain, and output the amplified version of the selected signal in the oscillating signals as the power-amplified output signal.

[0041] In a further example, power amplifier 14 may include multiple amplifier signal chains. In such an example, to generate a power-amplified output signal, power amplifier 14 may amplify each oscillation signal through a corresponding amplifier signal chain and select one of the amplified versions of the oscillation signal to output as the power-amplified output signal.

[0042] The gain control signal can control the gain of the power amplifier 14. In some examples, the power amplifier 14 may include a selection unit that selects one of the oscillation signals output by the oscillator 12 or an amplified version of one of the oscillation signals for use in producing a power-amplified output signal. In such examples, the gain control signal may be coupled to a control input of the selection unit, and the selection unit may select one of the signals based on the gain control signal.

[0043] In some examples, the gain control signal may include multiple signal components. For example, the gain control signal may include a first gain control signal component and a second gain control signal component. The first gain control signal component may be coupled to the control input of the selection unit and control the gain (e.g., attenuation) provided by the selection unit, and the second gain control signal component may be coupled to one or more amplifier stages in the power amplifier 14 and control the gain provided by one or more amplifier stages.

[0044] Power amplifier 14 can be a single-stage amplifier or a multi-stage amplifier. A single-stage amplifier can have a single amplifier stage, and a multi-stage amplifier can have multiple amplifier stages. In an example where power amplifier 14 is a multi-stage amplifier and the gain control signal includes gain control signal components coupled to the amplifier stages, the gain control signal components can include multiple gain control signal sub-components, each coupled to a corresponding stage of the multi-stage amplifier. Each gain control signal sub-component can adjust and control the gain of a corresponding stage in the multi-stage amplifier. In such examples, the gain of each gain stage in the multi-stage amplifier can be adjusted independently.

[0045] In examples where the power amplifier 14 includes multiple amplifier signal chains, each amplifier signal chain can be a single-stage amplifier signal chain or a multi-stage amplifier signal chain. In examples where the multiple amplifier signal chains are multi-stage amplifier signal chains, in some examples, the corresponding amplifier stage in each amplifier signal chain can be controlled based on the same gain control signal sub-component of the gain control signal. In other examples, the gain of the corresponding amplifier stage can be independently programmable.

[0046] In an additional example, power amplifier 14 can be a multi-stage amplifier, where each stage includes a single-ended or differential self-biased amplifier. Each stage can further have an independently adjustable power rail voltage. Adjusting the power rail voltage for a particular amplifier stage can cause the self-biased amplifier in that stage to be biased at different bias currents, which in turn can adjust the gain of the self-biased amplifier. Therefore, by using independently adjustable power rail voltages for different self-biased amplifier stages, a multi-stage power amplifier with stage-independent gain adjustment can be implemented using a relatively small number of circuit components.

[0047] In some examples, the adjustable power rail voltage can be supplied by one or more adjustable power sources. For example, the adjustable power source can be an adjustable voltage regulator, such as an adjustable low-dropout regulator (LDO). The voltage regulator and / or LDO can be adjustable in the sense that the regulator and / or LDO can output a voltage level determined based on the control input.

[0048] In an example where one or more amplifier stages in power amplifier 14 are powered by one or more adjustable power supplies, a control input for each adjustable power supply can be coupled to a corresponding gain control signal subcomponent of the gain control signal. In such examples, the amplifier stages can be configured to have a gain determined based on the power supply output level (e.g., voltage level).

[0049] In examples where the gain control signal comprises multiple signal components, the power amplifier 14 can be considered to include multiple gain controls. For example, the power amplifier 14 may include: coarse gain control that controls which oscillation signal is selected to generate the power-amplified output signal; and fine gain control that controls the gain of one or more amplifier stages in a multi-stage amplifier that amplifies the selected oscillator voltage. In some examples, the fine gain control may provide a continuous gain control function, but the range of gain values ​​for which the gain control function is linear may be relatively small. Meanwhile, the coarse gain control function may be linear over a relatively large range of gain values, but may be a discrete function with discrete gain steps.

[0050] Providing both coarse and fine gain control allows for fine tuning of the power amplifier 14's gain over a wide gain value range. In this way, a power amplifier with relatively high-precision gain control can be achieved over a relatively large output power setting range.

[0051] In some examples, one or more amplifier stages in power amplifier 14 may be differential self-biased amplifier stages. A differential self-biased amplifier stage may include: a first variable resistor coupled between a power supply and the source terminals of one or more pull-up transistors; and a second variable resistor coupled between a ground rail and the source terminals of one or more pull-down transistors.

[0052] Adding a variable resistor can increase even-harmonic suppression in the amplifier stage, but decrease the amplifier stage gain. Reducing the variable resistor can have the opposite effect. Therefore, by positioning the variable resistor at the aforementioned location in the differential self-biased amplifier, the trade-off between even-harmonic suppression and amplifier gain can be dynamically adjusted and balanced in the power amplifier 14.

[0053] In some examples, power amplifier 14 may include a differential self-biased amplifier stage with one or more variable resistors as described in the previous examples, wherein the amplifier stage is also powered by an adjustable supply (e.g., an adjustable LDO). In such examples, coarse gain control may be coupled to the variable resistors, and fine gain control may be coupled to the adjustable supply.

[0054] In a further example, one or more amplifier stages in power amplifier 14 can be configured to operate in both self-biased and nonlinear modes. Self-biased mode can provide greater linearity than nonlinear mode, but may be less power efficient. On the other hand, nonlinear mode may be more power efficient, but provides less linearity. By providing amplifier stages configurable to operate in both self-biased and nonlinear modes, the trade-off between linearity and power efficiency can be dynamically adjusted and balanced within power amplifier 14.

[0055] Matching network 16 may include any components configured to provide impedance matching between power amplifier 14 and antenna 18. In some examples, matching network 16 may include one or more inductors or capacitors configured such that the output impedance of matching network 16 matches the impedance of antenna 18, and the input impedance of matching network 16 matches the output impedance of power amplifier 14. Antenna 18 may be any type of antenna configured to transmit electromagnetic signals to a remote device.

[0056] Power amplifier 14 can selectively amplify the oscillation signal output from oscillator 12 to produce a power-amplified output signal. Each oscillation signal can correspond to a different voltage appearing across different portions of the reactive component network included in oscillator 12. Selectively amplifying the different voltages appearing across different portions of the reactive component network of oscillator 12 allows adjustment of the gain of power amplifier 14, which in turn allows adjustment of the output power of power amplifier 14 based on the dynamic power requirements of transmitter 10. Allowing adjustment of the output power of power amplifier 14 based on dynamic power requirements allows for a reduction in the overall power consumption of power amplifier 14. By using one or more taps of the reactive component network included in oscillator 12 to obtain different voltages selectively amplified by power amplifier 14, the number of components required to obtain different voltages can be reduced. In this way, a relatively low-power amplifier with variable gain can be obtained using a relatively small number of components.

[0057] Figure 2 yes Figure 1 A block diagram of an example transmitter 10 is shown, wherein an example oscillator 12 is shown in more detail according to this disclosure. Figure 2 In this configuration, the first and second outputs of oscillator 12 are single-ended outputs that generate single-ended output signals. Oscillator 12 includes an oscillator circuit system 32, which includes a reactance component network 34. The reactance component network 34 includes a node 36 connected to a first end of the reactance component network 34 and a node 38 connected to a second end of the reactance component network 34. The reactance component network 34 also includes taps 40 coupled to reactance components in the reactance component network 34 between the first and second ends.

[0058] Node 38 is coupled to the first input terminal of power amplifier 14 via wire 42, and tap 40 is coupled to the second input terminal of power amplifier 14 via wire 44. Node 38 may be coupled to the first output terminal of oscillator 12 and / or form the first output terminal of oscillator 12, and tap 40 may be coupled to the second output terminal of oscillator 12 and / or form the second output terminal of oscillator 12. Figure 2 The wires 42 and 44 in the diagram can respectively correspond to Figure 1 Connect 20 and 22 in the middle.

[0059] During operation, oscillator 12 generates a first oscillation signal at a first output terminal and a second oscillation signal at a second output terminal. The second oscillation signal may be a damped version of the first oscillation signal. In some examples, the first oscillation signal may correspond to the voltage between node 38 and a reference voltage, and the second oscillation signal may correspond to the voltage between tap 40 and the reference voltage. In a further example, node 36 may be coupled to a ground rail or a power rail and used as a reference voltage. In such examples, the first oscillation signal may correspond to the voltage between node 36 and node 38, and the second oscillation signal may correspond to the voltage between tap 40 and node 36.

[0060] In some examples, Figure 2 The transmitter 10 can be implemented on an integrated circuit. The integrated circuit may include an oscillator 12 having nodes 36 and 38 and a network 34 of reactance components (i.e., a network of one or more reactance components) coupled between nodes 36 and 38. The reactance component network 34 may have at least one tap 40 between nodes 36 and 38. The oscillator 12 may further include a first output coupled to the reactance component network 34 via node 38 and a second output coupled to the reactance component network 34 via tap 40. The integrated circuit may further include a power amplifier 14 having a first input coupled to the first output of the oscillator 12, a second input coupled to the second output of the oscillator 12, and an output.

[0061] In some examples, node 36 of oscillator 12 is at least one of a power rail or a ground rail for oscillator 12. In such examples, the reactance component network 34 includes one or more inductors series coupled between nodes 36 and 38 of oscillator 12. In such examples, tap 40 is coupled to one or more inductors, and the inductance between nodes 36 and 38 of oscillator 12 is greater than the inductance between tap 40 of reactance component network 34 and node 36 of oscillator 12.

[0062] In an additional example where node 36 of oscillator 12 is for at least one of a power rail or a ground rail of oscillator 12, the reactance component network 34 includes one or more capacitors series coupled between nodes 36 and 38 of oscillator 12. In such an example, tap 40 is coupled to one or more capacitors, and the capacitance between nodes 36 and 38 of oscillator 12 is greater than the capacitance between tap 40 of reactance component network 34 and node 36 of oscillator 12.

[0063] Figure 3 yes Figure 1A block diagram of an example transmitter 10 is shown, wherein another example oscillator 12 is shown in more detail according to this disclosure. Figure 3 As shown, the oscillator 12 includes an oscillator circuit system 52, which is similar to... Figure 2 The oscillator circuit system 32 differs in that: (1) node 36 is coupled to power amplifier 14 via wire 56, (2) the reactance component network 34 includes an additional tap 54 between node 36 and node 38, and (3) the tap 54 is coupled to power amplifier 14 via wire 58. Figure 2 The oscillator circuit system 32 and Figure 3 The same or similar components between the oscillator circuit system 52 have been numbered using the same reference numerals.

[0064] exist Figure 3 In this configuration, the first and second output terminals of oscillator 12 are differential output terminals that generate differential output signals. Specifically, nodes 36 and 38 can form the first differential output terminal, and taps 40 and 54 can form the second differential output terminal. Similarly, the first and second input terminals of power amplifier 14 can be differential input terminals. The first differential output terminal of oscillator 12 is coupled to the first differential input terminal of power amplifier 14 via wires 42 and 56. The second differential output terminal of oscillator 12 is coupled to the second differential input terminal of power amplifier 14 via wires 44 and 58. Figure 3 Wires 42 and 56 in the diagram can together correspond to Figure 1 Connection 20 in the middle. Similarly, Figure 3 Wires 44 and 58 in the diagram can together correspond to... Figure 1 Connection 22 in the middle.

[0065] During operation, oscillator 12 generates a first differential oscillation signal at its first output terminal and a second differential oscillation signal at its second output terminal. The second differential oscillation signal may be a damped version of the first differential oscillation signal. The first differential oscillation signal may correspond to the voltage between nodes 36 and 38, and the second differential oscillation signal may correspond to the voltage between taps 54 and 40 of the reactance component network 34.

[0066] In some examples, Figure 3The transmitter 10 can be implemented on an integrated circuit. The integrated circuit may include an oscillator 12 having nodes 36 and 38, and a reactive component network 34 coupled between nodes 36 and 38. The reactive component network 34 may have taps 40 and 54 between nodes 36 and 38. The oscillator 12 may further include a first output coupled to the reactive component network 34 via nodes 36 and 38, and a second output coupled to the reactive component network 34 via taps 40 and 54. The integrated circuit may further include a power amplifier 14 having a first input coupled to the first output of the oscillator 12, a second input coupled to the second output of the oscillator 12, and an output.

[0067] In some examples, the reactor component network 34 may have taps 40 and 54 coupled between nodes 36 and 38. In such examples, the first output of the oscillator 12 is a first differential output having a first terminal coupled to the reactor component network 34 via node 36 and a second terminal coupled to the reactor component network 34 via node 38. In such examples, the second output of the VCO is a second differential output having a first terminal coupled to the reactor component network 34 via tap 54 and a second terminal coupled to the reactor component network 34 via tap 40.

[0068] In a further example, the reactance component network 34 includes one or more inductors series coupled between nodes 36 and 38 of the oscillator 12, and taps 40 and 54 are coupled to one or more inductors. In this example, the inductance between the first and second terminals of the first differential output of the oscillator 12 is greater than the inductance between the first and second terminals of the second differential output of the oscillator 12.

[0069] In an additional example, the reactance network 34 includes one or more capacitors series coupled between nodes 36 and 38 of the oscillator 12, and taps 40 and 54 are coupled to one or more capacitors. In this example, the capacitance between the first and second terminals of the first differential output of the oscillator 12 is greater than the capacitance between the first and second terminals of the second differential output of the oscillator 12.

[0070] exist Figure 2 and Figure 3In the transmitter 10, the oscillator 12 can output multiple oscillation signals, and the power amplifier 14 can selectively amplify the oscillation signals to generate a power-amplified output signal. Each oscillation signal can correspond to a different voltage appearing across different portions of the reactive component network included in the oscillator 12. Selectively amplifying the different voltages appearing across different portions of the reactive component network in the oscillator 12 allows adjustment of the gain of the power amplifier 14, which in turn allows adjustment of the output power of the power amplifier 14 based on the dynamic power requirements of the transmitter 10. Allowing adjustment of the output power of the power amplifier 14 based on dynamic power requirements allows for a reduction in the overall power consumption of the power amplifier 14. By using one or more taps of the reactive component network included in the oscillator 12 to obtain different voltages selectively amplified by the power amplifier 14, the number of components required to obtain different voltages can be reduced. In this way, a relatively low-power amplifier with variable gain can be obtained using a relatively small number of components.

[0071] Figure 4 yes Figure 1 A block diagram of an example transmitter 10 is provided, wherein an example power amplifier 14 is shown in more detail according to this disclosure. The power amplifier 14 includes: a selection circuit 60, amplifier stages 62, 64, adjustable power supplies 66, 68, connections 70, 72, power lines 74, 76, and gain control wires 78, 80, 82. A first input terminal of the selection circuit 60 is coupled to a first output terminal of an oscillator 12 via connection 20. A second input terminal of the selection circuit 60 is coupled to a second output terminal of the oscillator 12 via connection 22. The output terminal of the selection circuit 60 is coupled to an input terminal of amplifier stage 62 via connection 70. The output terminal of amplifier stage 62 is coupled to an input terminal of amplifier stage 64 via connection 72. The output terminal of amplifier stage 64 is coupled to an input terminal of a matching network 16 via connection 24.

[0072] The output of amplifier stage 64 can be coupled to the output of power amplifier 14 and / or form the output of power amplifier 14. The first and second inputs of selection circuit 60 can be coupled to the first and second inputs of power amplifier 14 respectively and / or form the first and second inputs of power amplifier 14.

[0073] The output of adjustable power supply 66 is coupled to the power input of amplifier stage 62 via power line 74. The output of adjustable power supply 68 is coupled to the power input of amplifier stage 64 via power line 76. The control input of selection circuit 60 is coupled to gain control line A 78. The control input of amplifier stage 62 is coupled to gain control line B 80. The control input of amplifier stage 64 is coupled to gain control line C 82. Gain control lines 78, 80, and 82 can collectively correspond to... Figures 1-3 The gain control wire 26 is shown.

[0074] Connections 20, 22, 24, 28, 70, and 72 can be single-ended or differential connections. When connections 20 and 22 are single-ended connections, in some examples, oscillator 12 can correspond to... Figure 2 The oscillator 12 in the middle, and the connections 20 and 22 can correspond to Figure 2 Wires 42 and 44. When the connections 20 and 22 of oscillator 12 are differential connections, in some examples, oscillator 12 can correspond to Figure 3 The oscillator 12 in the middle, and the connections 20 and 22 can correspond to Figure 3 The wires are 42, 44, 56, and 58.

[0075] During operation, selection circuit 60 receives oscillation signals from oscillator 12 via connections 20 and 22, selects one of the oscillation signals based on gain control signal A to generate a power amplified signal, and outputs the selected signal at connection 70. Amplifier stage 62 receives the selected signal via connection 70, amplifies the selected signal using the gain determined by gain control signal B, and outputs the amplified signal at connection 72. Amplifier stage 64 receives the amplified signal from amplifier stage 62 via connection 72, amplifies the signal using the gain determined by gain control signal C, and outputs the amplified signal at connection 24 as the power amplified signal for power amplifier 14.

[0076] Adjustable power supply 66 can supply power to amplifier stage 62 via power line 74. Similarly, adjustable power supply 68 can supply power to amplifier stage 64 via power line 76. Adjustable power supply 66 can generate an output power level (e.g., a voltage level) based on a gain control signal B, and adjustable power supply 68 can generate an output power level (e.g., a voltage level) based on a gain control signal C. In some examples, one or both of adjustable power supplies 66 and 68 can be an adjustable voltage regulator, such as an adjustable LDO. Amplifier stage 62 can amplify a selected signal based on a gain determined by the output power level generated by adjustable power supply 66. Amplifier stage 64 can amplify its input signal based on a gain determined by the output power level generated by adjustable power supply 68.

[0077] like Figure 4As shown, the power amplifier 14 includes a selection circuit 60 having: (1) a first input terminal coupled to a first input terminal of the power amplifier 14, (2) a second input terminal coupled to a second input terminal of the power amplifier 14, and (3) an output. The power amplifier 14 also includes an amplifier stage 62 having: (1) an input terminal coupled to the output terminal of the selection circuit 60, and (2) an output terminal. The power amplifier 14 also includes an amplifier stage 64 having: (1) an input terminal coupled to the output terminal of the amplifier stage 62, and (2) an output terminal. The selection circuit 60 has a control input terminal coupled to the gain control A wire 78.

[0078] Amplifier stages 62 and 64 can be implemented using any combination of amplifier stages described in this disclosure or by utilizing other types of amplifier stages. In some examples, amplifier stages 62 and 64 can be implemented using... Figure 13 The amplifier stage shown implements amplifier stage 62, and can utilize Figure 14 The amplifier stage shown is used to implement amplifier stage 64.

[0079] In some examples, each of the amplifier stages 62, 64 in power amplifier 14 may include a single-ended or differential self-biased amplifier (e.g., a self-biased inverter). Each of the amplifier stages 62, 64 may also have independently adjustable power rail voltages provided by adjustable power supplies 66, 68, respectively. Adjusting the power rail voltage for a particular amplifier stage allows the self-biased amplifier in that stage to be biased at different bias currents, which in turn adjusts the gain of the self-biased amplifier. Therefore, by using independently adjustable power rail voltages for different self-biased amplifier stages, multi-stage power amplifiers with stage-independent gain adjustment can be implemented using a relatively small number of circuit components.

[0080] In some examples, the gain control signal A can be coarse gain control, which selects which oscillator voltage to use for generating the power amplified output signal. In such examples, the gain control signals B and C can together form fine gain control, which controls the gain of amplifier stages 62, 64 in the multi-stage power amplifier 14. In some examples, fine gain control can provide a continuous gain control function, but the range of gain values ​​for which the gain control function is linear may be relatively small. Meanwhile, the coarse gain control function can be linear over a relatively large range of gain values, but may be a discrete function with discrete gain steps.

[0081] Providing both coarse and fine gain control allows for precise tuning of the power amplifier's gain over a wide gain range. This enables the development of power amplifiers with relatively high gain control over a relatively large output power setting range.

[0082] Figure 5 yes Figure 1 A block diagram of an example transmitter 10 is shown, wherein another example power amplifier 14 is shown in more detail according to this disclosure. The power amplifier 14 includes: amplifier stages 84, 86, 88, 90; selection circuitry 92; adjustable power supplies 94, 96; connections 98, 100, 102, 104; power lines 106, 108, 110, 112; and gain control leads 114, 116, 118.

[0083] The input of amplifier stage 84 is coupled to the first output of oscillator 12 via connection 20. The output of amplifier stage 84 is coupled to the input of amplifier stage 86 via connection 98. The output of amplifier stage 86 is coupled to the first input of selection circuit 92 via connection 100. The input of amplifier stage 88 is coupled to the second output of oscillator 12 via connection 22. The output of amplifier stage 88 is coupled to the input of amplifier stage 90 via connection 102. The output of amplifier stage 90 is coupled to the second input of selection circuit 92 via connection 104. The output of selection circuit 92 is coupled to the input of matching network 16 via connection 24.

[0084] The output of selection circuit 92 can be coupled to the output of power amplifier 14 and / or form the output of power amplifier 14. The input of amplifier stage 84 can be coupled to the first input of power amplifier 14 and / or form the first input of power amplifier 14. Similarly, the input of amplifier stage 88 can be coupled to the second input of power amplifier 14 and / or form the second input of power amplifier 14.

[0085] The output of adjustable power supply 94 is coupled to the power input of amplifier stage 84 via power line 106. The output of adjustable power supply 94 is also coupled to the power input of amplifier stage 88 via power lines 106 and 110. The output of adjustable power supply 96 is coupled to the power input of amplifier stage 86 via power line 108. The output of adjustable power supply 96 is also coupled to the power input of amplifier stage 90 via power lines 108 and 112. The control input of selection circuit 92 is coupled to gain control line A 114. The control input of adjustable power supply 94 is coupled to gain control line B 116. The control input of adjustable power supply 96 is coupled to gain control line C 118. Gain control lines 114, 116, and 118 can collectively correspond to... Figures 1-3 The gain control wire 26 is shown.

[0086] Connections 20, 22, 24, 28, 98, 100, 102, and 104 can be single-ended or differential connections. When connections 20 and 22 are single-ended connections, in some examples, oscillator 12 can correspond to... Figure 2The oscillator 12 in the middle, and the connections 20 and 22 can correspond to Figure 2 Wires 42 and 44. When the connections 20 and 22 of oscillator 12 are differential connections, in some examples, oscillator 12 can correspond to Figure 3 The oscillator 12 in the middle, and the connections 20 and 22 can correspond to Figure 3 The wires are 42, 44, 56, and 58.

[0087] During operation, amplifier stage 84 receives a first oscillation signal through its first input terminal, amplifies the first oscillation signal to generate a first amplified signal, and outputs the first amplified signal through connection 98. Amplifier stage 86 receives the first amplified signal through connection 98, amplifies the first amplified signal to generate a second amplified signal, and outputs the second amplified signal through connection 100. Amplifier stage 86 receives the second oscillation signal through its second input terminal, amplifies the second oscillation signal to generate a third amplified signal, and outputs the third amplified signal through connection 102. Amplifier stage 86 receives the first amplified signal through connection 102, amplifies the third amplified signal to generate a fourth amplified signal, and outputs the fourth amplified signal through connection 104. Selection circuit 92 receives the third amplified signal and the fourth amplified signal through connections 100 and 104 respectively, selects one of the third amplified signal and the fourth amplified signal based on the gain control signal A to generate a power amplified signal, and outputs the selected signal through connection 24.

[0088] Amplifier stages 84 and 86 can form a first amplifier signal chain, and amplifier stages 88 and 90 can form a second amplifier signal chain. The first amplifier signal chain can amplify the oscillation signal received at connection 20, the second amplifier signal chain can amplify the oscillation signal received at connection 22, and the selection circuit 92 can select which amplified signal to output as the power amplification signal.

[0089] Adjustable power supply 94 can power amplifier stages 84 and 88 via power lines 106 and 110. Similarly, adjustable power supply 96 can power amplifier stages 86 and 90 via power lines 108 and 112. Adjustable power supply 94 can generate an output power level (e.g., a voltage level) based on a gain control B signal, and adjustable power supply 96 can generate an output power level (e.g., a voltage level) based on a gain control C signal. In some examples, one or more of adjustable power supplies 94 and 96 can be adjustable and / or programmable voltage regulators, such as adjustable and / or programmable LDOs. Amplifier stages 84 and 88 can amplify their respective input signals based on the gain determined by the output power level generated by adjustable power supply 94. Similarly, amplifier stages 86 and 90 can amplify their respective input signals based on the gain determined by the output power level generated by adjustable power supply 96.

[0090] like Figure 5 As shown, the power amplifier 14 includes a first signal chain having amplifier stages 84 and 86. Amplifier stage 84 has: (1) an input terminal coupled to a first input terminal of the power amplifier 14, and (2) an output terminal. Amplifier stage 86 has: (1) an input terminal coupled to the output terminal of amplifier stage 84 of the first signal chain, and (2) an output terminal. The power amplifier 14 also includes a second signal chain having amplifier stages 88 and 90. Amplifier stage 88 has: (1) an input terminal coupled to a second input terminal of the power amplifier, and (2) an output terminal. Amplifier stage 90 has: (1) an input terminal coupled to the output terminal of the first amplifier stage 88 of the second signal chain, and (2) an output terminal.

[0091] The power amplifier 14 also includes a selection circuit 92 having: (1) a first input coupled to the output of the amplifier stage 86 of the first signal chain, (2) a second input coupled to the output of the amplifier stage 90 of the second signal chain, and (3) an output forming the output of the power amplifier 14. The selection circuit 92 has a control input coupled to the gain control A wire 114.

[0092] Amplifier stages 84, 86, 88, and 90 can be implemented using any combination of amplifier stages described in this disclosure or by utilizing other amplifier stages. In some examples, amplifier stages can be utilized... Figure 13 The amplifier stages shown are used to implement amplifier stages 84 and 88, and can be utilized Figure 14 The amplifier stages shown are used to implement amplifier stages 86 and 90.

[0093] In some examples, each of the amplifier stages 84, 86, 88, and 90 in power amplifier 14 may include a single-ended or differential self-biased amplifier (e.g., a self-biased inverter). Each of the amplifier stages 84, 86, 88, and 90 may also have an independently adjustable power rail voltage provided by adjustable power supplies 94 and 96. Adjusting the power rail voltage for a particular amplifier stage allows the self-biased amplifier in that stage to be biased at different bias currents, which in turn allows adjustment of the gain of the self-biased amplifier. Therefore, by using independently adjustable power rail voltages for different self-biased amplifier stages, multi-stage power amplifiers with stage-independent gain adjustment can be implemented using a relatively small number of circuit components.

[0094] In some examples, the gain control signal A can be coarse gain control, which selects which oscillator voltage to use for generating the power amplified output signal. In such examples, the gain control signals B and C can together form fine gain control, which controls the gain of amplifier stages 84, 86, 88, and 90 in the multi-stage power amplifier 14. In some examples, fine gain control can provide a continuous gain control function, but the range of gain values ​​for which the gain control function is linear may be relatively small. Meanwhile, the coarse gain control function can be linear over a relatively large range of gain values, but it may be a discrete function with discrete gain steps.

[0095] Offering both coarse and fine gain control allows for precise tuning of the power amplifier's gain over a wide gain range. This enables the creation of power amplifiers with relatively high-precision gain control over a relatively large output power setting range.

[0096] Figure 6 This is a schematic diagram illustrating an example reactive component network 34 that can be used in the example oscillator of this disclosure. In some examples, the reactive component network 34 can be used to implement... Figure 3 The reactor component network 34 is shown. The reactor component network 34 includes inductors L1, L2, L3, L4 and nodes 36, 38, 120, 122, and 124. Inductor L1 is coupled between node 36 and node 120. Inductor L2 is coupled between node 120 and node 122. Inductor L3 is coupled between node 122 and node 124. Inductor L4 is coupled between node 124 and node 38.

[0097] Tap 54 is coupled to node 120, and tap 40 is coupled to node 124. Nodes 36 and 38 can form the first differential output, and taps 54 and 40 can form the second differential output.

[0098] like Figure 6 As shown, taps 54 and 40 are coupled to nodes 120 and 124 between nodes 36 and 38. Thus, the inductance between nodes 36 and 38 is greater than the inductance between taps 54 and 40 of the reactance component network 34, thereby making the voltage between taps 54 and 40 proportional to, but less than, the voltage between nodes 36 and 38.

[0099] Figure 7 This illustrates the merger according to this disclosure. Figure 6 A schematic diagram of an example oscillator 12 is shown in the example reactor component network 34. Oscillator 12 includes: transistors 126 and 128, a ground rail 130, a high-voltage rail 132, and... Figure 6The reactor component network 34 is shown. The source of transistor 126 is coupled to ground rail 130. The drain of transistor 126 is coupled to node 36 and to the gate of transistor 128. The gate of transistor 126 is coupled to node 38 and to the drain of transistor 128. The source of transistor 128 is coupled to ground rail 130. The drain of transistor 128 is coupled to node 38 and to the gate of transistor 126. The gate of transistor 128 is coupled to node 36 and to the drain of transistor 126. Node 122 of the reactor component network 34 is coupled to high-voltage rail 132.

[0100] Transistors 126 and 128 may be examples of cross-coupled transistors, where the outputs of the cross-coupled transistors are coupled to nodes 36 and 38. Nodes 36 and 38 form the first differential output of oscillator 12, and taps 40 and 54 form the second differential output of oscillator 12. Figure 7 In the example, inductors L1, L2, L3, and L4 are one or more inductors connected in series between nodes 36 and 38 of oscillator 12.

[0101] During operation, transistors 126 and 128 can each operate as common-source amplifiers with reactive loads. Inductors L1, L2, L3, and L4 can form all or part of the reactive load for transistors 126 and 128. Specifically, transistor 126 can amplify the signal at the drain of transistor 128 and apply a 180-degree phase shift to it, and transistor 128 can amplify the signal at the drain of transistor 126 and apply a 180-degree phase shift to it. The feedback loop formed by the cross-coupled oscillator can collectively cause the signals at the two differential outputs at nodes 36 and 38 to oscillate. The inductance of inductors L1, L2, L3, and L4, together with one or more parasitic capacitances in transistors 126 and 128, can control the oscillation frequency of oscillator 12.

[0102] The second differential output of oscillator 12, formed by taps 40 and 54, can provide an oscillating output signal that is proportional to but smaller than the output signal provided by the first differential output of oscillator 12, formed by nodes 36 and 38. The gain of the power amplifier can be changed by selecting which of these voltages to amplify. By using one or more taps of the network of reactive components (e.g., inductors L1, L2, L3, L4) included in oscillator 12 to output different voltage levels, the gain of the power amplifier can be changed without requiring additional reactive components within the power amplifier or outside the integrated circuit. In this way, a relatively low-power amplifier with variable gain can be obtained using a relatively small number of components.

[0103] Figure 8This is a schematic diagram illustrating another example reactive component network 34 that can be used in the example oscillator of this disclosure. The reactive component network 34 includes: inductors L5, L6, L7, L8, L9, L10; nodes 134, 136, 138, 140, 142, 144, 146; and taps 148, 150, 152, 154. Inductor L5 is coupled between nodes 134 and 136. Inductor L6 is coupled between nodes 136 and 138. Inductor L7 is coupled between nodes 138 and 140. Inductor L8 is coupled between nodes 140 and 142. Inductor L9 is coupled between nodes 142 and 144. Inductor L10 is coupled between nodes 144 and 146. Figure 8 In the example, inductors L5, L6, L7, L8, L9, and L10 are one or more inductors connected in series between nodes 134 and 146 of oscillator 12.

[0104] Tap 148 is coupled to node 136. Tap 150 is coupled to node 138. Tap 152 is coupled to node 142. Tap 154 ​​is coupled to node 144.

[0105] Nodes 134 and 146 can form a first differential output terminal, taps 136 and 144 can form a second differential output terminal, and taps 138 and 142 can form a third differential output terminal. The second differential output terminal can output an oscillation signal that is proportional to but smaller than the signal output by the first differential output terminal. The third differential output terminal can output an oscillation signal that is proportional to but smaller than the signals output by the first and second differential output terminals. Typically, any number of taps can be placed in a series of inductors connected in series to form any number of differential output terminals, thereby providing any number of gain steps for the power amplifier according to this disclosure.

[0106] Figure 9 This is a schematic diagram of an example reactor assembly and switching circuit 156 that can be used in the example transmitter of this disclosure. In some examples, a reactor assembly network 34 can be used to implement... Figure 3 The reactor component network 34 and / or shown Figure 4 The selection circuit 60 is shown. The reactor assembly and switching circuit 156 include inductors L11, L12, L13, switches S1, S2, S3, S4, and nodes 158, 160, 162, 164, 166, 168.

[0107] Inductor L11 is coupled between nodes 158 and 160. Inductor L12 is coupled between nodes 160 and 162. Inductor L13 is coupled between nodes 162 and 164. Switch S1 is coupled between nodes 158 and 166. Switch S2 is coupled between nodes 160 and 166. Switch S3 is coupled between nodes 162 and 168. Switch S4 is coupled between nodes 164 and 168.

[0108] Nodes 158 and 164 can form differential input terminals. Nodes 166 and 168 can form differential output terminals.

[0109] In some examples, inductors L11, L12, L13 and nodes 158, 160, 162, 164 may be included in the reactance component network 34 of the oscillator 12 (e.g., Figure 3 In, and switches S1, S2, S3, and S4 can be included in the selection circuit 60 of the power amplifier 14 (e.g., Figure 4 In this example, nodes 158 and 164 can correspond to nodes 36 and 38, respectively, and nodes 166 and 168 can correspond to the outputs of selection circuit 60. In this example, the control inputs of switches S1, S2, S3, and S4 can be coupled to gain control wire A 78.

[0110] During operation, the control circuit can selectively open and close switches S1, S2, S3, and S4 based on a gain control signal. In the first operating state, switches S1 and S4 can be closed and switches S2 and S3 can be opened, thereby causing the voltage between nodes 158 and 164 to be output at nodes 166 and 168. In the second operating state, switches S2 and S3 can be closed and switches S1 and S4 can be opened, thereby causing the voltage between nodes 160 and 162 to be output at nodes 166 and 168.

[0111] In some examples, inductors L11, L12, and L13 can form tapped inductors. The tapped inductors, along with switches S1, S2, S3, and S4, can provide the gain step size between the VCO and PA. In some examples, inductors L11, L12, and L13 can be implemented using inductors within the VCO core, and switches S1, S2, S3, and S4 can provide the attenuator step size.

[0112] Figure 10This is a schematic diagram illustrating another example reactive component network 34 that can be used in the example oscillator of this disclosure. The reactive component network 34 includes: capacitors C1, C2, C3, C4, C5, C6, C7, and C8; switches S5 and S6; nodes 170, 172, 174, 176, 178, 180, 182, 184, 186, and 188; and taps 190, 192, 194, and 196. Capacitor C1 is coupled between node 170 and node 172. Capacitor C2 is coupled between node 172 and node 174. Capacitor C3 is coupled between node 178 and node 180. Capacitor C4 is coupled between node 176 and node 178. Capacitor C5 is coupled between node 172 and node 182. Capacitor C6 is coupled between node 178 and node 186. Capacitor C7 is coupled between nodes 174 and 184. Capacitor C8 is coupled between nodes 176 and 188. Switch S5 is coupled between nodes 182 and 186. Switch S6 is coupled between nodes 184 and 188. Tap 190 is coupled to node 172, tap 192 is coupled to node 174, tap 194 is coupled to node 176, and tap 196 is coupled to node 178.

[0113] Nodes 170 and 180 can form the ends of the reactor component network 34 and can correspond to the first differential output of the reactor component network 34. Taps 190 and 196 can form the second differential output of the reactor component network 34, and taps 192 and 194 can form the third differential output of the reactor component network 34.

[0114] like Figure 10 As shown, taps 192 and 194 are coupled to the reactor component network 34 between taps 190 and 196 and between nodes 170 and 180. Similarly, taps 190 and 196 are coupled to the reactor component network 34 between nodes 170 and 180. Thus, the capacitance between nodes 170 and 180 is greater than the capacitance between taps 190 and 196 (when one of switches S5 and S6 is closed), thereby making the voltage between taps 190 and 196 proportional to but less than the voltage between nodes 170 and 180. Similarly, the capacitance between nodes 170 and 180 is greater than the capacitance between taps 190 and 196 (when switch S6 is closed), and the capacitance between taps 190 and 196 is greater than the capacitance between taps 192 and 194 (when switch S6 is closed). This makes the voltage between taps 192 and 194 proportional to, but less than, the voltage between taps 190 and 196 and the voltage between nodes 170 and 180.

[0115] Figure 11This illustrates the merger according to this disclosure. Figure 10 A schematic diagram of an example oscillator 12 is shown in the example reactor component network 34. Oscillator 12 includes: transistors 198, 200, inductors L14, L15, a ground rail 202, a high-voltage rail 204, a node 206, and... Figure 10 The reactor component network 34 is shown. The source of transistor 198 is coupled to ground rail 202. The drain of transistor 198 is coupled to node 170 and to the gate of transistor 200. The gate of transistor 198 is coupled to node 180 and to the drain of transistor 200. The source of transistor 200 is coupled to ground rail 202. The drain of transistor 200 is coupled to node 180 and to the gate of transistor 198. The gate of transistor 200 is coupled to node 170 and to the drain of transistor 198. Inductor L14 is coupled between node 170 and node 206. Inductor L15 is coupled between node 206 and node 180. Node 206 is coupled to high-voltage rail 204.

[0116] Transistors 198 and 200 may be examples of cross-coupled transistors, wherein the outputs of the cross-coupled transistors are coupled to nodes 36 and 38. Switches S5 and S6 may include control inputs coupled to the control circuit. Figure 11 In this example, when one of switches S5 and S6 is closed, the capacitance between node 170 and node 180 can be one or more capacitors connected in series between nodes 170 and 180 of the oscillator 12.

[0117] During operation, transistors 198 and 200 can each operate as common-source amplifiers with reactive loads. Capacitors C1, C2, C3, C4, C5, C6, C7, C8 and inductors L14 and L15 can form all or part of the reactive load for transistors 198 and 200. Specifically, transistor 198 can amplify the signal at the drain of transistor 200 and apply a 180-degree phase shift thereto, and transistor 200 can amplify the signal at the drain of transistor 198 and apply a 180-degree phase shift thereto. The feedback loop formed by the cross-coupled oscillator can collectively cause the signals at the two differential outputs at nodes 170 and 180 to oscillate. The inductance of inductors L14 and L15, together with the capacitance of one or more of capacitors C1, C2, C3, C4, C5, C6, C7, C8 (and in some examples, one or more parasitic capacitances in transistors 198 and 200), can control the oscillation frequency of oscillator 12.

[0118] Switches S5 and S6 can be selectively opened and closed to program the oscillation frequency of oscillator 12. Any combination of the open and closed states of switches S5 and S6 can correspond to different oscillation frequencies.

[0119] The third differential output of oscillator 12, formed by taps 192 and 194, can provide an oscillation output signal that is proportional to but less than the output signal provided by the second differential output of oscillator 12, formed by taps 190 and 196. Similarly, the output signal provided by the second differential output of oscillator 12, formed by taps 190 and 196, is proportional to but less than the output signal provided by the first differential output of oscillator 12, formed by nodes 170 and 180. The gain of the power amplifier can be changed by selecting which of the voltages to amplify. By using one or more taps of the network of reactive components (e.g., capacitors C1, C2, C3, C4, C5, C6, C7, C8) included in oscillator 12 to output different voltage levels, it is possible to change the gain of the power amplifier without requiring additional reactive components in the power amplifier or outside the integrated circuit. In this way, a relatively low-power amplifier with variable gain can be obtained using a relatively small number of components.

[0120] Figure 12 This is a schematic diagram illustrating another example reactive component network 208 that can be used in the example oscillator of this disclosure. The reactive component network 208 includes: capacitors C9, C10, C11, C12, C13, and C14; switches S7, S8, S9, and S10; and nodes 210, 212, 214, 216, 218, and 220. Capacitor C9 is coupled between nodes 210 and 212. Capacitor C10 is coupled between nodes 212 and 214. Capacitor C11 is coupled between nodes 216 and 218. Capacitor C12 is coupled between nodes 218 and 220. Capacitor C13 is coupled between switches S7 and S8. Capacitor C14 is coupled between switches S9 and S10. Switch S7 is coupled between capacitor C13 and node 212. Switch S8 is coupled between capacitor C13 and node 218. Switch S9 is coupled between capacitor C14 and node 212. Switch S10 is coupled between capacitor C14 and node 218.

[0121] In some examples, Figure 12 The reactance component network 208 can be implemented as a capacitive attenuator circuit that can be used in the coarse gain control circuit of this disclosure. The capacitive attenuator circuit can provide a gain step between the VCO and the power amplifier in the transmitter. In some examples, the reactance component network 208 can be combined with capacitors inside the VCO core, and switches S7, S8, S9, S10 can provide the attenuator step.

[0122] Figure 13 This is a schematic diagram illustrating an example amplifier stage 230 that can be used in the power amplifier of the present invention. The amplifier stage 230 includes: transistors 232, 234, 236, 238; an adjustable LDO 240; resistors 242, 244, 246, 248; bias resistors 250, 252; adjustable resistors 254, 256; capacitors 258, 260; a ground rail 262; and nodes 264, 266, 268, 270, 272, 274, 276, 278.

[0123] Transistor 232 is coupled between resistor 242 and node 268. Specifically, the source of transistor 232 is coupled to resistor 242, and the drain of transistor 232 is coupled to node 268. The gate of transistor 232 is coupled to node 276. Transistor 234 is coupled between resistor 246 and node 268. Specifically, the source of transistor 234 is coupled to resistor 246, and the drain of transistor 234 is coupled to node 268. The gate of transistor 234 is coupled to node 276.

[0124] Transistor 236 is coupled between resistor 244 and node 270. Specifically, the source of transistor 236 is coupled to resistor 244, and the drain of transistor 236 is coupled to node 270. The gate of transistor 236 is coupled to node 278. Transistor 238 is coupled between resistor 248 and node 270. Specifically, the source of transistor 238 is coupled to resistor 248, and the drain of transistor 238 is coupled to node 270. The gate of transistor 238 is coupled to node 278.

[0125] Resistor 242 is coupled between transistor 232 and node 272. Resistor 244 is coupled between transistor 236 and node 272. Resistor 246 is coupled between transistor 234 and node 274. Resistor 248 is coupled between transistor 238 and node 274. Bias resistor 250 is coupled between node 268 and node 276. Bias resistor 252 is coupled between node 270 and node 278.

[0126] Adjustable resistor 254 is coupled between the output of adjustable LDO 240 and node 272. Adjustable resistor 256 is coupled between node 274 and ground rail 262. Capacitor 258 is coupled between node 264 and node 276. Capacitor 260 is coupled between node 266 and node 278.

[0127] Transistors 232 and 234 and bias resistor 250 form a first self-biased amplifier (e.g., a self-biased inverter). Transistors 236 and 238 and bias resistor 252 form a second self-biased amplifier (e.g., a self-biased inverter). Transistors 232, 234, 236, and 238 together with bias resistors 250 and 252 form a differential self-biased amplifier (e.g., a differential self-biased inverter).

[0128] Nodes 264 and 266 can form differential inputs for amplifier stage 230, and nodes 268 and 270 can form differential outputs for amplifier stage 230. Specifically, node 264 can form a non-inverting input, and node 266 can form an inverting input. Similarly, node 268 can form a non-inverting output, and node 270 can form an inverting output.

[0129] like Figure 13 As shown, amplifier stage 230 includes: (1) a power rail (e.g., a wire coupled to the output of adjustable LDO 240), an adjustable resistor 254, (2) a first self-biased inverter (e.g., transistors 232, 234 and resistor 250) coupled to the power rail via adjustable resistor 254, and (3) a second self-biased inverter (e.g., transistors 236, 238 and resistor 252) coupled to the power rail (e.g., the output of adjustable LDO 240) via adjustable resistor 254. The power rail is coupled to an adjustable power supply, wherein adjustable LDO 240 is one example. Amplifier stage 230 also includes an adjustable resistor 256. A first self-biased inverter (e.g., transistors 232, 234 and resistor 250) is coupled to ground rail 262 via adjustable resistor 256, and a second self-biased inverter (e.g., transistors 236, 238 and resistor 252) is coupled to ground rail 262 via adjustable resistor 256.

[0130] The first self-biased inverter includes an input terminal (e.g., node 276), an output terminal (e.g., node 268), and a bias resistor 250 coupled between the input and output terminals of the first self-biased inverter. The second self-biased inverter includes an input terminal (e.g., node 278), an output terminal (e.g., node 270), and a bias resistor 252 coupled between the input and output terminals of the second self-biased inverter.

[0131] During operation, bias resistors 250 and 252 bias the self-biased inverter at approximately the midpoint between the voltage output from the adjustable LDO 240 and ground. Capacitors 258 and 260 filter out the DC component and other low-frequency signal components received at nodes 264 and 266. The amplifier formed by transistors 232, 234, 236, and 238 amplifies the filtered input signal received from capacitors 258 and 260 and outputs the amplified signal at nodes 268 and 270.

[0132] In some examples, amplifier stage 230 can implement a self-biased Class AB PA stage. Adjustable resistors 254 and 256 can control the current consumption of the PA stage and provide suppression of second-order harmonic tone from the VCO, while resistors 242, 244, 246, and 248 can provide linearity to the stage so that virtually no additional harmonics are generated.

[0133] In some examples, coarse gain control can be coupled to adjustable resistors 254 and 256, and fine gain control can be coupled to adjustable LDO 240. In additional examples, adjustable LDO 240 can be a fixed, invariant power supply.

[0134] Increasing the resistances of adjustable resistors 254 and 256 can increase the even-order harmonic suppression of amplifier stage 230, but decrease the gain of amplifier stage 230. Decreasing the resistances of adjustable resistors 254 and 256 can have the opposite effect. Thus, by positioning the adjustable resistors 254 and 256 at... Figure 13 At the location shown, the trade-off between even-order harmonic suppression and amplifier gain can be dynamically adjusted and balanced in amplifier stage 230.

[0135] Figure 14 This is a schematic diagram illustrating another example amplifier stage 280 that can be used in the power amplifier of the present invention. Amplifier stage 280 includes: transistors 282, 284; an adjustable LDO 286; switches 288, 290, 292, 294, 296; bias resistors 298, 300, 302; capacitors 304, 306; a ground rail 308; and nodes 310, 312, 314, 316, 318, 320, 322, 324, 326, 328.

[0136] Transistor 282 is coupled between adjustable LDO 286 and node 320. Specifically, the source of transistor 282 is coupled to the output of adjustable LDO 286, and the drain of transistor 282 is coupled to node 320. The gate of transistor 282 is coupled to node 312. Transistor 284 is coupled between node 320 and ground rail 308. Specifically, the source of transistor 284 is coupled to ground rail 308, and the drain of transistor 284 is coupled to node 320. The gate of transistor 284 is coupled to node 314.

[0137] Switch 288 is coupled between nodes 312 and 324. Switch 290 is coupled between nodes 312 and 316. Switch 292 is coupled between nodes 316 and 318. Switch 294 is coupled between nodes 316 and 314. Switch 296 is coupled between nodes 314 and 326. Bias resistor 298 is coupled between nodes 318 and 320. Bias resistor 300 is coupled between nodes 322 and 324. Bias resistor 302 is coupled between nodes 326 and 328. Capacitor 304 is coupled between nodes 310 and 312. Capacitor 306 is coupled between nodes 310 and 314. Node 322 is coupled to a first bias voltage source (V_BIAS_P), and node 328 is coupled to a second bias voltage source (V_BIAS_N).

[0138] When switches 290, 292, and 294 are closed, transistors 282 and 284 and bias resistor 298 form a self-biased amplifier (e.g., a self-biased inverter). Node 310 can form the input of amplifier stage 280, and node 320 can form the output of amplifier stage 280.

[0139] like Figure 14As shown, amplifier stage 280 includes: (1) an inverter having transistors 282 and 284, (2) a bias resistor 298 coupled to the output of the inverter (e.g., node 320), (3) a first bias voltage source (V_BIAS_P), (4) a second bias voltage source (V_BIAS_N), (5) a switch 290 coupled between the bias resistor 298 and the gate of transistor 282, (6) a switch 288 coupled between the first bias voltage source (V_BIAS_P) and the gate of transistor 282, (7) a switch 294 coupled between the bias resistor 298 and the gate of transistor 284, and (8) a switch 296 coupled between the second bias voltage source (V_BIAS_N) and the gate of transistor 284. Amplifier stage 280 may include a control unit (not shown) coupled to switches 288, 290, 292, 294, 296 and configured to switch amplifier stage 280 between a self-biased operating mode and a nonlinear operating mode.

[0140] During self-biased operation, switches 290, 292, and 294 are closed, and switches 288 and 296 are open. Bias resistor 298 biases the inverter formed by transistors 282 and 284 at approximately the midpoint between the voltage output of the adjustable LDO 286 and ground. Capacitors 304 and 306 filter out the DC component and other low-frequency signal components received at node 310. The amplifier formed by transistors 282 and 284 amplifies the filtered input signal received at nodes 312 and 314 and outputs the amplified signal at node 320.

[0141] During nonlinear operation, switches 290, 292, and 294 are open, and switches 288 and 296 are closed. A first bias voltage source (V_BIAS_P) biases transistor 282 via bias resistor 300. A second bias voltage source (V_BIAS_N) biases transistor 284 via bias resistor 302. Capacitors 304 and 306 filter out the DC component and other low-frequency signal components received at node 310. The amplifier formed by transistors 282 and 284 amplifies the filtered input signal received at nodes 312 and 314 and outputs the amplified signal at node 320.

[0142] As discussed above, depending on the configuration of switches 288, 290, 292, 294, and 296, amplifier stage 280 can operate in either self-biased or nonlinear mode. Self-biased mode can provide greater linearity than nonlinear mode, but may be less power efficient. On the other hand, nonlinear mode may be more power efficient, but provides less linearity. By providing an amplifier stage that can be configurable to operate in both self-biased and nonlinear modes, the trade-off between linearity and power efficiency can be dynamically adjusted and balanced within the amplifier.

[0143] Figure 15 This is a schematic diagram illustrating another example amplifier stage 330 that can be used in the power amplifiers of this disclosure. Amplifier stage 330 is similar to... Figure 13 The amplifier stage 230 shown differs in that: (1) resistors 242, 244, 246, 248 and adjustable resistors 254, 256 are omitted; and (2) transistors 232, 234 and transistors 236, 238 are individually coupled to the adjustable LDO 240. Figure 13 and Figure 15 Components that are identical or similar to each other are numbered using the same reference numerals. For example... Figure 15 As shown, the source of transistor 232 is directly coupled to the first output of the adjustable LDO 240 without any intermediate resistor, and the source of transistor 236 is directly coupled to the second output of the adjustable LDO 240 without any intermediate resistor.

[0144] Figure 16 This is a block diagram illustrating another example transmitter 340 according to this disclosure. Transmitter 340 is similar to... Figure 4 The transmitter 10 shown is different in that Figure 16 The transmitter 340 in the middle includes a coarse gain control circuit 342 instead of a selection circuit 60. Figure 4 and Figure 16 Identical or similar components are numbered using the same reference numerals.

[0145] The first input terminal of the coarse gain control circuit 342 is coupled to the first output terminal of the oscillator 12 via connection 20. The second input terminal of the coarse gain control circuit 342 is coupled to the second output terminal of the oscillator 12 via connection 22. The output terminal of the coarse gain control circuit 342 is coupled to the input terminal of the amplifier stage 62 via connection 70. The control input terminal of the coarse gain control circuit 342 is coupled to the gain control A wire 78.

[0146] The coarse gain control circuit 342 may include one or more passive attenuator circuits (e.g., reactive components) configured to attenuate signals received via connections 20, 22. The passive attenuator circuits may include capacitive attenuator circuits and / or inductive attenuator circuits. The passive attenuator circuits may be variable-gain passive attenuator circuits (e.g., a network of reactive components with multiple taps), wherein the gain or attenuation level of the circuit can be varied (e.g., different tap combinations are selected to produce an output signal). Figure 10 and Figure 12 An example capacitive attenuator circuit is shown in the figure. Figure 6 , Figure 8 and Figure 9 An example inductive attenuator circuit is shown.

[0147] The coarse gain control circuit 342 can select one of the signals received via connections 20 and 22 and utilize one or more passive attenuator circuits to attenuate the signal to produce an attenuated signal at connection 70. The coarse gain control circuit 342 can determine which signal to select based on the gain control A signal. In the case that the passive attenuator circuit is a variable gain passive attenuator circuit, the coarse gain control circuit 342 can determine how much the passive attenuator circuit should attenuate the signal based on the gain control A signal. In some examples, the gain control A signal may include a first component determining the signal to be selected and a second component determining the amount of signal the passive attenuator will attenuate.

[0148] Figure 17 This is a block diagram illustrating another example transmitter 350 according to this disclosure. Transmitter 350 may be similar to... Figure 16 The transmitter 340 shown differs in that: (1) Figure 17 The transmitter 350 in the middle includes a single-input coarse gain control circuit 352, instead of... Figure 16 The dual-input coarse gain control circuit 342 shown; and (2) the oscillator 12 is a single-output oscillator 12. Figure 16 and Figure 17 Identical or similar components are numbered using the same reference numerals.

[0149] The input terminal of the coarse gain control circuit 352 is coupled to the output terminal of the oscillator 12 via connection 354. The output terminal of the coarse gain control circuit 352 is coupled to the input terminal of the amplifier stage 62 via connection 70. The control input terminal of the coarse gain control circuit 352 is coupled to the gain control A wire 78.

[0150] The coarse gain control circuit 352 may include one or more passive attenuator circuits (e.g., reactive components) configured to attenuate the signal received via connection 354. The passive attenuator circuit may include the components described above.Figure 16 The coarse gain control circuit 342 in the diagram describes any passive attenuator circuit.

[0151] The coarse gain control circuit 352 can utilize one or more passive attenuator circuits to attenuate the signal received via connection 354, thereby generating an attenuated signal at connection 70. In the case that the passive attenuator circuit is a variable gain passive attenuator circuit, the coarse gain control circuit 352 can determine how much the passive attenuator circuit should attenuate the signal based on the gain control A signal.

[0152] Figure 17 The overall transmitter architecture is shown. The coarse gain control circuit 352 can be a tapped inductor, a capacitive attenuator, or a bypass. In some examples, the elements of the coarse gain control circuit 352 may not provide any degradation to VCO phase noise. In some examples, amplifier stages 62, 64 may use self-biased amplifiers to direct substantially all current consumption toward signal processing and amplification engagement. The control circuitry can program the output signal swing of amplifier stages 62, 64 by varying the power supply from the LDOs (e.g., adjustable power supplies 66, 68). The control circuitry can program each of amplifier stages 62, 64 via the corresponding LDO to cover a wide programming range for output power. Power savings can be achieved by programming the LDOs at relatively desired operating points to improve power dissipation. For example, the coarse gain control circuitry 352 can provide attenuation to the VCO signal, allowing the LDOs to be set smaller to handle signals with significantly smaller amplitudes. In some examples, each LDO may use a replica circuit to obtain a reference voltage for the PA structure. Similar principles can be applied to other amplifier architectures of this disclosure.

[0153] In some examples, the coarse gain control circuit 352 can be implemented at least in part by using: (a) capacitance attenuation from the VCO capacitor array, (b) tapped inductors using symmetrical tapped connection points from the VCO inductors, or (c) simple bypass.

[0154] Figure 18 This is a block diagram illustrating another example of a transmitter 360 according to this disclosure. The transmitter 360 may be similar to... Figure 5 The transmitter 10 shown is different in that Figure 18 The transmitter 360 also includes coarse gain control circuits 362 and 364 and gain control wires 366 and 368. Figure 5 and Figure 18 Identical or similar components are numbered using the same reference numerals.

[0155] The input terminal of the coarse gain control circuit 362 is coupled to the first output terminal of the oscillator 12 via connection 20. The input terminal of the coarse gain control circuit 364 is coupled to the second output terminal of the oscillator 12 via connection 22. The output terminal of the coarse gain control circuit 362 is coupled to the input terminal of the amplifier stage 84 via wire 370. The output terminal of the coarse gain control circuit 364 is coupled to the input terminal of the amplifier stage 88 via wire 372. The control input terminal of the coarse gain control circuit 362 is coupled to the gain control wire D 366. The control input terminal of the coarse gain control circuit 364 is coupled to the gain control wire E 368.

[0156] The coarse gain control circuits 362, 364 may include one or more passive attenuator circuits (e.g., reactive components) configured to attenuate signals received via connections 20, 22. The passive attenuator circuits may include the components described above. Figure 16 The coarse gain control circuit 342 in the diagram describes any passive attenuator circuit.

[0157] The coarse gain control circuit 362 can utilize one or more passive attenuator circuits to attenuate the signal received via connection 20 and output the attenuated signal at wire 370. In the case that the passive attenuator circuit is a variable gain passive attenuator circuit, the coarse gain control circuit 362 can determine how much the passive attenuator circuit should attenuate the signal based on the gain control signal received via gain control wire D 366.

[0158] The coarse gain control circuit 364 can use one or more passive attenuator circuits to attenuate the signal received via connection 22 and output the attenuated signal at wire 372. In the case that the passive attenuator circuit is a variable gain passive attenuator circuit, the coarse gain control circuit 364 can determine how much the passive attenuator circuit should attenuate the signal based on the gain control signal received via gain control wire E 368.

[0159] Figure 19 This is a block diagram illustrating another example transmitter 380 according to this disclosure. Transmitter 380 may be similar to... Figure 18 The transmitter 360 shown differs in that: (1) Figure 19 The transmitter 380 in the middle includes a single-input power amplifier 14 instead of... Figure 18 The dual-input power amplifier 14 shown, (2) the oscillator 12 is a single-output oscillator 12, and (3) the two inputs of the coarse gain control circuits 362, 364 are coupled to the single output of the oscillator 12 via connection 382. Figure 18 and Figure 19 Identical or similar components are numbered using the same reference numerals.

[0160] Figure 20 This is a block diagram illustrating another example transmitter 390 according to this disclosure. Transmitter 390 may be similar to... Figure 4 The transmitter 10 shown differs in that: (1) from Figure 20 In the power amplifier 14, the selection circuit 60 and the gain control A wire 78 have been omitted, and (2) the input terminal of the amplifier stage 62 is directly coupled to the output terminal of the oscillator 12 through connection 392. Figure 4 and Figure 20 Components that are identical or similar to each other are numbered using the same reference numerals.

[0161] As shown in the figure, for example, in Figure 4 and Figure 20 In the power amplifier 14, there are: (1) an amplifier stage 62 having an input and an output, and (2) an amplifier stage 64 having an input coupled to the output of the amplifier stage 62, and (3) an output. The power amplifier 14 also includes: (1) a first adjustable power supply (e.g., adjustable power supply 66) coupled to the amplifier stage 62, and (2) a second adjustable power supply (e.g., adjustable power supply 68) coupled to the amplifier stage 64. In some examples, the first and second adjustable power supplies may be programmable LDOs and / or adjustable LDOs.

[0162] In some examples, the integrated circuit includes a voltage-controlled oscillator (VCO) (e.g., oscillator 12) having one or more reactive components (e.g., reactive component network 34). The integrated circuit also includes programmable passive attenuation circuitry coupled to the VCO (e.g., reactive component network 34, selection circuitry 60, reactive components and switching circuitry 156, coarse gain control circuitry 342, coarse gain control circuitry 352, coarse gain control circuitry 362, 364). The programmable passive attenuation circuitry includes at least a portion of one or more reactive components (e.g., reactive component network 34) included in the VCO. The integrated circuit also includes a power amplifier (e.g., power amplifier 14) coupled to the programmable passive attenuation circuitry.

[0163] In some examples, the programmable passive attenuation circuit is an inductive attenuator. In such examples, a portion of one or more reactive components may include one or more tapped inductors. In further examples, the programmable passive attenuation circuit forms a capacitive attenuator. In such examples, one or more reactive components may include one or more capacitors.

[0164] In some examples, the power amplifier includes: a first power supply, a second power supply, a first amplifier stage coupled to the first power supply, and a second amplifier stage coupled to the second power supply. In such examples, the first and second power supplies can be programmable power supplies, such as a programmable LDO.

[0165] Figure 21 This is a flowchart illustrating an example technique for amplifying signal power according to the present disclosure. Figure 21 The techniques shown can be implemented in many circuits described in this disclosure. For illustrative purposes, the following will be discussed... Figure 3 The transmitter 10 shown is used to illustrate this technology.

[0166] Oscillator 12 generates a first oscillation signal (400) using a network of reactance components 34 included in oscillator 12 and outputs the first oscillation signal via wires 42, 56. Oscillator 12 outputs a second oscillation signal (402) via one or more taps (e.g., taps 40, 54) included in the network of reactance components 34. The second oscillation signal has an amplitude that is proportional to and smaller than that of the first oscillation signal.

[0167] Power amplifier 14 selects one of a first oscillation signal and a second oscillation signal based on gain control to generate a power-amplified output signal (404). Power amplifier 14 generates a power-amplified output signal (406) based on the selected signal from the first oscillation signal and the second oscillation signal.

[0168] In some examples (e.g., Figure 4 Power amplifier 14 can select one of a first oscillation signal and a second oscillation signal to generate the selected oscillation signal, and amplify the selected oscillation signal to generate a power-amplified output signal. In such examples, power amplifier 14 may utilize a gain determined by an adjustable low-dropout regulator (LDO) to amplify the selected oscillation signal in some instances.

[0169] In further examples (e.g., Figure 5 Power amplifier 14 can amplify a first oscillation signal to generate a first power amplified signal, amplify a second oscillation signal to generate a second power amplified signal, select one of the first and second power amplified signals to generate a selected power amplified signal, and output the selected power amplified signal as the output signal of the power amplification. In such examples, power amplifier 14 may, in some instances, utilize a gain determined by an adjustable low dropout regulator (LDO) to amplify the first oscillation signal and utilize a gain determined by the adjustable LDO to amplify the second oscillation signal.

[0170] This disclosure describes various power amplifier configurations that can be used to implement low-power power amplifier (PA) architectures for low-power wireless devices. The techniques disclosed herein can provide architectures for implementing low-power, high-efficiency power amplifiers with reduced external component counts to save on external material costs. In some examples, the low-power PAs described in this disclosure can have: (a) high efficiency, (b) low out-of-band harmonic content, and (c) gain control. In some examples, these characteristics can be achieved using relatively low current consumption. This disclosure provides various self-biased emitter PA (TXPA) configurations. In some examples, the PA architectures described in this disclosure can provide relatively low-range implementations for gain control.

[0171] In some examples, the architecture of power amplifier 14 can be a multi-stage architecture. In some examples, the first stage of the multi-stage architecture (e.g., amplifier stage 62) can correspond to... Figure 13 Amplifier stage 230 is shown. In such examples, the architecture used for the second stage (e.g., amplifier stage 64) can be... Figure 13 The same configuration as in the previous one, but without resistors 242, 244, 246, 248 and adjustable resistors 254, 256 (i.e., where the resistance values ​​of these resistors are equal to 0). In this way, depending on the nature of the external components (single-ended and differential, respectively), the second amplifier stage can be configured as a single-ended amplifier or a differential amplifier.

[0172] To further increase efficiency, such as Figure 14 As shown, the second amplifier stage may include a programmable gate bias in addition to an adjustable LDO to improve efficiency. In some examples, the switching can be implemented using a minimal metal-oxide-semiconductor (MOS) transistor. Figure 14 The amplifier stage 280 can be configured in two different modes: (a) self-biased Class AB architecture mode and (b) nonlinear amplifier mode.

[0173] To configure amplifier stage 280 in a self-biased Class AB architecture mode, the control circuitry can close switches 290, 292, and 294 and open switches 288 and 296. In this case, self-biasing is enabled via bias resistor 298, and the adjustable LDO 286 can be programmed to provide increased efficiency and linearity as needed.

[0174] To configure amplifier stage 280 in a self-biased Class AB architecture mode, the control circuitry can open switches 290, 292, and 294, close switches 288 and 296, and individually bias each transistor via separate bias voltage sources (V_BIAS_P, V_BIAS_N). Built-in self-calibration can be used to monitor the output of amplifier stage 280 to ensure that the DC level at the output is approximately in the middle of the voltage range.

[0175] Figure 22 This is a schematic diagram illustrating an example reactive component network 410 that can be used in an example oscillator of this disclosure. The reactive component network 410 includes inductors L16, L17, L18, L19, L20, L21 and nodes 412, 414, 416, 418, 420, 422, 424, 426.

[0176] Inductor L16 is coupled between nodes 412 and 414. Inductor L17 is coupled between nodes 414 and 416. Inductor L18 is coupled between nodes 416 and 418. Inductor L19 is coupled between nodes 420 and 422. Inductor L20 is coupled between nodes 422 and 424. Inductor L21 is coupled between nodes 424 and 426. Taps can be coupled to one or more of nodes 412, 414, 416, 418, 420, 422, 424, and 426.

[0177] Inductor L16 is magnetically coupled to inductor L19. Inductor L17 is magnetically coupled to inductor L20. Inductor L18 is magnetically coupled to inductor L21. In some examples, inductors L16 and L19 can be transformers, inductors L17 and L20 can be transformers, and / or inductors L18 and L21 can be transformers.

[0178] Taps coupled to nodes 412 and 414 form the first differential output (VCO+, VCO-). Taps coupled to nodes 414 and 416 form the second differential output (PA1+, PA1-). Taps coupled to nodes 420 and 426 form the third differential output (PA2+, PA2-). Taps coupled to nodes 422 and 424 form the fourth differential output (PA3+, PA3-). One or more differential outputs can be coupled to the corresponding inputs of the power amplifier.

[0179] In some examples, nodes 420 and 426 can respectively correspond to Figure 2 and Figure 3 Nodes 36 and 38 in the example. In a further example, nodes 412 and 414 can correspond to... Figure 2 and Figure 3 Nodes 36 and 38 in the text.

[0180] In some examples, the reactance component network 410 can correspond to Figure 2 and Figure 3 The reactor component network 34 is shown. In such an example, the reactor component network 410 may include at least two chains of one or more reactor components, wherein each reactor component chain includes one or more reactor components coupled in series (e.g., a first chain formed by inductors L16, L17, L18, and a second chain formed by inductors L19, L20, L21). At least two reactor component chains may be inductively coupled (or magnetically coupled) to each other. For example, one or more reactor components in the first reactor component chain may be inductively coupled (or magnetically coupled) to one or more reactor components in the second reactor component chain. One or more taps may be coupled to the first reactor component chain and / or the second reactor component chain to form one or more differential outputs.

[0181] In some examples, a first reactance component chain may be electrically coupled to the active circuitry of the oscillator, and a second reactance component chain may be inductively coupled to the first reactance component chain. In some embodiments of this example, a first differential output may be formed via taps coupled to the first reactance component chain, and a second differential output may be formed via taps coupled to the second reactance component chain. In a further embodiment of this example, at least two differential outputs may be formed via taps coupled to the first reactance component chain. In an additional embodiment of the first example, at least two differential outputs may be formed via taps coupled to the second reactance component chain.

[0182] In some examples, the inductances of inductors L16 and L18 can be equal to each other, and the inductances of inductors L19, L20, and L21 can be equal to each other. In additional examples, the inductance of inductor L17 can be equal to a first inductance value, the inductance of each of inductors L16 and L18 can be equal to a second inductance value, and the inductance of each of inductors L19, L20, and L21 can be equal to a third inductance value.

[0183] A reactive component network can be formed using one or both of tapped inductors (with direct electrical coupling) and magnetic coupling (DC isolation). A reactive component network can use tapped connections from one or more coils (inductors) to produce different outputs with varying attenuation levels. Magnetic coupling can be used to implement a fixed (coarse) step attenuator.

[0184] In some examples, the coarse step attenuation in the reactive components of this disclosure can be process-invariant because of the fact that the amount of attenuation can correspond to a ratio between two similar quantities that are also process-invariant. In further examples, coarse step attenuation can provide frequency-independent signal scaling. For example, if the VCO oscillates at 2.4 GHz versus (vs) 3.0 GHz, then in such examples, the coarse gain control techniques of this disclosure can provide the same signal attenuation.

[0185] Figure 23 This is a schematic diagram illustrating an example reactive component network 430 that can be used in an example oscillator of this disclosure. The reactive component network 430 includes capacitors C15, C16, C17 and nodes 432, 434, 436, 438.

[0186] Capacitor C15 is coupled between nodes 432 and 434. Capacitor C16 is coupled between nodes 434 and 436. Capacitor C17 is coupled between nodes 436 and 438. Taps can be coupled to one or more of nodes 432, 434, 436, and 438.

[0187] The taps coupled to nodes 432 and 438 can form the first differential output terminals (VCO+, VCO-). The taps coupled to nodes 434 and 436 can form the second differential output terminals (PA+, PA-). Figure 23 One configuration is shown in which multiple capacitors connected in series can be used for tap connections, and signals can be symmetrically extracted from the reactive component network for engagement with a power amplifier.

[0188] Figure 23 In the example configuration, each of capacitors C15, C16, and C17 is a variable capacitor. In other examples, all capacitors C15, C16, and C17 may be fixed capacitors, or some of capacitors C15, C16, and C17 may be variable capacitors and some of capacitors C15, C16, and C17 may be fixed capacitors. In some examples, the variable capacitors may be voltage-controlled. In some examples, the capacitances of capacitors C15 and C17 may be equal to each other, and the capacitance of capacitor C16 may be different from the capacitances of capacitors C15 and C17.

[0189] In the example where capacitors C15, C16, and C17 are fixed capacitors, the reactance network 430 can provide a constant attenuation factor. In some embodiments where capacitors C15, C16, and C17 are voltage-controlled variable capacitors, all capacitors C15, C16, and C17 can be programmed with the same control voltage. In this case, constant attenuation can be achieved, and the center frequency of the VCO can be changed using the same capacitor bank. In an additional embodiment where capacitors C15, C16, and C17 are voltage-controlled variable capacitors, capacitors C15, C16, and C17 can be programmed with respect to different voltages. For example, the capacitance (C0) of capacitors C15 and C17 can be programmed with a first voltage (V0), and the capacitance (C1) of capacitor C16 can be programmed with a second voltage (V1). In this embodiment, both C0 and C1 can participate in frequency control, and by changing V0 in a manner different from VI, a variable attenuator step size (fine control in addition to coarse gain control) can be achieved.

[0190] Ultra-low power transceivers can use low-power power amplifiers (PAs) with multiple gain steps to reduce overall system power. It may be desirable to implement such receivers using a minimal number of external components.

[0191] In some examples, this disclosure describes various techniques for implementing low-power PAs. According to a first technique, a two-stage PA architecture of type AB can be used for power amplification, where each stage can be independently programmed via a separate LDO. According to a second technique, a coarse gain step can be obtained using a capacitive attenuator, and a fine gain step can be provided via an LDO. This technique simplifies the design of the gain step. According to a third technique, a tapped inductor (e.g., an autotransformer) is used to obtain a coarse gain step. In some cases, the tapped inductor can consume zero additional power and area. A fine gain step can be implemented using an LDO.

[0192] In some cases, the LDO does not need to cover the entire range of gain steps due to the coarse gain steps provided by the tapped inductors and / or capacitive attenuators. This can reduce the power consumption and area of ​​the resulting amplifier. In some examples, on-chip calibration techniques for frequency drift can be used to compensate for the limited isolation provided to the VCO by the two-stage PA.

[0193] In some examples, coarse gain control and fine gain control can be provided by a programmable LDO. In further examples, a capacitive attenuator can be used to provide coarse gain control, and an LDO can be used to provide fine gain control. In additional examples, an autotransformer can be used to provide coarse gain control, and an LDO can be used to provide fine gain control.

[0194] In some examples, the techniques disclosed herein can use a Class AB PA architecture. In some examples, this allows operation via a single radio frequency (RF) pin and through low external components. In some examples, degeneration is not used, resulting in reduced current consumption and better power efficiency. In further examples, the individual stages are self-biased, with a relatively simple design, and the gain can be fully controlled by an LDO. In additional examples, the gain step size is achieved by one or more of the following: (1) fully controlled by an LDO (both coarse and fine), (2) partially via a capacitive attenuator (using the coarse step size of the capacitive attenuator and the fine step size of the LDO), and (3) partially via an inductor tap connection (using the coarse step size of an autotransformer and the fine step size of the LDO).

[0195] In some examples, the amplifier stage can be self-biased, which allows biasing to occur without additional overhead in terms of bias current. In further examples, the gain step can be implemented using: (1) LDO only, (2) LDO and capacitive attenuator, (3) LDO and tapped inductor. In additional examples, the techniques of this disclosure can utilize two stages using independent LDOs, which allows for reconfiguration of the architecture with regard to efficiency and harmonic performance. In further examples, the techniques of this disclosure can use a relatively small number of amplifier stages to reduce power consumption. If a VCO frequency shift occurs due to a gain change, a calibration engine can be enabled.

[0196] In some examples, the techniques and circuit systems described in this disclosure can be implemented on any combination of one or more integrated circuits or other devices. Modifications are possible in the described embodiments, and other embodiments are possible within the scope of the claims.

Claims

1. An integrated circuit, comprising: A coarse gain control circuit, comprising: The first input terminal is configured to be coupled to an oscillator to receive a first oscillation signal; A second input terminal is configured to be coupled to the oscillator to receive a second oscillation signal, which is a decayed version of the first oscillation signal; The control input terminal is configured to receive a first gain control signal; and At the output terminal, the coarse gain control circuit is configured as follows: Based on the first gain control signal, an oscillation signal is selected between the first oscillation signal and the second oscillation signal; and The oscillation signal is attenuated based on the first gain control signal to provide a first output signal at the output terminal of the coarse gain control circuit; and Amplifier stage, which includes: The input terminal coupled to the coarse gain control circuit to receive the first output signal; and At the output terminal, the amplifier stage is configured to amplify the first output signal based on a second gain control signal to provide a second output signal at the output terminal of the amplifier stage; The coarse gain control circuitry includes a set of passive devices configured to select the oscillation signal and attenuate the oscillation signal to provide the first output signal.

2. The integrated circuit according to claim 1, comprising an adjustable power supply, wherein: The adjustable power supply includes an input terminal and an output terminal configured to receive the second gain control signal; The adjustable power supply is configured to provide an adjustable power signal at the output based on the second gain control signal; The amplifier stage includes a power input terminal coupled to the output terminal of the adjustable power supply to receive the adjustable power supply signal; as well as The amplifier stage is configured to amplify the first output signal based on the adjustable power supply signal.

3. The integrated circuit according to claim 1, wherein: The amplifier stage is the first amplifier stage; The integrated circuit includes a second amplifier stage, the second amplifier stage including an input coupled to the output of the first amplifier stage to receive the second output signal and an output configured to be coupled to a matching network of a transmitter; as well as The second amplifier stage is configured to amplify the second output signal based on a third gain control signal to provide a third output signal at the output of the second amplifier stage.

4. The integrated circuit according to claim 1, wherein: The input terminals of the amplifier stage are a pair of differential input terminals; The output of the amplifier stage is a pair of differential outputs; as well as The amplifier stage includes: A first transistor coupled between a power node and a first output terminal of the pair of differential outputs includes a gate coupled to a first input terminal of the pair of differential inputs; A second transistor coupled between the first output terminal of the pair of differential output terminals and a ground node, including a gate coupled to the first input terminal of the pair of differential input terminals; A third transistor coupled between the power node and the second output terminal of the pair of differential outputs, comprising a gate coupled to the second input terminal of the pair of differential inputs; and A fourth transistor coupled between the second output terminal of the pair of differential output terminals and a ground node, including a gate coupled to the second input terminal of the pair of differential input terminals.

5. The integrated circuit according to claim 4, wherein: The first transistor is coupled to the power node via a first adjustable resistor and a first resistor; The third transistor is coupled to the power node through the first adjustable resistor and the second resistor; The second transistor is coupled to the ground node via a second adjustable resistor and a third resistor; as well as The third transistor is coupled to the ground node through the second adjustable resistor and the fourth resistor.

6. An integrated circuit, comprising: An oscillator, comprising: Including the first differential output pair of the first output node and the second output node, A network of reactance components coupled between the first output node and the second output node, and A second differential output pair, comprising a third output node and a fourth output node, wherein the second differential output pair is coupled to the reactance component network; and A power amplifier, which includes an amplifier stage and a selection circuit, The selection circuit is implemented via the reactance component network, and the selection circuit includes: The first input terminal is coupled to the first differential output pair of the oscillator. The second input terminal is coupled to the second differential output pair of the oscillator. The output terminal is coupled to the amplifier stage, and The control input is coupled to the gain control wire.

7. The integrated circuit according to claim 6, wherein: The reactor component network includes an inductor connected in series between the first output node and the second output node of the oscillator; A subset of the inductors is connected in series between the third output node and the fourth output node of the oscillator; as well as The inductance between the first output node and the second output node of the first differential output pair of the oscillator is greater than the inductance between the third output node and the fourth output node of the second differential output pair of the oscillator.

8. The integrated circuit according to claim 6, wherein: The reactor component network includes a capacitor connected in series between the first output node and the second output node of the oscillator; A subset of the capacitors is connected in series between the third output node and the fourth output node of the oscillator; as well as The capacitance between the first output node and the second output node of the first differential output pair of the oscillator is greater than the capacitance between the third output node and the fourth output node of the second differential output pair of the oscillator.

9. The integrated circuit according to claim 6, wherein: The reactor component network includes an inductor connected in series between the first output node and the second output node of the oscillator; The first inductor in the inductor directly couples the first output node to the third output node; as well as The second inductor in the inductor directly couples the second output node to the fourth output node.

10. A transmitter circuit, comprising: An oscillator, the oscillator comprising: Provides the first set of output terminals for the first oscillation signal; and Provides a second set of output terminals for the second oscillation signal; A coarse gain control circuit, comprising: The first set of input terminals is coupled to the first set of output terminals of the oscillator; The second set of input terminals is coupled to the second set of output terminals of the oscillator; The gain control input terminal is used to receive the first gain control signal; and The output terminal is used to provide a first output signal, wherein the coarse gain control circuit is configured as follows: Select one signal from the first oscillation signal and the second oscillation signal; and The selected signal is adjusted according to the first gain control signal to generate the first output signal; and Amplifier stage, which includes: The input terminal is coupled to the output terminal of the coarse gain control circuit to receive the first output signal; Gain control input terminal for receiving the second gain control signal; and An output terminal for providing a second output signal, wherein the amplifier stage is configured to amplify the first output signal based on the second gain control signal to generate the second output signal; and A matching network coupled to the amplifier stage; The coarse gain control circuit includes a set of passive devices configured to select the signal and adjust the selected signal to generate the first output signal.

11. The transmitter circuit according to claim 10, wherein: The first set of output terminals of the oscillator includes a first output node and a second output node; The second set of output terminals of the oscillator includes a third output node and a fourth output node; as well as The oscillator includes: A first inductor coupled between the first output node and the third output node; A second inductor coupled between the third output node and the fourth output node; and A third inductor coupled between the fourth output node and the second output node.

12. The transmitter circuit according to claim 11, wherein: The oscillator includes a fourth inductor coupled between the third output node and the fourth output node, such that: The third output node is coupled to the voltage node via the second inductor; and The fourth output node is coupled to the voltage node via the fourth inductor.

13. The transmitter circuit of claim 10, comprising an adjustable power supply, wherein: The adjustable power supply includes an input terminal and an output terminal configured to receive the second gain control signal; The adjustable power supply is configured to provide an adjustable power signal at the output based on the second gain control signal; The amplifier stage includes a power input terminal coupled to the output of the adjustable power supply to receive the adjustable power supply signal; and The amplifier stage is configured to amplify the first output signal based on the adjustable power supply signal.

14. The transmitter circuit according to claim 11, wherein: The amplifier stage is the first amplifier stage; The transmitter circuit includes a second amplifier stage, which includes an input coupled to the output of the first amplifier stage to receive the second output signal and an output coupled to the matching network. as well as The second amplifier stage is configured to amplify the second output signal based on a third gain control signal to provide a third output signal at the output of the second amplifier stage.

15. The transmitter circuit according to claim 11, wherein: The input terminals of the amplifier stage are a pair of differential input terminals; The output of the amplifier stage is a pair of differential outputs; as well as The amplifier stage includes: A first transistor coupled between a power node and a first output terminal of the pair of differential outputs includes a gate coupled to a first input terminal of the pair of differential inputs; A second transistor coupled between the first output terminal of the pair of differential output terminals and a ground node, including a gate coupled to the first input terminal of the pair of differential input terminals; A third transistor coupled between the power node and the second output terminal of the pair of differential outputs, comprising a gate coupled to the second input terminal of the pair of differential inputs; and A fourth transistor coupled between the second output terminal of the pair of differential output terminals and a ground node, including a gate coupled to the second input terminal of the pair of differential input terminals.

16. A circuit device, comprising: A power amplifier, the power amplifier comprising: It is configured to be coupled to the first set of differential inputs of the oscillator; It is configured to be coupled to the second set of differential inputs of the oscillator; It is configured to be coupled to the output of the matching network; The first amplifier stage is coupled to the first group of differential input terminals; A second amplifier stage coupled to the first amplifier stage; The third amplifier stage is coupled to the second set of differential inputs; A fourth amplifier stage coupled to the third amplifier stage; A selection circuit is coupled to the second amplifier stage and the fourth amplifier stage, wherein the selection circuit includes an output terminal that serves as the output terminal of the power amplifier. First gain control input; A first adjustable power supply includes an input coupled to the first gain control input and an output coupled to the first amplifier stage and the third amplifier stage, wherein the first adjustable power supply is configured to provide a first power signal at the output having a power level based on the first gain control input. The second gain control input terminal; and The second adjustable power supply includes an input coupled to the second gain control input and an output coupled to the second amplifier stage and the fourth amplifier stage, wherein the second adjustable power supply is configured to provide a second power signal at the output having a power level based on the second gain control input.

17. The circuit arrangement of claim 16, wherein the power amplifier further comprises: A first gain control circuit coupled between the first set of differential input terminals and the first amplifier stage; as well as A second gain control circuit is coupled between the second set of differential inputs and the third amplifier stage.

18. The circuit arrangement according to claim 17, wherein: The first gain control circuit includes a gain control input coupled to receive a first gain control signal; and The second gain control circuit includes a gain control input coupled to receive a second gain control signal independent of the first gain control signal.

19. The circuit arrangement of claim 16, further comprising the oscillator, wherein the oscillator comprises: The first set of differential output terminals is coupled to the first set of differential input terminals of the power amplifier, wherein the first set of differential output terminals includes a first output node and a second output node. A set of reactive components coupled between the first output node and the second output node; as well as The second set of differential outputs is coupled to the second set of differential inputs of the power amplifier.

20. The circuit arrangement according to claim 19, wherein: The second set of differential output terminals includes a third output node and a fourth output node; The set of reactor components includes a set of capacitors connected in series between the first output node and the second output node; as well as The set of capacitors includes a subset of capacitors that are connected in series between the third output node and the fourth output node.

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