Memory management method and apparatus, electronic device, and autonomous vehicle

Abstract

The disclosure provides a memory management method, device and electronic equipment, and relates to the fields of automatic driving and data storage. The specific implementation scheme is as follows: a memory management method comprises the following steps: monitoring idle space information of a heap memory, wherein a first cache queue is pre-allocated in the heap memory, and the first cache queue is used to provide data cache space for a target task in a target process; in a case where a queue state of the first cache queue meets a preset condition and the idle space information represents that idle space in the heap memory is greater than a first threshold, increasing cache space corresponding to the target task in the heap memory. The disclosure can improve the effect of data caching, for example, producing an optimization effect in automatic driving task processing.

Description

Technical Field

[0001] This disclosure relates to the fields of autonomous driving and data storage, specifically to a memory management method, apparatus, electronic device, and autonomous vehicle. Background Technology

[0002] In existing technologies, when a computer program runs on a computer device, a corresponding process is generated on the device. This process may contain multiple data processing tasks, and the process processes data generated externally or internally based on these tasks. For example, the process may filter, execute, store, or forward the generated data based on the data processing tasks. Since data processing tasks may concurrently process multiple data sets, especially in the field of autonomous driving where concurrent task processing is crucial and safety requirements are high, existing technologies allocate a data cache queue in storage space corresponding to the computer program to cache data to be processed. When the data cache queue is full, newly generated data is discarded. Summary of the Invention

[0003] This disclosure provides a memory management method, apparatus, electronic device, and autonomous vehicle.

[0004] According to a first aspect of this disclosure, a memory management method is provided, comprising:

[0005] Monitor the idle space information of the heap memory, wherein a first cache queue is pre-allocated in the heap memory, and the first cache queue is used to provide data cache space for the target task in the target process;

[0006] If the queue status of the first cache queue meets the preset conditions, and the idle space information indicates that the idle space in the heap memory is greater than the first threshold, the cache space corresponding to the target task in the heap memory is increased.

[0007] According to a second aspect of this disclosure, a memory management device is provided, comprising:

[0008] The monitoring module is used to monitor the idle space information of the heap memory, wherein a first cache queue is pre-allocated in the heap memory, and the first cache queue is used to provide data cache space for the target task in the target process;

[0009] The adjustment module is used to increase the cache space corresponding to the target task in the heap memory when the queue status of the first cache queue meets a preset condition and the idle space information indicates that the idle space in the heap memory is greater than a first threshold.

[0010] According to a third aspect of this disclosure, an electronic device is provided, comprising:

[0011] At least one processor; and

[0012] A memory communicatively connected to the at least one processor; wherein,

[0013] The memory stores instructions that can be executed by the at least one processor to enable the at least one processor to perform the method described in the first aspect.

[0014] According to a fourth aspect of this disclosure, a non-transitory computer-readable storage medium is provided storing computer instructions, wherein the computer instructions are configured to cause the computer to perform the method described in the first aspect.

[0015] According to a fifth aspect of this disclosure, a computer program product is provided, comprising a computer program that, when executed by a processor, implements the method described in the first aspect.

[0016] According to a sixth aspect of this disclosure, an autonomous vehicle is provided, including the electronic equipment described in the third aspect above.

[0017] In this embodiment of the disclosure, when the queue state of the first cache queue meets the preset conditions and the idle space in the heap memory is greater than the first threshold, the cache space of the cache queue is increased. In this way, even when the first cache queue is full, newly generated data can be stored normally, thereby improving the data caching effect. Attached Figure Description

[0018] The accompanying drawings are provided to better understand this solution and do not constitute a limitation of this disclosure. Wherein:

[0019] Figure 1 This is a flowchart of a memory management method provided in an embodiment of this disclosure;

[0020] Figure 2 This is one of the schematic diagrams of the internal cache queue of the heap memory in the embodiments of this disclosure;

[0021] Figure 3 This is a second schematic diagram of the internal cache queue of the heap memory in an embodiment of this disclosure;

[0022] Figure 4 This is the third schematic diagram of the internal cache queue of the heap memory in the embodiments of this disclosure;

[0023] Figure 5 This is the fourth schematic diagram of the internal cache queue of the heap memory in the embodiments of this disclosure;

[0024] Figure 6 This is one of the structural schematic diagrams of a memory management device provided in the embodiments of this disclosure;

[0025] Figure 7 This is a second schematic diagram of the structure of a memory management device provided in this embodiment of the present disclosure;

[0026] Figure 8 This is a block diagram of an electronic device for implementing a memory management method, provided in an embodiment of the present disclosure. Detailed Implementation

[0027] The exemplary embodiments of this disclosure are described below with reference to the accompanying drawings, including various details of the embodiments to aid understanding, and should be considered merely exemplary. Therefore, those skilled in the art will recognize that various changes and modifications can be made to the embodiments described herein without departing from the scope and spirit of this disclosure. Similarly, for clarity and brevity, descriptions of well-known functions and structures are omitted in the following description.

[0028] This disclosure provides a memory management method.

[0029] Please see Figure 1 , Figure 1 This is a flowchart illustrating a memory management method provided in one embodiment of this disclosure. Figure 1 As shown, the method includes the following steps:

[0030] Step S101: Monitor the idle space information of the heap memory, wherein a first cache queue is pre-allocated in the heap memory, and the first cache queue is used to provide data cache space for the target task in the target process;

[0031] Step S102: When the queue status of the first cache queue meets the preset conditions, and the idle space information indicates that the idle space in the heap memory is greater than the first threshold, increase the cache space corresponding to the target task in the heap memory.

[0032] The memory management method described herein can be applied to servers, as well as other electronic or computer devices with data processing capabilities, such as autonomous vehicles, mobile phones, tablets, laptops, and desktop computers. The following explanation uses the application of the memory management method to a server as an example to further illustrate the method.

[0033] Specifically, idle heap memory space can be monitored based on a monitoring program pre-deployed on the server. For example, the monitoring program can be pre-written and bound to the target process. Specifically, since the monitoring program is not an independent process, a dynamic link library (.so library file) can be used to bind the monitoring program to the target process. The monitoring program generates a binary .so library file, and the target process configures the LD_PREUPLOAD variable before running to specify the loading of the monitoring .so library file, thus achieving binding with the target process.

[0034] It is understood that the heap memory is used to provide data caching space for the target process, and the free space information may include the real-time free space size of the heap memory. The target process can be the process of any program currently running on the server, and the target task can refer to any thread within the process. The target process consumes data stored in the first cache queue based on the target task. For example, the target task can be a data forwarding thread, a data storage thread, etc., within the target process. In addition to providing data caching space for the target task, the heap memory can also simultaneously provide data caching space for other tasks within the target process. For example, please refer to [link to relevant documentation]. Figure 2 In one embodiment of this disclosure, the target process includes N threads, that is, the target process includes N tasks. The heap memory provides data cache space for the N tasks at the same time. N is an integer greater than or equal to 2, that is, the heap memory can allocate N cache queues at the same time, and one cache queue corresponds to one task. The cache queue is used to provide data cache space for the task corresponding to the cache queue.

[0035] The aforementioned preset conditions can refer to various conditions that can characterize the insufficient cache in the first cache queue, or they can be conditions that receive relevant instructions from the user. For example, the preset conditions can be that the first cache queue is full, or that the data writing speed of the first cache queue is significantly greater than the data reading speed of the first cache queue. In addition, the preset conditions can also be conditions that receive an expansion instruction from the user.

[0036] The aforementioned heap memory can be a pre-configured memory space provided by relevant personnel to offer data caching space for a specific process, and the size of the heap memory is a fixed value. Currently, in related technologies, before putting the heap memory into use, relevant personnel typically set an upper limit on the cache space that each task in the process can request in the heap memory. Specifically, during runtime, a task can request cache space of different sizes from the heap memory, but the requested cache space must be less than or equal to the upper limit of the cache space it can request. Correspondingly, when the task finishes running, the requested cache space will be released to the heap memory.

[0037] However, when the data volume of a task surges and the cache space of the corresponding cache queue reaches its limit, the newly generated data will be discarded due to insufficient storage space in the cache queue, leading to data loss. In reality, when a cache queue is full, other tasks sharing the heap memory may request smaller cache spaces. In this case, the proportion of idle cache space in the heap memory may be relatively large. For example, please refer to [link to relevant documentation]. Figure 3 When the cache queue corresponding to task 3 is full, the cache space requested by the other n-1 cache queues is relatively small. At this time, the idle cache space in the heap memory is relatively large, which leads to the problem that the normal data caching needs of a specific task cannot be met when the heap memory utilization rate is low.

[0038] Based on this, in this embodiment, the idle space information of the heap memory is monitored in real time, and when the first cache queue meets preset conditions and the idle space of the heap memory is greater than a first threshold, the cache space corresponding to the target task in the heap memory is increased. Thus, when a cache queue is full, if there is a large amount of idle cache space in the heap memory, the cache space of the full cache queue can be increased to ensure normal data caching and avoid data loss.

[0039] The first threshold can be customized by relevant personnel. For example, the initial value of the first threshold can be 80% of the total cache space size of the heap memory by default, and relevant personnel can modify the initial value of the first threshold according to actual needs.

[0040] The aforementioned monitoring program can monitor the idle space information of the heap memory in real time. Thus, when the cache queue corresponding to the target task is full, the idle space information of the heap memory can be obtained directly from the monitoring program, and the cache space of the target task can be increased in a timely manner when the idle space of the heap memory is greater than the first threshold.

[0041] It is understood that when the heap memory simultaneously provides cache space for N tasks, the target task can be any of the N tasks. That is, when the cache queue corresponding to any of the N tasks meets the aforementioned preset conditions, and the idle space of the heap memory is greater than the first threshold, the cache space of the cache queue corresponding to that task can be increased. Furthermore, when two or more task-corresponding cache queues simultaneously meet the preset conditions, and the idle space of the heap memory is greater than the first threshold, the cache space of all task-corresponding cache queues that meet the preset conditions can be increased simultaneously.

[0042] In this embodiment, when the queue state of the first cache queue meets the preset conditions and the idle space in the heap memory is greater than the first threshold, the cache space of the cache queue is increased. In this way, even when the first cache queue is full, newly generated data can be stored normally, thereby improving the data caching effect.

[0043] It should be noted that, in the field of autonomous driving, the processing performance of computer equipment in autonomous vehicles for concurrent tasks is directly related to the safety of autonomous driving. Therefore, by applying the memory management method provided in the embodiments of this disclosure to computer equipment in autonomous vehicles, it is beneficial to improve the processing performance of computer equipment in autonomous vehicles for concurrent tasks, thereby improving the safety of autonomous driving.

[0044] Optionally, the monitoring of idle space information in the heap memory includes:

[0045] Monitor the memory allocation and deallocation information of the heap memory;

[0046] The free space information is calculated based on the memory request information, the memory release information, and the capacity of the heap memory.

[0047] The memory allocation information can refer to the information generated when any task requests cache space from the heap memory. Similarly, the memory release information can refer to the information generated when any task releases its cache queue to the heap memory. That is, each time a task requests or releases memory from the heap memory, a corresponding memory allocation or memory release message can be generated.

[0048] Specifically, the monitoring program can record the total capacity of the heap memory, and each time a memory request is received, it subtracts the size of the cache space corresponding to the memory request from the total capacity to obtain the idle space information of the heap memory. Correspondingly, when a memory release is received, the remaining cache space calculated previously can be added to the cache space corresponding to the memory release to calculate the current idle space information. This enables real-time monitoring of the idle space information of the heap memory.

[0049] In this embodiment, by monitoring the memory request information and memory release information of the heap memory, and calculating the idle space information based on the memory request information, the memory release information and the capacity of the heap memory, the idle space information of the heap memory is realized in real time.

[0050] Optionally, the preset conditions include: the remaining cache space of the first cache queue is less than or equal to the second threshold, and the data write speed of the first cache queue is greater than the data read speed of the first cache queue.

[0051] The second threshold can be greater than or equal to 0. When the second threshold is 0, the preset condition can include the remaining cache space of the first cache queue being 0, meaning the first cache queue is full. Alternatively, the second threshold can be greater than 0; for example, it can be 5% of the total cache space of the first cache queue, meaning the preset condition can include the remaining cache space of the first cache queue being less than or equal to 5%. This ensures that the cache space corresponding to the target task is increased before the first cache queue is full, thereby ensuring that newly added data is stored in the increased cache space when the first cache queue is full, further improving the data caching effect.

[0052] Accordingly, when the remaining cache space of the first cache queue is greater than the second threshold, the cache space of the first cache queue can be considered sufficient. Therefore, in this case, the cache space of the target task does not need to be increased.

[0053] Specifically, since the first cache queue is used to temporarily store data to be processed by the target task, newly produced data can be written to the first cache queue. Correspondingly, the target task can continuously consume data from the first cache queue, that is, the target task can continuously read data from the first cache queue to process the data. During this process, data in the first cache queue can be read and written according to atomic position variables.

[0054] When the data writing speed of the first cache queue is greater than the data reading speed of the first cache queue, the amount of data in the first cache queue will continue to increase. At this time, if the remaining cache space of the first cache queue is less than or equal to the second threshold, the first cache queue may not be able to meet the caching requirements of the newly added data. Therefore, the cache space corresponding to the target program can be increased in advance to ensure that the data can be stored normally under this condition.

[0055] Correspondingly, when the data writing speed of the first cache queue is less than or equal to the data reading speed of the first cache queue, the amount of data held in the first cache queue will gradually decrease or remain unchanged. At this time, even if the remaining cache space of the first cache queue is equal to 0, it can be ensured that the first cache queue can meet the normal data caching requirements of the target task. Therefore, in this case, the cache space of the target task does not need to be increased.

[0056] In this embodiment, when determining whether the first cache queue can meet the data caching requirements of the target task, the accuracy of the judgment can be improved by simultaneously considering two factors: the size of the remaining cache space of the first cache queue and the relative size of the data writing speed and the data reading speed of the first cache queue. This is in contrast to judging based solely on the single factor of remaining capacity.

[0057] Optionally, during execution, the target task can not only request memory from the heap memory but also release a portion of its own memory back to the heap memory. For example, when the remaining cache space of the first cache queue is greater than a fourth threshold, a portion of the memory in the first cache queue is released. Alternatively, when the data write speed of the first cache queue is less than the data caching speed of the first cache queue, and the remaining cache space of the first cache queue is greater than a fifth threshold, a portion of the memory in the first cache queue is released. The fourth threshold, the fifth threshold, and the portion of memory can be user-defined. For example, the fourth threshold can be 50% of the cache space of the first cache queue, the fifth threshold can be 20% of the cache space of the first cache queue, and the portion of memory can be 10% of the cache space of the first cache queue.

[0058] Furthermore, the current memory usage and memory allocation / release status of each task can be displayed on the user's end, allowing relevant personnel to identify corresponding problems based on these data. Additionally, the memory allocation / release status of each task can be saved locally on the server, enabling subsequent review of historical information and optimization of the cache queue based on this historical data.

[0059] Optionally, increasing the cache space corresponding to the target task in the heap memory includes:

[0060] Allocate a second cache queue corresponding to the target task in the idle space of the heap memory. The second cache queue is used to provide data cache space for the target task when the first cache queue is full; or,

[0061] Allocate a third cache queue corresponding to the target task in the idle space of the heap memory; transfer the data in the first cache queue to the third cache queue, and release the cache space of the first cache queue, wherein the space size of the third cache queue is greater than the space size of the first cache queue.

[0062] Specifically, when it is necessary to increase the cache space corresponding to the target task, a second cache queue can be reallocated in the heap memory to provide data cache space for the target task. In this way, when the first cache queue is full, newly added data can be written to the second cache queue, thus avoiding the problem of discarding newly added data when the first cache queue is full. For example, please refer to... Figure 4 When the queue status of the first cache queue of task 3 meets the preset conditions, and the idle space information indicates that the idle space in the heap memory is greater than the first threshold, a second cache queue corresponding to task 3 is allocated in the heap memory.

[0063] It should be noted that the method provided in this disclosure is mainly applicable to increasing the cache space of tasks with a surge in data volume when the total free space of heap memory is large. When the total free space of heap memory is insufficient, even if the first cache queues of the N tasks all meet the preset conditions, it is impossible to increase the cache space corresponding to any one task. For example, please refer to [link to relevant documentation]. Figure 5 When the first cache queues corresponding to N tasks are all full, and the total free space in the heap memory is 0, it is impossible to increase the cache space for any task since there is no remaining memory in the heap. In this case, the overall process architecture needs to be redesigned.

[0064] In another embodiment of this disclosure, when it is necessary to increase the cache space corresponding to the target task, a third cache queue can be reallocated in the heap memory, wherein the cache space of the third cache queue is greater than the cache space of the first cache queue. Then, the data cached in the first cache queue can be transferred to the third cache queue, and the cache space corresponding to the first cache queue can be released. Subsequently, the third cache queue provides data caching services for the target task, thereby completing the process of increasing the cache space corresponding to the target task.

[0065] In this embodiment, the process of increasing the cache space corresponding to the target task is achieved by either increasing the number of cache queues corresponding to the target task or changing the cache queues corresponding to the target task.

[0066] During the startup of the target task, the target task can request the first cache queue in the heap memory. If the requested cache space of the first cache queue is too small, it may lead to frequent adjustments to the cache space corresponding to the target task. Conversely, if the cache space of the first cache queue is too large, it will result in excessive empty data positions being occupied in the first cache queue during the execution of the target task, leading to wasted memory resources and an increased probability of memory capture exceptions. Therefore, in this embodiment, the initial value of the cache space size of the first cache queue can be determined based on historical cache space information. The specific determination process is as follows:

[0067] Optionally, before monitoring the idle space information of the heap memory, the method further includes:

[0068] During the startup of the target task, the historical cache space information corresponding to the target task is obtained. The historical cache space information includes the change information of the size of the cache space occupied by the target task within the target time period.

[0069] Based on the historical cache space information, determine the initial value of the cache space size of the first cache queue;

[0070] Based on the initial value, the first cache queue is allocated in the heap memory.

[0071] The historical cache space information may include the size of the cache space occupied by the target task at different historical points in time during runtime.

[0072] Specifically, a statistics program can be pre-configured in the server to collect historical cache space information for each task. For example, each time a task requests memory from the heap memory, the task number, the size of the cache space occupied by the task after the request, and the timestamp of the request can be passed to the statistics program. Similarly, when a task releases the memory space it occupies, the task number and the timestamp of the release can also be passed to the statistics program. For example, the statistics program can calculate a two-dimensional relationship between the size of the cache space occupied by each task and time. In this way, the initial value of the cache space size of the first cache queue can be optimized based on the two-dimensional relationship, thereby improving the rationality of the allocated first cache queue.

[0073] In this implementation, the initial value of the cache space size of the first cache queue is optimized based on the historical cache space information corresponding to the target task. For example, the average cache space occupied by the target task over a certain period of time can be taken as the initial value. Alternatively, the median cache space occupied by the target task over a certain period of time can also be taken as the initial value. Of course, the initial value can also be calculated based on the historical cache space information using other algorithms, thereby improving the rationality of the allocated first cache queue.

[0074] Optionally, the historical cache space information includes at least one historical cache value and at least one sub-time period, wherein one historical cache value corresponds to one sub-time period, and the historical cache value is used to characterize: the size of the cache space occupied by the target task within the sub-time period corresponding to the historical cache value, and the sum of the durations of the at least one sub-time period is equal to the duration of the target time period;

[0075] The step of determining the initial value of the cache space size of the first cache queue based on the historical cache space information includes at least one of the following:

[0076] If the historical cache space information includes a historical cache value, the historical cache value is determined as the initial value;

[0077] If the historical cache space information includes at least two historical cache values, the initial value is determined based on the at least two historical cache values ​​and the duration of the sub-time period corresponding to each historical cache value.

[0078] The target time period can be any historical running cycle of the target task. Specifically, the historical running cycle can refer to any continuous running time period of the target task, that is, the time period formed between the start time of the target task and the end time of that running.

[0079] During the execution cycle corresponding to the target time period, when the target task starts, it requests a first cache queue from the heap memory. The initial cache space size of this queue can be used as the first historical cache value. During the execution of the target task, the cache space may need to be adjusted. Therefore, when the target task requests an adjustment to its corresponding cache space, the adjusted cache space size can be used as the second historical cache value. The time period from the start of the target task to the initial request for cache space adjustment is recorded as a sub-time period corresponding to the first historical cache value. Thus, by recording the cache space size after each adjustment, at least one historical cache value can be obtained. Correspondingly, by recording the time points of two adjacent cache space adjustments, the sub-time period corresponding to each historical cache value can be determined.

[0080] It is understood that if the target task does not request to adjust the size of the cache space within the target time period, the historical cache space information includes a historical cache value, and the sub-time period corresponding to the historical cache value is the target time period. If the target task requests and adjusts the size of the cache space within the target time period, the sub-time period corresponding to the last historical cache value within the target time period is the time period formed between the last time the cache space was adjusted and the time when the target task ended running.

[0081] In one embodiment of this disclosure, when the historical cache space information includes K historical cache values, the initial value can be calculated based on the following formula:

[0082]

[0083] T = T1 + T2 + ... + T i +…+T k ;

[0084] Wherein, K is an integer greater than or equal to 2, S represents the initial value, and L... i T represents the i-th historical cache value. i Let T be the sub-time period corresponding to the i-th historical cache value, and let T be the duration of the target time period.

[0085] In this embodiment, when the historical cache space information includes one historical cache value, meaning that the cache space size of the target task within the target time period is the historical cache value, the target task can run stably. In this case, the historical cache value can be directly used as the initial value to ensure the stable operation of the target task. Correspondingly, when the historical cache space information includes at least two historical cache values, the initial value is calculated based on the at least two historical cache values ​​and the duration of the sub-time period corresponding to each historical cache value, thereby ensuring that the calculated initial value is a better value, and thus improving the stability of the target task's operation.

[0086] Optionally, determining the initial value based on the at least two historical cache values ​​and the duration of the sub-time period corresponding to each historical cache value includes:

[0087] A target cache value is determined from the at least two historical cache values, wherein the target cache value is the historical cache value whose corresponding sub-time period duration exceeds a third threshold among the at least two historical cache values;

[0088] The initial value is determined based on the target cache value and the duration of the sub-time period corresponding to the target cache value.

[0089] Specifically, during the execution of the target task, due to certain reasons, the data volume may surge at a certain moment, while the data volume at other moments remains relatively flat. This results in a short sub-period of data surge, and the historical cache value corresponding to the sub-period of data surge is quite large. Consequently, the initial value calculated based on the historical cache value may be too large. Therefore, when calculating the initial value, historical cache values ​​whose corresponding sub-period duration does not exceed a third threshold can be removed from the at least two historical cache values. The remaining historical cache value after removal is determined as the target cache value. Then, the initial value is determined based on the target cache value and the duration of the sub-period corresponding to the target cache value.

[0090] The third threshold can be a small time threshold, and its specific value can be selected according to the actual situation. For example, the third threshold can be 5 milliseconds, 1 second, 5 seconds, etc.

[0091] Specifically, in one embodiment of this disclosure, when the historical cache space information includes K historical cache values, and the K historical cache values ​​include m target cache values, the method further includes:

[0092] When m equals 1, that is, when there is only one target cache value, the target cache value is determined as the initial value;

[0093] When m is greater than 1, the initial value can be calculated based on the following formula:

[0094]

[0095] T = T1 + T2 + ... + T i +…+T k ;

[0096] Wherein, K is an integer greater than or equal to 2, m is less than or equal to K, and m is an integer greater than 1, S represents the initial value, and T... i For the sub-time period corresponding to the i-th historical cache value, the L i ' represents the i-th target cache value, and the T i ' represents the sub-time period corresponding to the i-th target cache value, and T represents the duration of the target time period.

[0097] In this embodiment, when the historical cache space information includes one target cache value, that is, when the cache space size of the target task is the target cache value after an anomaly is detected within the target time period, the target task can run stably. In this case, the target cache value can be directly used as the initial value to ensure the stable operation of the target task. Correspondingly, when the historical cache space information includes at least two target cache values, the initial value is calculated based on the at least two target cache values ​​and the duration of the sub-time period corresponding to each target cache value, thereby ensuring that the calculated initial value is a better value, and thus improving the stability of the target task operation.

[0098] Optionally, the target time period is the time period between the start time and the end time of the last startup of the target task. That is, the target time period is the previous running cycle of the target task.

[0099] Specifically, each time the target task is started, the time period between the start time and the end time of the previous start of the target task can be determined as the target time period, and the initial value can be calculated based on the historical cache space information within the target time period.

[0100] In this embodiment, by obtaining the historical cache space information that is closest to the start of the target task, and calculating the initial value based on the obtained historical cache space information, the rationality of the calculated initial value can be improved.

[0101] Since the target time period is the previous running cycle of the target task, if the duration of the previous running cycle is short, it may lead to unreasonable initial values. Therefore, in another embodiment of this disclosure, the target time period can also be: the running cycle of the target task that is closest to the current time point in its historical running cycles, and whose length exceeds a preset duration. The preset duration can be defined by the user, for example, it can be a relatively long duration such as 5 minutes or 10 minutes.

[0102] Please see Figure 6 This is a schematic diagram of the structure of a memory management device 600 provided in an embodiment of this disclosure. The memory management device 600 includes:

[0103] The monitoring module 601 is used to monitor the idle space information of the heap memory, wherein a first cache queue is pre-allocated in the heap memory, and the first cache queue is used to provide data cache space for the target task in the target process;

[0104] The adjustment module 602 is used to increase the cache space corresponding to the target task in the heap memory when the queue status of the first cache queue meets the preset conditions and the idle space information indicates that the idle space in the heap memory is greater than a first threshold.

[0105] Optionally, the monitoring module 601 includes:

[0106] The monitoring submodule is used to monitor the memory allocation and release information of the heap memory;

[0107] The calculation submodule is used to calculate the free space information based on the memory request information, the memory release information, and the capacity of the heap memory.

[0108] Optionally, the preset conditions include: the remaining cache space of the first cache queue is less than or equal to the second threshold, and the data write speed of the first cache queue is greater than the data read speed of the first cache queue.

[0109] Optionally, the adjustment module 602 is further configured to allocate a second cache queue corresponding to the target task in the idle space of the heap memory, wherein the second cache queue is used to provide data cache space for the target task when the first cache queue is full; or,

[0110] The adjustment module 602 is further configured to allocate a third cache queue corresponding to the target task in the idle space of the heap memory; transfer the data in the first cache queue to the third cache queue, and release the cache space of the first cache queue, wherein the space size of the third cache queue is greater than the space size of the first cache queue.

[0111] Optionally, please see Figure 7 The device further includes:

[0112] The acquisition module 603 is used to acquire historical cache space information corresponding to the target task during the startup process of the target task. The historical cache space information includes information on the change in the size of the cache space occupied by the target task within the target time period.

[0113] The determining module 604 is used to determine the initial value of the cache space size of the first cache queue based on the historical cache space information;

[0114] Allocation module 605 is used to allocate the first cache queue in the heap memory based on the initial value.

[0115] Optionally, the historical cache space information includes at least one historical cache value and at least one sub-time period, wherein one historical cache value corresponds to one sub-time period, and the historical cache value is used to characterize: the size of the cache space occupied by the target task within the sub-time period corresponding to the historical cache value, and the sum of the durations of the at least one sub-time period is equal to the duration of the target time period;

[0116] The determining module 604 is further configured to determine the historical cache value as the initial value when the historical cache space information includes a historical cache value;

[0117] The determining module 604 is further configured to determine the initial value based on the at least two historical cache values ​​and the duration of the sub-time period corresponding to each historical cache value, when the historical cache space information includes at least two historical cache values.

[0118] Optionally, the determining module 604 includes:

[0119] The first determining submodule is used to determine a target cache value among the at least two historical cache values, wherein the target cache value is the historical cache value whose corresponding sub-time period duration exceeds a third threshold among the at least two historical cache values;

[0120] The second determining submodule is used to determine the initial value based on the target cache value and the duration of the sub-time period corresponding to the target cache value.

[0121] Optionally, the target time period is the time period formed between the start time and the end time of the last start of the target task.

[0122] It should be noted that the memory management device 600 provided in this embodiment can implement all the technical solutions of the above memory management method embodiments, and therefore can at least achieve all the above technical effects, which will not be repeated here.

[0123] The acquisition, storage, and application of user personal information involved in the technical solution disclosed herein comply with the provisions of relevant laws and regulations and do not violate public order and good morals.

[0124] According to embodiments of this disclosure, this disclosure also provides an electronic device, a readable storage medium, and a computer program product.

[0125] Figure 8 A schematic block diagram of an example electronic device 800 that can be used to implement embodiments of the present disclosure is shown. The electronic device is intended to represent various forms of digital computers, such as laptop computers, desktop computers, workstations, personal digital assistants, servers, blade servers, mainframe computers, and other suitable computers. The electronic device may also represent various forms of mobile devices, such as personal digital processors, cellular phones, smartphones, wearable devices, and other similar computing devices. The components shown herein, their connections and relationships, and their functions are merely illustrative and are not intended to limit the implementation of the present disclosure described and / or claimed herein.

[0126] like Figure 8 As shown, the electronic device 800 includes a computing unit 801, which can perform various appropriate actions and processes according to a computer program stored in a read-only memory (ROM) 802 or a computer program loaded from a storage unit 808 into a random access memory (RAM) 803. The RAM 803 may also store various programs and data required for the operation of the device 800. The computing unit 801, ROM 802, and RAM 803 are interconnected via a bus 804. An input / output (I / O) interface 805 is also connected to the bus 804.

[0127] Multiple components in electronic device 800 are connected to I / O interface 805, including: input unit 806, such as keyboard, mouse, etc.; output unit 807, such as various types of displays, speakers, etc.; storage unit 808, such as disk, optical disk, etc.; and communication unit 809, such as network card, modem, wireless transceiver, etc. Communication unit 809 allows device 800 to exchange information / data with other devices through computer networks such as the Internet and / or various telecommunications networks.

[0128] The computing unit 801 can be a variety of general-purpose and / or special-purpose processing components with processing and computing capabilities. Some examples of the computing unit 801 include, but are not limited to, a central processing unit (CPU), a graphics processing unit (GPU), various special-purpose artificial intelligence (AI) computing chips, various computing units running machine learning model algorithms, a digital signal processor (DSP), and any suitable processor, controller, microcontroller, etc. The computing unit 801 performs the various methods and processes described above, such as memory management methods. For example, in some embodiments, the memory management method may be implemented as a computer software program tangibly contained in a machine-readable medium, such as storage unit 808. In some embodiments, part or all of the computer program may be loaded and / or installed on device 800 via ROM 802 and / or communication unit 809. When the computer program is loaded into RAM 803 and executed by the computing unit 801, one or more steps of the memory management method described above are performed. Alternatively, in other embodiments, the computing unit 801 may be configured to perform memory management methods by any other suitable means (e.g., by means of firmware).

[0129] According to embodiments of this disclosure, this disclosure also provides an autonomous driving vehicle, including the electronic equipment described in the above embodiments.

[0130] In this embodiment, by applying the memory management method provided in this disclosure to electronic devices in autonomous vehicles, it is beneficial to improve the processing performance of electronic devices in autonomous vehicles for concurrent tasks, thereby improving the safety of autonomous driving.

[0131] Various embodiments of the systems and techniques described above herein can be implemented in digital electronic circuit systems, integrated circuit systems, field-programmable gate arrays (FPGAs), application-specific integrated circuits (ASICs), application-specific standard products (ASSPs), systems-on-a-chip (SoCs), payload-programmable logic devices (CPLDs), computer hardware, firmware, software, and / or combinations thereof. These various embodiments may include implementations in one or more computer programs that can be executed and / or interpreted on a programmable system including at least one programmable processor, which may be a dedicated or general-purpose programmable processor, capable of receiving data and instructions from a storage system, at least one input device, and at least one output device, and transmitting data and instructions to the storage system, the at least one input device, and the at least one output device.

[0132] The program code used to implement the methods of this disclosure may be written in any combination of one or more programming languages. This program code may be provided to a processor or controller of a general-purpose computer, special-purpose computer, or other programmable data processing apparatus, such that when executed by the processor or controller, the program code causes the functions / operations specified in the flowcharts and / or block diagrams to be implemented. The program code may be executed entirely on a machine, partially on a machine, as a standalone software package partially on a machine and partially on a remote machine, or entirely on a remote machine or server.

[0133] In the context of this disclosure, a machine-readable medium can be a tangible medium that may contain or store a program for use by or in conjunction with an instruction execution system, apparatus, or device. A machine-readable medium can be a machine-readable signal medium or a machine-readable storage medium. A machine-readable medium can be, but is not limited to, electronic, magnetic, optical, electromagnetic, infrared, or semiconductor systems, apparatus, or devices, or any suitable combination of the foregoing. More specific examples of machine-readable storage media include electrical connections based on one or more wires, portable computer disks, hard disks, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), optical fiber, portable compact disk read-only memory (CD-ROM), optical storage devices, magnetic storage devices, or any suitable combination of the foregoing.

[0134] To provide interaction with a user, the systems and techniques described herein can be implemented on a computer having: a display device for displaying information to the user (e.g., a CRT (cathode ray tube) or LCD (liquid crystal display) monitor); and a keyboard and pointing device (e.g., a mouse or trackball) through which the user provides input to the computer. Other types of devices can also be used to provide interaction with the user; for example, feedback provided to the user can be any form of sensory feedback (e.g., visual feedback, auditory feedback, or tactile feedback); and input from the user can be received in any form (including sound input, voice input, or tactile input).

[0135] The systems and technologies described herein can be implemented in computing systems that include backend components (e.g., as a data server), or computing systems that include middleware components (e.g., an application server), or computing systems that include frontend components (e.g., a user computer with a graphical user interface or web browser through which a user can interact with embodiments of the systems and technologies described herein), or any combination of such backend, middleware, or frontend components. The components of the system can be interconnected via digital data communication of any form or medium (e.g., a communication network). Examples of communication networks include local area networks (LANs), wide area networks (WANs), and the Internet.

[0136] Computer systems can include clients and servers. Clients and servers are generally located far apart and typically interact via communication networks. Client-server relationships are created by computer programs running on the respective computers and having a client-server relationship with each other. Servers can be cloud servers, servers in distributed systems, or servers incorporating blockchain technology.

[0137] It should be understood that the various forms of processes shown above can be used to rearrange, add, or delete steps. For example, the steps described in this disclosure can be executed in parallel, sequentially, or in different orders, as long as the desired result of the technical solution disclosed in this disclosure can be achieved, and this is not limited herein.

[0138] The specific embodiments described above do not constitute a limitation on the scope of protection of this disclosure. Those skilled in the art should understand that various modifications, combinations, sub-combinations, and substitutions can be made according to design requirements and other factors. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of this disclosure should be included within the scope of protection of this disclosure.

Claims

1. A memory management method, comprising: During the startup of the target task, the historical cache space information corresponding to the target task is obtained. The historical cache space information includes the change information of the size of the cache space occupied by the target task within the target time period. The historical cache space information includes at least one historical cache value and at least one sub-time period, wherein one historical cache value corresponds to one sub-time period. The historical cache value is used to represent: the size of the cache space occupied by the target task within the sub-time period corresponding to the historical cache value, and the sum of the durations of the at least one sub-time period is equal to the duration of the target time period. Based on the historical cache space information, the initial value of the cache space size of the first cache queue is determined, including at least one of the following: if the historical cache space information includes one historical cache value, the historical cache value is determined as the initial value; if the historical cache space information includes at least two historical cache values, the initial value is determined based on the at least two historical cache values ​​and the duration of the sub-time period corresponding to each historical cache value. Based on the initial value, allocate the first cache queue in the heap memory; Monitor the idle space information of the heap memory, wherein the first cache queue is pre-allocated in the heap memory, and the first cache queue is used to provide data cache space for the target task in the target process; If the queue status of the first cache queue meets the preset conditions, and the idle space information indicates that the idle space in the heap memory is greater than the first threshold, the cache space corresponding to the target task in the heap memory is increased.

2. The method according to claim 1, wherein, The monitored heap memory free space information includes: Monitor the memory allocation and deallocation information of the heap memory; The free space information is calculated based on the memory request information, the memory release information, and the capacity of the heap memory.

3. The method according to claim 1, wherein, The preset conditions include: the remaining cache space of the first cache queue is less than or equal to the second threshold, and the data writing speed of the first cache queue is greater than the data reading speed of the first cache queue.

4. The method according to claim 1, wherein, Increasing the cache space corresponding to the target task in the heap memory includes: Allocate a second cache queue corresponding to the target task in the idle space of the heap memory. The second cache queue is used to provide data cache space for the target task when the first cache queue is full; or, Allocate a third cache queue corresponding to the target task in the idle space of the heap memory; transfer the data in the first cache queue to the third cache queue, and release the cache space of the first cache queue, wherein the space size of the third cache queue is greater than the space size of the first cache queue.

5. The method according to claim 1, wherein, Determining the initial value based on the at least two historical cache values ​​and the duration of the sub-time period corresponding to each historical cache value includes: A target cache value is determined from the at least two historical cache values, wherein the target cache value is the historical cache value whose corresponding sub-time period duration exceeds a third threshold among the at least two historical cache values; The initial value is determined based on the target cache value and the duration of the sub-time period corresponding to the target cache value.

6. The method according to claim 1, wherein, The target time period is the time period formed between the start time and the end time of the last time the target task was started.

7. A memory management device, comprising: The acquisition module is used to acquire historical cache space information corresponding to the target task during the target task startup process. The historical cache space information includes information on the change in the size of the cache space occupied by the target task within the target time period. The historical cache space information includes at least one historical cache value and at least one sub-time period, wherein one historical cache value corresponds to one sub-time period. The historical cache value is used to represent the size of the cache space occupied by the target task within the sub-time period corresponding to the historical cache value, and the sum of the durations of the at least one sub-time period is equal to the duration of the target time period. The determining module is used to determine an initial value of the cache space size of the first cache queue based on the historical cache space information, including at least one of the following: if the historical cache space information includes one historical cache value, determine the historical cache value as the initial value; if the historical cache space information includes at least two historical cache values, determine the initial value based on the at least two historical cache values ​​and the duration of the sub-time period corresponding to each historical cache value. An allocation module is used to allocate the first cache queue in heap memory based on the initial value; The monitoring module is used to monitor the idle space information of the heap memory, wherein the heap memory pre-allocates the first cache queue, and the first cache queue is used to provide data cache space for the target task in the target process; The adjustment module is used to increase the cache space corresponding to the target task in the heap memory when the queue status of the first cache queue meets a preset condition and the idle space information indicates that the idle space in the heap memory is greater than a first threshold.

8. The apparatus according to claim 7, wherein, The monitoring module includes: The monitoring submodule is used to monitor the memory allocation and release information of the heap memory; The calculation submodule is used to calculate the free space information based on the memory request information, the memory release information, and the capacity of the heap memory.

9. The apparatus according to claim 7, wherein, The preset conditions include: the remaining cache space of the first cache queue is less than or equal to the second threshold, and the data writing speed of the first cache queue is greater than the data reading speed of the first cache queue.

10. The apparatus according to claim 7, wherein, The adjustment module is further configured to allocate a second cache queue corresponding to the target task in the idle space of the heap memory, wherein the second cache queue is used to provide data cache space for the target task when the first cache queue is full; or, The adjustment module is further configured to allocate a third cache queue corresponding to the target task in the idle space of the heap memory; transfer the data in the first cache queue to the third cache queue and release the cache space of the first cache queue, wherein the space size of the third cache queue is greater than the space size of the first cache queue.

11. The apparatus according to claim 7, wherein, The determining module includes: The first determining submodule is used to determine a target cache value among the at least two historical cache values, wherein the target cache value is the historical cache value whose corresponding sub-time period duration exceeds a third threshold among the at least two historical cache values; The second determining submodule is used to determine the initial value based on the target cache value and the duration of the sub-time period corresponding to the target cache value.

12. The apparatus according to claim 7, wherein, The target time period is the time period formed between the start time and the end time of the last time the target task was started.

13. An electronic device, comprising: At least one processor; as well as A memory communicatively connected to the at least one processor; wherein, The memory stores instructions that can be executed by the at least one processor to enable the at least one processor to perform the method of any one of claims 1-6.

14. A non-transitory computer-readable storage medium storing computer instructions, wherein, The computer instructions are used to cause the computer to perform the method according to any one of claims 1-6.

15. A computer program product comprising a computer program that, when executed by a processor, implements the method according to any one of claims 1-6.

16. An autonomous vehicle, including the electronic equipment as claimed in claim 13.

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