QFN semiconductor package, semiconductor package and lead frame

By designing the die attachment pad, protrusion and trench structure in the lead frame of the QFN semiconductor package, the poor heat dissipation performance caused by the gap during the welding process is solved, and better heat dissipation effect is achieved.

CN114171485BActive Publication Date: 2025-06-17NXP USA INC
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Patent Information

Application Number
CN202010946800.8
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2020-09-10
Publication Date
2025-06-17
Estimated Expiration
2040-09-10

AI Technical Summary

Technical Problem

Existing QFN and QFP semiconductor packages are prone to voids during the soldering process, resulting in poor heat dissipation performance.

Method used

A lead frame including a die attachment pad and a plurality of protrusions is designed, which encapsulates molded plastic around the die attachment pad, forming a trench between each side of the die attachment pad and the lead, and avoiding the formation of flux voids during the welding process.

Benefits of technology

It effectively improves the heat dissipation performance of semiconductor packages, reduces the generation of voids during welding, and thus improves the overall performance of the package.

✦ Generated by Eureka AI based on patent content.

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Abstract

A quad flat no-lead (QFN) package includes a semiconductor die, a lead frame, and a molding compound. The lead frame includes: a die attach pad having a generally rectangular interior; and a plurality of protrusions surrounding and adjacent to and extending outwardly from its periphery; and a plurality of leads surrounding four sides of the die attach pad. The molding compound seals the semiconductor die and forms the package. The molding compound has corresponding trenches between each side of the die attach pad and a corresponding set of leads. The die attach pad has a plurality of grooves extending at least within the interior of the die attach pad from a second surface of the die attach pad toward a first surface. At least one of the plurality of grooves extends across a protrusion to a trench.
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Description

Technical Field

[0001] The present invention relates to a semiconductor package, and more particularly, to a quad flat no-lead (QFN) semiconductor package and a quad flat package (QFP), and a lead frame for a QFN semiconductor package. Background Art

[0002] Currently, there are various packages available for semiconductor devices. A common type of package is called a QFN package. In this type of package, it is a package based on a lead frame with hidden leads. Another common type of package is a QFP or quad flat package. In this type of package, the leads extend from the sides of the package housing. Both QFN and QFP packages may have heat dissipation problems because voids are generated on the back of the lead frame during the soldering process.

[0003] Taking the QFN package as an example, Figure 1 A cross-sectional view of a common QFN package 100 is shown. The QFN package 100 includes a die 101, a die attach pad 102, leads 103, bond wires 104, and a molding compound 105. As Figure 1 shown, the die 101 is supported by the die attach pad 102 below. There are leads 103 around the die attach pad 102. During assembly, the die 101 is attached to the die attach pad 102, and the bond wires 104 are used to electrically couple the bond pads on each die 101 to its associated lead 103. The bond wires 104 can also be used to electrically couple the bond pads on each die 101 to the die attach pad 102. After wire bonding, a plastic cover is molded on the top surface of the wire-bonded die with the molding compound 105.

[0004] Figure 2 Voids below the die attach pad and the leads are shown. In a conventional process, many flux voids 201 below the die attach pad 102 and the leads 103 will seriously reduce the heat dissipation performance of the package. Sometimes a large chip pad area is used to improve heat dissipation. However, due to the side effects of large voids, the thermal performance is still not good.

[0005] Therefore, there is a need for a semiconductor package that can improve the heat dissipation performance of the package. Summary of the Invention

[0006] The present summary provides a selection of concepts in a simplified form that will be elaborated in detail in the detailed description. The present summary is not intended to identify key features or essential features of the subject matter, nor is it intended to be used to limit the scope of the claimed subject matter.

[0007] According to one aspect of the present invention, there is provided a quad flat no-lead (QFN) package, comprising:

[0008] A semiconductor die;

[0009] A lead frame having a thickness between a first surface and a second surface and comprising:

[0010] A die attach pad having a substantially rectangular interior and a plurality of protrusions surrounding and adjacent to and extending outwardly from the perimeter of the interior, and

[0011] A plurality of leads surrounding four sides of the die attach pad, the leads being spaced apart from and electrically isolated from the die attach pad, with a gap between the leads and the die attach pad; and

[0012] A molding compound encapsulating the semiconductor die and forming the package, wherein the molding compound fills the space between the leads and is located in the space separating the die attach pad from the leads, and the molding compound has respective trenches on each side of the die attach pad and between each group of the leads;

[0013] Wherein the semiconductor die is attached to the first surface of the die attach pad;

[0014] Wherein the die attach pad has a plurality of grooves extending at least within the interior of the die attach pad from the second surface of the die attach pad toward the first surface, the depth of the grooves being less than the thickness of the lead frame;

[0015] Wherein at least one of the grooves extends through the protrusion to the trench.

[0016] According to one or more embodiments, the protrusions are configured to have a circular arc shape.

[0017] According to one or more embodiments, each of the protrusions is configured to be located between the die attach pad and two of the closest adjacent leads.

[0018] According to one or more embodiments, each of the trenches extends to the edge of the package.

[0019] According to one or more embodiments, the depth of the trench is one quarter of the thickness of the lead frame.

[0020] According to one or more embodiments, the depth of the groove is half of the thickness of the lead frame.

[0021] According to one or more embodiments, the plurality of grooves form an interconnected network.

[0022] According to one or more embodiments, each of the leads has a first end remote from the die attachment pad and a second end adjacent to the die attachment pad, wherein the first end is configured to be coupled to an external circuit and the end of the second end has an arcuate shape.

[0023] According to one or more embodiments, each of the leads has a trench, the trench of the lead being configured to extend from the second surface toward the first surface, and the depth of the trench of the lead being less than the thickness of the lead frame.

[0024] According to one or more embodiments, the trench in each of the leads extends through the arcuate shape of the second end to the trench.

[0025] According to one or more embodiments, the QFN package further includes a solder layer of reflowable material, the solder layer being formed on the second surface of the lead frame and under the die attachment pad and the leads.

[0026] According to a second aspect of the present invention, there is provided a component including a QFN package, further including a printed circuit board (PCB) attached to the bottom surface of the solder layer.

[0027] According to a third aspect of the present invention, there is provided a lead frame for manufacturing a QFN package, the lead frame having a thickness between a first surface and a second surface and including:

[0028] A die attachment pad region having a first rectangular inner region having a plurality of protrusions around its periphery, the plurality of protrusions being adjacent to and extending outwardly from the first rectangular inner region;

[0029] A channel region outside each of the four sides of the die attachment pad region,

[0030] And a plurality of lead regions around the die attachment pad,

[0031] Each side of the die attachment pad region is spaced from a corresponding set of the lead regions by the channel region;

[0032] Wherein the lead frame further includes a plurality of trenches, the depth of the trenches being less than the thickness of the lead frame, the depth of the trenches being at least in the first inner region of the die attachment pad region and extending from the second surface of the die attachment pad region toward the first surface;

[0033] Wherein at least one of the trenches extends partially into the corresponding protrusion.

[0034] According to one or more embodiments, the protrusions are configured to have an arcuate shape.

[0035] According to one or more embodiments, each of the protrusions is configured to be located between the die attachment pad and two adjacent ones of the leads.

[0036] According to one or more embodiments, each of the leads has a first end remote from the die attachment pad and a second end adjacent to the die attachment pad, wherein the first end is configured to be coupled to an external circuit and the end of the second end has an arcuate shape.

[0037] According to one or more embodiments, the lead has a trench, and the trench of the lead is configured to extend from the second surface toward the first surface, and the depth of the trench of the lead is less than the thickness of the lead frame.

[0038] According to another aspect of the present invention, there is provided a semiconductor package, comprising:

[0039] A semiconductor die;

[0040] A lead frame having a thickness between a first surface and a second surface and including:

[0041] A die attachment pad having a generally rectangular interior and a plurality of protrusions surrounding and adjacent to and extending outwardly from its periphery, and

[0042] A molding compound encapsulating the semiconductor die and forming the package, wherein the molding compound has a respective trench around each side of the die attachment pad;

[0043] Wherein the semiconductor die is attached to the first surface of the die attachment pad;

[0044] Wherein the die attachment pad has a plurality of trenches extending at least within the interior of the die attachment pad and from the second surface of the die attachment pad toward the first surface, and the depth of the plurality of trenches is less than the thickness of the lead frame;

[0045] Wherein at least one of the trenches extends through the protrusion to the trench.

[0046] According to one or more embodiments, the protrusion is configured to have an arcuate shape.

[0047] According to one or more embodiments, the plurality of trenches form an interconnected network. BRIEF DESCRIPTION OF THE DRAWINGS

[0048] Thus, the features of the present invention described above can be understood in detail. Based on the specific description of the present invention according to the embodiments and the above summary of the invention, some embodiments are shown in the accompanying drawings. It should be noted, however, that the drawings only show typical embodiments of the present invention and are not considered to limit the scope, as the present invention may have other equally effective embodiments. It should be understood that the drawings are schematic and not drawn to scale. The advantages of the claimed subject matter will be apparent to those skilled in the art upon reading this specification and the resulting drawings. The reference numerals in the drawings are used to denote elements, where:

[0049] Figure 1 is a cross-sectional view of a known QFN semiconductor package.

[0050] Figure 2 is a bottom view of the QFN package with voids under the chip pads and leads.

[0051] Figure 3A is a bottom view of the QFN package according to an embodiment of the present invention;

[0052] Figure 3B is Figure 3A a cross-sectional side view of the QFN package along line A-A', and Figure 3C is Figure 3A a cross-sectional side view of the QFN package along line C-C';

[0053] Figure 3D is a component of the QFN package including Figure 3B and Figure 3E is a component of the QFN package including Figure 3C ;

[0054] Figure 4A is a close-up view of the area including the protrusion 306 in Figure 3A , Figure 4B is a close-up view of the area including the protrusion 306 in Figure 3B ;

[0055] Figure 5A is a top view of the lead frame for manufacturing the QFN package, Figure 5B is an enlarged bottom view of the unit lead frame 501, Figure 5C is an enlarged top view of the unit lead frame 501;

[0056] Figure 6A is Figure 5B a cross-sectional side view of the lead frame along line A-A', Figure 6B is Figure 5B a cross-sectional side view of the lead frame along line C-C';

[0057] Figure 7 is a flowchart of the main method steps for forming a QFN package according to an embodiment of the present invention. Detailed implementation manners

[0058] Now refer to an embodiment of the QFN package according to the present invention Figure 3A 、 Figure 3B and Figure 3C 。 Figure 3A is a bottom view of the QFN package according to an embodiment of the present invention Figure 3B is Figure 3A a cross-sectional side view of the QFN package along A - A'. Figure 3C is Figure 3A a cross-sectional side view of the QFN package along the line C - C'. Figure 4A is a close-up view of the area including Figure 3A the protrusion 306. Figure 4B is a close-up view of the area including Figure 3B the protrusion 306.

[0059] The QFN package 300 includes a semiconductor die 301 and a lead frame 302. The lead frame 302 has a thickness between a first surface 303 and a second surface 304. Generally, the lead frame 302 is formed of a copper sheet and may be partially or completely coated with a metal or metal alloy to prevent corrosion or enhance adhesion. The thickness of the lead frame 302 may be approximately 203 μm.

[0060] The lead frame 302 includes a die attach pad 305 having a rectangular interior, a plurality of protrusions 306 surrounding and adjacent to the periphery of the rectangular interior and extending outward therefrom, and a plurality of leads 307 surrounding four sides of the die attach pad. The die attach pad 305 is spaced apart from and electrically isolated from the plurality of leads 307, and there is a gap between the die attach pad 305 and the plurality of leads 307. The die attach pad 305 and the plurality of leads 307 may have the same thickness as the lead frame 302. The interior of the die attach pad 305 may have a size of approximately 3 mm × 3 mm. In one or more embodiments, the QFN package may have a die attach pad smaller in size than, for example, Figure 3A 、 3B and that shown in 3C. In a preferred embodiment, each protrusion 306 has an arc shape and may be located between the die attach pad 305 and two adjacent corresponding leads 307 to prevent the die attach pad 305 from directly contacting the leads 307, which will reduce the risk of short circuit and make the subsequent cutting process easier. In other embodiments, the protrusion 306 may have other shapes, for example, rectangular.

[0061] The QFN package 300 further includes a molding compound 308 that encapsulates the semiconductor die 301 and forms the QFN package 300. The molding compound 308 fills the space between the leads 307 and is located in the space that separates the die attachment pad 305 from the leads 307. The molding compound 308 has corresponding trenches 309 between each side of the die attachment pad 305 and a corresponding set of leads 307. In a preferred embodiment, each trench 309 may extend to the edge of the package. The preferred depth of the trench does not exceed half of the thickness of the die attachment pad 305. The depth of the trench 309 may be one - quarter of the thickness of the die attachment pad 305.

[0062] The semiconductor die 301 can be attached to the first surface 303 of the die attachment pad 305 using conventional die - attach techniques. Subsequently, the semiconductor die 301 can be electrically connected to the associated leads 307 via bonding wires 104. The bonding wires are typically formed of gold or copper.

[0063] According to the present disclosure, the die attachment pad 305 has a plurality of grooves 310 extending from the second surface 304 of the die attachment pad 305 towards the first surface 303, and the depth of the grooves is less than the thickness of the lead frame 302. In a preferred embodiment, the depth of the grooves 310 is half of the thickness of the lead frame 302. The depth of the grooves can be approximately 100 μm. The depth of the grooves 310 can vary. As Figure 3A shown, preferably, the plurality of grooves 310 can form an interconnected network that helps prevent voids from being generated during soldering. Figure 3A Only one pattern of the plurality of grooves 310 is shown; however, there can be more patterns of grooves to form an interconnected network on the back surface of the die attachment pad 305.

[0064] As will be described in more detail in Figure 4A and Figure 4B at least one groove 310 extends through the protrusion 306 to the trench 309.

[0065] Referring to Figure 4A and Figure 4B, the die attach pad 305 may have the same thickness d1 as the lead frame 302. The die attach pad 305 has a plurality of protrusions 306, and the plurality of protrusions 306 may have a width w1. The die attach pad 305 has a plurality of grooves 310 with a depth d2, and the depth d2 may be at least half of the thickness d1 extending from the second surface 304 to the first surface 303 inside the die attach pad 305. Trenches 309 are located between each side of the die attach pad 305 and a corresponding set of leads 307. A part of the trench 309 may overlap with the protrusion 306 to expose the groove 310. The overlapping part may have a width w2 and a depth d3. Thus, at least part of the groove 310 extends into the protrusion 306 until the trench 309.

[0066] Return Figures 3A to 3C , each lead 307 has a first end away from the die attach pad 305 and a second end close to the die attach pad 305. The first end of the lead 307 is exposed on the bottom surface and the side surface of the package to allow electrical communication with an external circuit. In this preferred embodiment, each second end close to the die attach pad 305 has an arc shape. The lead 307 preferably has a groove 311, which is configured to extend from the second surface towards the first surface, and its depth is less than the thickness of the lead frame. And, the groove 311 in each lead 307 extends into the arc shape of the second end until the trench 309.

[0067] Figure 3A Markings of visible surfaces or edges are also shown. As Figure 3A shown, the lead 307 may include a recessed lead portion 350 at the bottom and the edge 351 of the groove 311 and a lead portion 352 at the surface of the package. The molding compound 353 fills between the leads 307. The trench 309 may overlap with the lead 307. The lead metal portion 354 and the molding compound portion 355 may be exposed at the bottom of the trench 309. The trench 309 may be formed on the main connecting rod 359 and an indented main tie bar portion 356 may be formed on the molding compound portion 355. The trench 309 may include a trench edge 357, while the main tie bar may include an edge 358. The molding compound portion 360 may fill between the trench 309 and the main tie bar portion 359. The trench 309 may further include an edge 361, and the molding compound portion 362 is located below the trench 309.

[0068] Figure 3D is a component of a QFN package including Figure 3B . Figure 3E is a component of a QFN package including Figure 3C . Refer to Figure 3C , Figure 3D and Figure 3E, a component including the QFN package 300 may further include an auxiliary solder layer 312 of reflowable material formed on the second surface of the lead frame 302, and the auxiliary solder 312 may be formed of a solder material. The trench 310 may also be filled with a solder material. The auxiliary solder layer 312 may enhance the electrical conductivity and help attach the die attach pad 305 to the substrate 313. In one embodiment, the substrate 313 may be a printed circuit board (PCB). The printed circuit board (PCB) may be attached to the bottom surface of the auxiliary solder layer 312.

[0069] Generally, the auxiliary solder layer 312 is formed to a thickness of about 30 - 90 μm. Generally, a screen printing process may be used to apply such an auxiliary solder layer. Screen printing is a process by which solder paste can be applied to the surface of a substrate through openings in a screen mask. The openings in the screen mask can be patterned to align with the die attach pad 305 and the leads 307. By applying the solder paste through the openings in the screen, the auxiliary solder layer 312 is applied to the die attach pad 305 and the leads 307 of the QFN package 300. The auxiliary solder layer 312 may be reflowed during the reflow process before being attached to the PCB 313. However, the solder paste commonly used during screening includes a large amount of flux and epoxy resin. This may produce the soft compound required during the screening process, but it also causes some problems during the reflow of the additional solder layer because the heated flux produces gas, which results in so-called "flux voids". The presence of the protrusions 306, trenches 307, and trench 309 may provide a path for the unwanted flux voids formed during the soldering process to reach the outside, so that there are no voids in the solder.

[0070] The semiconductor device of the present invention may not be limited to the QFN package. In the QFN package according to an embodiment of the present invention, since the leads are located inside the QFN package, the voids generated during the soldering process may also be exposed through the trenches formed in the leads. However, the semiconductor package may be other types of packages, such as the QFP package, which has no leads inside.

[0071] A semiconductor package is provided below. The semiconductor package includes a semiconductor die and a lead frame having a thickness between a first surface and a second surface. The lead frame includes a die attach pad having a generally rectangular interior and a plurality of protrusions surrounding its periphery, adjacent to and extending outwardly therefrom. The semiconductor package may further include a molding compound that encapsulates the semiconductor die and forms the package. In one or more embodiments, the protrusions may have an arc shape to avoid the risk of short circuit. The molding compound has a corresponding trench around each side of the die attach pad. The semiconductor die is attached to the first surface of the die attach pad. The die attach pad has a plurality of grooves at least within the interior of the die attach pad, and the depth of the grooves is less than the thickness extending from the second surface of the die attach pad toward the first surface. In one or more embodiments, the plurality of grooves may form an interconnect network. Each of the plurality of grooves extends into a corresponding one of the protrusions until it meets the trench.

[0072] Referring to Figure 5A , Figure 5B , Figure 5C , Figure 6A and Figure 6B , embodiments of a lead frame group according to the present invention are shown. Figure 5A is a top view of a lead unit frame for manufacturing a QFN package. Figure 5B is an enlarged bottom view of a single lead frame 501, Figure 5B is an enlarged bottom view of a single lead frame 501. Figure 5C is an enlarged top view of the lead frame 501. Figure 6A is Figure 5B a cross-sectional side view of the lead frame along line A-A'. Figure 6B is Figure 5A a cross-sectional side view of the lead frame along line C-C'.

[0073] The lead frame group 500 is composed of a plurality of unit lead frames 501. The unit lead frames 501 have the same configuration and can be arranged in a matrix form and are supported by a main tie bar 502 and a cross tie bar 503. The unit lead frames 501 are interconnected with each other through the cross tie bar 503. Figure 5A A 2×2 matrix of the unit lead frame 501 is shown. However, there may be other numbers of unit lead frames, and they do not have to have an equal number of rows and columns. They can be provided on a continuous reel.

[0074] The bottom view of the lead frame 501 (see Figure 5B ) is the same as that of the QFN package 300 (see Figure 3A) The differences between the bottom views include the following regions. The lead frame 501 has cross ties 503 that are removed in the QFN package 300. Additionally, the lead frame 501 has channels 504, while the QFN package 300 has trenches 309 formed by cutting at least over the filled channels 504. Details of the unit lead frame 501 will be described below.

[0075] The unit lead frame 501 has a thickness between a first surface 303 and a second surface 304. The unit lead frame 501 may include a die attach pad region 305 having a first inner region that is substantially rectangular and surrounded by a plurality of protrusions 306 that are continuous with and extend outward from the first inner region. Channel regions 504 are outside each of the four sides of the die attach pad region 305, and a plurality of lead regions 307 surround the die attach pad 305. The main tie 502 and the cross ties 503 support the die attach pad region 305 and the lead regions 307. Each side of the die attach pad region 305 may be spaced from a corresponding set of lead regions 307 by the channel regions 504. The lead frame 501 further includes a plurality of trenches 310 having a depth less than the thickness of the lead frame 501, the depth being at least in the first inner region of the die attach pad 305 and extending from the second surface 304 of the die attach pad region 305 toward the first surface 303. Each of the plurality of trenches extends only partially into the protrusions 306. In one or more embodiments, each of the plurality of trenches only partially extends into the protrusions 306. In other embodiments, when the plurality of trenches form an interconnection network, at least one of the plurality of trenches only partially extends into the protrusions 306.

[0076] Figure 7 is a flowchart showing the main method steps of forming Figure 3A , Figure 3B and Figure 3C the QFN package shown.

[0077] In step 701, a lead frame is made of a metal sheet such as a strip or continuous strip of copper, ferroalloy, etc., and is processed by a sputtering or etching process to fabricate a matrix arrangement of unit lead frames. The unit lead frames have the same configuration and may be arranged in a matrix and supported by main ties and cross ties. The unit lead frames may be interconnected by the cross ties.

[0078] Each unit lead frame has a thickness between a first surface and a second surface and includes a die attach pad having a substantially rectangular interior and a plurality of protrusions surrounding and adjacent to and extending outwardly from the periphery of the rectangular interior. The plurality of protrusions are continuous with the rectangular interior. Channels are formed on the outer side of each of the four sides of the die attach pad, and a plurality of leads are provided around the four sides of the die attach pad. Each side of the die attach pad is spaced from a corresponding set of leads by the channels. The protrusions may be formed integrally with the die attach pad and be part of the die attach pad. The thickness of the protrusions and the die attach pad may be the same. The die attach pad further has a plurality of grooves, the depth of which is less than the thickness of the lead frame, and the grooves extend from the second surface of the die attach pad toward the first surface, and the lead frame extends at least within the interior of the die attach pad. The grooves may be formed using any desired process including but not limited to etching, milling, pressing, or stamping, etc. Thus, each protrusion may block an end of a groove to prevent the molding compound from clogging the groove during a subsequent molding process. In a preferred embodiment, the grooves may be provided in the second surface area of the leads in the lead frame.

[0079] In step 702, the semiconductor die is attached to the first surface of the die attach pad by using any known die attachment technique.

[0080] In step 703, the semiconductor die may have electrodes on the active surface of the die, and the electrodes may be electrically connected to the respective leads by bonding wires.

[0081] In step 704, a molding operation is performed to encapsulate the semiconductor die with a molding compound, but the distal ends of the leads are left exposed to allow the bottom and sides of the leads to communicate with an external circuit. The molding compound fills the space between the leads, and the molding compound is filled in the space separating the die attach pad from the leads and forms a package.

[0082] In step 705, a cutting process is performed by a saw blade to form a corresponding trench between each side of the die attach pad and a corresponding set of leads, and the individual QFN packages are separated from the matrix by cutting along the cross ties. Thus, the cross ties connecting between the unit lead frames are removed. In a preferred embodiment, the depth of the trench may be one quarter of the thickness of the die attach pad. The trench width may be equal to the normal saw blade width, i.e., about 25 μm. After cutting, the plurality of grooves extend partially through the protrusions into the trench, so that unclogged grooves may be provided at least on the second surface of the die attach pad.

[0083] In use, the package can be attached to a PCB or other substrate by using a soldering process. During soldering, an auxiliary solder layer can be formed on the second surface of the die attach pad and on the leads. Also, the trenches can be filled with a soldering material. Typically, during the reflow of the auxiliary solder layer, the soldering process creates unwanted flux voids. The presence of the protrusions, trenches, and moats in the present disclosure can help the excess flux voids formed during the soldering process to be discharged to the outside, thus preventing voids from remaining in the solder, and thus preventing voids from remaining under the die attach pad, improving the heat dissipation of the semiconductor package.

[0084] The terms "a" and "the" and similar terms (especially in the claims) as used herein to describe the subject matter are to be construed to cover both the singular and the plural unless otherwise indicated or clearly contradicted in context. The numerical ranges recited herein are merely a convenient way to represent the discrete values that fall within the range, and each discrete value is included in the specification as if it were recited separately, unless otherwise indicated. Additionally, the foregoing description is merely exemplary and not intended to be limiting, and the scope of protection is defined by the claims. The use of any and all examples, or terms such as "for example," provided herein is merely for the purpose of better illustrating the subject matter and is not a limitation on the scope of the subject matter, unless otherwise claimed. The use of the term "based on" and other similar phrases as recited in the claims and the specification indicates the conditions for producing a result and is not intended to exclude any other conditions for producing that result. No term in the specification is to be construed as an element essential to the claimed implementation of the invention that is not claimed.

[0085] Preferred embodiments are described herein. Of course, variations of those preferred embodiments will be apparent to those skilled in the art based on what is recited herein. Those skilled in the art will appropriately use those variations, as well as the inventors' intention to implement the claimed claims in different ways specifically recited herein. Thus, the claimed subject matter includes all modifications of the subject matter recited in the claims and their equivalents as permitted by applicable law. Additionally, unless specifically indicated or clearly contradicted herein, combinations of the elements described above in all possible variations are covered herein.

Claims

1. Quad Flat No-lead (QFN) package, comprising: Semiconductor die; Lead frame, the lead frame having a thickness between a first surface and a second surface and comprising: A die attach pad having a rectangular interior and a plurality of protrusions surrounding the perimeter of the interior and adjacent to and extending outwardly from the interior, and A plurality of leads surrounding four sides of the die attach pad, the leads being spaced apart from and electrically isolated from the die attach pad, there being a gap between the leads and the die attach pad; and Molding compound encapsulating the semiconductor die and forming the package, wherein the molding compound fills the space between the leads and is located in the space separating the die attach pad from the leads, the molding compound having respective trenches on each side of the die attach pad and between each group of the leads; Wherein the semiconductor die is attached to the first surface of the die attach pad; Wherein the die attach pad has a plurality of grooves extending at least in the interior of the die attach pad from the second surface of the die attach pad towards the first surface, the depth of the grooves being less than the thickness of the lead frame; Wherein the plurality of grooves each extend into a corresponding protrusion until they meet the trenches.

2. The QFN package according to claim 1, wherein, The protrusions are configured to have an arc shape.

3. The QFN package according to claim 1, wherein, Each of the protrusions is configured to be located between the two adjacent leads closest to the protrusion on the die attach pad.

4. The QFN package according to claim 1, each of the trenches extending to the edge of the package.

5. The QFN package according to claim 1, wherein, The depth of the trenches is one quarter of the thickness of the lead frame.

6. The QFN package according to claim 1, wherein, The plurality of grooves form an interconnected network.

7. The QFN package according to claim 1, further comprising a solder layer of reflowable material, the solder layer being formed on the second surface of the lead frame and under the die attach pad and the leads.

8. An assembly comprising the QFN package according to claim 7, further comprising a printed circuit board (PCB) attached to the bottom surface of the solder layer.

9. A lead frame for manufacturing the QFN package according to any one of claims 1 - 7, the lead frame having a thickness between a first surface and a second surface, and comprising: A die attach pad region having a first rectangular interior region with a plurality of protrusions around its periphery, the plurality of protrusions being adjacent to and extending outwardly from the first rectangular interior region; A channel region outside each of the four sides of the die attach pad region, And a plurality of lead regions around the die attach pad, Each side of the die attach pad region being spaced apart from a corresponding set of the lead regions by the channel region; Wherein the lead frame further includes a plurality of grooves, the depth of the grooves being less than the thickness of the lead frame, the depth of the grooves extending at least in the first interior region of the die attach pad region and from the second surface of the die attach pad region towards the first surface; Wherein the grooves partially extend into the corresponding protrusions.

10. A semiconductor package, comprising: Semiconductor die; Lead frame, the lead frame having a thickness between a first surface and a second surface and comprising: A die attach pad having a rectangular interior and a plurality of protrusions surrounding its periphery and adjacent to and extending outwardly therefrom, and Molding compound encapsulating the semiconductor die and forming the package, wherein the molding compound has a corresponding trench around each side of the die attach pad; Wherein the semiconductor die is attached to the first surface of the die attach pad; Wherein the die attach pad has a plurality of grooves extending at least in the interior of the die attach pad and from the second surface of the die attach pad towards the first surface, the depth of the plurality of grooves being less than the thickness of the lead frame; Wherein the plurality of grooves each extend into a corresponding one of the protrusions until they meet the trenches.

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