Semiconductor devices and electronic devices

Abstract

The semiconductor device (100) is configured to be mounted on a wiring substrate having wiring, and comprises: a first semiconductor element (1) and a second semiconductor element (2) having electrodes formed on both sides; two first terminals (51, 52) arranged in one direction; two second terminals (53, 54) arranged in one direction; and a sealing resin portion (7). The sealing resin portion covers the first semiconductor element, the second semiconductor element, the first terminal, and the second terminal in a state where one side of the first terminal and the second terminal facing the wiring substrate is exposed. The area ratio of one side of the two first terminals is different, and the area ratio of one side of the two second terminals is different. One of the two first terminals is arranged adjacent to both sides of the two second terminals.

Description

[0001] Cross-references of related applications

[0002] This application is based on Japanese Patent Application No. 2019-128733 filed on July 10, 2019, the contents of which are incorporated herein by reference. Technical Field

[0003] The present invention relates to a semiconductor device and an electronic device having the semiconductor device. Background Art

[0004] Conventionally, as an example of a semiconductor device having two semiconductor elements, there is a semiconductor device disclosed in Patent Document 1. In this semiconductor device, a high-side power MOSFET of a composite power metal oxide semiconductor field effect transistor (MOSFET) constituting a DC-DC converter is constituted by a lateral MOSFET, and a low-side power MOSFET is constituted by a vertical MOSFET.

[0005] Prior art literature

[0006] Patent Literature

[0007] Patent Document 1: Japanese Patent Application Publication No. 2002-217416 Summary of the invention

[0008] In Patent Document 1, two semiconductor elements are formed in the same shape. Therefore, according to Patent Document 1, it is difficult to use the semiconductor element for an inverter or as a switching element of a semiconductor relay. In addition, in products that handle large currents, the wiring area and width become larger, making it even more difficult to take both into account.

[0009] An object of the present invention is to provide a semiconductor device in which a semiconductor element can be used as a switching element of an inverter or a semiconductor relay, and an electronic device including the semiconductor device.

[0010] The semiconductor device of the first technical solution of the present invention is configured to be mounted on a wiring substrate having wiring, and is provided with a first semiconductor element and a second semiconductor element, two first terminals, two second terminals and a sealing resin portion. The first semiconductor element and the second semiconductor element have electrodes formed on both sides. The two first terminals are connected to a part of the wiring when mounted on the wiring substrate, and are electrically connected to each electrode of the first semiconductor element, and are arranged in one direction. The two second terminals are connected to a part of the wiring when mounted on the wiring substrate, and are electrically connected to each electrode of the second semiconductor element, and are adjacent to the first terminals and arranged in one direction. The sealing resin portion covers the first semiconductor element, the second semiconductor element, the first terminal, and the second terminal in a state where one side of the first terminal and the second terminal facing the wiring substrate is exposed when mounted on the wiring substrate. The area ratio of one side of the two first terminals is different, and the area ratio of one side of the two second terminals is different. One of the two first terminals is arranged adjacent to both sides of the two second terminals.

[0011] In the semiconductor device of the first technical solution, the first terminal and the second terminal are configured as described above. Therefore, the semiconductor device of the first technical solution can suppress the size from increasing, and can use each semiconductor element for an inverter or as a switching element of a semiconductor relay according to the connection position between the wiring of the wiring substrate and each first terminal and each second terminal.

[0012] An electronic device according to a second aspect of the present invention comprises: the semiconductor device according to the first aspect; and a wiring substrate on which the semiconductor device is mounted and on which wiring electrically connected to two first terminals and two second terminals is formed.

[0013] The electronic device of the second technical solution can achieve the same effects as those of the first technical solution. BRIEF DESCRIPTION OF THE DRAWINGS

[0014] Figure 1 It is a plan view showing a schematic structure of the semiconductor device according to the first embodiment.

[0015] Figure 2 It is along Figure 1 Cross-sectional view along line II-II.

[0016] Figure 3 It is along Figure 1 Cross-sectional view along line III-III.

[0017] Figure 4 It is a plan view showing an example of a mounting structure of the semiconductor device according to the first embodiment.

[0018] Figure 5 yes Figure 4 Equivalent circuit of a semiconductor device in a mounting structure.

[0019] Figure 6 It is a plan view showing an example of a mounting structure of the semiconductor device according to the first embodiment.

[0020] Figure 7 yes Figure 6 Equivalent circuit of a semiconductor device in a mounting structure.

[0021] Figure 8 It is a schematic diagram showing a wiring pattern of a printed circuit board according to the first embodiment.

[0022] Fig. 9 is a cross-sectional view of a semiconductor device according to Modification 1.

[0023] Fig.10 It is a plan view showing a schematic structure of a semiconductor device according to a second embodiment.

[0024] Fig.11 It is along Fig.10 A cross-sectional view taken along line XI-XI.

[0025] Fig.12 It is along Fig.10 A cross-sectional view taken along line XII-XII.

[0026] Fig.13 It is along Fig.10 A cross-sectional view taken along line XIII-XIII.

[0027] Fig.14 This is an equivalent circuit of the semiconductor device according to the second embodiment.

[0028] Fig.15 It is a plan view showing a schematic structure of a semiconductor device according to Modification Example 2.

[0029] Fig.16 This is an example of an equivalent circuit of the semiconductor device of Modification Example 2.

[0030] Fig.17 It is a plan view showing a schematic structure of a semiconductor device according to a third embodiment.

[0031] Fig.18 This is an equivalent circuit of the semiconductor device according to the third embodiment.

[0032] Fig.19 This is a circuit diagram showing an application example of the semiconductor device according to the fourth embodiment.

[0033] Fig. 20 It is a plan view showing a schematic structure of a semiconductor device according to a fifth embodiment.

[0034] Fig.21 It is along Fig. 20Cross-sectional view of line XXI-XXI.

[0035] Fig. 22 It is a plan view showing a schematic structure of a semiconductor device according to a reference example.

[0036] Fig.23 It is a cross-sectional view of a semiconductor device according to Modification 3. DETAILED DESCRIPTION

[0037] Hereinafter, a plurality of forms for implementing the present invention will be described with reference to the accompanying drawings. In each form, the same reference numerals are given to the parts corresponding to the matters described in the previous form and the repeated description is omitted. In each form, when only a part of the structure is described, the other forms described previously can be referred to and applied to the other parts of the structure. In addition, three mutually orthogonal directions are represented as X direction, Y direction, and Z direction below.

[0038] (First embodiment)

[0039] use Figures 1 to 8 , the semiconductor device 100 is described. Figure 1 , Figure 2 , Figure 3 As shown, the semiconductor device 100 includes two semiconductor elements, namely, a first semiconductor element 1 and a second semiconductor element 2, two lead frames, two connection pieces 3 and 4, and a sealing resin portion 7. The semiconductor device 100 can be mounted on a printed circuit board 200 having wirings 210 and 220. The printed circuit board 200 is equivalent to a wiring board. A structure including the semiconductor device 100 and the printed circuit board 200 on which the semiconductor device 100 is mounted is equivalent to an electronic device.

[0040] In addition, Figure 1 In the figure, the drawing is simplified, and a part of the sealing resin portion 7 is omitted in order to make each component easy to understand. Figure 1 The portion of the sealing resin portion 7 covering the two semiconductor elements 1 and 2 , the two lead frames and the two connection pieces 3 and 4 is omitted.

[0041] The semiconductor elements 1 and 2 have electrodes formed on both sides. As an example, the semiconductor elements 1 and 2 use MOSFET. However, the present invention is not limited to this, and as the semiconductor elements 1 and 2, an insulated gate bipolar transistor (IGBT) or the like can also be used. Furthermore, as an example of the semiconductor elements 1 and 2, a reverse conduction (RC)-IGBT that integrates an IGBT and a diode can also be used. In addition, the semiconductor elements 1 and 2 can, for example, use a structure composed mainly of Si or a structure composed mainly of SiC.

[0042] The first semiconductor element 1 is Figure 1 , Figure 2, Figure 3 As shown, there is a first substrate, a first drain electrode 13 exposed on the back side of the first substrate, and a first source electrode 12 and a first gate electrode 11 exposed on the front side (opposite side of the back side) of the first substrate. The first drain electrode 13 is formed on substantially the entire area of ​​the front side. On the other hand, the first gate electrode 11 and the first source electrode 12 are partially formed on the back side.

[0043] The first substrate is, for example, rectangular in the XY plane and has thickness in the Z direction. In the present embodiment, as an example, a first substrate is used in which the Y direction is the longer direction and the X direction is the shorter direction.

[0044] The first semiconductor element 1 may be formed with a temperature sensor, a current sensor, etc. In this case, the first semiconductor element 1 forms a pad electrically connected to the temperature sensor and the current sensor on the same surface as the first gate electrode 11 and the first source electrode 12. In addition, the pad is arranged in parallel with the first gate electrode 11 in the X direction, for example.

[0045] The second semiconductor element 2 includes a second substrate, a second drain electrode 23 exposed on the back side of the second substrate, and a second source electrode 22 and a second gate electrode 21 exposed on the front side of the second substrate. The second semiconductor element 2 has the same structure as the first semiconductor element 1. Therefore, for the second semiconductor element 2, the description of the first semiconductor element 1 can be referred to.

[0046] The first drain electrode 13 and the second drain electrode 23 correspond to back electrodes, and the first source electrode 12 and the second source electrode 22 correspond to front electrodes.

[0047] In the semiconductor device 100 , the first semiconductor element 1 and the second semiconductor element 2 are arranged in opposite directions. That is, the first semiconductor device 100 is arranged such that the arrangement direction of the first gate electrode 11 and the first source electrode 12 is opposite to the arrangement direction of the second gate electrode 21 and the second source electrode 22 .

[0048] The two lead frames include a first lead frame for the first semiconductor element 1 and a lead frame for the second semiconductor element 2. The first lead frame includes a first drain terminal 51, a first source terminal 52, and an external connection terminal 6. The first drain terminal 51 and the first source terminal 52 are equivalent to two first terminals. The first lead frame can be configured with a conductive material of a metal material such as Cu, Fe, or an alloy thereof as a main component. The first drain terminal 51, the first source terminal 52, and the external connection terminal 6 are separated from each other.

[0049] Each terminal 51, 52, 6 is a plate-shaped component. In addition, the surface of each terminal 51, 52, 6 along the XY plane is rectangular. The side wall of each terminal 51, 52, 6 is arranged perpendicular to the XY plane. As a result, the surface of the first drain terminal 51 on which the first semiconductor element 1 is mounted and the surface opposite thereto are approximately the same in area, but may be different. This is also the same for the other terminals 52, 6.

[0050] The first drain terminal 51 is Figure 2 , Figure 3 As shown in FIG. 1 , the first semiconductor element 1 is mounted on the mounting surface. Specifically, the first drain terminal 51 is a portion where the first semiconductor element 1 is mounted and electrically connected to the first drain electrode 13. The first drain terminal 51 is electrically connected to the first drain electrode 13 via a conductive connection member such as solder. Thus, the first semiconductor element 1 is mounted on the first drain terminal 51 by electrically connecting the first drain electrode 13 to the first drain terminal 51 via a conductive connection member. In addition, in the present embodiment, solder is used as the conductive connection member. The first drain terminal 51 is equivalent to the first back side terminal.

[0051] The first source terminal 52 is Figure 2 As shown, the first drain terminal 51 and the first source terminal 52 are electrically connected to the first source electrode 12 via the first connection sheet 3 described later. In this way, the first source terminal 52 is not mounted on the first semiconductor element 1, but is electrically connected to the first semiconductor element 1 (first source electrode 12) via the first connection sheet 3. The first source terminal 52 is equivalent to the first surface terminal. In this way, the first drain terminal 51 and the first source terminal 52 are electrically connected to the electrodes 13 and 12 of the first semiconductor element 1.

[0052] The first lead frame has a first terminal surface S21 which is a surface opposite to the mounting surface of the first semiconductor element 1 in the first drain terminal 51 and a surface opposite to the connection surface of the first connection piece 3 in the first source terminal 52. The first terminal surface S21 corresponds to one surface.

[0053] The first terminal surface S21 is exposed from the sealing resin portion 7 described later. Therefore, the first drain terminal 51 and the first source terminal 52 have a function as a heat sink for dissipating heat generated from the first semiconductor element 1 in addition to the function of electrical wiring. Therefore, the first terminal surface S21 can also be said to be a heat dissipation surface. When the semiconductor device 100 is mounted on the printed circuit board 200, the first drain terminal 51 and the first source terminal 52 are exposed from the sealing resin portion 7 and are connected to a part of the wiring 210 and 220.

[0054] In addition, the mounting surface, the connection surface, and the first terminal surface S21 can be, for example, flat surfaces. In addition, the first terminal surface S21 of the first drain terminal 51 and the first terminal surface S21 of the first source terminal 52 are coplanar.

[0055] In addition, if Figure 1 As shown, the first drain terminal 51 and the first source terminal 52 are arranged in one direction. In the present embodiment, an example is adopted in which the first drain terminal 51 and the first source terminal 52 are arranged in the Y direction. The area ratio of the first terminal surface S21 of the first drain terminal 51 and the first source terminal 52 is different. That is, the areas of the surfaces along the XY plane of the first drain terminal 51 and the first source terminal 52 are different from each other. The first terminal surface S21 of the first drain terminal 51 is larger than the first terminal surface S21 of the first source terminal 52.

[0056] The second lead frame has a second drain terminal 53, a second source terminal 54, and an external connection terminal 6. The second lead frame is connected and mounted to the second semiconductor element 2, but has the same structure as the first lead frame. Therefore, the description of the first lead frame can be referred to for the second lead frame. For example, Figure 1 As shown in FIG. 1 , the second drain terminal 53 and the second source terminal 54 are arranged in a row in one direction, and the area ratio of the first terminal surface S21 is different. That is, the areas of the second drain terminal 53 and the second source terminal 54 along the XY plane are different from each other. The first terminal surface S21 of the second drain terminal 53 is larger than the first terminal surface S21 of the second source terminal 54.

[0057] In addition, the second drain terminal 53 corresponds to the second back side terminal. The second source terminal 54 corresponds to the second front side terminal. In addition, in the present embodiment, a semiconductor device 100 is adopted in which a portion of the first drain terminal 51 is shaped to protrude to a position adjacent to the external connection terminal 6, and a portion of the second source terminal 54 is shaped to protrude to a position adjacent to the external connection terminal 6.

[0058] Furthermore, regarding the first source terminal 52, the width in the Y direction, i.e., the first terminal width, is LW1, and the width in the X direction, i.e., the second terminal width, is LW2. Regarding the first drain terminal 51, the width in the Y direction is longer than the first terminal width LW1, and the width in the X direction is the same as the second terminal width LW2.

[0059] On the other hand, the second source terminal 54 has a width in the Y direction that is the same as the first terminal width LW1, and a width in the X direction that is the same as the second terminal width LW2. The second drain terminal 53 has a width in the Y direction that is longer than the first terminal width LW1, and a width in the X direction that is the same as the second terminal width LW2. In addition, the second drain terminal 53 has a width in the Y direction that is the same as the width in the Y direction of the first drain terminal 51.

[0060] The first distance LD1 between the first drain terminal 51 and the first source terminal 52 is narrower than the width of the first drain terminal 51 in the Y direction and the width of the first source terminal 52 in the Y direction. That is, the first distance LD1 is narrower than the first terminal width LW1. In addition, the distance between the second drain terminal 53 and the second source terminal 54 described below is the same as the first distance LD1. Furthermore, the relationship between the distance between the second drain terminal 53 and the second source terminal 54 and the width of the second drain terminal 53 and the second source terminal 54 in the Y direction is the same as the relationship between the first drain terminal 51 and the first source terminal 52.

[0061] The second distance LD2 between the first source terminal 52 and the second drain terminal 53 is narrower than the second terminal width LW2. The distance between the first drain terminal 51 and the second drain terminal 53 and the distance between the first drain terminal 51 and the second source terminal 54 are the same as the second distance LD2.

[0062] The first lead frame and the second lead frame are provided with a plurality of external connection terminals 6. That is, the first lead frame has a plurality of external connection terminals 6. Similarly, the second lead frame has a plurality of external connection terminals 6. The plurality of external connection terminals 6 are arranged in a row in the X direction.

[0063] The external connection terminals 6 of the first lead frame are electrically connected to the first gate electrode 11 via leads (not shown). Similarly, the external connection terminals 6 of the second lead frame are electrically connected to the second gate electrode 21 via leads. The plurality of external connection terminals 6 include terminals electrically connected to pads to which a temperature sensor or a current sensor is electrically connected via leads.

[0064] Furthermore, if Figure 1 As shown in FIG. 1 , the first drain terminal 51 is arranged adjacent to both the second drain terminal 53 and the second source terminal 54. That is, the first drain terminal 51 is adjacent to both the second drain terminal 53 and the second source terminal 54 in the X direction. Similarly, the second drain terminal 53 is adjacent to both the first drain terminal 51 and the first source terminal 52 in the X direction. Therefore, the first drain terminal 51 has a first overlapping portion 51a facing the second drain terminal 53. On the other hand, the second drain terminal 53 has a second overlapping portion 53a facing the first drain terminal 51.

[0065] In the semiconductor device 100, the arrangement direction of the first drain terminal 51 and the first source terminal 52 is opposite to the arrangement direction of the second drain terminal 53 and the second source terminal 54. Therefore, the semiconductor device 100 can be said to alternately arrange the terminals 51 and 52 on the first semiconductor element 1 side and the terminals 53 and 54 on the second semiconductor element 2 side.

[0066] The first connecting piece 3 corresponds to the first bridge member. The first connecting piece 3 can be configured with a conductive material such as Cu, Fe or an alloy thereof as a main component. Figure 1 , Figure 2 As shown, it has a first electrode opposing portion 31 opposed to the first source electrode 12, a first terminal opposing portion 32 corresponding to the first source terminal 52, and a first connecting portion 33 connecting the first electrode opposing portion 31 and the first terminal opposing portion 32. The first electrode opposing portion 31, the first terminal opposing portion 32 and the first connecting portion 33 are block-shaped components that are formed as an integral body.

[0067] The first electrode opposing portion 31 is electrically connected to the first source electrode 12 via solder. Similarly, the first terminal opposing portion 32 is electrically connected to the first source terminal 52 via solder. In this way, the first semiconductor element 1 electrically connects the first source electrode 12 and the first source terminal 52 via the first connecting piece 3. In this embodiment, as an example, the first connecting piece 3 is used, which is, for example, rectangular in the XY plane and has a thickness in the Z direction.

[0068] The second connection piece 4 is equivalent to the second bridge member. The second connection piece 4 has a second electrode facing portion 41, a second terminal facing portion 42, and a second connecting portion 43. The second connection piece 4 is connected to the second semiconductor element 2, but has the same structure as the first connection piece 3. Therefore, the description of the first connection piece 3 can be referred to for the second connection piece 4.

[0069] In addition, in the present invention, a lead wire mainly composed of aluminum, copper, etc. can be used instead of the connection pieces 3 and 4. However, since the connection pieces 3 and 4 have lower resistance than the lead wire, in addition to being able to flow a large current with low loss, current can also flow from the entire source electrodes 12 and 22 of each semiconductor element 1 and 2. Therefore, the semiconductor device 100 can maintain a constant source potential by using the connection pieces 3 and 4. In addition, when the semiconductor device 100 is formed with a sense MOS in each semiconductor element 1 and 2, the current detection accuracy is improved.

[0070] As described above, the connecting pieces 3, 4 and the electrodes 12, 22, and the connecting pieces 3, 4 and the terminals 52, 53 are connected by solder. That is, the solder is used to fix them and allow current to flow. Therefore, it is preferred that a material with low resistivity is used for the solder. For example, the material of the solder uses lead-free solder SnAgCu or lead-containing PbSn. However, the present invention is not limited to this, and solder composed of other materials can also be used. Furthermore, the present invention can also use Ag paste or molten Ag, etc.

[0071] The sealing resin portion 7 includes an electrically insulating resin and a filler having a higher thermal conductivity than the electrically insulating resin as constituent materials. That is, the sealing resin portion 7 has a filler embedded in the electrically insulating resin. The electrically insulating resin may be, for example, an epoxy resin. On the other hand, the filler may be inorganic particles such as alumina.

[0072] The sealing resin portion 7 can have electrical insulation and a thermal conductivity of 2.2 W or more, for example. The thermal conductivity of the sealing resin portion 7 can be adjusted by the amount and material of the filler. The sealing resin portion 7 is formed by, for example, injection molding using a metal mold.

[0073] The sealing resin portion 7 integrally covers the semiconductor elements 1 and 2, the two lead frames, the connection pieces 3 and 4, and the leads. It can be said that the sealing resin portion 7 is in contact with and seals these. The sealing resin portion 7 is rectangular in the XY plane.

[0074] The sealing resin portion 7 is as follows Figure 2 , Figure 3 As shown, there are a resin surface S11 and a resin back surface S12 opposite to the resin surface S11. The resin surface S11 and the resin back surface S12 can be, for example, flat surfaces. In addition, the resin surface S11 and the resin back surface S12 can be said to be formed along the XY plane.

[0075] In addition, the sealing resin portion 7 covers the semiconductor elements 1, 2, two lead frames, the connecting pieces 3, 4, and the leads in a state where the first terminal surfaces S21 of the drain terminals 51, 53 and the source terminals 52, 54 are exposed. Furthermore, in the present embodiment, an example is adopted in which the opposite surface of the connecting pieces 3, 4 facing the semiconductor elements 1, 2 is exposed from the sealing resin portion 7. That is, the opposite surface of the first connecting piece 3 facing the first gate electrode 11 and the first source electrode 12 of the first semiconductor element 1 is exposed from the sealing resin portion 7. Similarly, the opposite surface of the second connecting piece 4 facing the second gate electrode 21 and the second source electrode 22 of the second semiconductor element 2 is exposed from the sealing resin portion 7. The resin surface S11 is configured to be coplanar with the first terminal surface S21.

[0076] Thus, the first terminal surface S21 of the semiconductor device 100 is exposed from the sealing resin portion 7. Thus, the first terminal surface S21 is connected to a part of the wirings 210 and 220 when the semiconductor device 100 is mounted on the printed circuit board 200. The first terminal surface S21 and the wirings 210 and 220 are connected by a conductive connection member such as solder.

[0077] Here, a method for manufacturing the semiconductor device 100 is described. First, semiconductor elements 1 and 2 are manufactured by a wafer process. The wafer can be thinned as needed. In addition, the semiconductor elements 1 and 2 are plated with a solderable material such as nickel for double-sided soldering. Then, a WAT ​​(Wafer Acceptance Test) is performed to check electrical characteristics in the wafer state, and the semiconductor elements are singulated by slicing.

[0078] Then, solder is printed on the first lead frame, and the first semiconductor element 1 is mounted. Furthermore, the first semiconductor element 1 and the first connection piece 3 are joined with solder. Similarly, solder is printed on the second lead frame, and the second semiconductor element 2 is mounted. Furthermore, the second semiconductor element 2 and the second connection piece 4 are joined with solder. The first semiconductor element 1 and the second semiconductor element 2 may be mounted at the same time, and the first connection piece 3 and the second connection piece 4 may be mounted at the same time, or the above four parts may be mounted at the same time. Solder coating may also use wire solder instead of solder printing.

[0079] Then, by wire bonding, each external connection terminal 6 and semiconductor elements 1, 2 are connected with wires. The material of the wires can be gold, copper, aluminum, etc. In addition, each external connection terminal 6 and semiconductor elements 1, 2 can also be connected by soldering the connection piece without using wires.

[0080] Then, the outer shape is formed by the sealing resin part 7. Usually, in order to form a plurality of packages (semiconductor devices 100) on two lead frames, the sealing resin part 7 is also formed into a plurality of packages. Next, it is singulated into individual semiconductor devices 100. Then, the electrical characteristics are checked by inspection, the appearance is inspected, and then shipped.

[0081] In the semiconductor device 100, the first drain terminal 51 and the first source terminal 52 have different area ratios of the first terminal surface S21, and the second drain terminal 53 and the second source terminal 54 have different area ratios of the first terminal surface S21. As a result, the semiconductor device 100 can be easily configured such that the first drain terminal 51 is adjacent to both the second drain terminal 53 and the second source terminal 54, and the second drain terminal 53 is adjacent to both the first drain terminal 51 and the first source terminal 52.

[0082] Therefore, the semiconductor device 100 can suppress the increase in volume, and can use each semiconductor element 1, 2 for an inverter or as a switching element of a semiconductor relay according to the connection position between the wiring 210, 220 of the printed circuit board 200 and the terminals 51~54. That is, the semiconductor device 100 can use each semiconductor element 1, 2 as an inverter or a switching element for a semiconductor relay with one package. Furthermore, it can be said that the semiconductor device 100 can realize the commonality of the package for inverters and semiconductor relays. In addition, the wiring 210, 220 widens the terminal width LW for large currents and reduces the resistance. In order to make the terminal width LW wider, the interval LD ​​is narrowed as much as possible. In addition, the semiconductor device 100 can also make each semiconductor element 1, 2 an independent structure according to the connection position between the wiring 210, 220 of the printed circuit board 200 and the terminals 51~54.

[0083] Furthermore, since the semiconductor device 100 is configured as described above, even if the occupancy rate of the first terminal surface S21 on the resin surface S11 side increases, each of the semiconductor elements 1 and 2 can be used as an inverter or a switching element of a semiconductor relay.

[0084] Here, use Figures 4 to 8 , an example of a mounting structure of the semiconductor device 100 on the printed circuit board 200 is described.

[0085] The printed circuit board 200 has wirings 210 and 220 formed on an electrically insulating substrate. As the substrate, resin or ceramics can be used. In addition, the printed circuit board 200 can be a multi-layer substrate in which the wirings 210 and 220 are stacked via a substrate, or a single-layer substrate in which the wirings 210 and 220 are formed on the surface of the substrate. The wirings 210 and 220 are electrically connected to the terminals 51 to 54 when the semiconductor device 100 is mounted on the printed circuit board 200.

[0086] First, use Figure 4 , Figure 5 , a case where the semiconductor device 100 is used as an inverter configuration device 100a is described. The inverter configuration device 100a has the same structure as the semiconductor device 100. In addition, in this example, a printed circuit board 200 on which a capacitor 110 is mounted is used. The capacitor 110 is a snubber capacitor.

[0087] like Figure 4 As shown, the inverter component device 100a is mounted on the printed circuit board 200, so that the first source terminal 52 and the second drain terminal 53 are electrically connected via the first wiring 210. Figure 8 As shown in the left figure of FIG. 1 , the terminals 51 to 54 are connected. Figure 5 As shown in FIG. 1 , the terminal 52 and the terminal 53 function as a switching element for an inverter. Fig.19 The inverter 100a is connected to the motor as shown in FIG. Figure 4 However, current does not flow through the first semiconductor element 1 and the second semiconductor element 2 at the same time, but current flows through each of the first semiconductor element 1 and the second semiconductor element 2 at a timing corresponding to the rotation of the motor via another inverter device 100a.

[0088] In addition, the inverter component 100a is connected to the capacitor 110 through a lead wire or the like at a portion protruding from the first drain terminal 51 and a portion protruding from the second source terminal 54. The inverter component 100a is alternately arranged as described above. Therefore, the inverter component 100a can arrange the first drain terminal 51 and the second source terminal 54 closer than when the inverter component 100a is not alternately arranged. That is, the inverter component 100a can arrange the first drain terminal 51 and the second source terminal 54 close to each other while maintaining the planar installation. In addition, the inverter component 100a can also be arranged in the same manner with respect to the second drain terminal 53 and the first source terminal 52.

[0089] Therefore, the inverter configuration device 100a can arrange the capacitor 110 at a position close to both the first drain terminal 51 and the second source terminal 54. That is, the inverter configuration device 100a can make the distance between the first drain terminal 51 and the second source terminal 54 and the capacitor 110 closer than when the capacitors 110 are not arranged alternately. As a result, the inverter configuration device 100a can reduce the parasitic inductance caused by the wiring, increase the switching speed of each semiconductor element 1, 2, and reduce the switching loss of each semiconductor element 1, 2.

[0090] Next, use Figure 6 , Figure 7 Next, a case where the semiconductor device 100 is used as a relay component device 100 b will be described. The relay component device 100 b has the same structure as the semiconductor device 100 .

[0091] like Figure 6 As shown, the relay component 100b is mounted on the printed circuit board 200, so that the first source terminal 52 and the second drain terminal 53 are electrically connected via the first wiring 210. Figure 8 As shown in the right figure of FIG. , the terminals 51 to 54 are connected. Figure 7 As shown in FIG. 1 , the relay structure 100b functions as a switching element of a semiconductor relay. Figure 6 However, the relay device 100b can also be configured to flow current as shown by the double-dashed line. Figure 6 The current flows in the direction opposite to the double-dotted line.

[0092] The preferred embodiments of the present invention have been described above. However, the present invention is not limited to the above embodiments at all, and various modifications can be made without departing from the gist of the present invention. Hereinafter, as other forms of the present invention, the second to fifth embodiments and modifications 1 to 3 are described. The above embodiments and the second to fifth embodiments and modifications 1 to 3 can also be implemented separately, but can also be implemented in appropriate combination. The present invention is not limited to the combinations shown in the embodiments, and can be implemented in various combinations.

[0093] (Variant 1)

[0094] use Fig. 9 A semiconductor device 101 according to a modification example 1 is described. Here, the differences between the semiconductor device 101 and the semiconductor device 100 are mainly described. In the semiconductor device 101, the structure of the sealing resin portion 7a is different from that of the semiconductor device 100. In the semiconductor device 101, the same reference numerals are given to the same parts as those of the semiconductor device 100. Therefore, the above-mentioned embodiment can be applied with reference to the components with the same reference numerals. In addition, Fig. 9 The cross-sectional view is equivalent to Figure 3 sectional view of .

[0095] The sealing resin portion 7a is made of the same material as the sealing resin portion 7. Fig. 9 As shown, the semiconductor device 101 has a surface layer resin portion 71a formed on the connection pads 3 and 4. That is, in the semiconductor device 101, the connection pads 3 and 4 are not exposed from the sealing resin portion 7a but are covered by the sealing resin portion 7a. Thus, the semiconductor device 101 can ensure electrical insulation of the connection pads 3 and 4.

[0096] The surface resin portion 71a has a thickness of at least 1 times the particle size of the filler. Thus, the sealing resin portion 7a can obtain a surface resin portion 71a containing the filler. That is, the sealing resin portion 7a can maintain thermal conductivity and ensure electrical insulation due to the filler. In other words, the sealing resin portion 7a can ensure heat dissipation and electrical insulation.

[0097] When the thickness of the surface resin portion 71a is about the particle size of the filler, the sealing resin portion 7a can be said to form a single resin layer on the connection sheets 3 and 4. The sealing resin portion 7a can also be said to include the surface resin portion 71a having a thickness greater than 1 times the particle size of the filler.

[0098] The surface resin portion 71a preferably has a thickness of 0.2 mm or more and 0.6 mm or less. The thickness of the surface resin portion 71a is the thickness in the Z direction. The thickness of the surface resin portion 71a can be adjusted by the size of the cavity (void) of the metal mold.

[0099] Therefore, it can be thought that the thickness of the surface resin portion 71a varies according to the shape and thickness tolerance of the connecting pieces 3 and 4, the tolerance of the solder formed on both sides of the semiconductor elements 1 and 2, and the thickness tolerance of the lead frame. The inventors studied the thickness of the surface resin portion 71a in consideration of these tolerances, the process capability when molding the sealing resin portion 7a, etc. As a result, the result that the thickness of the surface resin portion 71a is preferably 0.4mm±0.2mm was obtained. That is, the semiconductor device 100 can easily form the surface resin portion 71a containing filler by making the thickness of the surface resin portion 71a 0.4mm±0.2mm, and can ensure heat dissipation and electrical insulation.

[0100] As described above, the semiconductor device 101 can ensure electrical insulation because it is covered with the sealing resin portion 7a without exposing the connecting pieces 3 and 4. Furthermore, the semiconductor device 101 can also ensure heat dissipation because the thermal conductivity of the sealing resin portion 7a is 2.2W or more. That is, the semiconductor device 101 can ensure electrical insulation and heat dissipation without providing an electrically insulating heat dissipation gel or the like on the connecting pieces 3 and 4. In other words, the semiconductor device 101 can ensure electrical insulation and heat dissipation with the semiconductor device 101 alone. Therefore, the semiconductor device 101 does not need to ensure electrical insulation and heat dissipation at the user side such as the delivery point. In addition, the semiconductor device 101 can achieve the same effect as the semiconductor device 100.

[0101] (Second embodiment)

[0102] use Figure 10 to Figure 14 A semiconductor device 102 according to a second embodiment will be described. Here, the differences between the semiconductor device 102 and the semiconductor device 100 will be mainly described. The semiconductor device 102 is different from the semiconductor device 100 in that it includes an ASIC 9. In the semiconductor device 102, the same reference numerals are given to the same parts as those in the semiconductor device 100. Therefore, the above-described embodiment can be applied with reference to the components with the same reference numerals.

[0103] In this embodiment, the shapes of the terminals 51 to 54 and the shapes of the connection pieces 3 and 4 are different from those in the above embodiment, but these are not essential differences. Therefore, in this embodiment, the same reference numerals as those in the above embodiment are used for convenience.

[0104] like Fig.11 , Fig.13As shown in FIG. 1 , the semiconductor device 102 is configured similarly to the semiconductor device 100. Fig.10 , Fig.12 As shown, the semiconductor device 102 has the ASIC 9 mounted on the second source terminal 54 .

[0105] The semiconductor device 102 is Fig.14 As shown, it has a first input terminal 61, a second input terminal 62, a power supply terminal 63, and a ground terminal 64 as external connection terminals 6. In addition, the semiconductor device 102 has a charge pump circuit 91 (circuit power supply) that provides power to a drive circuit 93 described later. The charge pump circuit 91 is separated from the power supply (electric power supply) provided to each terminal 51 to 54. In other words, the power supply for the drive circuit 93 is separated from the electric power supply. In addition, in the figure, the charge pump circuit is also denoted as CP. The charge pump circuit 91 is equivalent to the power supply for the drive circuit. Fig.14 In FIG. 8 , a driving circuit formed in ASIC 9 is given a reference numeral 93 .

[0106] ASIC 9 forms a circuit for driving each semiconductor element 1, 2. ASIC 9 is mounted on the second source terminal 54. ASIC 9 is connected to the second source terminal 54 via silver paste. ASIC 9 may be mounted together with each semiconductor element 1, 2 or at a different time from each semiconductor element 1, 2.

[0107] Thus, the ASIC 9 is grounded by connecting the back surface to the second source terminal 54 with the silver paste. In order to prevent a large current from flowing through the ASIC 9, the ASIC 9 may be connected to the second source terminal 54 with the silver paste which does not have a low resistance like solder.

[0108] However, the ASIC 9 may be connected to the second source terminal 54 by solder instead of the silver paste. In this case, it is necessary to form a plating layer of nickel or the like on the back surface of the ASIC 9.

[0109] ASIC9 Fig.10 , Fig.14 As shown, the ASIC 9 is connected to the first input terminal 61, the second input terminal 62, the power supply terminal 63, the ground terminal 64, and the gate electrodes 11 and 21 via the lead wire 8. Thus, the ASIC 9 can be electrically connected to an external device provided outside the semiconductor device 102.

[0110] In addition, as mentioned above, aluminum, copper, gold, etc. can be used for the lead wire 8. In addition, the present invention can also use a connection piece instead of the lead wire 8.

[0111] The drive circuit 93 operates at a voltage obtained by boosting the voltage of the power supply terminal 63 by the charge pump circuit 91 (power supply circuit). In addition, the drive circuit 93 applies a gate signal to the first semiconductor element 1 based on a signal input from the first input terminal 61. Similarly, the drive circuit 93 applies a gate signal to the second semiconductor element 2 based on a signal input from the second input terminal 62.

[0112] Each semiconductor element 1 , 2 may be provided with a sensing MOS or a temperature sensing diode. In this case, the ASIC 9 receives a signal from the sensing MOS or the temperature sensing diode via the lead 8 .

[0113] Furthermore, the ASIC 9 may include a charge pump circuit 91. Thus, the semiconductor device 102 does not need to add a power supply IC depending on the usage environment.

[0114] The semiconductor device 102 can achieve the same effect as the semiconductor device 100. Furthermore, the semiconductor device 102 can cope with both the high side and the low side by including the ASIC 9. Thus, the semiconductor device 102 can be standardized. Therefore, the semiconductor device 102 does not need to use a dedicated driver IC according to the use environment, which can shorten the development period and reduce resource costs. In addition, the semiconductor device 102 can also adopt the surface resin portion 71a of the modification example 1.

[0115] The mounting location of the ASIC 9 is not limited to the above, and the ASIC 9 may be mounted on the first drain terminal 51, on the second connection sheet 4, on the second source electrode 22 of the second semiconductor element 2, or any other location where potential fluctuation is small.

[0116] (Variant 2)

[0117] use Fig.15 , Fig.16 A semiconductor device 103 according to a second variation will be described. Here, the differences between the semiconductor device 103 and the semiconductor device 102 will be mainly described. The semiconductor device 103 is different from the semiconductor device 102 in that a capacitor 110 is connected. In the semiconductor device 103, the same reference numerals are given to the same parts as those in the semiconductor device 102. Thus, the above-described embodiment can be applied with reference to the components with the same reference numerals. Fig.16 In the figure, the semiconductor device 103 is indicated by a dotted line.

[0118] like Fig.15As shown, the semiconductor device 103 is connected to the capacitor 110 as in the inverter configuration device 100a. In addition, the semiconductor device 103 is mounted on the printed circuit board 200 as in the inverter configuration device 100a. Thus, the electronic device includes the semiconductor device 103 and the printed circuit board 200 on which the capacitor 110 is mounted. In this way, when the semiconductor device 103 is used as an inverter configuration device, by connecting the capacitor 110, the same effect as described above can be achieved.

[0119] like Fig.15 , Fig.16 As shown, the semiconductor device 103 includes an ASIC 9 including a drive circuit, similarly to the semiconductor device 102 . Fig.16 The figure on the left side of FIG. 1 is an example in which the semiconductor device 103 is applied to the inverter configuration device and has a power supply terminal for the ASIC 9. In this case, the power supply terminal of the ASIC 9 is connected to the bootstrap circuit 92. Thus, the semiconductor device 103 can also correspond to the bootstrap circuit 92. That is, the ASIC 9 can obtain an external power supply.

[0120] Fig.16 The central figure is an example in which a semiconductor device 103 is applied to an inverter configuration device and includes a charge pump circuit 91. The charge pump circuit 91 may also be built into the ASIC 9. Since the semiconductor device 103 in this example does not require low voltage operation (startability) like a vehicle-mounted device, it can be said that the ASIC 9 including the charge pump circuit 91 is built into the semiconductor device 103.

[0121] Fig.16 The figure on the right side of FIG. 1 is an example in which the semiconductor device 103 is applied to a relay configuration device and includes a charge pump circuit 91. Fig.16 In the figure on the right side of FIG. 1 , an example is adopted in which a temperature terminal 65 connected to a temperature sensor is provided. The semiconductor device 103 of this example requires a charge pump circuit 91 because the MOS needs to be kept turned on.

[0122] The semiconductor device 103 can achieve the same effect as the semiconductor device 102. In addition, by making the cathode side of the diode of the external bootstrap circuit 92 and the charge pump power supply output common, the semiconductor device 103 obtains power from the built-in charge pump circuit 91 or obtains power from the external bootstrap circuit 92, thereby realizing free gate drive.

[0123] (Third embodiment)

[0124] use Fig.17 , Fig.18A semiconductor device 104 according to a third embodiment will be described. Here, the differences between the semiconductor device 104 and the semiconductor device 100 will be mainly described. The orientations of the first terminals 51 and 52 and the second terminals 53 and 54 of the semiconductor device 104 are different from those of the semiconductor device 100. In the semiconductor device 104, the same reference numerals are given to the same parts as those of the semiconductor device 100. Therefore, the above-described embodiments can be applied with reference to the components with the same reference numerals.

[0125] like Fig.17 As shown in FIG. 1 , the semiconductor device 104 has the first drain terminal 51 and the second drain terminal 53 arranged adjacent to each other in the X direction. In addition, the semiconductor device 104 has the first source terminal 52 and the second source terminal 54 arranged adjacent to each other in the X direction. Thus, in the semiconductor device 104, the arrangement direction of the first drain terminal 51 and the first source terminal 52 on the first semiconductor element 1 side is the same as the arrangement direction of the second drain terminal 53 and the second source terminal 54 on the second semiconductor element 2 side.

[0126] Furthermore, the first source terminal 52 is disposed adjacent to both the second drain terminal 53 and the second source terminal 54 in the X direction. In addition, the second drain terminal 53 is disposed adjacent to both the first drain terminal 51 and the first source terminal 52 in the X direction. Therefore, the second drain terminal 53 has a second overlapping portion 53a facing the first source terminal 52. On the other hand, the first source terminal 52 has a third overlapping portion 52a facing the second drain terminal 53.

[0127] like Fig.18 As shown, the semiconductor device 104 can be formed into an inverter component device 100a and a relay component device 100b by connecting the terminals with the wiring of the printed circuit board 200 in the same manner as in the first embodiment. Fig.18 As shown in the right figure of FIG. 1 , the first source terminal 52 and the second drain terminal 53 are connected by wiring. On the other hand, the relay device 100b is as shown in FIG. Fig.18 As shown in the left figure of , the first source terminal 52 and the second source terminal 54 are connected by wiring.

[0128] The semiconductor device 104 can achieve the same effects as those of the semiconductor device 100 .

[0129] (Fourth embodiment)

[0130] use Fig.19 Semiconductor devices 100a and 100b according to a fourth embodiment will be described. In this embodiment, an example is taken in which two types of semiconductor devices 100a and 100b are applied to an electric power steering system (EPS system). Fig.19 It is the circuit of the electrical part of the EPS system.

[0131] The EPS system includes a three-phase motor 400. In addition, the EPS system includes a relay component 100b used as a power relay and a reverse connection prevention relay, and an inverter component 100a used as a half bridge of the inverter 300. That is, the EPS system includes a semiconductor device 100 used as a power relay and a reverse connection prevention relay, and a semiconductor device 100 used as a half bridge of the inverter 300.

[0132] The power supply relay has a function of stopping the power supply to the EPS circuit and the motor 400 when the EPS is stopped or abnormal. The reverse connection prevention relay has a function of preventing the reverse connection of the vehicle battery by causing a current to flow through the power supply relay via a built-in diode.

[0133] The inverter 300 is provided with three inverter components 100a as half bridges, which are respectively connected to the motor terminals. That is, the inverter 300 is provided with inverter components 100a for the U phase, V phase, and W phase of the motor 400. The inverter 300 drives the motor 400 to rotate by turning on and off the semiconductor elements 1 and 2 of each inverter component 100a.

[0134] The EPS system requires a drive circuit to drive the inverter component 100a. The drive circuit can be built into ASIC9 as in the above embodiment. ASIC9 can be mounted in a package common to the semiconductor elements 1 and 2, or can be separately configured externally. In addition, the EPS system requires a power supply with a voltage higher than the power supply voltage to drive the high-side semiconductor elements 1 and 2. Therefore, the EPS system uses a charge pump circuit 91 or a bootstrap circuit as in the above embodiment.

[0135] The inverter component 100a and the relay component 100b can achieve the same effect as the semiconductor device 100. In addition, in this embodiment, the same package (semiconductor device 100) can be used in the inverter component 100a and the relay component 100b. In this way, the semiconductor device 100 can be used in common for different functions, so that the development efficiency and production efficiency can be improved.

[0136] (Fifth embodiment)

[0137] use Fig. 20 , Fig.21A semiconductor device 105 according to a fifth embodiment will be described. Here, the differences between the semiconductor device 105 and the semiconductor device 101 will be mainly described. The structures of the first terminals 51b, 52b and the second terminals 53b, 54b of the semiconductor device 105 are different from those of the semiconductor device 101. In the semiconductor device 105, the same reference numerals are given to the same parts as those of the semiconductor device 101. Therefore, the above-described embodiments can be applied with reference to the components with the same reference numerals.

[0138] like Fig. 20 As shown, the first lead frame includes a first gate terminal 6a, a first drain terminal 51b, and a first source terminal 52b. The first drain terminal 51b includes a portion for mounting the first semiconductor element 1 and a portion protruding from the portion. Thus, the first drain terminal 51b can be regarded as a structure in which the first drain terminal 51 and the external connection terminal 6 are integrated.

[0139] The first source terminal 52b is composed of a plurality of components. That is, the first source terminal 52b can be regarded as a structure including a plurality of external connection terminals 6. The first gate terminal 6a is one of the plurality of external connection terminals 6.

[0140] The second lead frame includes a second gate terminal 6b, a second drain terminal 53b, and a second source terminal 54b. The terminals 6b, 53b, and 54b are the same as the terminals 6b, 51b, and 52b.

[0141] like Fig.21 As shown in FIG. 1 , the sealing resin portion 7b has a surface layer resin portion 71b similarly to the sealing resin portion 7a. The surface layer resin portion 71b corresponds to the surface layer resin portion 71a.

[0142] The semiconductor device 105 can achieve the same effects as those of the semiconductor device 101. The structure of this embodiment can also be applied to other embodiments.

[0143] Generally, the soldering part connecting the printed circuit board and the semiconductor device starts to be damaged from the outer terminals due to the strong stress of temperature cycle, etc. That is, the life of the soldering part is shorter than that of the inner terminals. The semiconductor device cannot be electrically connected between the terminal and the printed circuit board where the soldering part is damaged. In this case, the semiconductor device may not work.

[0144] The gate terminals 6a and 6b of the semiconductor device 105 are arranged on the inner side. Therefore, the influence of damage to the semiconductor device 105 is small according to the solder life of the gate terminals 6a and 6b, and the reliability is improved. In addition, even if it is a terminal different from the gate terminals 6a and 6b, as long as only one terminal is arranged on the inner side, the semiconductor device 105 can also achieve the same effect. In addition, the outer side refers to the end in the X direction. The inner side refers to a portion that is not an end in the X direction.

[0145] The semiconductor device 105 also has drain terminals 51b, 53b and source terminals 52b, 54b on the outside. However, since the semiconductor device 105 also has drain terminals 51b, 53b and source terminals 52b, 54b on the inside, it can operate normally even if the outside terminals are damaged.

[0146] (Reference example)

[0147] exist Fig. 22 5 shows a semiconductor device 500 of a reference example. The semiconductor device 500 includes a semiconductor element 510, a drain terminal 520, a gate terminal 530, a source terminal 540, a connecting piece 550, and a sealing resin portion 560. The semiconductor device 500 has the gate terminal 530 arranged inside as in the semiconductor device 105. Thus, the semiconductor device 500 is less affected by damage due to the solder life of the gate terminal 530, and the reliability is improved, as is the case with the semiconductor device 105. In addition, in the semiconductor device 500, since the drain terminal 520 and the source terminal 540 are arranged in the same manner as the semiconductor device 105, the same effect as the semiconductor device 105 can be achieved.

[0148] (Variant 3)

[0149] use Fig.23 A semiconductor device 106 according to a third modification example will be described. Here, the differences between the semiconductor device 106 and the semiconductor device 105 will be mainly described. In the semiconductor device 106, the structure of the sealing resin portion 7c is different from that of the semiconductor device 105. In the semiconductor device 106, the same reference numerals are given to the same parts as those of the semiconductor device 105. Therefore, the above-described embodiment can be applied with reference to the components with the same reference numerals. Fig.23 is equivalent to Fig.21 sectional view of .

[0150] The semiconductor device 106 includes a sealing resin portion 7c. The sealing resin portion 7c is provided in a state where the surface opposite to the surface of the second connection sheet 4 facing the second semiconductor element 2 is exposed, similarly to the sealing resin portion 7. In addition, the sealing resin portion 7c is provided in a state where the surface opposite to the surface of the first connection sheet 3 facing the first semiconductor element 1 is exposed. The semiconductor device 106 can achieve the same effect as the semiconductor device 105.

Claims

1. A semiconductor device configured to be mounted on a wiring substrate having wiring, characterized in that: have: The first semiconductor element and the second semiconductor element have electrodes formed on both sides; Two first terminals, which are connected to a part of the wiring when mounted on the wiring substrate, and are electrically connected to the electrodes of the first semiconductor element, and are arranged side by side in one direction; Two second terminals, connected to a portion of the wiring when mounted on the wiring substrate, and electrically connected to the electrodes of the second semiconductor element, adjacent to the first terminal and arranged in the one direction; as well as a sealing resin portion covering the first semiconductor element, the second semiconductor element, the first terminal, and the second terminal in a state where a surface of the first terminal and the second terminal facing the wiring substrate is exposed when mounted on the wiring substrate; The area ratios of the above-mentioned one side of the two above-mentioned first terminals are different; The area ratios of the two second terminals on the one side are different; One of the two first terminals and both of the two second terminals are arranged adjacent to each other.

2. The semiconductor device according to claim 1, wherein The interval between the two first terminals is narrower than the width of the two first terminals in the arrangement direction; The interval between the two second terminals is narrower than the width of the two second terminals in the arrangement direction; A distance between the first terminal and the two second terminals is narrower than a width of the first terminal and the second terminals in an arrangement direction.

3. The semiconductor device according to claim 1, wherein: The first semiconductor element and the second semiconductor element each have a surface electrode formed on the surface and a back electrode formed on the back surface; The two first terminals include a first back terminal disposed opposite to and connected to the back electrode of the first semiconductor element, and a first front terminal connected to the front electrode of the first semiconductor element via a first bridge member; The two second terminals include a second back terminal disposed opposite to and connected to the back electrode of the second semiconductor element, and a second front terminal connected to the front electrode of the second semiconductor element via a second bridge member; The two first terminals and the two second terminals are arranged such that the first back surface terminal and the second front surface terminal are adjacent to each other, and the second back surface terminal and the first front surface terminal are adjacent to each other.

4. The semiconductor device according to claim 1, wherein: The first semiconductor element and the second semiconductor element each have a surface electrode formed on the surface and a back electrode formed on the back surface; The two first terminals include a first back terminal disposed opposite to and connected to the back electrode of the first semiconductor element, and a first front terminal connected to the front electrode of the first semiconductor element via a first bridge member; The two second terminals include a second back terminal disposed opposite to and connected to the back electrode of the second semiconductor element, and a second front terminal connected to the front electrode of the second semiconductor element via a second bridge member; The two first terminals and the two second terminals are arranged such that the first back surface terminal and the second back surface terminal are adjacent to each other, and the first front surface terminal and the second front surface terminal are adjacent to each other.

5. The semiconductor device according to claim 3 or 4, characterized in that The first bridge member and the second bridge member are sheet-shaped members.

6. The semiconductor device according to claim 5, wherein: The first bridge member has a surface opposite to a surface facing the surface electrode of the first semiconductor element and the first surface terminal exposed from the sealing resin portion; The second bridge member has a surface opposite to a surface facing the surface electrode of the second semiconductor element and the second surface terminal exposed from the sealing resin portion.

7. The semiconductor device according to claim 1, wherein further comprising a driving circuit for driving the first semiconductor element and the second semiconductor element; The power supply for the driving circuit is separated from the power supply supplied to the first terminal and the second terminal.

8. The semiconductor device according to claim 7, wherein: The driving circuit includes a built-in power supply circuit for supplying power to the driving circuit.

9. An electronic device, characterized in that: have: The semiconductor device according to any one of claims 1 to 8; and The wiring substrate has the semiconductor device mounted thereon and has wirings formed thereon that are electrically connected to the two first terminals and the two second terminals.

10. An electronic device, characterized in that: have: The semiconductor device according to claim 3; and The wiring substrate is mounted with the semiconductor device and has wiring electrically connected to the two first terminals and the two second terminals; The first back surface terminal and the second front surface terminal are close to and respectively connected to terminals of capacitors on the wiring substrate.

11. The electronic device according to claim 10, wherein: The semiconductor device further comprises a driving circuit for driving the first semiconductor element and the second semiconductor element; The power supply for the driving circuit is separated from the power supply supplied to the first terminal and the second terminal.

12. The electronic device according to claim 11, wherein: The driving circuit includes a built-in power supply circuit for supplying power to the driving circuit.

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